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664e0f19 1/*
222a3336 2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
5fafdf24 3 *
664e0f19 4 * Copyright (c) 2005 Fabrice Bellard
222a3336 5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com>
664e0f19
FB
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
8167ee88 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
664e0f19
FB
19 */
20#if SHIFT == 0
21#define Reg MMXReg
001faf32 22#define XMM_ONLY(...)
664e0f19
FB
23#define B(n) MMX_B(n)
24#define W(n) MMX_W(n)
25#define L(n) MMX_L(n)
26#define Q(n) q
27#define SUFFIX _mmx
28#else
29#define Reg XMMReg
001faf32 30#define XMM_ONLY(...) __VA_ARGS__
664e0f19
FB
31#define B(n) XMM_B(n)
32#define W(n) XMM_W(n)
33#define L(n) XMM_L(n)
34#define Q(n) XMM_Q(n)
35#define SUFFIX _xmm
36#endif
37
5af45186 38void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s)
664e0f19 39{
664e0f19
FB
40 int shift;
41
664e0f19
FB
42 if (s->Q(0) > 15) {
43 d->Q(0) = 0;
44#if SHIFT == 1
45 d->Q(1) = 0;
46#endif
47 } else {
48 shift = s->B(0);
49 d->W(0) >>= shift;
50 d->W(1) >>= shift;
51 d->W(2) >>= shift;
52 d->W(3) >>= shift;
53#if SHIFT == 1
54 d->W(4) >>= shift;
55 d->W(5) >>= shift;
56 d->W(6) >>= shift;
57 d->W(7) >>= shift;
58#endif
59 }
60}
61
5af45186 62void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s)
664e0f19 63{
664e0f19
FB
64 int shift;
65
664e0f19
FB
66 if (s->Q(0) > 15) {
67 shift = 15;
68 } else {
69 shift = s->B(0);
70 }
71 d->W(0) = (int16_t)d->W(0) >> shift;
72 d->W(1) = (int16_t)d->W(1) >> shift;
73 d->W(2) = (int16_t)d->W(2) >> shift;
74 d->W(3) = (int16_t)d->W(3) >> shift;
75#if SHIFT == 1
76 d->W(4) = (int16_t)d->W(4) >> shift;
77 d->W(5) = (int16_t)d->W(5) >> shift;
78 d->W(6) = (int16_t)d->W(6) >> shift;
79 d->W(7) = (int16_t)d->W(7) >> shift;
80#endif
81}
82
5af45186 83void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s)
664e0f19 84{
664e0f19
FB
85 int shift;
86
664e0f19
FB
87 if (s->Q(0) > 15) {
88 d->Q(0) = 0;
89#if SHIFT == 1
90 d->Q(1) = 0;
91#endif
92 } else {
93 shift = s->B(0);
94 d->W(0) <<= shift;
95 d->W(1) <<= shift;
96 d->W(2) <<= shift;
97 d->W(3) <<= shift;
98#if SHIFT == 1
99 d->W(4) <<= shift;
100 d->W(5) <<= shift;
101 d->W(6) <<= shift;
102 d->W(7) <<= shift;
103#endif
104 }
105}
106
5af45186 107void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s)
664e0f19 108{
664e0f19
FB
109 int shift;
110
664e0f19
FB
111 if (s->Q(0) > 31) {
112 d->Q(0) = 0;
113#if SHIFT == 1
114 d->Q(1) = 0;
115#endif
116 } else {
117 shift = s->B(0);
118 d->L(0) >>= shift;
119 d->L(1) >>= shift;
120#if SHIFT == 1
121 d->L(2) >>= shift;
122 d->L(3) >>= shift;
123#endif
124 }
125}
126
5af45186 127void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s)
664e0f19 128{
664e0f19
FB
129 int shift;
130
664e0f19
FB
131 if (s->Q(0) > 31) {
132 shift = 31;
133 } else {
134 shift = s->B(0);
135 }
136 d->L(0) = (int32_t)d->L(0) >> shift;
137 d->L(1) = (int32_t)d->L(1) >> shift;
138#if SHIFT == 1
139 d->L(2) = (int32_t)d->L(2) >> shift;
140 d->L(3) = (int32_t)d->L(3) >> shift;
141#endif
142}
143
5af45186 144void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s)
664e0f19 145{
664e0f19
FB
146 int shift;
147
664e0f19
FB
148 if (s->Q(0) > 31) {
149 d->Q(0) = 0;
150#if SHIFT == 1
151 d->Q(1) = 0;
152#endif
153 } else {
154 shift = s->B(0);
155 d->L(0) <<= shift;
156 d->L(1) <<= shift;
157#if SHIFT == 1
158 d->L(2) <<= shift;
159 d->L(3) <<= shift;
160#endif
161 }
162}
163
5af45186 164void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s)
664e0f19 165{
664e0f19
FB
166 int shift;
167
664e0f19
FB
168 if (s->Q(0) > 63) {
169 d->Q(0) = 0;
170#if SHIFT == 1
171 d->Q(1) = 0;
172#endif
173 } else {
174 shift = s->B(0);
175 d->Q(0) >>= shift;
176#if SHIFT == 1
177 d->Q(1) >>= shift;
178#endif
179 }
180}
181
5af45186 182void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s)
664e0f19 183{
664e0f19
FB
184 int shift;
185
664e0f19
FB
186 if (s->Q(0) > 63) {
187 d->Q(0) = 0;
188#if SHIFT == 1
189 d->Q(1) = 0;
190#endif
191 } else {
192 shift = s->B(0);
193 d->Q(0) <<= shift;
194#if SHIFT == 1
195 d->Q(1) <<= shift;
196#endif
197 }
198}
199
200#if SHIFT == 1
5af45186 201void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s)
664e0f19 202{
664e0f19
FB
203 int shift, i;
204
664e0f19 205 shift = s->L(0);
e01d9d31 206 if (shift > 16) {
664e0f19 207 shift = 16;
e01d9d31
BS
208 }
209 for (i = 0; i < 16 - shift; i++) {
664e0f19 210 d->B(i) = d->B(i + shift);
e01d9d31
BS
211 }
212 for (i = 16 - shift; i < 16; i++) {
664e0f19 213 d->B(i) = 0;
e01d9d31 214 }
664e0f19
FB
215}
216
5af45186 217void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s)
664e0f19 218{
664e0f19
FB
219 int shift, i;
220
664e0f19 221 shift = s->L(0);
e01d9d31 222 if (shift > 16) {
664e0f19 223 shift = 16;
e01d9d31
BS
224 }
225 for (i = 15; i >= shift; i--) {
664e0f19 226 d->B(i) = d->B(i - shift);
e01d9d31
BS
227 }
228 for (i = 0; i < shift; i++) {
664e0f19 229 d->B(i) = 0;
e01d9d31 230 }
664e0f19
FB
231}
232#endif
233
e01d9d31
BS
234#define SSE_HELPER_B(name, F) \
235 void glue(name, SUFFIX)(Reg *d, Reg *s) \
236 { \
237 d->B(0) = F(d->B(0), s->B(0)); \
238 d->B(1) = F(d->B(1), s->B(1)); \
239 d->B(2) = F(d->B(2), s->B(2)); \
240 d->B(3) = F(d->B(3), s->B(3)); \
241 d->B(4) = F(d->B(4), s->B(4)); \
242 d->B(5) = F(d->B(5), s->B(5)); \
243 d->B(6) = F(d->B(6), s->B(6)); \
244 d->B(7) = F(d->B(7), s->B(7)); \
245 XMM_ONLY( \
246 d->B(8) = F(d->B(8), s->B(8)); \
247 d->B(9) = F(d->B(9), s->B(9)); \
248 d->B(10) = F(d->B(10), s->B(10)); \
249 d->B(11) = F(d->B(11), s->B(11)); \
250 d->B(12) = F(d->B(12), s->B(12)); \
251 d->B(13) = F(d->B(13), s->B(13)); \
252 d->B(14) = F(d->B(14), s->B(14)); \
253 d->B(15) = F(d->B(15), s->B(15)); \
254 ) \
255 }
256
257#define SSE_HELPER_W(name, F) \
258 void glue(name, SUFFIX)(Reg *d, Reg *s) \
259 { \
260 d->W(0) = F(d->W(0), s->W(0)); \
261 d->W(1) = F(d->W(1), s->W(1)); \
262 d->W(2) = F(d->W(2), s->W(2)); \
263 d->W(3) = F(d->W(3), s->W(3)); \
264 XMM_ONLY( \
265 d->W(4) = F(d->W(4), s->W(4)); \
266 d->W(5) = F(d->W(5), s->W(5)); \
267 d->W(6) = F(d->W(6), s->W(6)); \
268 d->W(7) = F(d->W(7), s->W(7)); \
269 ) \
270 }
271
272#define SSE_HELPER_L(name, F) \
273 void glue(name, SUFFIX)(Reg *d, Reg *s) \
274 { \
275 d->L(0) = F(d->L(0), s->L(0)); \
276 d->L(1) = F(d->L(1), s->L(1)); \
277 XMM_ONLY( \
278 d->L(2) = F(d->L(2), s->L(2)); \
279 d->L(3) = F(d->L(3), s->L(3)); \
280 ) \
281 }
282
283#define SSE_HELPER_Q(name, F) \
284 void glue(name, SUFFIX)(Reg *d, Reg *s) \
285 { \
286 d->Q(0) = F(d->Q(0), s->Q(0)); \
287 XMM_ONLY( \
288 d->Q(1) = F(d->Q(1), s->Q(1)); \
289 ) \
290 }
664e0f19
FB
291
292#if SHIFT == 0
293static inline int satub(int x)
294{
e01d9d31 295 if (x < 0) {
664e0f19 296 return 0;
e01d9d31 297 } else if (x > 255) {
664e0f19 298 return 255;
e01d9d31 299 } else {
664e0f19 300 return x;
e01d9d31 301 }
664e0f19
FB
302}
303
304static inline int satuw(int x)
305{
e01d9d31 306 if (x < 0) {
664e0f19 307 return 0;
e01d9d31 308 } else if (x > 65535) {
664e0f19 309 return 65535;
e01d9d31 310 } else {
664e0f19 311 return x;
e01d9d31 312 }
664e0f19
FB
313}
314
315static inline int satsb(int x)
316{
e01d9d31 317 if (x < -128) {
664e0f19 318 return -128;
e01d9d31 319 } else if (x > 127) {
664e0f19 320 return 127;
e01d9d31 321 } else {
664e0f19 322 return x;
e01d9d31 323 }
664e0f19
FB
324}
325
326static inline int satsw(int x)
327{
e01d9d31 328 if (x < -32768) {
664e0f19 329 return -32768;
e01d9d31 330 } else if (x > 32767) {
664e0f19 331 return 32767;
e01d9d31 332 } else {
664e0f19 333 return x;
e01d9d31 334 }
664e0f19
FB
335}
336
337#define FADD(a, b) ((a) + (b))
338#define FADDUB(a, b) satub((a) + (b))
339#define FADDUW(a, b) satuw((a) + (b))
340#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
341#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
342
343#define FSUB(a, b) ((a) - (b))
344#define FSUBUB(a, b) satub((a) - (b))
345#define FSUBUW(a, b) satuw((a) - (b))
346#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
347#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
348#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
349#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
350#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
351#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
352
e01d9d31 353#define FAND(a, b) ((a) & (b))
664e0f19 354#define FANDN(a, b) ((~(a)) & (b))
e01d9d31
BS
355#define FOR(a, b) ((a) | (b))
356#define FXOR(a, b) ((a) ^ (b))
664e0f19 357
e01d9d31
BS
358#define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
359#define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
360#define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
361#define FCMPEQ(a, b) ((a) == (b) ? -1 : 0)
664e0f19 362
e01d9d31
BS
363#define FMULLW(a, b) ((a) * (b))
364#define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16)
365#define FMULHUW(a, b) ((a) * (b) >> 16)
366#define FMULHW(a, b) ((int16_t)(a) * (int16_t)(b) >> 16)
664e0f19 367
e01d9d31 368#define FAVG(a, b) (((a) + (b) + 1) >> 1)
664e0f19
FB
369#endif
370
5af45186
FB
371SSE_HELPER_B(helper_paddb, FADD)
372SSE_HELPER_W(helper_paddw, FADD)
373SSE_HELPER_L(helper_paddl, FADD)
374SSE_HELPER_Q(helper_paddq, FADD)
664e0f19 375
5af45186
FB
376SSE_HELPER_B(helper_psubb, FSUB)
377SSE_HELPER_W(helper_psubw, FSUB)
378SSE_HELPER_L(helper_psubl, FSUB)
379SSE_HELPER_Q(helper_psubq, FSUB)
664e0f19 380
5af45186
FB
381SSE_HELPER_B(helper_paddusb, FADDUB)
382SSE_HELPER_B(helper_paddsb, FADDSB)
383SSE_HELPER_B(helper_psubusb, FSUBUB)
384SSE_HELPER_B(helper_psubsb, FSUBSB)
664e0f19 385
5af45186
FB
386SSE_HELPER_W(helper_paddusw, FADDUW)
387SSE_HELPER_W(helper_paddsw, FADDSW)
388SSE_HELPER_W(helper_psubusw, FSUBUW)
389SSE_HELPER_W(helper_psubsw, FSUBSW)
664e0f19 390
5af45186
FB
391SSE_HELPER_B(helper_pminub, FMINUB)
392SSE_HELPER_B(helper_pmaxub, FMAXUB)
664e0f19 393
5af45186
FB
394SSE_HELPER_W(helper_pminsw, FMINSW)
395SSE_HELPER_W(helper_pmaxsw, FMAXSW)
664e0f19 396
5af45186
FB
397SSE_HELPER_Q(helper_pand, FAND)
398SSE_HELPER_Q(helper_pandn, FANDN)
399SSE_HELPER_Q(helper_por, FOR)
400SSE_HELPER_Q(helper_pxor, FXOR)
664e0f19 401
5af45186
FB
402SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
403SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
404SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
664e0f19 405
5af45186
FB
406SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
407SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
408SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
664e0f19 409
5af45186 410SSE_HELPER_W(helper_pmullw, FMULLW)
a35f3ec7 411#if SHIFT == 0
5af45186 412SSE_HELPER_W(helper_pmulhrw, FMULHRW)
a35f3ec7 413#endif
5af45186
FB
414SSE_HELPER_W(helper_pmulhuw, FMULHUW)
415SSE_HELPER_W(helper_pmulhw, FMULHW)
664e0f19 416
5af45186
FB
417SSE_HELPER_B(helper_pavgb, FAVG)
418SSE_HELPER_W(helper_pavgw, FAVG)
664e0f19 419
e01d9d31 420void glue(helper_pmuludq, SUFFIX)(Reg *d, Reg *s)
664e0f19 421{
664e0f19
FB
422 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
423#if SHIFT == 1
424 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
425#endif
426}
427
e01d9d31 428void glue(helper_pmaddwd, SUFFIX)(Reg *d, Reg *s)
664e0f19
FB
429{
430 int i;
664e0f19 431
e01d9d31
BS
432 for (i = 0; i < (2 << SHIFT); i++) {
433 d->L(i) = (int16_t)s->W(2 * i) * (int16_t)d->W(2 * i) +
434 (int16_t)s->W(2 * i + 1) * (int16_t)d->W(2 * i + 1);
664e0f19
FB
435 }
436}
437
438#if SHIFT == 0
439static inline int abs1(int a)
440{
e01d9d31 441 if (a < 0) {
664e0f19 442 return -a;
e01d9d31 443 } else {
664e0f19 444 return a;
e01d9d31 445 }
664e0f19
FB
446}
447#endif
e01d9d31 448void glue(helper_psadbw, SUFFIX)(Reg *d, Reg *s)
664e0f19
FB
449{
450 unsigned int val;
664e0f19
FB
451
452 val = 0;
453 val += abs1(d->B(0) - s->B(0));
454 val += abs1(d->B(1) - s->B(1));
455 val += abs1(d->B(2) - s->B(2));
456 val += abs1(d->B(3) - s->B(3));
457 val += abs1(d->B(4) - s->B(4));
458 val += abs1(d->B(5) - s->B(5));
459 val += abs1(d->B(6) - s->B(6));
460 val += abs1(d->B(7) - s->B(7));
461 d->Q(0) = val;
462#if SHIFT == 1
463 val = 0;
464 val += abs1(d->B(8) - s->B(8));
465 val += abs1(d->B(9) - s->B(9));
466 val += abs1(d->B(10) - s->B(10));
467 val += abs1(d->B(11) - s->B(11));
468 val += abs1(d->B(12) - s->B(12));
469 val += abs1(d->B(13) - s->B(13));
470 val += abs1(d->B(14) - s->B(14));
471 val += abs1(d->B(15) - s->B(15));
472 d->Q(1) = val;
473#endif
474}
475
e01d9d31 476void glue(helper_maskmov, SUFFIX)(Reg *d, Reg *s, target_ulong a0)
664e0f19
FB
477{
478 int i;
e01d9d31
BS
479
480 for (i = 0; i < (8 << SHIFT); i++) {
481 if (s->B(i) & 0x80) {
b8b6a50b 482 stb(a0 + i, d->B(i));
e01d9d31 483 }
664e0f19
FB
484 }
485}
486
e01d9d31 487void glue(helper_movl_mm_T0, SUFFIX)(Reg *d, uint32_t val)
664e0f19 488{
5af45186 489 d->L(0) = val;
664e0f19
FB
490 d->L(1) = 0;
491#if SHIFT == 1
492 d->Q(1) = 0;
493#endif
494}
495
dabd98dd 496#ifdef TARGET_X86_64
e01d9d31 497void glue(helper_movq_mm_T0, SUFFIX)(Reg *d, uint64_t val)
dabd98dd 498{
5af45186 499 d->Q(0) = val;
dabd98dd
FB
500#if SHIFT == 1
501 d->Q(1) = 0;
502#endif
503}
dabd98dd
FB
504#endif
505
664e0f19 506#if SHIFT == 0
e01d9d31 507void glue(helper_pshufw, SUFFIX)(Reg *d, Reg *s, int order)
664e0f19 508{
5af45186 509 Reg r;
e01d9d31 510
664e0f19
FB
511 r.W(0) = s->W(order & 3);
512 r.W(1) = s->W((order >> 2) & 3);
513 r.W(2) = s->W((order >> 4) & 3);
514 r.W(3) = s->W((order >> 6) & 3);
515 *d = r;
516}
517#else
5af45186 518void helper_shufps(Reg *d, Reg *s, int order)
d52cf7a6 519{
5af45186 520 Reg r;
e01d9d31 521
d52cf7a6
FB
522 r.L(0) = d->L(order & 3);
523 r.L(1) = d->L((order >> 2) & 3);
524 r.L(2) = s->L((order >> 4) & 3);
525 r.L(3) = s->L((order >> 6) & 3);
526 *d = r;
527}
528
5af45186 529void helper_shufpd(Reg *d, Reg *s, int order)
664e0f19 530{
5af45186 531 Reg r;
e01d9d31 532
d52cf7a6 533 r.Q(0) = d->Q(order & 1);
664e0f19
FB
534 r.Q(1) = s->Q((order >> 1) & 1);
535 *d = r;
536}
537
e01d9d31 538void glue(helper_pshufd, SUFFIX)(Reg *d, Reg *s, int order)
664e0f19 539{
5af45186 540 Reg r;
e01d9d31 541
664e0f19
FB
542 r.L(0) = s->L(order & 3);
543 r.L(1) = s->L((order >> 2) & 3);
544 r.L(2) = s->L((order >> 4) & 3);
545 r.L(3) = s->L((order >> 6) & 3);
546 *d = r;
547}
548
e01d9d31 549void glue(helper_pshuflw, SUFFIX)(Reg *d, Reg *s, int order)
664e0f19 550{
5af45186 551 Reg r;
e01d9d31 552
664e0f19
FB
553 r.W(0) = s->W(order & 3);
554 r.W(1) = s->W((order >> 2) & 3);
555 r.W(2) = s->W((order >> 4) & 3);
556 r.W(3) = s->W((order >> 6) & 3);
557 r.Q(1) = s->Q(1);
558 *d = r;
559}
560
e01d9d31 561void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order)
664e0f19 562{
5af45186 563 Reg r;
e01d9d31 564
664e0f19
FB
565 r.Q(0) = s->Q(0);
566 r.W(4) = s->W(4 + (order & 3));
567 r.W(5) = s->W(4 + ((order >> 2) & 3));
568 r.W(6) = s->W(4 + ((order >> 4) & 3));
569 r.W(7) = s->W(4 + ((order >> 6) & 3));
570 *d = r;
571}
572#endif
573
574#if SHIFT == 1
575/* FPU ops */
576/* XXX: not accurate */
577
e01d9d31
BS
578#define SSE_HELPER_S(name, F) \
579 void helper_ ## name ## ps(Reg *d, Reg *s) \
580 { \
581 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \
582 d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \
583 d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \
584 d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \
585 } \
586 \
587 void helper_ ## name ## ss(Reg *d, Reg *s) \
588 { \
589 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \
590 } \
591 \
592 void helper_ ## name ## pd(Reg *d, Reg *s) \
593 { \
594 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \
595 d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \
596 } \
597 \
598 void helper_ ## name ## sd(Reg *d, Reg *s) \
599 { \
600 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \
601 }
664e0f19 602
7a0e1f41
FB
603#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
604#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
605#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
606#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
7a0e1f41 607#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
664e0f19 608
a4d1f142
AJ
609/* Note that the choice of comparison op here is important to get the
610 * special cases right: for min and max Intel specifies that (-0,0),
611 * (NaN, anything) and (anything, NaN) return the second argument.
612 */
e01d9d31
BS
613#define FPU_MIN(size, a, b) \
614 (float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b))
615#define FPU_MAX(size, a, b) \
616 (float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b))
a4d1f142 617
5af45186
FB
618SSE_HELPER_S(add, FPU_ADD)
619SSE_HELPER_S(sub, FPU_SUB)
620SSE_HELPER_S(mul, FPU_MUL)
621SSE_HELPER_S(div, FPU_DIV)
622SSE_HELPER_S(min, FPU_MIN)
623SSE_HELPER_S(max, FPU_MAX)
624SSE_HELPER_S(sqrt, FPU_SQRT)
664e0f19
FB
625
626
627/* float to float conversions */
5af45186 628void helper_cvtps2pd(Reg *d, Reg *s)
664e0f19 629{
8422b113 630 float32 s0, s1;
e01d9d31 631
664e0f19
FB
632 s0 = s->XMM_S(0);
633 s1 = s->XMM_S(1);
7a0e1f41
FB
634 d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
635 d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
664e0f19
FB
636}
637
5af45186 638void helper_cvtpd2ps(Reg *d, Reg *s)
664e0f19 639{
7a0e1f41
FB
640 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
641 d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
664e0f19
FB
642 d->Q(1) = 0;
643}
644
5af45186 645void helper_cvtss2sd(Reg *d, Reg *s)
664e0f19 646{
7a0e1f41 647 d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
664e0f19
FB
648}
649
5af45186 650void helper_cvtsd2ss(Reg *d, Reg *s)
664e0f19 651{
7a0e1f41 652 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
664e0f19
FB
653}
654
655/* integer to float */
5af45186 656void helper_cvtdq2ps(Reg *d, Reg *s)
664e0f19 657{
7a0e1f41
FB
658 d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
659 d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
660 d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
661 d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
664e0f19
FB
662}
663
5af45186 664void helper_cvtdq2pd(Reg *d, Reg *s)
664e0f19 665{
664e0f19 666 int32_t l0, l1;
e01d9d31 667
664e0f19
FB
668 l0 = (int32_t)s->XMM_L(0);
669 l1 = (int32_t)s->XMM_L(1);
7a0e1f41
FB
670 d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
671 d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
664e0f19
FB
672}
673
5af45186 674void helper_cvtpi2ps(XMMReg *d, MMXReg *s)
664e0f19 675{
7a0e1f41
FB
676 d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
677 d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
664e0f19
FB
678}
679
5af45186 680void helper_cvtpi2pd(XMMReg *d, MMXReg *s)
664e0f19 681{
7a0e1f41
FB
682 d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
683 d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
664e0f19
FB
684}
685
5af45186 686void helper_cvtsi2ss(XMMReg *d, uint32_t val)
664e0f19 687{
5af45186 688 d->XMM_S(0) = int32_to_float32(val, &env->sse_status);
664e0f19
FB
689}
690
5af45186 691void helper_cvtsi2sd(XMMReg *d, uint32_t val)
664e0f19 692{
5af45186 693 d->XMM_D(0) = int32_to_float64(val, &env->sse_status);
664e0f19
FB
694}
695
696#ifdef TARGET_X86_64
5af45186 697void helper_cvtsq2ss(XMMReg *d, uint64_t val)
664e0f19 698{
5af45186 699 d->XMM_S(0) = int64_to_float32(val, &env->sse_status);
664e0f19
FB
700}
701
5af45186 702void helper_cvtsq2sd(XMMReg *d, uint64_t val)
664e0f19 703{
5af45186 704 d->XMM_D(0) = int64_to_float64(val, &env->sse_status);
664e0f19
FB
705}
706#endif
707
708/* float to integer */
5af45186 709void helper_cvtps2dq(XMMReg *d, XMMReg *s)
664e0f19 710{
7a0e1f41
FB
711 d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
712 d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
713 d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
714 d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
664e0f19
FB
715}
716
5af45186 717void helper_cvtpd2dq(XMMReg *d, XMMReg *s)
664e0f19 718{
7a0e1f41
FB
719 d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
720 d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
664e0f19
FB
721 d->XMM_Q(1) = 0;
722}
723
5af45186 724void helper_cvtps2pi(MMXReg *d, XMMReg *s)
664e0f19 725{
7a0e1f41
FB
726 d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
727 d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
664e0f19
FB
728}
729
5af45186 730void helper_cvtpd2pi(MMXReg *d, XMMReg *s)
664e0f19 731{
7a0e1f41
FB
732 d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
733 d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
664e0f19
FB
734}
735
5af45186 736int32_t helper_cvtss2si(XMMReg *s)
664e0f19 737{
5af45186 738 return float32_to_int32(s->XMM_S(0), &env->sse_status);
664e0f19
FB
739}
740
5af45186 741int32_t helper_cvtsd2si(XMMReg *s)
664e0f19 742{
5af45186 743 return float64_to_int32(s->XMM_D(0), &env->sse_status);
664e0f19
FB
744}
745
746#ifdef TARGET_X86_64
5af45186 747int64_t helper_cvtss2sq(XMMReg *s)
664e0f19 748{
5af45186 749 return float32_to_int64(s->XMM_S(0), &env->sse_status);
664e0f19
FB
750}
751
5af45186 752int64_t helper_cvtsd2sq(XMMReg *s)
664e0f19 753{
5af45186 754 return float64_to_int64(s->XMM_D(0), &env->sse_status);
664e0f19
FB
755}
756#endif
757
758/* float to integer truncated */
5af45186 759void helper_cvttps2dq(XMMReg *d, XMMReg *s)
664e0f19 760{
7a0e1f41
FB
761 d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
762 d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
763 d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
764 d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
664e0f19
FB
765}
766
5af45186 767void helper_cvttpd2dq(XMMReg *d, XMMReg *s)
664e0f19 768{
7a0e1f41
FB
769 d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
770 d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
664e0f19
FB
771 d->XMM_Q(1) = 0;
772}
773
5af45186 774void helper_cvttps2pi(MMXReg *d, XMMReg *s)
664e0f19 775{
7a0e1f41
FB
776 d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
777 d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
664e0f19
FB
778}
779
5af45186 780void helper_cvttpd2pi(MMXReg *d, XMMReg *s)
664e0f19 781{
7a0e1f41
FB
782 d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
783 d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
664e0f19
FB
784}
785
5af45186 786int32_t helper_cvttss2si(XMMReg *s)
664e0f19 787{
5af45186 788 return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
664e0f19
FB
789}
790
5af45186 791int32_t helper_cvttsd2si(XMMReg *s)
664e0f19 792{
5af45186 793 return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
664e0f19
FB
794}
795
796#ifdef TARGET_X86_64
5af45186 797int64_t helper_cvttss2sq(XMMReg *s)
664e0f19 798{
5af45186 799 return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
664e0f19
FB
800}
801
5af45186 802int64_t helper_cvttsd2sq(XMMReg *s)
664e0f19 803{
5af45186 804 return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
664e0f19
FB
805}
806#endif
807
5af45186 808void helper_rsqrtps(XMMReg *d, XMMReg *s)
664e0f19 809{
c2ef9a83
AJ
810 d->XMM_S(0) = float32_div(float32_one,
811 float32_sqrt(s->XMM_S(0), &env->sse_status),
812 &env->sse_status);
813 d->XMM_S(1) = float32_div(float32_one,
814 float32_sqrt(s->XMM_S(1), &env->sse_status),
815 &env->sse_status);
816 d->XMM_S(2) = float32_div(float32_one,
817 float32_sqrt(s->XMM_S(2), &env->sse_status),
818 &env->sse_status);
819 d->XMM_S(3) = float32_div(float32_one,
820 float32_sqrt(s->XMM_S(3), &env->sse_status),
821 &env->sse_status);
664e0f19
FB
822}
823
5af45186 824void helper_rsqrtss(XMMReg *d, XMMReg *s)
664e0f19 825{
c2ef9a83
AJ
826 d->XMM_S(0) = float32_div(float32_one,
827 float32_sqrt(s->XMM_S(0), &env->sse_status),
828 &env->sse_status);
664e0f19
FB
829}
830
5af45186 831void helper_rcpps(XMMReg *d, XMMReg *s)
664e0f19 832{
c2ef9a83
AJ
833 d->XMM_S(0) = float32_div(float32_one, s->XMM_S(0), &env->sse_status);
834 d->XMM_S(1) = float32_div(float32_one, s->XMM_S(1), &env->sse_status);
835 d->XMM_S(2) = float32_div(float32_one, s->XMM_S(2), &env->sse_status);
836 d->XMM_S(3) = float32_div(float32_one, s->XMM_S(3), &env->sse_status);
664e0f19
FB
837}
838
5af45186 839void helper_rcpss(XMMReg *d, XMMReg *s)
664e0f19 840{
c2ef9a83 841 d->XMM_S(0) = float32_div(float32_one, s->XMM_S(0), &env->sse_status);
664e0f19
FB
842}
843
d9f4bb27
AP
844static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
845{
846 uint64_t mask;
847
848 if (len == 0) {
849 mask = ~0LL;
850 } else {
851 mask = (1ULL << len) - 1;
852 }
853 return (src >> shift) & mask;
854}
855
856void helper_extrq_r(XMMReg *d, XMMReg *s)
857{
858 d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), s->XMM_B(1), s->XMM_B(0));
859}
860
861void helper_extrq_i(XMMReg *d, int index, int length)
862{
863 d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), index, length);
864}
865
866static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
867{
868 uint64_t mask;
869
870 if (len == 0) {
871 mask = ~0ULL;
872 } else {
873 mask = (1ULL << len) - 1;
874 }
875 return (src & ~(mask << shift)) | ((src & mask) << shift);
876}
877
878void helper_insertq_r(XMMReg *d, XMMReg *s)
879{
880 d->XMM_Q(0) = helper_insertq(s->XMM_Q(0), s->XMM_B(9), s->XMM_B(8));
881}
882
883void helper_insertq_i(XMMReg *d, int index, int length)
884{
885 d->XMM_Q(0) = helper_insertq(d->XMM_Q(0), index, length);
886}
887
5af45186 888void helper_haddps(XMMReg *d, XMMReg *s)
664e0f19 889{
664e0f19 890 XMMReg r;
e01d9d31 891
5c6562c2
MR
892 r.XMM_S(0) = float32_add(d->XMM_S(0), d->XMM_S(1), &env->sse_status);
893 r.XMM_S(1) = float32_add(d->XMM_S(2), d->XMM_S(3), &env->sse_status);
894 r.XMM_S(2) = float32_add(s->XMM_S(0), s->XMM_S(1), &env->sse_status);
895 r.XMM_S(3) = float32_add(s->XMM_S(2), s->XMM_S(3), &env->sse_status);
664e0f19
FB
896 *d = r;
897}
898
5af45186 899void helper_haddpd(XMMReg *d, XMMReg *s)
664e0f19 900{
664e0f19 901 XMMReg r;
e01d9d31 902
5c6562c2
MR
903 r.XMM_D(0) = float64_add(d->XMM_D(0), d->XMM_D(1), &env->sse_status);
904 r.XMM_D(1) = float64_add(s->XMM_D(0), s->XMM_D(1), &env->sse_status);
664e0f19
FB
905 *d = r;
906}
907
5af45186 908void helper_hsubps(XMMReg *d, XMMReg *s)
664e0f19 909{
664e0f19 910 XMMReg r;
e01d9d31 911
5c6562c2
MR
912 r.XMM_S(0) = float32_sub(d->XMM_S(0), d->XMM_S(1), &env->sse_status);
913 r.XMM_S(1) = float32_sub(d->XMM_S(2), d->XMM_S(3), &env->sse_status);
914 r.XMM_S(2) = float32_sub(s->XMM_S(0), s->XMM_S(1), &env->sse_status);
915 r.XMM_S(3) = float32_sub(s->XMM_S(2), s->XMM_S(3), &env->sse_status);
664e0f19
FB
916 *d = r;
917}
918
5af45186 919void helper_hsubpd(XMMReg *d, XMMReg *s)
664e0f19 920{
664e0f19 921 XMMReg r;
e01d9d31 922
5c6562c2
MR
923 r.XMM_D(0) = float64_sub(d->XMM_D(0), d->XMM_D(1), &env->sse_status);
924 r.XMM_D(1) = float64_sub(s->XMM_D(0), s->XMM_D(1), &env->sse_status);
664e0f19
FB
925 *d = r;
926}
927
5af45186 928void helper_addsubps(XMMReg *d, XMMReg *s)
664e0f19 929{
5c6562c2
MR
930 d->XMM_S(0) = float32_sub(d->XMM_S(0), s->XMM_S(0), &env->sse_status);
931 d->XMM_S(1) = float32_add(d->XMM_S(1), s->XMM_S(1), &env->sse_status);
932 d->XMM_S(2) = float32_sub(d->XMM_S(2), s->XMM_S(2), &env->sse_status);
933 d->XMM_S(3) = float32_add(d->XMM_S(3), s->XMM_S(3), &env->sse_status);
664e0f19
FB
934}
935
5af45186 936void helper_addsubpd(XMMReg *d, XMMReg *s)
664e0f19 937{
5c6562c2
MR
938 d->XMM_D(0) = float64_sub(d->XMM_D(0), s->XMM_D(0), &env->sse_status);
939 d->XMM_D(1) = float64_add(d->XMM_D(1), s->XMM_D(1), &env->sse_status);
664e0f19
FB
940}
941
942/* XXX: unordered */
e01d9d31
BS
943#define SSE_HELPER_CMP(name, F) \
944 void helper_ ## name ## ps(Reg *d, Reg *s) \
945 { \
946 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \
947 d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \
948 d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \
949 d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \
950 } \
951 \
952 void helper_ ## name ## ss(Reg *d, Reg *s) \
953 { \
954 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \
955 } \
956 \
957 void helper_ ## name ## pd(Reg *d, Reg *s) \
958 { \
959 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \
960 d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \
961 } \
962 \
963 void helper_ ## name ## sd(Reg *d, Reg *s) \
964 { \
965 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \
966 }
967
968#define FPU_CMPEQ(size, a, b) \
969 (float ## size ## _eq_quiet(a, b, &env->sse_status) ? -1 : 0)
970#define FPU_CMPLT(size, a, b) \
971 (float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0)
972#define FPU_CMPLE(size, a, b) \
973 (float ## size ## _le(a, b, &env->sse_status) ? -1 : 0)
974#define FPU_CMPUNORD(size, a, b) \
975 (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? -1 : 0)
976#define FPU_CMPNEQ(size, a, b) \
977 (float ## size ## _eq_quiet(a, b, &env->sse_status) ? 0 : -1)
978#define FPU_CMPNLT(size, a, b) \
979 (float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1)
980#define FPU_CMPNLE(size, a, b) \
981 (float ## size ## _le(a, b, &env->sse_status) ? 0 : -1)
982#define FPU_CMPORD(size, a, b) \
983 (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? 0 : -1)
664e0f19 984
5af45186
FB
985SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
986SSE_HELPER_CMP(cmplt, FPU_CMPLT)
987SSE_HELPER_CMP(cmple, FPU_CMPLE)
988SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
989SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
990SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
991SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
992SSE_HELPER_CMP(cmpord, FPU_CMPORD)
664e0f19 993
1e6eec8b 994static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
43fb823b 995
5af45186 996void helper_ucomiss(Reg *d, Reg *s)
664e0f19 997{
43fb823b 998 int ret;
8422b113 999 float32 s0, s1;
664e0f19
FB
1000
1001 s0 = d->XMM_S(0);
1002 s1 = s->XMM_S(0);
43fb823b
FB
1003 ret = float32_compare_quiet(s0, s1, &env->sse_status);
1004 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB
1005}
1006
5af45186 1007void helper_comiss(Reg *d, Reg *s)
664e0f19 1008{
43fb823b 1009 int ret;
8422b113 1010 float32 s0, s1;
664e0f19
FB
1011
1012 s0 = d->XMM_S(0);
1013 s1 = s->XMM_S(0);
43fb823b
FB
1014 ret = float32_compare(s0, s1, &env->sse_status);
1015 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB
1016}
1017
5af45186 1018void helper_ucomisd(Reg *d, Reg *s)
664e0f19 1019{
43fb823b 1020 int ret;
8422b113 1021 float64 d0, d1;
664e0f19
FB
1022
1023 d0 = d->XMM_D(0);
1024 d1 = s->XMM_D(0);
43fb823b
FB
1025 ret = float64_compare_quiet(d0, d1, &env->sse_status);
1026 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB
1027}
1028
5af45186 1029void helper_comisd(Reg *d, Reg *s)
664e0f19 1030{
43fb823b 1031 int ret;
8422b113 1032 float64 d0, d1;
664e0f19
FB
1033
1034 d0 = d->XMM_D(0);
1035 d1 = s->XMM_D(0);
43fb823b
FB
1036 ret = float64_compare(d0, d1, &env->sse_status);
1037 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB
1038}
1039
5af45186 1040uint32_t helper_movmskps(Reg *s)
664e0f19
FB
1041{
1042 int b0, b1, b2, b3;
e01d9d31 1043
664e0f19
FB
1044 b0 = s->XMM_L(0) >> 31;
1045 b1 = s->XMM_L(1) >> 31;
1046 b2 = s->XMM_L(2) >> 31;
1047 b3 = s->XMM_L(3) >> 31;
5af45186 1048 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
664e0f19
FB
1049}
1050
5af45186 1051uint32_t helper_movmskpd(Reg *s)
664e0f19
FB
1052{
1053 int b0, b1;
e01d9d31 1054
664e0f19
FB
1055 b0 = s->XMM_L(1) >> 31;
1056 b1 = s->XMM_L(3) >> 31;
5af45186 1057 return b0 | (b1 << 1);
664e0f19
FB
1058}
1059
1060#endif
1061
5af45186
FB
1062uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
1063{
1064 uint32_t val;
e01d9d31 1065
5af45186 1066 val = 0;
30913bae
AJ
1067 val |= (s->B(0) >> 7);
1068 val |= (s->B(1) >> 6) & 0x02;
1069 val |= (s->B(2) >> 5) & 0x04;
1070 val |= (s->B(3) >> 4) & 0x08;
1071 val |= (s->B(4) >> 3) & 0x10;
1072 val |= (s->B(5) >> 2) & 0x20;
1073 val |= (s->B(6) >> 1) & 0x40;
1074 val |= (s->B(7)) & 0x80;
664e0f19 1075#if SHIFT == 1
30913bae
AJ
1076 val |= (s->B(8) << 1) & 0x0100;
1077 val |= (s->B(9) << 2) & 0x0200;
1078 val |= (s->B(10) << 3) & 0x0400;
1079 val |= (s->B(11) << 4) & 0x0800;
1080 val |= (s->B(12) << 5) & 0x1000;
1081 val |= (s->B(13) << 6) & 0x2000;
1082 val |= (s->B(14) << 7) & 0x4000;
1083 val |= (s->B(15) << 8) & 0x8000;
664e0f19 1084#endif
5af45186 1085 return val;
664e0f19
FB
1086}
1087
e01d9d31 1088void glue(helper_packsswb, SUFFIX)(Reg *d, Reg *s)
664e0f19 1089{
5af45186 1090 Reg r;
664e0f19
FB
1091
1092 r.B(0) = satsb((int16_t)d->W(0));
1093 r.B(1) = satsb((int16_t)d->W(1));
1094 r.B(2) = satsb((int16_t)d->W(2));
1095 r.B(3) = satsb((int16_t)d->W(3));
1096#if SHIFT == 1
1097 r.B(4) = satsb((int16_t)d->W(4));
1098 r.B(5) = satsb((int16_t)d->W(5));
1099 r.B(6) = satsb((int16_t)d->W(6));
1100 r.B(7) = satsb((int16_t)d->W(7));
1101#endif
1102 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1103 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1104 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1105 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1106#if SHIFT == 1
1107 r.B(12) = satsb((int16_t)s->W(4));
1108 r.B(13) = satsb((int16_t)s->W(5));
1109 r.B(14) = satsb((int16_t)s->W(6));
1110 r.B(15) = satsb((int16_t)s->W(7));
1111#endif
1112 *d = r;
1113}
1114
e01d9d31 1115void glue(helper_packuswb, SUFFIX)(Reg *d, Reg *s)
664e0f19 1116{
5af45186 1117 Reg r;
664e0f19
FB
1118
1119 r.B(0) = satub((int16_t)d->W(0));
1120 r.B(1) = satub((int16_t)d->W(1));
1121 r.B(2) = satub((int16_t)d->W(2));
1122 r.B(3) = satub((int16_t)d->W(3));
1123#if SHIFT == 1
1124 r.B(4) = satub((int16_t)d->W(4));
1125 r.B(5) = satub((int16_t)d->W(5));
1126 r.B(6) = satub((int16_t)d->W(6));
1127 r.B(7) = satub((int16_t)d->W(7));
1128#endif
1129 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1130 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1131 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1132 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1133#if SHIFT == 1
1134 r.B(12) = satub((int16_t)s->W(4));
1135 r.B(13) = satub((int16_t)s->W(5));
1136 r.B(14) = satub((int16_t)s->W(6));
1137 r.B(15) = satub((int16_t)s->W(7));
1138#endif
1139 *d = r;
1140}
1141
e01d9d31 1142void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s)
664e0f19 1143{
5af45186 1144 Reg r;
664e0f19
FB
1145
1146 r.W(0) = satsw(d->L(0));
1147 r.W(1) = satsw(d->L(1));
1148#if SHIFT == 1
1149 r.W(2) = satsw(d->L(2));
1150 r.W(3) = satsw(d->L(3));
1151#endif
1152 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1153 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1154#if SHIFT == 1
1155 r.W(6) = satsw(s->L(2));
1156 r.W(7) = satsw(s->L(3));
1157#endif
1158 *d = r;
1159}
1160
e01d9d31
BS
1161#define UNPCK_OP(base_name, base) \
1162 \
1163 void glue(helper_punpck ## base_name ## bw, SUFFIX)(Reg *d, Reg *s) \
1164 { \
1165 Reg r; \
1166 \
1167 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1168 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1169 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1170 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1171 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1172 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1173 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1174 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1175 XMM_ONLY( \
1176 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1177 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1178 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1179 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1180 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1181 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1182 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1183 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1184 ) \
1185 *d = r; \
1186 } \
1187 \
1188 void glue(helper_punpck ## base_name ## wd, SUFFIX)(Reg *d, Reg *s) \
1189 { \
1190 Reg r; \
1191 \
1192 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1193 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1194 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1195 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1196 XMM_ONLY( \
1197 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1198 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1199 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1200 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1201 ) \
1202 *d = r; \
1203 } \
1204 \
1205 void glue(helper_punpck ## base_name ## dq, SUFFIX)(Reg *d, Reg *s) \
1206 { \
1207 Reg r; \
1208 \
1209 r.L(0) = d->L((base << SHIFT) + 0); \
1210 r.L(1) = s->L((base << SHIFT) + 0); \
1211 XMM_ONLY( \
1212 r.L(2) = d->L((base << SHIFT) + 1); \
1213 r.L(3) = s->L((base << SHIFT) + 1); \
1214 ) \
1215 *d = r; \
1216 } \
1217 \
1218 XMM_ONLY( \
1219 void glue(helper_punpck ## base_name ## qdq, SUFFIX)(Reg *d, \
1220 Reg *s) \
1221 { \
1222 Reg r; \
1223 \
1224 r.Q(0) = d->Q(base); \
1225 r.Q(1) = s->Q(base); \
1226 *d = r; \
1227 } \
1228 )
664e0f19
FB
1229
1230UNPCK_OP(l, 0)
1231UNPCK_OP(h, 1)
1232
a35f3ec7
AJ
1233/* 3DNow! float ops */
1234#if SHIFT == 0
5af45186 1235void helper_pi2fd(MMXReg *d, MMXReg *s)
a35f3ec7 1236{
a35f3ec7
AJ
1237 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1238 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1239}
1240
5af45186 1241void helper_pi2fw(MMXReg *d, MMXReg *s)
a35f3ec7 1242{
a35f3ec7
AJ
1243 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1244 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1245}
1246
5af45186 1247void helper_pf2id(MMXReg *d, MMXReg *s)
a35f3ec7 1248{
a35f3ec7
AJ
1249 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1250 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1251}
1252
5af45186 1253void helper_pf2iw(MMXReg *d, MMXReg *s)
a35f3ec7 1254{
e01d9d31
BS
1255 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0),
1256 &env->mmx_status));
1257 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1),
1258 &env->mmx_status));
a35f3ec7
AJ
1259}
1260
5af45186 1261void helper_pfacc(MMXReg *d, MMXReg *s)
a35f3ec7 1262{
a35f3ec7 1263 MMXReg r;
e01d9d31 1264
a35f3ec7
AJ
1265 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1266 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1267 *d = r;
1268}
1269
5af45186 1270void helper_pfadd(MMXReg *d, MMXReg *s)
a35f3ec7 1271{
a35f3ec7
AJ
1272 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1273 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1274}
1275
5af45186 1276void helper_pfcmpeq(MMXReg *d, MMXReg *s)
a35f3ec7 1277{
e01d9d31
BS
1278 d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0),
1279 &env->mmx_status) ? -1 : 0;
1280 d->MMX_L(1) = float32_eq_quiet(d->MMX_S(1), s->MMX_S(1),
1281 &env->mmx_status) ? -1 : 0;
a35f3ec7
AJ
1282}
1283
5af45186 1284void helper_pfcmpge(MMXReg *d, MMXReg *s)
a35f3ec7 1285{
e01d9d31
BS
1286 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0),
1287 &env->mmx_status) ? -1 : 0;
1288 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1),
1289 &env->mmx_status) ? -1 : 0;
a35f3ec7
AJ
1290}
1291
5af45186 1292void helper_pfcmpgt(MMXReg *d, MMXReg *s)
a35f3ec7 1293{
e01d9d31
BS
1294 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0),
1295 &env->mmx_status) ? -1 : 0;
1296 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1),
1297 &env->mmx_status) ? -1 : 0;
a35f3ec7
AJ
1298}
1299
5af45186 1300void helper_pfmax(MMXReg *d, MMXReg *s)
a35f3ec7 1301{
e01d9d31 1302 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) {
a35f3ec7 1303 d->MMX_S(0) = s->MMX_S(0);
e01d9d31
BS
1304 }
1305 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) {
a35f3ec7 1306 d->MMX_S(1) = s->MMX_S(1);
e01d9d31 1307 }
a35f3ec7
AJ
1308}
1309
5af45186 1310void helper_pfmin(MMXReg *d, MMXReg *s)
a35f3ec7 1311{
e01d9d31 1312 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) {
a35f3ec7 1313 d->MMX_S(0) = s->MMX_S(0);
e01d9d31
BS
1314 }
1315 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) {
a35f3ec7 1316 d->MMX_S(1) = s->MMX_S(1);
e01d9d31 1317 }
a35f3ec7
AJ
1318}
1319
5af45186 1320void helper_pfmul(MMXReg *d, MMXReg *s)
a35f3ec7 1321{
a35f3ec7
AJ
1322 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1323 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1324}
1325
5af45186 1326void helper_pfnacc(MMXReg *d, MMXReg *s)
a35f3ec7 1327{
a35f3ec7 1328 MMXReg r;
e01d9d31 1329
a35f3ec7
AJ
1330 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1331 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1332 *d = r;
1333}
1334
5af45186 1335void helper_pfpnacc(MMXReg *d, MMXReg *s)
a35f3ec7 1336{
a35f3ec7 1337 MMXReg r;
e01d9d31 1338
a35f3ec7
AJ
1339 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1340 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1341 *d = r;
1342}
1343
5af45186 1344void helper_pfrcp(MMXReg *d, MMXReg *s)
a35f3ec7 1345{
c2ef9a83 1346 d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status);
a35f3ec7
AJ
1347 d->MMX_S(1) = d->MMX_S(0);
1348}
1349
5af45186 1350void helper_pfrsqrt(MMXReg *d, MMXReg *s)
a35f3ec7 1351{
a35f3ec7 1352 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
c2ef9a83
AJ
1353 d->MMX_S(1) = float32_div(float32_one,
1354 float32_sqrt(d->MMX_S(1), &env->mmx_status),
1355 &env->mmx_status);
a35f3ec7
AJ
1356 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1357 d->MMX_L(0) = d->MMX_L(1);
1358}
1359
5af45186 1360void helper_pfsub(MMXReg *d, MMXReg *s)
a35f3ec7 1361{
a35f3ec7
AJ
1362 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1363 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1364}
1365
5af45186 1366void helper_pfsubr(MMXReg *d, MMXReg *s)
a35f3ec7 1367{
a35f3ec7
AJ
1368 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1369 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1370}
1371
5af45186 1372void helper_pswapd(MMXReg *d, MMXReg *s)
a35f3ec7 1373{
a35f3ec7 1374 MMXReg r;
e01d9d31 1375
a35f3ec7
AJ
1376 r.MMX_L(0) = s->MMX_L(1);
1377 r.MMX_L(1) = s->MMX_L(0);
1378 *d = r;
1379}
1380#endif
1381
4242b1bd 1382/* SSSE3 op helpers */
e01d9d31 1383void glue(helper_pshufb, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1384{
1385 int i;
1386 Reg r;
1387
e01d9d31 1388 for (i = 0; i < (8 << SHIFT); i++) {
4242b1bd 1389 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
e01d9d31 1390 }
4242b1bd
AZ
1391
1392 *d = r;
1393}
1394
e01d9d31 1395void glue(helper_phaddw, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1396{
1397 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1398 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1399 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1400 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1401 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1402 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1403 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1404 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1405}
1406
e01d9d31 1407void glue(helper_phaddd, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1408{
1409 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1410 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1411 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1412 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1413}
1414
e01d9d31 1415void glue(helper_phaddsw, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1416{
1417 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1418 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1419 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1420 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1421 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1422 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1423 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1424 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1425}
1426
e01d9d31 1427void glue(helper_pmaddubsw, SUFFIX)(Reg *d, Reg *s)
4242b1bd 1428{
e01d9d31
BS
1429 d->W(0) = satsw((int8_t)s->B(0) * (uint8_t)d->B(0) +
1430 (int8_t)s->B(1) * (uint8_t)d->B(1));
1431 d->W(1) = satsw((int8_t)s->B(2) * (uint8_t)d->B(2) +
1432 (int8_t)s->B(3) * (uint8_t)d->B(3));
1433 d->W(2) = satsw((int8_t)s->B(4) * (uint8_t)d->B(4) +
1434 (int8_t)s->B(5) * (uint8_t)d->B(5));
1435 d->W(3) = satsw((int8_t)s->B(6) * (uint8_t)d->B(6) +
1436 (int8_t)s->B(7) * (uint8_t)d->B(7));
4242b1bd 1437#if SHIFT == 1
e01d9d31
BS
1438 d->W(4) = satsw((int8_t)s->B(8) * (uint8_t)d->B(8) +
1439 (int8_t)s->B(9) * (uint8_t)d->B(9));
4242b1bd
AZ
1440 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1441 (int8_t)s->B(11) * (uint8_t)d->B(11));
1442 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1443 (int8_t)s->B(13) * (uint8_t)d->B(13));
1444 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1445 (int8_t)s->B(15) * (uint8_t)d->B(15));
1446#endif
1447}
1448
e01d9d31 1449void glue(helper_phsubw, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1450{
1451 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1452 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1453 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1454 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1455 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1456 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1457 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1458 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1459}
1460
e01d9d31 1461void glue(helper_phsubd, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1462{
1463 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1464 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1465 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1466 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1467}
1468
e01d9d31 1469void glue(helper_phsubsw, SUFFIX)(Reg *d, Reg *s)
4242b1bd
AZ
1470{
1471 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1472 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1473 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1474 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1475 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1476 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1477 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1478 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1479}
1480
e01d9d31
BS
1481#define FABSB(_, x) (x > INT8_MAX ? -(int8_t)x : x)
1482#define FABSW(_, x) (x > INT16_MAX ? -(int16_t)x : x)
1483#define FABSL(_, x) (x > INT32_MAX ? -(int32_t)x : x)
4242b1bd
AZ
1484SSE_HELPER_B(helper_pabsb, FABSB)
1485SSE_HELPER_W(helper_pabsw, FABSW)
1486SSE_HELPER_L(helper_pabsd, FABSL)
1487
e01d9d31 1488#define FMULHRSW(d, s) (((int16_t) d * (int16_t)s + 0x4000) >> 15)
4242b1bd
AZ
1489SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1490
e01d9d31
BS
1491#define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d)
1492#define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d)
1493#define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d)
4242b1bd
AZ
1494SSE_HELPER_B(helper_psignb, FSIGNB)
1495SSE_HELPER_W(helper_psignw, FSIGNW)
1496SSE_HELPER_L(helper_psignd, FSIGNL)
1497
e01d9d31 1498void glue(helper_palignr, SUFFIX)(Reg *d, Reg *s, int32_t shift)
4242b1bd
AZ
1499{
1500 Reg r;
1501
1502 /* XXX could be checked during translation */
1503 if (shift >= (16 << SHIFT)) {
1504 r.Q(0) = 0;
1505 XMM_ONLY(r.Q(1) = 0);
1506 } else {
1507 shift <<= 3;
1508#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1509#if SHIFT == 0
e01d9d31
BS
1510 r.Q(0) = SHR(s->Q(0), shift - 0) |
1511 SHR(d->Q(0), shift - 64);
4242b1bd 1512#else
e01d9d31
BS
1513 r.Q(0) = SHR(s->Q(0), shift - 0) |
1514 SHR(s->Q(1), shift - 64) |
1515 SHR(d->Q(0), shift - 128) |
1516 SHR(d->Q(1), shift - 192);
1517 r.Q(1) = SHR(s->Q(0), shift + 64) |
1518 SHR(s->Q(1), shift - 0) |
1519 SHR(d->Q(0), shift - 64) |
1520 SHR(d->Q(1), shift - 128);
4242b1bd
AZ
1521#endif
1522#undef SHR
1523 }
1524
1525 *d = r;
1526}
1527
e01d9d31 1528#define XMM0 (env->xmm_regs[0])
222a3336
AZ
1529
1530#if SHIFT == 1
e01d9d31
BS
1531#define SSE_HELPER_V(name, elem, num, F) \
1532 void glue(name, SUFFIX)(Reg *d, Reg *s) \
1533 { \
1534 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \
1535 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \
1536 if (num > 2) { \
1537 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2)); \
1538 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3)); \
1539 if (num > 4) { \
1540 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4)); \
1541 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5)); \
1542 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6)); \
1543 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7)); \
1544 if (num > 8) { \
1545 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8)); \
1546 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9)); \
1547 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10)); \
1548 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11)); \
1549 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12)); \
1550 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13)); \
1551 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14)); \
1552 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15)); \
1553 } \
1554 } \
1555 } \
1556 }
1557
1558#define SSE_HELPER_I(name, elem, num, F) \
1559 void glue(name, SUFFIX)(Reg *d, Reg *s, uint32_t imm) \
1560 { \
1561 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1)); \
1562 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1)); \
1563 if (num > 2) { \
1564 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1)); \
1565 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1)); \
1566 if (num > 4) { \
1567 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1)); \
1568 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1)); \
1569 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1)); \
1570 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1)); \
1571 if (num > 8) { \
1572 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1)); \
1573 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1)); \
1574 d->elem(10) = F(d->elem(10), s->elem(10), \
1575 ((imm >> 10) & 1)); \
1576 d->elem(11) = F(d->elem(11), s->elem(11), \
1577 ((imm >> 11) & 1)); \
1578 d->elem(12) = F(d->elem(12), s->elem(12), \
1579 ((imm >> 12) & 1)); \
1580 d->elem(13) = F(d->elem(13), s->elem(13), \
1581 ((imm >> 13) & 1)); \
1582 d->elem(14) = F(d->elem(14), s->elem(14), \
1583 ((imm >> 14) & 1)); \
1584 d->elem(15) = F(d->elem(15), s->elem(15), \
1585 ((imm >> 15) & 1)); \
1586 } \
1587 } \
1588 } \
1589 }
222a3336
AZ
1590
1591/* SSE4.1 op helpers */
e01d9d31
BS
1592#define FBLENDVB(d, s, m) ((m & 0x80) ? s : d)
1593#define FBLENDVPS(d, s, m) ((m & 0x80000000) ? s : d)
1594#define FBLENDVPD(d, s, m) ((m & 0x8000000000000000LL) ? s : d)
222a3336
AZ
1595SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1596SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1597SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1598
e01d9d31 1599void glue(helper_ptest, SUFFIX)(Reg *d, Reg *s)
222a3336
AZ
1600{
1601 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1602 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1603
1604 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1605}
1606
e01d9d31
BS
1607#define SSE_HELPER_F(name, elem, num, F) \
1608 void glue(name, SUFFIX)(Reg *d, Reg *s) \
1609 { \
1610 d->elem(0) = F(0); \
1611 d->elem(1) = F(1); \
1612 if (num > 2) { \
1613 d->elem(2) = F(2); \
1614 d->elem(3) = F(3); \
1615 if (num > 4) { \
1616 d->elem(4) = F(4); \
1617 d->elem(5) = F(5); \
1618 d->elem(6) = F(6); \
1619 d->elem(7) = F(7); \
1620 } \
1621 } \
1622 }
222a3336
AZ
1623
1624SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1625SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1626SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1627SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1628SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1629SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1630SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1631SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1632SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1633SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1634SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1635SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1636
e01d9d31 1637void glue(helper_pmuldq, SUFFIX)(Reg *d, Reg *s)
222a3336 1638{
e01d9d31
BS
1639 d->Q(0) = (int64_t)(int32_t) d->L(0) * (int32_t) s->L(0);
1640 d->Q(1) = (int64_t)(int32_t) d->L(2) * (int32_t) s->L(2);
222a3336
AZ
1641}
1642
e01d9d31 1643#define FCMPEQQ(d, s) (d == s ? -1 : 0)
222a3336
AZ
1644SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1645
e01d9d31 1646void glue(helper_packusdw, SUFFIX)(Reg *d, Reg *s)
222a3336
AZ
1647{
1648 d->W(0) = satuw((int32_t) d->L(0));
1649 d->W(1) = satuw((int32_t) d->L(1));
1650 d->W(2) = satuw((int32_t) d->L(2));
1651 d->W(3) = satuw((int32_t) d->L(3));
1652 d->W(4) = satuw((int32_t) s->L(0));
1653 d->W(5) = satuw((int32_t) s->L(1));
1654 d->W(6) = satuw((int32_t) s->L(2));
1655 d->W(7) = satuw((int32_t) s->L(3));
1656}
1657
e01d9d31
BS
1658#define FMINSB(d, s) MIN((int8_t)d, (int8_t)s)
1659#define FMINSD(d, s) MIN((int32_t)d, (int32_t)s)
1660#define FMAXSB(d, s) MAX((int8_t)d, (int8_t)s)
1661#define FMAXSD(d, s) MAX((int32_t)d, (int32_t)s)
222a3336
AZ
1662SSE_HELPER_B(helper_pminsb, FMINSB)
1663SSE_HELPER_L(helper_pminsd, FMINSD)
1664SSE_HELPER_W(helper_pminuw, MIN)
1665SSE_HELPER_L(helper_pminud, MIN)
1666SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1667SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1668SSE_HELPER_W(helper_pmaxuw, MAX)
1669SSE_HELPER_L(helper_pmaxud, MAX)
1670
e01d9d31 1671#define FMULLD(d, s) ((int32_t)d * (int32_t)s)
222a3336
AZ
1672SSE_HELPER_L(helper_pmulld, FMULLD)
1673
e01d9d31 1674void glue(helper_phminposuw, SUFFIX)(Reg *d, Reg *s)
222a3336
AZ
1675{
1676 int idx = 0;
1677
e01d9d31 1678 if (s->W(1) < s->W(idx)) {
222a3336 1679 idx = 1;
e01d9d31
BS
1680 }
1681 if (s->W(2) < s->W(idx)) {
222a3336 1682 idx = 2;
e01d9d31
BS
1683 }
1684 if (s->W(3) < s->W(idx)) {
222a3336 1685 idx = 3;
e01d9d31
BS
1686 }
1687 if (s->W(4) < s->W(idx)) {
222a3336 1688 idx = 4;
e01d9d31
BS
1689 }
1690 if (s->W(5) < s->W(idx)) {
222a3336 1691 idx = 5;
e01d9d31
BS
1692 }
1693 if (s->W(6) < s->W(idx)) {
222a3336 1694 idx = 6;
e01d9d31
BS
1695 }
1696 if (s->W(7) < s->W(idx)) {
222a3336 1697 idx = 7;
e01d9d31 1698 }
222a3336
AZ
1699
1700 d->Q(1) = 0;
1701 d->L(1) = 0;
1702 d->W(1) = idx;
1703 d->W(0) = s->W(idx);
1704}
1705
e01d9d31 1706void glue(helper_roundps, SUFFIX)(Reg *d, Reg *s, uint32_t mode)
222a3336
AZ
1707{
1708 signed char prev_rounding_mode;
1709
1710 prev_rounding_mode = env->sse_status.float_rounding_mode;
e01d9d31 1711 if (!(mode & (1 << 2))) {
222a3336
AZ
1712 switch (mode & 3) {
1713 case 0:
1714 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1715 break;
1716 case 1:
1717 set_float_rounding_mode(float_round_down, &env->sse_status);
1718 break;
1719 case 2:
1720 set_float_rounding_mode(float_round_up, &env->sse_status);
1721 break;
1722 case 3:
1723 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1724 break;
1725 }
e01d9d31 1726 }
222a3336 1727
adc71666
AJ
1728 d->XMM_S(0) = float32_round_to_int(s->XMM_S(0), &env->sse_status);
1729 d->XMM_S(1) = float32_round_to_int(s->XMM_S(1), &env->sse_status);
1730 d->XMM_S(2) = float32_round_to_int(s->XMM_S(2), &env->sse_status);
1731 d->XMM_S(3) = float32_round_to_int(s->XMM_S(3), &env->sse_status);
222a3336
AZ
1732
1733#if 0 /* TODO */
e01d9d31
BS
1734 if (mode & (1 << 3)) {
1735 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1736 ~float_flag_inexact,
1737 &env->sse_status);
1738 }
222a3336
AZ
1739#endif
1740 env->sse_status.float_rounding_mode = prev_rounding_mode;
1741}
1742
e01d9d31 1743void glue(helper_roundpd, SUFFIX)(Reg *d, Reg *s, uint32_t mode)
222a3336
AZ
1744{
1745 signed char prev_rounding_mode;
1746
1747 prev_rounding_mode = env->sse_status.float_rounding_mode;
e01d9d31 1748 if (!(mode & (1 << 2))) {
222a3336
AZ
1749 switch (mode & 3) {
1750 case 0:
1751 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1752 break;
1753 case 1:
1754 set_float_rounding_mode(float_round_down, &env->sse_status);
1755 break;
1756 case 2:
1757 set_float_rounding_mode(float_round_up, &env->sse_status);
1758 break;
1759 case 3:
1760 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1761 break;
1762 }
e01d9d31 1763 }
222a3336 1764
adc71666
AJ
1765 d->XMM_D(0) = float64_round_to_int(s->XMM_D(0), &env->sse_status);
1766 d->XMM_D(1) = float64_round_to_int(s->XMM_D(1), &env->sse_status);
222a3336
AZ
1767
1768#if 0 /* TODO */
e01d9d31
BS
1769 if (mode & (1 << 3)) {
1770 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1771 ~float_flag_inexact,
1772 &env->sse_status);
1773 }
222a3336
AZ
1774#endif
1775 env->sse_status.float_rounding_mode = prev_rounding_mode;
1776}
1777
e01d9d31 1778void glue(helper_roundss, SUFFIX)(Reg *d, Reg *s, uint32_t mode)
222a3336
AZ
1779{
1780 signed char prev_rounding_mode;
1781
1782 prev_rounding_mode = env->sse_status.float_rounding_mode;
e01d9d31 1783 if (!(mode & (1 << 2))) {
222a3336
AZ
1784 switch (mode & 3) {
1785 case 0:
1786 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1787 break;
1788 case 1:
1789 set_float_rounding_mode(float_round_down, &env->sse_status);
1790 break;
1791 case 2:
1792 set_float_rounding_mode(float_round_up, &env->sse_status);
1793 break;
1794 case 3:
1795 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1796 break;
1797 }
e01d9d31 1798 }
222a3336 1799
adc71666 1800 d->XMM_S(0) = float32_round_to_int(s->XMM_S(0), &env->sse_status);
222a3336
AZ
1801
1802#if 0 /* TODO */
e01d9d31
BS
1803 if (mode & (1 << 3)) {
1804 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1805 ~float_flag_inexact,
1806 &env->sse_status);
1807 }
222a3336
AZ
1808#endif
1809 env->sse_status.float_rounding_mode = prev_rounding_mode;
1810}
1811
e01d9d31 1812void glue(helper_roundsd, SUFFIX)(Reg *d, Reg *s, uint32_t mode)
222a3336
AZ
1813{
1814 signed char prev_rounding_mode;
1815
1816 prev_rounding_mode = env->sse_status.float_rounding_mode;
e01d9d31 1817 if (!(mode & (1 << 2))) {
222a3336
AZ
1818 switch (mode & 3) {
1819 case 0:
1820 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1821 break;
1822 case 1:
1823 set_float_rounding_mode(float_round_down, &env->sse_status);
1824 break;
1825 case 2:
1826 set_float_rounding_mode(float_round_up, &env->sse_status);
1827 break;
1828 case 3:
1829 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1830 break;
1831 }
e01d9d31 1832 }
222a3336 1833
adc71666 1834 d->XMM_D(0) = float64_round_to_int(s->XMM_D(0), &env->sse_status);
222a3336
AZ
1835
1836#if 0 /* TODO */
e01d9d31
BS
1837 if (mode & (1 << 3)) {
1838 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1839 ~float_flag_inexact,
1840 &env->sse_status);
1841 }
222a3336
AZ
1842#endif
1843 env->sse_status.float_rounding_mode = prev_rounding_mode;
1844}
1845
e01d9d31 1846#define FBLENDP(d, s, m) (m ? s : d)
222a3336
AZ
1847SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1848SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1849SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1850
e01d9d31 1851void glue(helper_dpps, SUFFIX)(Reg *d, Reg *s, uint32_t mask)
222a3336 1852{
170d5b4b 1853 float32 iresult = float32_zero;
222a3336 1854
e01d9d31 1855 if (mask & (1 << 4)) {
222a3336 1856 iresult = float32_add(iresult,
e01d9d31
BS
1857 float32_mul(d->XMM_S(0), s->XMM_S(0),
1858 &env->sse_status),
1859 &env->sse_status);
1860 }
1861 if (mask & (1 << 5)) {
222a3336 1862 iresult = float32_add(iresult,
e01d9d31
BS
1863 float32_mul(d->XMM_S(1), s->XMM_S(1),
1864 &env->sse_status),
1865 &env->sse_status);
1866 }
1867 if (mask & (1 << 6)) {
222a3336 1868 iresult = float32_add(iresult,
e01d9d31
BS
1869 float32_mul(d->XMM_S(2), s->XMM_S(2),
1870 &env->sse_status),
1871 &env->sse_status);
1872 }
1873 if (mask & (1 << 7)) {
222a3336 1874 iresult = float32_add(iresult,
e01d9d31
BS
1875 float32_mul(d->XMM_S(3), s->XMM_S(3),
1876 &env->sse_status),
1877 &env->sse_status);
1878 }
170d5b4b
AJ
1879 d->XMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero;
1880 d->XMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero;
1881 d->XMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero;
1882 d->XMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero;
222a3336
AZ
1883}
1884
e01d9d31 1885void glue(helper_dppd, SUFFIX)(Reg *d, Reg *s, uint32_t mask)
222a3336 1886{
170d5b4b 1887 float64 iresult = float64_zero;
222a3336 1888
e01d9d31 1889 if (mask & (1 << 4)) {
222a3336 1890 iresult = float64_add(iresult,
e01d9d31
BS
1891 float64_mul(d->XMM_D(0), s->XMM_D(0),
1892 &env->sse_status),
1893 &env->sse_status);
1894 }
1895 if (mask & (1 << 5)) {
222a3336 1896 iresult = float64_add(iresult,
e01d9d31
BS
1897 float64_mul(d->XMM_D(1), s->XMM_D(1),
1898 &env->sse_status),
1899 &env->sse_status);
1900 }
170d5b4b
AJ
1901 d->XMM_D(0) = (mask & (1 << 0)) ? iresult : float64_zero;
1902 d->XMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero;
222a3336
AZ
1903}
1904
e01d9d31 1905void glue(helper_mpsadbw, SUFFIX)(Reg *d, Reg *s, uint32_t offset)
222a3336
AZ
1906{
1907 int s0 = (offset & 3) << 2;
1908 int d0 = (offset & 4) << 0;
1909 int i;
1910 Reg r;
1911
1912 for (i = 0; i < 8; i++, d0++) {
1913 r.W(i) = 0;
1914 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1915 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1916 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1917 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1918 }
1919
1920 *d = r;
1921}
1922
1923/* SSE4.2 op helpers */
1924/* it's unclear whether signed or unsigned */
e01d9d31 1925#define FCMPGTQ(d, s) (d > s ? -1 : 0)
222a3336
AZ
1926SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1927
1928static inline int pcmp_elen(int reg, uint32_t ctrl)
1929{
1930 int val;
1931
1932 /* Presence of REX.W is indicated by a bit higher than 7 set */
e01d9d31
BS
1933 if (ctrl >> 8) {
1934 val = abs1((int64_t)env->regs[reg]);
1935 } else {
1936 val = abs1((int32_t)env->regs[reg]);
1937 }
222a3336
AZ
1938
1939 if (ctrl & 1) {
e01d9d31 1940 if (val > 8) {
222a3336 1941 return 8;
e01d9d31
BS
1942 }
1943 } else {
1944 if (val > 16) {
222a3336 1945 return 16;
e01d9d31
BS
1946 }
1947 }
222a3336
AZ
1948 return val;
1949}
1950
1951static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
1952{
1953 int val = 0;
1954
1955 if (ctrl & 1) {
e01d9d31 1956 while (val < 8 && r->W(val)) {
222a3336 1957 val++;
e01d9d31
BS
1958 }
1959 } else {
1960 while (val < 16 && r->B(val)) {
222a3336 1961 val++;
e01d9d31
BS
1962 }
1963 }
222a3336
AZ
1964
1965 return val;
1966}
1967
1968static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
1969{
1970 switch ((ctrl >> 0) & 3) {
1971 case 0:
1972 return r->B(i);
1973 case 1:
1974 return r->W(i);
1975 case 2:
e01d9d31 1976 return (int8_t)r->B(i);
222a3336
AZ
1977 case 3:
1978 default:
e01d9d31 1979 return (int16_t)r->W(i);
222a3336
AZ
1980 }
1981}
1982
1983static inline unsigned pcmpxstrx(Reg *d, Reg *s,
e01d9d31 1984 int8_t ctrl, int valids, int validd)
222a3336
AZ
1985{
1986 unsigned int res = 0;
1987 int v;
1988 int j, i;
1989 int upper = (ctrl & 1) ? 7 : 15;
1990
1991 valids--;
1992 validd--;
1993
1994 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
1995
1996 switch ((ctrl >> 2) & 3) {
1997 case 0:
1998 for (j = valids; j >= 0; j--) {
1999 res <<= 1;
2000 v = pcmp_val(s, ctrl, j);
e01d9d31 2001 for (i = validd; i >= 0; i--) {
222a3336 2002 res |= (v == pcmp_val(d, ctrl, i));
e01d9d31 2003 }
222a3336
AZ
2004 }
2005 break;
2006 case 1:
2007 for (j = valids; j >= 0; j--) {
2008 res <<= 1;
2009 v = pcmp_val(s, ctrl, j);
e01d9d31 2010 for (i = ((validd - 1) | 1); i >= 0; i -= 2) {
222a3336
AZ
2011 res |= (pcmp_val(d, ctrl, i - 0) <= v &&
2012 pcmp_val(d, ctrl, i - 1) >= v);
e01d9d31 2013 }
222a3336
AZ
2014 }
2015 break;
2016 case 2:
2017 res = (2 << (upper - MAX(valids, validd))) - 1;
2018 res <<= MAX(valids, validd) - MIN(valids, validd);
2019 for (i = MIN(valids, validd); i >= 0; i--) {
2020 res <<= 1;
2021 v = pcmp_val(s, ctrl, i);
2022 res |= (v == pcmp_val(d, ctrl, i));
2023 }
2024 break;
2025 case 3:
2026 for (j = valids - validd; j >= 0; j--) {
2027 res <<= 1;
2028 res |= 1;
e01d9d31 2029 for (i = MIN(upper - j, validd); i >= 0; i--) {
222a3336 2030 res &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
e01d9d31 2031 }
222a3336
AZ
2032 }
2033 break;
2034 }
2035
2036 switch ((ctrl >> 4) & 3) {
2037 case 1:
2038 res ^= (2 << upper) - 1;
2039 break;
2040 case 3:
2041 res ^= (2 << valids) - 1;
2042 break;
2043 }
2044
e01d9d31
BS
2045 if (res) {
2046 CC_SRC |= CC_C;
2047 }
2048 if (res & 1) {
2049 CC_SRC |= CC_O;
2050 }
222a3336
AZ
2051
2052 return res;
2053}
2054
2055static inline int rffs1(unsigned int val)
2056{
2057 int ret = 1, hi;
2058
e01d9d31 2059 for (hi = sizeof(val) * 4; hi; hi /= 2) {
222a3336
AZ
2060 if (val >> hi) {
2061 val >>= hi;
2062 ret += hi;
2063 }
e01d9d31 2064 }
222a3336
AZ
2065
2066 return ret;
2067}
2068
2069static inline int ffs1(unsigned int val)
2070{
2071 int ret = 1, hi;
2072
e01d9d31 2073 for (hi = sizeof(val) * 4; hi; hi /= 2) {
222a3336
AZ
2074 if (val << hi) {
2075 val <<= hi;
2076 ret += hi;
2077 }
e01d9d31 2078 }
222a3336
AZ
2079
2080 return ret;
2081}
2082
e01d9d31 2083void glue(helper_pcmpestri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl)
222a3336
AZ
2084{
2085 unsigned int res = pcmpxstrx(d, s, ctrl,
e01d9d31
BS
2086 pcmp_elen(R_EDX, ctrl),
2087 pcmp_elen(R_EAX, ctrl));
222a3336 2088
e01d9d31 2089 if (res) {
222a3336 2090 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
e01d9d31 2091 } else {
222a3336 2092 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
e01d9d31 2093 }
222a3336
AZ
2094}
2095
e01d9d31 2096void glue(helper_pcmpestrm, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl)
222a3336
AZ
2097{
2098 int i;
2099 unsigned int res = pcmpxstrx(d, s, ctrl,
e01d9d31
BS
2100 pcmp_elen(R_EDX, ctrl),
2101 pcmp_elen(R_EAX, ctrl));
222a3336
AZ
2102
2103 if ((ctrl >> 6) & 1) {
e01d9d31 2104 if (ctrl & 1) {
bc426899 2105 for (i = 0; i < 8; i++, res >>= 1) {
222a3336 2106 d->W(i) = (res & 1) ? ~0 : 0;
bc426899 2107 }
e01d9d31 2108 } else {
bc426899 2109 for (i = 0; i < 16; i++, res >>= 1) {
222a3336 2110 d->B(i) = (res & 1) ? ~0 : 0;
bc426899 2111 }
e01d9d31 2112 }
222a3336
AZ
2113 } else {
2114 d->Q(1) = 0;
2115 d->Q(0) = res;
2116 }
2117}
2118
e01d9d31 2119void glue(helper_pcmpistri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl)
222a3336
AZ
2120{
2121 unsigned int res = pcmpxstrx(d, s, ctrl,
e01d9d31
BS
2122 pcmp_ilen(s, ctrl),
2123 pcmp_ilen(d, ctrl));
222a3336 2124
e01d9d31 2125 if (res) {
222a3336 2126 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
e01d9d31 2127 } else {
222a3336 2128 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
e01d9d31 2129 }
222a3336
AZ
2130}
2131
e01d9d31 2132void glue(helper_pcmpistrm, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl)
222a3336
AZ
2133{
2134 int i;
2135 unsigned int res = pcmpxstrx(d, s, ctrl,
e01d9d31
BS
2136 pcmp_ilen(s, ctrl),
2137 pcmp_ilen(d, ctrl));
222a3336
AZ
2138
2139 if ((ctrl >> 6) & 1) {
e01d9d31 2140 if (ctrl & 1) {
bc426899 2141 for (i = 0; i < 8; i++, res >>= 1) {
222a3336 2142 d->W(i) = (res & 1) ? ~0 : 0;
bc426899 2143 }
e01d9d31 2144 } else {
bc426899 2145 for (i = 0; i < 16; i++, res >>= 1) {
222a3336 2146 d->B(i) = (res & 1) ? ~0 : 0;
bc426899 2147 }
e01d9d31 2148 }
222a3336
AZ
2149 } else {
2150 d->Q(1) = 0;
2151 d->Q(0) = res;
2152 }
2153}
2154
2155#define CRCPOLY 0x1edc6f41
2156#define CRCPOLY_BITREV 0x82f63b78
2157target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2158{
2159 target_ulong crc = (msg & ((target_ulong) -1 >>
e01d9d31 2160 (TARGET_LONG_BITS - len))) ^ crc1;
222a3336 2161
e01d9d31 2162 while (len--) {
222a3336 2163 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
e01d9d31 2164 }
222a3336
AZ
2165
2166 return crc;
2167}
2168
2169#define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1))
e01d9d31 2170#define POPCOUNT(n, i) ((n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i)))
222a3336
AZ
2171target_ulong helper_popcnt(target_ulong n, uint32_t type)
2172{
2173 CC_SRC = n ? 0 : CC_Z;
2174
2175 n = POPCOUNT(n, 0);
2176 n = POPCOUNT(n, 1);
2177 n = POPCOUNT(n, 2);
2178 n = POPCOUNT(n, 3);
e01d9d31 2179 if (type == 1) {
222a3336 2180 return n & 0xff;
e01d9d31 2181 }
222a3336
AZ
2182
2183 n = POPCOUNT(n, 4);
2184#ifndef TARGET_X86_64
2185 return n;
2186#else
e01d9d31 2187 if (type == 2) {
222a3336 2188 return n & 0xff;
e01d9d31 2189 }
222a3336
AZ
2190
2191 return POPCOUNT(n, 5);
2192#endif
2193}
2194#endif
2195
664e0f19
FB
2196#undef SHIFT
2197#undef XMM_ONLY
2198#undef Reg
2199#undef B
2200#undef W
2201#undef L
2202#undef Q
2203#undef SUFFIX