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1/*
2 * QEMU LatticeMico32 CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
19 */
20
0347d689 21#include "cpu.h"
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22#include "qemu-common.h"
23
24
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25static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
26{
27 LM32CPU *cpu = LM32_CPU(cs);
28
29 cpu->env.pc = value;
30}
31
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32/* Sort alphabetically by type name. */
33static gint lm32_cpu_list_compare(gconstpointer a, gconstpointer b)
34{
35 ObjectClass *class_a = (ObjectClass *)a;
36 ObjectClass *class_b = (ObjectClass *)b;
37 const char *name_a, *name_b;
38
39 name_a = object_class_get_name(class_a);
40 name_b = object_class_get_name(class_b);
41 return strcmp(name_a, name_b);
42}
43
44static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
45{
46 ObjectClass *oc = data;
47 CPUListState *s = user_data;
48 const char *typename = object_class_get_name(oc);
49 char *name;
50
51 name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
52 (*s->cpu_fprintf)(s->file, " %s\n", name);
53 g_free(name);
54}
55
56
57void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf)
58{
59 CPUListState s = {
60 .file = f,
61 .cpu_fprintf = cpu_fprintf,
62 };
63 GSList *list;
64
65 list = object_class_get_list(TYPE_LM32_CPU, false);
66 list = g_slist_sort(list, lm32_cpu_list_compare);
67 (*cpu_fprintf)(f, "Available CPUs:\n");
68 g_slist_foreach(list, lm32_cpu_list_entry, &s);
69 g_slist_free(list);
70}
71
72static void lm32_cpu_init_cfg_reg(LM32CPU *cpu)
73{
74 CPULM32State *env = &cpu->env;
75 uint32_t cfg = 0;
76
77 if (cpu->features & LM32_FEATURE_MULTIPLY) {
78 cfg |= CFG_M;
79 }
80
81 if (cpu->features & LM32_FEATURE_DIVIDE) {
82 cfg |= CFG_D;
83 }
84
85 if (cpu->features & LM32_FEATURE_SHIFT) {
86 cfg |= CFG_S;
87 }
88
89 if (cpu->features & LM32_FEATURE_SIGN_EXTEND) {
90 cfg |= CFG_X;
91 }
92
93 if (cpu->features & LM32_FEATURE_I_CACHE) {
94 cfg |= CFG_IC;
95 }
96
97 if (cpu->features & LM32_FEATURE_D_CACHE) {
98 cfg |= CFG_DC;
99 }
100
101 if (cpu->features & LM32_FEATURE_CYCLE_COUNT) {
102 cfg |= CFG_CC;
103 }
104
105 cfg |= (cpu->num_interrupts << CFG_INT_SHIFT);
106 cfg |= (cpu->num_breakpoints << CFG_BP_SHIFT);
107 cfg |= (cpu->num_watchpoints << CFG_WP_SHIFT);
108 cfg |= (cpu->revision << CFG_REV_SHIFT);
109
110 env->cfg = cfg;
111}
112
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113static bool lm32_cpu_has_work(CPUState *cs)
114{
115 return cs->interrupt_request & CPU_INTERRUPT_HARD;
116}
117
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118/* CPUClass::reset() */
119static void lm32_cpu_reset(CPUState *s)
120{
121 LM32CPU *cpu = LM32_CPU(s);
122 LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
123 CPULM32State *env = &cpu->env;
124
125 lcc->parent_reset(s);
126
3eab1690 127 /* reset cpu state */
f0c3c505 128 memset(env, 0, offsetof(CPULM32State, eba));
a5b0f6d5 129
34f4aa83 130 lm32_cpu_init_cfg_reg(cpu);
00c8cb0a 131 tlb_flush(s, 1);
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132}
133
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134static void lm32_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
135{
136 info->mach = bfd_mach_lm32;
137 info->print_insn = print_insn_lm32;
138}
139
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140static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
141{
14a10fc3 142 CPUState *cs = CPU(dev);
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143 LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
144
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145 cpu_reset(cs);
146
147 qemu_init_vcpu(cs);
9c23169e 148
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149 lcc->parent_realize(dev, errp);
150}
151
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152static void lm32_cpu_initfn(Object *obj)
153{
c05efcb1 154 CPUState *cs = CPU(obj);
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155 LM32CPU *cpu = LM32_CPU(obj);
156 CPULM32State *env = &cpu->env;
868e2824 157 static bool tcg_initialized;
8d7d505a 158
c05efcb1 159 cs->env_ptr = env;
4bad9e39 160 cpu_exec_init(cs, &error_abort);
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161
162 env->flags = 0;
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163
164 if (tcg_enabled() && !tcg_initialized) {
165 tcg_initialized = true;
166 lm32_translate_init();
167 }
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168}
169
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170static void lm32_basic_cpu_initfn(Object *obj)
171{
172 LM32CPU *cpu = LM32_CPU(obj);
173
174 cpu->revision = 3;
175 cpu->num_interrupts = 32;
176 cpu->num_breakpoints = 4;
177 cpu->num_watchpoints = 4;
178 cpu->features = LM32_FEATURE_SHIFT
179 | LM32_FEATURE_SIGN_EXTEND
180 | LM32_FEATURE_CYCLE_COUNT;
181}
182
183static void lm32_standard_cpu_initfn(Object *obj)
184{
185 LM32CPU *cpu = LM32_CPU(obj);
186
187 cpu->revision = 3;
188 cpu->num_interrupts = 32;
189 cpu->num_breakpoints = 4;
190 cpu->num_watchpoints = 4;
191 cpu->features = LM32_FEATURE_MULTIPLY
192 | LM32_FEATURE_DIVIDE
193 | LM32_FEATURE_SHIFT
194 | LM32_FEATURE_SIGN_EXTEND
195 | LM32_FEATURE_I_CACHE
196 | LM32_FEATURE_CYCLE_COUNT;
197}
198
199static void lm32_full_cpu_initfn(Object *obj)
200{
201 LM32CPU *cpu = LM32_CPU(obj);
202
203 cpu->revision = 3;
204 cpu->num_interrupts = 32;
205 cpu->num_breakpoints = 4;
206 cpu->num_watchpoints = 4;
207 cpu->features = LM32_FEATURE_MULTIPLY
208 | LM32_FEATURE_DIVIDE
209 | LM32_FEATURE_SHIFT
210 | LM32_FEATURE_SIGN_EXTEND
211 | LM32_FEATURE_I_CACHE
212 | LM32_FEATURE_D_CACHE
213 | LM32_FEATURE_CYCLE_COUNT;
214}
215
216typedef struct LM32CPUInfo {
217 const char *name;
218 void (*initfn)(Object *obj);
219} LM32CPUInfo;
220
221static const LM32CPUInfo lm32_cpus[] = {
222 {
223 .name = "lm32-basic",
224 .initfn = lm32_basic_cpu_initfn,
225 },
226 {
227 .name = "lm32-standard",
228 .initfn = lm32_standard_cpu_initfn,
229 },
230 {
231 .name = "lm32-full",
232 .initfn = lm32_full_cpu_initfn,
233 },
234};
235
236static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
237{
238 ObjectClass *oc;
239 char *typename;
240
241 if (cpu_model == NULL) {
242 return NULL;
243 }
244
245 typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
246 oc = object_class_by_name(typename);
247 g_free(typename);
248 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
249 object_class_is_abstract(oc))) {
250 oc = NULL;
251 }
252 return oc;
253}
254
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255static void lm32_cpu_class_init(ObjectClass *oc, void *data)
256{
257 LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
258 CPUClass *cc = CPU_CLASS(oc);
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259 DeviceClass *dc = DEVICE_CLASS(oc);
260
261 lcc->parent_realize = dc->realize;
262 dc->realize = lm32_cpu_realizefn;
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263
264 lcc->parent_reset = cc->reset;
265 cc->reset = lm32_cpu_reset;
97a8ea5a 266
34f4aa83 267 cc->class_by_name = lm32_cpu_class_by_name;
8c2e1b00 268 cc->has_work = lm32_cpu_has_work;
97a8ea5a 269 cc->do_interrupt = lm32_cpu_do_interrupt;
e9854c39 270 cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
878096ee 271 cc->dump_state = lm32_cpu_dump_state;
f45748f1 272 cc->set_pc = lm32_cpu_set_pc;
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273 cc->gdb_read_register = lm32_cpu_gdb_read_register;
274 cc->gdb_write_register = lm32_cpu_gdb_write_register;
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275#ifdef CONFIG_USER_ONLY
276 cc->handle_mmu_fault = lm32_cpu_handle_mmu_fault;
277#else
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278 cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
279 cc->vmsd = &vmstate_lm32_cpu;
280#endif
a0e372f0 281 cc->gdb_num_core_regs = 32 + 7;
2472b6c0 282 cc->gdb_stop_before_watchpoint = true;
86025ee4 283 cc->debug_excp_handler = lm32_debug_excp_handler;
20984673 284 cc->disas_set_info = lm32_cpu_disas_set_info;
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285
286 /*
287 * Reason: lm32_cpu_initfn() calls cpu_exec_init(), which saves
288 * the object in cpus -> dangling pointer after final
289 * object_unref().
290 */
291 dc->cannot_destroy_with_object_finalize_yet = true;
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292}
293
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294static void lm32_register_cpu_type(const LM32CPUInfo *info)
295{
296 TypeInfo type_info = {
297 .parent = TYPE_LM32_CPU,
298 .instance_init = info->initfn,
299 };
300
301 type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
302 type_register(&type_info);
303 g_free((void *)type_info.name);
304}
305
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306static const TypeInfo lm32_cpu_type_info = {
307 .name = TYPE_LM32_CPU,
308 .parent = TYPE_CPU,
309 .instance_size = sizeof(LM32CPU),
8d7d505a 310 .instance_init = lm32_cpu_initfn,
34f4aa83 311 .abstract = true,
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312 .class_size = sizeof(LM32CPUClass),
313 .class_init = lm32_cpu_class_init,
314};
315
316static void lm32_cpu_register_types(void)
317{
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318 int i;
319
fc0ced2f 320 type_register_static(&lm32_cpu_type_info);
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321 for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
322 lm32_register_cpu_type(&lm32_cpus[i]);
323 }
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324}
325
326type_init(lm32_cpu_register_types)