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b9e7a234 AF |
1 | /* |
2 | * QEMU Motorola 68k CPU | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2.1 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see | |
18 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
19 | */ | |
20 | ||
d8416665 | 21 | #include "qemu/osdep.h" |
da34e65c | 22 | #include "qapi/error.h" |
b9e7a234 AF |
23 | #include "cpu.h" |
24 | #include "qemu-common.h" | |
087fe4f8 | 25 | #include "migration/vmstate.h" |
63c91552 | 26 | #include "exec/exec-all.h" |
b9e7a234 AF |
27 | |
28 | ||
e700604d AF |
29 | static void m68k_cpu_set_pc(CPUState *cs, vaddr value) |
30 | { | |
31 | M68kCPU *cpu = M68K_CPU(cs); | |
32 | ||
33 | cpu->env.pc = value; | |
34 | } | |
35 | ||
8c2e1b00 AF |
36 | static bool m68k_cpu_has_work(CPUState *cs) |
37 | { | |
38 | return cs->interrupt_request & CPU_INTERRUPT_HARD; | |
39 | } | |
40 | ||
11150915 AF |
41 | static void m68k_set_feature(CPUM68KState *env, int feature) |
42 | { | |
43 | env->features |= (1u << feature); | |
44 | } | |
45 | ||
b9e7a234 AF |
46 | /* CPUClass::reset() */ |
47 | static void m68k_cpu_reset(CPUState *s) | |
48 | { | |
49 | M68kCPU *cpu = M68K_CPU(s); | |
50 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); | |
51 | CPUM68KState *env = &cpu->env; | |
52 | ||
53 | mcc->parent_reset(s); | |
54 | ||
f0c3c505 | 55 | memset(env, 0, offsetof(CPUM68KState, features)); |
11c19868 AF |
56 | #if !defined(CONFIG_USER_ONLY) |
57 | env->sr = 0x2700; | |
58 | #endif | |
59 | m68k_switch_sp(env); | |
60 | /* ??? FP regs should be initialized to NaN. */ | |
61 | env->cc_op = CC_OP_FLAGS; | |
62 | /* TODO: We should set PC from the interrupt vector. */ | |
63 | env->pc = 0; | |
00c8cb0a | 64 | tlb_flush(s, 1); |
b9e7a234 AF |
65 | } |
66 | ||
4f669905 PC |
67 | static void m68k_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
68 | { | |
69 | info->print_insn = print_insn_m68k; | |
70 | } | |
71 | ||
11150915 AF |
72 | /* CPU models */ |
73 | ||
bc5b2da3 AF |
74 | static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) |
75 | { | |
76 | ObjectClass *oc; | |
7a9f812b | 77 | char *typename; |
bc5b2da3 AF |
78 | |
79 | if (cpu_model == NULL) { | |
80 | return NULL; | |
81 | } | |
82 | ||
7a9f812b AF |
83 | typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model); |
84 | oc = object_class_by_name(typename); | |
85 | g_free(typename); | |
cae85065 AF |
86 | if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || |
87 | object_class_is_abstract(oc))) { | |
bc5b2da3 AF |
88 | return NULL; |
89 | } | |
90 | return oc; | |
91 | } | |
92 | ||
11150915 AF |
93 | static void m5206_cpu_initfn(Object *obj) |
94 | { | |
95 | M68kCPU *cpu = M68K_CPU(obj); | |
96 | CPUM68KState *env = &cpu->env; | |
97 | ||
98 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
99 | } | |
100 | ||
101 | static void m5208_cpu_initfn(Object *obj) | |
102 | { | |
103 | M68kCPU *cpu = M68K_CPU(obj); | |
104 | CPUM68KState *env = &cpu->env; | |
105 | ||
106 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
107 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
108 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
109 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
110 | m68k_set_feature(env, M68K_FEATURE_USP); | |
111 | } | |
112 | ||
113 | static void cfv4e_cpu_initfn(Object *obj) | |
114 | { | |
115 | M68kCPU *cpu = M68K_CPU(obj); | |
116 | CPUM68KState *env = &cpu->env; | |
117 | ||
118 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
119 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
120 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
121 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
122 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
123 | m68k_set_feature(env, M68K_FEATURE_USP); | |
124 | } | |
125 | ||
126 | static void any_cpu_initfn(Object *obj) | |
127 | { | |
128 | M68kCPU *cpu = M68K_CPU(obj); | |
129 | CPUM68KState *env = &cpu->env; | |
130 | ||
131 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
132 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
133 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
134 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
135 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
136 | /* MAC and EMAC are mututally exclusive, so pick EMAC. | |
137 | It's mostly backwards compatible. */ | |
138 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
139 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); | |
140 | m68k_set_feature(env, M68K_FEATURE_USP); | |
141 | m68k_set_feature(env, M68K_FEATURE_EXT_FULL); | |
142 | m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); | |
143 | } | |
144 | ||
145 | typedef struct M68kCPUInfo { | |
146 | const char *name; | |
147 | void (*instance_init)(Object *obj); | |
148 | } M68kCPUInfo; | |
149 | ||
150 | static const M68kCPUInfo m68k_cpus[] = { | |
151 | { .name = "m5206", .instance_init = m5206_cpu_initfn }, | |
152 | { .name = "m5208", .instance_init = m5208_cpu_initfn }, | |
153 | { .name = "cfv4e", .instance_init = cfv4e_cpu_initfn }, | |
154 | { .name = "any", .instance_init = any_cpu_initfn }, | |
155 | }; | |
156 | ||
6d1bbc62 AF |
157 | static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) |
158 | { | |
14a10fc3 | 159 | CPUState *cs = CPU(dev); |
6d1bbc62 AF |
160 | M68kCPU *cpu = M68K_CPU(dev); |
161 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); | |
162 | ||
163 | m68k_cpu_init_gdb(cpu); | |
164 | ||
14a10fc3 AF |
165 | cpu_reset(cs); |
166 | qemu_init_vcpu(cs); | |
6d1bbc62 AF |
167 | |
168 | mcc->parent_realize(dev, errp); | |
169 | } | |
170 | ||
9b706039 AF |
171 | static void m68k_cpu_initfn(Object *obj) |
172 | { | |
c05efcb1 | 173 | CPUState *cs = CPU(obj); |
9b706039 AF |
174 | M68kCPU *cpu = M68K_CPU(obj); |
175 | CPUM68KState *env = &cpu->env; | |
1cc89619 | 176 | static bool inited; |
9b706039 | 177 | |
c05efcb1 | 178 | cs->env_ptr = env; |
4bad9e39 | 179 | cpu_exec_init(cs, &error_abort); |
1cc89619 AF |
180 | |
181 | if (tcg_enabled() && !inited) { | |
182 | inited = true; | |
183 | m68k_tcg_init(); | |
184 | } | |
9b706039 AF |
185 | } |
186 | ||
087fe4f8 AF |
187 | static const VMStateDescription vmstate_m68k_cpu = { |
188 | .name = "cpu", | |
189 | .unmigratable = 1, | |
190 | }; | |
191 | ||
b9e7a234 AF |
192 | static void m68k_cpu_class_init(ObjectClass *c, void *data) |
193 | { | |
194 | M68kCPUClass *mcc = M68K_CPU_CLASS(c); | |
195 | CPUClass *cc = CPU_CLASS(c); | |
087fe4f8 | 196 | DeviceClass *dc = DEVICE_CLASS(c); |
b9e7a234 | 197 | |
6d1bbc62 AF |
198 | mcc->parent_realize = dc->realize; |
199 | dc->realize = m68k_cpu_realizefn; | |
200 | ||
b9e7a234 AF |
201 | mcc->parent_reset = cc->reset; |
202 | cc->reset = m68k_cpu_reset; | |
bc5b2da3 AF |
203 | |
204 | cc->class_by_name = m68k_cpu_class_by_name; | |
8c2e1b00 | 205 | cc->has_work = m68k_cpu_has_work; |
97a8ea5a | 206 | cc->do_interrupt = m68k_cpu_do_interrupt; |
ab409bb3 | 207 | cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt; |
878096ee | 208 | cc->dump_state = m68k_cpu_dump_state; |
e700604d | 209 | cc->set_pc = m68k_cpu_set_pc; |
5b50e790 AF |
210 | cc->gdb_read_register = m68k_cpu_gdb_read_register; |
211 | cc->gdb_write_register = m68k_cpu_gdb_write_register; | |
7510454e AF |
212 | #ifdef CONFIG_USER_ONLY |
213 | cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault; | |
214 | #else | |
00b941e5 AF |
215 | cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; |
216 | #endif | |
00f3fd63 RH |
217 | cc->cpu_exec_enter = m68k_cpu_exec_enter; |
218 | cc->cpu_exec_exit = m68k_cpu_exec_exit; | |
4f669905 | 219 | cc->disas_set_info = m68k_cpu_disas_set_info; |
00f3fd63 | 220 | |
a0e372f0 | 221 | cc->gdb_num_core_regs = 18; |
5b24c641 | 222 | cc->gdb_core_xml_file = "cf-core.xml"; |
4c315c27 | 223 | |
4f669905 PC |
224 | dc->vmsd = &vmstate_m68k_cpu; |
225 | ||
4c315c27 MA |
226 | /* |
227 | * Reason: m68k_cpu_initfn() calls cpu_exec_init(), which saves | |
228 | * the object in cpus -> dangling pointer after final | |
229 | * object_unref(). | |
230 | */ | |
231 | dc->cannot_destroy_with_object_finalize_yet = true; | |
b9e7a234 AF |
232 | } |
233 | ||
11150915 AF |
234 | static void register_cpu_type(const M68kCPUInfo *info) |
235 | { | |
236 | TypeInfo type_info = { | |
11150915 AF |
237 | .parent = TYPE_M68K_CPU, |
238 | .instance_init = info->instance_init, | |
239 | }; | |
240 | ||
7a9f812b | 241 | type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name); |
2dddbc21 | 242 | type_register(&type_info); |
7a9f812b | 243 | g_free((void *)type_info.name); |
11150915 AF |
244 | } |
245 | ||
b9e7a234 AF |
246 | static const TypeInfo m68k_cpu_type_info = { |
247 | .name = TYPE_M68K_CPU, | |
248 | .parent = TYPE_CPU, | |
249 | .instance_size = sizeof(M68kCPU), | |
9b706039 | 250 | .instance_init = m68k_cpu_initfn, |
11150915 | 251 | .abstract = true, |
b9e7a234 AF |
252 | .class_size = sizeof(M68kCPUClass), |
253 | .class_init = m68k_cpu_class_init, | |
254 | }; | |
255 | ||
256 | static void m68k_cpu_register_types(void) | |
257 | { | |
11150915 AF |
258 | int i; |
259 | ||
b9e7a234 | 260 | type_register_static(&m68k_cpu_type_info); |
11150915 AF |
261 | for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) { |
262 | register_cpu_type(&m68k_cpus[i]); | |
263 | } | |
b9e7a234 AF |
264 | } |
265 | ||
266 | type_init(m68k_cpu_register_types) |