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clock year fix for sparc (Blue Swirl)
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1#if !defined(__QEMU_MIPS_EXEC_H__)
2#define __QEMU_MIPS_EXEC_H__
3
01dbbdf1 4//#define DEBUG_OP
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5
6#include "mips-defs.h"
7#include "dyngen-exec.h"
8
9register struct CPUMIPSState *env asm(AREG0);
10
11#if defined (USE_64BITS_REGS)
12typedef int64_t host_int_t;
13typedef uint64_t host_uint_t;
14#else
15typedef int32_t host_int_t;
16typedef uint32_t host_uint_t;
17#endif
18
19register host_uint_t T0 asm(AREG1);
20register host_uint_t T1 asm(AREG2);
21register host_uint_t T2 asm(AREG3);
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22
23#if defined (USE_HOST_FLOAT_REGS)
24register double FT0 asm(FREG0);
25register double FT1 asm(FREG1);
26register double FT2 asm(FREG2);
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27#else
28#define FT0 (env->ft0.d)
29#define FT1 (env->ft1.d)
30#define FT2 (env->ft2.d)
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31#endif
32
33#if defined (DEBUG_OP)
34#define RETURN() __asm__ __volatile__("nop");
35#else
36#define RETURN() __asm__ __volatile__("");
37#endif
38
39#include "cpu.h"
40#include "exec-all.h"
41
42#if !defined(CONFIG_USER_ONLY)
a9049a07 43#include "softmmu_exec.h"
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44#endif /* !defined(CONFIG_USER_ONLY) */
45
46static inline void env_to_regs(void)
47{
48}
49
50static inline void regs_to_env(void)
51{
52}
53
54#if (HOST_LONG_BITS == 32)
55void do_mult (void);
56void do_multu (void);
57void do_madd (void);
58void do_maddu (void);
59void do_msub (void);
60void do_msubu (void);
61#endif
6af0bf9c 62void do_mfc0(int reg, int sel);
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63void do_mtc0(int reg, int sel);
64void do_tlbwi (void);
65void do_tlbwr (void);
66void do_tlbp (void);
67void do_tlbr (void);
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68void do_lwl_raw (uint32_t);
69void do_lwr_raw (uint32_t);
70uint32_t do_swl_raw (uint32_t);
71uint32_t do_swr_raw (uint32_t);
6af0bf9c 72#if !defined(CONFIG_USER_ONLY)
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73void do_lwl_user (uint32_t);
74void do_lwl_kernel (uint32_t);
75void do_lwr_user (uint32_t);
76void do_lwr_kernel (uint32_t);
77uint32_t do_swl_user (uint32_t);
78uint32_t do_swl_kernel (uint32_t);
79uint32_t do_swr_user (uint32_t);
80uint32_t do_swr_kernel (uint32_t);
6af0bf9c 81#endif
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82void do_pmon (int function);
83
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84void dump_sc (void);
85
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86int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
87 int is_user, int is_softmmu);
88void do_interrupt (CPUState *env);
89
90void cpu_loop_exit(void);
6af0bf9c 91void do_raise_exception_err (uint32_t exception, int error_code);
6af0bf9c 92void do_raise_exception (uint32_t exception);
4ad40f36 93void do_raise_exception_direct (uint32_t exception);
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94
95void cpu_dump_state(CPUState *env, FILE *f,
96 int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
97 int flags);
98void cpu_mips_irqctrl_init (void);
99uint32_t cpu_mips_get_random (CPUState *env);
100uint32_t cpu_mips_get_count (CPUState *env);
101void cpu_mips_store_count (CPUState *env, uint32_t value);
102void cpu_mips_store_compare (CPUState *env, uint32_t value);
103void cpu_mips_clock_init (CPUState *env);
104
105#endif /* !defined(__QEMU_MIPS_EXEC_H__) */