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Commit | Line | Data |
---|---|---|
895c2d04 BS |
1 | DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) |
2 | DEF_HELPER_2(raise_exception, noreturn, env, i32) | |
7dd9e556 | 3 | |
c8c2227e | 4 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
5 | DEF_HELPER_4(sdl, void, env, tl, tl, int) |
6 | DEF_HELPER_4(sdr, void, env, tl, tl, int) | |
c8c2227e | 7 | #endif |
895c2d04 BS |
8 | DEF_HELPER_4(swl, void, env, tl, tl, int) |
9 | DEF_HELPER_4(swr, void, env, tl, tl, int) | |
c8c2227e | 10 | |
e7139c44 | 11 | #ifndef CONFIG_USER_ONLY |
895c2d04 BS |
12 | DEF_HELPER_3(ll, tl, env, tl, int) |
13 | DEF_HELPER_4(sc, tl, env, tl, tl, int) | |
e7139c44 | 14 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
15 | DEF_HELPER_3(lld, tl, env, tl, int) |
16 | DEF_HELPER_4(scd, tl, env, tl, tl, int) | |
e7139c44 AJ |
17 | #endif |
18 | #endif | |
19 | ||
95bf787e AJ |
20 | DEF_HELPER_FLAGS_1(clo, TCG_CALL_NO_RWG_SE, tl, tl) |
21 | DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, tl, tl) | |
7dd9e556 | 22 | #ifdef TARGET_MIPS64 |
95bf787e AJ |
23 | DEF_HELPER_FLAGS_1(dclo, TCG_CALL_NO_RWG_SE, tl, tl) |
24 | DEF_HELPER_FLAGS_1(dclz, TCG_CALL_NO_RWG_SE, tl, tl) | |
7dd9e556 | 25 | #endif |
f1aa6320 | 26 | |
895c2d04 BS |
27 | DEF_HELPER_3(muls, tl, env, tl, tl) |
28 | DEF_HELPER_3(mulsu, tl, env, tl, tl) | |
29 | DEF_HELPER_3(macc, tl, env, tl, tl) | |
30 | DEF_HELPER_3(maccu, tl, env, tl, tl) | |
31 | DEF_HELPER_3(msac, tl, env, tl, tl) | |
32 | DEF_HELPER_3(msacu, tl, env, tl, tl) | |
33 | DEF_HELPER_3(mulhi, tl, env, tl, tl) | |
34 | DEF_HELPER_3(mulhiu, tl, env, tl, tl) | |
35 | DEF_HELPER_3(mulshi, tl, env, tl, tl) | |
36 | DEF_HELPER_3(mulshiu, tl, env, tl, tl) | |
37 | DEF_HELPER_3(macchi, tl, env, tl, tl) | |
38 | DEF_HELPER_3(macchiu, tl, env, tl, tl) | |
39 | DEF_HELPER_3(msachi, tl, env, tl, tl) | |
40 | DEF_HELPER_3(msachiu, tl, env, tl, tl) | |
92af06d2 | 41 | |
15eacb9b YK |
42 | DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl) |
43 | #ifdef TARGET_MIPS64 | |
44 | DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl) | |
45 | #endif | |
46 | ||
f1aa6320 | 47 | #ifndef CONFIG_USER_ONLY |
0eaef5aa | 48 | /* CP0 helpers */ |
895c2d04 BS |
49 | DEF_HELPER_1(mfc0_mvpcontrol, tl, env) |
50 | DEF_HELPER_1(mfc0_mvpconf0, tl, env) | |
51 | DEF_HELPER_1(mfc0_mvpconf1, tl, env) | |
52 | DEF_HELPER_1(mftc0_vpecontrol, tl, env) | |
53 | DEF_HELPER_1(mftc0_vpeconf0, tl, env) | |
54 | DEF_HELPER_1(mfc0_random, tl, env) | |
55 | DEF_HELPER_1(mfc0_tcstatus, tl, env) | |
56 | DEF_HELPER_1(mftc0_tcstatus, tl, env) | |
57 | DEF_HELPER_1(mfc0_tcbind, tl, env) | |
58 | DEF_HELPER_1(mftc0_tcbind, tl, env) | |
59 | DEF_HELPER_1(mfc0_tcrestart, tl, env) | |
60 | DEF_HELPER_1(mftc0_tcrestart, tl, env) | |
61 | DEF_HELPER_1(mfc0_tchalt, tl, env) | |
62 | DEF_HELPER_1(mftc0_tchalt, tl, env) | |
63 | DEF_HELPER_1(mfc0_tccontext, tl, env) | |
64 | DEF_HELPER_1(mftc0_tccontext, tl, env) | |
65 | DEF_HELPER_1(mfc0_tcschedule, tl, env) | |
66 | DEF_HELPER_1(mftc0_tcschedule, tl, env) | |
67 | DEF_HELPER_1(mfc0_tcschefback, tl, env) | |
68 | DEF_HELPER_1(mftc0_tcschefback, tl, env) | |
69 | DEF_HELPER_1(mfc0_count, tl, env) | |
70 | DEF_HELPER_1(mftc0_entryhi, tl, env) | |
71 | DEF_HELPER_1(mftc0_status, tl, env) | |
72 | DEF_HELPER_1(mftc0_cause, tl, env) | |
73 | DEF_HELPER_1(mftc0_epc, tl, env) | |
74 | DEF_HELPER_1(mftc0_ebase, tl, env) | |
75 | DEF_HELPER_2(mftc0_configx, tl, env, tl) | |
76 | DEF_HELPER_1(mfc0_lladdr, tl, env) | |
77 | DEF_HELPER_2(mfc0_watchlo, tl, env, i32) | |
78 | DEF_HELPER_2(mfc0_watchhi, tl, env, i32) | |
79 | DEF_HELPER_1(mfc0_debug, tl, env) | |
80 | DEF_HELPER_1(mftc0_debug, tl, env) | |
f1aa6320 | 81 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
82 | DEF_HELPER_1(dmfc0_tcrestart, tl, env) |
83 | DEF_HELPER_1(dmfc0_tchalt, tl, env) | |
84 | DEF_HELPER_1(dmfc0_tccontext, tl, env) | |
85 | DEF_HELPER_1(dmfc0_tcschedule, tl, env) | |
86 | DEF_HELPER_1(dmfc0_tcschefback, tl, env) | |
87 | DEF_HELPER_1(dmfc0_lladdr, tl, env) | |
88 | DEF_HELPER_2(dmfc0_watchlo, tl, env, i32) | |
f1aa6320 TS |
89 | #endif /* TARGET_MIPS64 */ |
90 | ||
895c2d04 BS |
91 | DEF_HELPER_2(mtc0_index, void, env, tl) |
92 | DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl) | |
93 | DEF_HELPER_2(mtc0_vpecontrol, void, env, tl) | |
94 | DEF_HELPER_2(mttc0_vpecontrol, void, env, tl) | |
95 | DEF_HELPER_2(mtc0_vpeconf0, void, env, tl) | |
96 | DEF_HELPER_2(mttc0_vpeconf0, void, env, tl) | |
97 | DEF_HELPER_2(mtc0_vpeconf1, void, env, tl) | |
98 | DEF_HELPER_2(mtc0_yqmask, void, env, tl) | |
99 | DEF_HELPER_2(mtc0_vpeopt, void, env, tl) | |
100 | DEF_HELPER_2(mtc0_entrylo0, void, env, tl) | |
101 | DEF_HELPER_2(mtc0_tcstatus, void, env, tl) | |
102 | DEF_HELPER_2(mttc0_tcstatus, void, env, tl) | |
103 | DEF_HELPER_2(mtc0_tcbind, void, env, tl) | |
104 | DEF_HELPER_2(mttc0_tcbind, void, env, tl) | |
105 | DEF_HELPER_2(mtc0_tcrestart, void, env, tl) | |
106 | DEF_HELPER_2(mttc0_tcrestart, void, env, tl) | |
107 | DEF_HELPER_2(mtc0_tchalt, void, env, tl) | |
108 | DEF_HELPER_2(mttc0_tchalt, void, env, tl) | |
109 | DEF_HELPER_2(mtc0_tccontext, void, env, tl) | |
110 | DEF_HELPER_2(mttc0_tccontext, void, env, tl) | |
111 | DEF_HELPER_2(mtc0_tcschedule, void, env, tl) | |
112 | DEF_HELPER_2(mttc0_tcschedule, void, env, tl) | |
113 | DEF_HELPER_2(mtc0_tcschefback, void, env, tl) | |
114 | DEF_HELPER_2(mttc0_tcschefback, void, env, tl) | |
115 | DEF_HELPER_2(mtc0_entrylo1, void, env, tl) | |
116 | DEF_HELPER_2(mtc0_context, void, env, tl) | |
117 | DEF_HELPER_2(mtc0_pagemask, void, env, tl) | |
118 | DEF_HELPER_2(mtc0_pagegrain, void, env, tl) | |
119 | DEF_HELPER_2(mtc0_wired, void, env, tl) | |
120 | DEF_HELPER_2(mtc0_srsconf0, void, env, tl) | |
121 | DEF_HELPER_2(mtc0_srsconf1, void, env, tl) | |
122 | DEF_HELPER_2(mtc0_srsconf2, void, env, tl) | |
123 | DEF_HELPER_2(mtc0_srsconf3, void, env, tl) | |
124 | DEF_HELPER_2(mtc0_srsconf4, void, env, tl) | |
125 | DEF_HELPER_2(mtc0_hwrena, void, env, tl) | |
126 | DEF_HELPER_2(mtc0_count, void, env, tl) | |
127 | DEF_HELPER_2(mtc0_entryhi, void, env, tl) | |
128 | DEF_HELPER_2(mttc0_entryhi, void, env, tl) | |
129 | DEF_HELPER_2(mtc0_compare, void, env, tl) | |
130 | DEF_HELPER_2(mtc0_status, void, env, tl) | |
131 | DEF_HELPER_2(mttc0_status, void, env, tl) | |
132 | DEF_HELPER_2(mtc0_intctl, void, env, tl) | |
133 | DEF_HELPER_2(mtc0_srsctl, void, env, tl) | |
134 | DEF_HELPER_2(mtc0_cause, void, env, tl) | |
135 | DEF_HELPER_2(mttc0_cause, void, env, tl) | |
136 | DEF_HELPER_2(mtc0_ebase, void, env, tl) | |
137 | DEF_HELPER_2(mttc0_ebase, void, env, tl) | |
138 | DEF_HELPER_2(mtc0_config0, void, env, tl) | |
139 | DEF_HELPER_2(mtc0_config2, void, env, tl) | |
b4160af1 | 140 | DEF_HELPER_2(mtc0_config4, void, env, tl) |
b4dd99a3 | 141 | DEF_HELPER_2(mtc0_config5, void, env, tl) |
895c2d04 BS |
142 | DEF_HELPER_2(mtc0_lladdr, void, env, tl) |
143 | DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32) | |
144 | DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32) | |
145 | DEF_HELPER_2(mtc0_xcontext, void, env, tl) | |
146 | DEF_HELPER_2(mtc0_framemask, void, env, tl) | |
147 | DEF_HELPER_2(mtc0_debug, void, env, tl) | |
148 | DEF_HELPER_2(mttc0_debug, void, env, tl) | |
149 | DEF_HELPER_2(mtc0_performance0, void, env, tl) | |
150 | DEF_HELPER_2(mtc0_taglo, void, env, tl) | |
151 | DEF_HELPER_2(mtc0_datalo, void, env, tl) | |
152 | DEF_HELPER_2(mtc0_taghi, void, env, tl) | |
153 | DEF_HELPER_2(mtc0_datahi, void, env, tl) | |
f1aa6320 TS |
154 | |
155 | /* MIPS MT functions */ | |
f5daeec4 | 156 | DEF_HELPER_2(mftgpr, tl, env, i32) |
895c2d04 BS |
157 | DEF_HELPER_2(mftlo, tl, env, i32) |
158 | DEF_HELPER_2(mfthi, tl, env, i32) | |
159 | DEF_HELPER_2(mftacx, tl, env, i32) | |
160 | DEF_HELPER_1(mftdsp, tl, env) | |
161 | DEF_HELPER_3(mttgpr, void, env, tl, i32) | |
162 | DEF_HELPER_3(mttlo, void, env, tl, i32) | |
163 | DEF_HELPER_3(mtthi, void, env, tl, i32) | |
164 | DEF_HELPER_3(mttacx, void, env, tl, i32) | |
165 | DEF_HELPER_2(mttdsp, void, env, tl) | |
9ed5726c NF |
166 | DEF_HELPER_0(dmt, tl) |
167 | DEF_HELPER_0(emt, tl) | |
895c2d04 BS |
168 | DEF_HELPER_1(dvpe, tl, env) |
169 | DEF_HELPER_1(evpe, tl, env) | |
0eaef5aa | 170 | #endif /* !CONFIG_USER_ONLY */ |
3c824109 NF |
171 | |
172 | /* microMIPS functions */ | |
f5daeec4 RH |
173 | DEF_HELPER_4(lwm, void, env, tl, tl, i32) |
174 | DEF_HELPER_4(swm, void, env, tl, tl, i32) | |
3c824109 | 175 | #ifdef TARGET_MIPS64 |
f5daeec4 RH |
176 | DEF_HELPER_4(ldm, void, env, tl, tl, i32) |
177 | DEF_HELPER_4(sdm, void, env, tl, tl, i32) | |
3c824109 NF |
178 | #endif |
179 | ||
a7812ae4 | 180 | DEF_HELPER_2(fork, void, tl, tl) |
895c2d04 | 181 | DEF_HELPER_2(yield, tl, env, tl) |
f1aa6320 TS |
182 | |
183 | /* CP1 functions */ | |
895c2d04 | 184 | DEF_HELPER_2(cfc1, tl, env, i32) |
736d120a | 185 | DEF_HELPER_4(ctc1, void, env, tl, i32, i32) |
5d0fc900 | 186 | |
895c2d04 BS |
187 | DEF_HELPER_2(float_cvtd_s, i64, env, i32) |
188 | DEF_HELPER_2(float_cvtd_w, i64, env, i32) | |
189 | DEF_HELPER_2(float_cvtd_l, i64, env, i64) | |
190 | DEF_HELPER_2(float_cvtl_d, i64, env, i64) | |
191 | DEF_HELPER_2(float_cvtl_s, i64, env, i32) | |
192 | DEF_HELPER_2(float_cvtps_pw, i64, env, i64) | |
193 | DEF_HELPER_2(float_cvtpw_ps, i64, env, i64) | |
194 | DEF_HELPER_2(float_cvts_d, i32, env, i64) | |
195 | DEF_HELPER_2(float_cvts_w, i32, env, i32) | |
196 | DEF_HELPER_2(float_cvts_l, i32, env, i64) | |
197 | DEF_HELPER_2(float_cvts_pl, i32, env, i32) | |
198 | DEF_HELPER_2(float_cvts_pu, i32, env, i32) | |
199 | DEF_HELPER_2(float_cvtw_s, i32, env, i32) | |
200 | DEF_HELPER_2(float_cvtw_d, i32, env, i64) | |
b6d96bed | 201 | |
895c2d04 BS |
202 | DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) |
203 | DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) | |
b6d96bed | 204 | |
e7f16abb LA |
205 | DEF_HELPER_FLAGS_1(float_class_s, TCG_CALL_NO_RWG_SE, i32, i32) |
206 | DEF_HELPER_FLAGS_1(float_class_d, TCG_CALL_NO_RWG_SE, i64, i64) | |
207 | ||
208 | #define FOP_PROTO(op) \ | |
209 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
210 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) | |
211 | FOP_PROTO(maddf) | |
212 | FOP_PROTO(msubf) | |
213 | #undef FOP_PROTO | |
214 | ||
215 | #define FOP_PROTO(op) \ | |
216 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
217 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) | |
218 | FOP_PROTO(max) | |
219 | FOP_PROTO(maxa) | |
220 | FOP_PROTO(min) | |
221 | FOP_PROTO(mina) | |
222 | #undef FOP_PROTO | |
223 | ||
895c2d04 BS |
224 | #define FOP_PROTO(op) \ |
225 | DEF_HELPER_2(float_ ## op ## l_s, i64, env, i32) \ | |
226 | DEF_HELPER_2(float_ ## op ## l_d, i64, env, i64) \ | |
227 | DEF_HELPER_2(float_ ## op ## w_s, i32, env, i32) \ | |
228 | DEF_HELPER_2(float_ ## op ## w_d, i32, env, i64) | |
b6d96bed TS |
229 | FOP_PROTO(round) |
230 | FOP_PROTO(trunc) | |
231 | FOP_PROTO(ceil) | |
232 | FOP_PROTO(floor) | |
233 | #undef FOP_PROTO | |
234 | ||
895c2d04 BS |
235 | #define FOP_PROTO(op) \ |
236 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
237 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) | |
a16336e4 | 238 | FOP_PROTO(sqrt) |
5d0fc900 TS |
239 | FOP_PROTO(rsqrt) |
240 | FOP_PROTO(recip) | |
e7f16abb | 241 | FOP_PROTO(rint) |
5d0fc900 TS |
242 | #undef FOP_PROTO |
243 | ||
a7812ae4 PB |
244 | #define FOP_PROTO(op) \ |
245 | DEF_HELPER_1(float_ ## op ## _s, i32, i32) \ | |
246 | DEF_HELPER_1(float_ ## op ## _d, i64, i64) \ | |
247 | DEF_HELPER_1(float_ ## op ## _ps, i64, i64) | |
b6d96bed TS |
248 | FOP_PROTO(abs) |
249 | FOP_PROTO(chs) | |
895c2d04 BS |
250 | #undef FOP_PROTO |
251 | ||
252 | #define FOP_PROTO(op) \ | |
253 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
254 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) \ | |
255 | DEF_HELPER_2(float_ ## op ## _ps, i64, env, i64) | |
b6d96bed TS |
256 | FOP_PROTO(recip1) |
257 | FOP_PROTO(rsqrt1) | |
258 | #undef FOP_PROTO | |
259 | ||
895c2d04 BS |
260 | #define FOP_PROTO(op) \ |
261 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
262 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) \ | |
263 | DEF_HELPER_3(float_ ## op ## _ps, i64, env, i64, i64) | |
5d0fc900 TS |
264 | FOP_PROTO(add) |
265 | FOP_PROTO(sub) | |
266 | FOP_PROTO(mul) | |
267 | FOP_PROTO(div) | |
b6d96bed TS |
268 | FOP_PROTO(recip2) |
269 | FOP_PROTO(rsqrt2) | |
270 | #undef FOP_PROTO | |
271 | ||
895c2d04 BS |
272 | #define FOP_PROTO(op) \ |
273 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
274 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) \ | |
275 | DEF_HELPER_4(float_ ## op ## _ps, i64, env, i64, i64, i64) | |
b3d6cd44 AJ |
276 | FOP_PROTO(madd) |
277 | FOP_PROTO(msub) | |
278 | FOP_PROTO(nmadd) | |
279 | FOP_PROTO(nmsub) | |
5d0fc900 TS |
280 | #undef FOP_PROTO |
281 | ||
895c2d04 BS |
282 | #define FOP_PROTO(op) \ |
283 | DEF_HELPER_4(cmp_d_ ## op, void, env, i64, i64, int) \ | |
284 | DEF_HELPER_4(cmpabs_d_ ## op, void, env, i64, i64, int) \ | |
285 | DEF_HELPER_4(cmp_s_ ## op, void, env, i32, i32, int) \ | |
286 | DEF_HELPER_4(cmpabs_s_ ## op, void, env, i32, i32, int) \ | |
287 | DEF_HELPER_4(cmp_ps_ ## op, void, env, i64, i64, int) \ | |
288 | DEF_HELPER_4(cmpabs_ps_ ## op, void, env, i64, i64, int) | |
5d0fc900 TS |
289 | FOP_PROTO(f) |
290 | FOP_PROTO(un) | |
291 | FOP_PROTO(eq) | |
292 | FOP_PROTO(ueq) | |
293 | FOP_PROTO(olt) | |
294 | FOP_PROTO(ult) | |
295 | FOP_PROTO(ole) | |
296 | FOP_PROTO(ule) | |
297 | FOP_PROTO(sf) | |
298 | FOP_PROTO(ngle) | |
299 | FOP_PROTO(seq) | |
300 | FOP_PROTO(ngl) | |
301 | FOP_PROTO(lt) | |
302 | FOP_PROTO(nge) | |
303 | FOP_PROTO(le) | |
304 | FOP_PROTO(ngt) | |
305 | #undef FOP_PROTO | |
08ba7963 TS |
306 | |
307 | /* Special functions */ | |
0eaef5aa | 308 | #ifndef CONFIG_USER_ONLY |
895c2d04 BS |
309 | DEF_HELPER_1(tlbwi, void, env) |
310 | DEF_HELPER_1(tlbwr, void, env) | |
311 | DEF_HELPER_1(tlbp, void, env) | |
312 | DEF_HELPER_1(tlbr, void, env) | |
313 | DEF_HELPER_1(di, tl, env) | |
314 | DEF_HELPER_1(ei, tl, env) | |
315 | DEF_HELPER_1(eret, void, env) | |
316 | DEF_HELPER_1(deret, void, env) | |
0eaef5aa | 317 | #endif /* !CONFIG_USER_ONLY */ |
895c2d04 BS |
318 | DEF_HELPER_1(rdhwr_cpunum, tl, env) |
319 | DEF_HELPER_1(rdhwr_synci_step, tl, env) | |
320 | DEF_HELPER_1(rdhwr_cc, tl, env) | |
321 | DEF_HELPER_1(rdhwr_ccres, tl, env) | |
322 | DEF_HELPER_2(pmon, void, env, int) | |
323 | DEF_HELPER_1(wait, void, env) | |
a7812ae4 | 324 | |
bd277fa1 | 325 | /* Loongson multimedia functions. */ |
95bf787e AJ |
326 | DEF_HELPER_FLAGS_2(paddsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
327 | DEF_HELPER_FLAGS_2(paddush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
328 | DEF_HELPER_FLAGS_2(paddh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
329 | DEF_HELPER_FLAGS_2(paddw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
330 | DEF_HELPER_FLAGS_2(paddsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
331 | DEF_HELPER_FLAGS_2(paddusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
332 | DEF_HELPER_FLAGS_2(paddb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 333 | |
95bf787e AJ |
334 | DEF_HELPER_FLAGS_2(psubsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
335 | DEF_HELPER_FLAGS_2(psubush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
336 | DEF_HELPER_FLAGS_2(psubh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
337 | DEF_HELPER_FLAGS_2(psubw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
338 | DEF_HELPER_FLAGS_2(psubsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
339 | DEF_HELPER_FLAGS_2(psubusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
340 | DEF_HELPER_FLAGS_2(psubb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 341 | |
95bf787e AJ |
342 | DEF_HELPER_FLAGS_2(pshufh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
343 | DEF_HELPER_FLAGS_2(packsswh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
344 | DEF_HELPER_FLAGS_2(packsshb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
345 | DEF_HELPER_FLAGS_2(packushb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 346 | |
95bf787e AJ |
347 | DEF_HELPER_FLAGS_2(punpcklhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
348 | DEF_HELPER_FLAGS_2(punpckhhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
349 | DEF_HELPER_FLAGS_2(punpcklbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
350 | DEF_HELPER_FLAGS_2(punpckhbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
351 | DEF_HELPER_FLAGS_2(punpcklwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
352 | DEF_HELPER_FLAGS_2(punpckhwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 353 | |
95bf787e AJ |
354 | DEF_HELPER_FLAGS_2(pavgh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
355 | DEF_HELPER_FLAGS_2(pavgb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
356 | DEF_HELPER_FLAGS_2(pmaxsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
357 | DEF_HELPER_FLAGS_2(pminsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
358 | DEF_HELPER_FLAGS_2(pmaxub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
359 | DEF_HELPER_FLAGS_2(pminub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 360 | |
95bf787e AJ |
361 | DEF_HELPER_FLAGS_2(pcmpeqw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
362 | DEF_HELPER_FLAGS_2(pcmpgtw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
363 | DEF_HELPER_FLAGS_2(pcmpeqh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
364 | DEF_HELPER_FLAGS_2(pcmpgth, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
365 | DEF_HELPER_FLAGS_2(pcmpeqb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
366 | DEF_HELPER_FLAGS_2(pcmpgtb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 367 | |
95bf787e AJ |
368 | DEF_HELPER_FLAGS_2(psllw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
369 | DEF_HELPER_FLAGS_2(psllh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
370 | DEF_HELPER_FLAGS_2(psrlw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
371 | DEF_HELPER_FLAGS_2(psrlh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
372 | DEF_HELPER_FLAGS_2(psraw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
373 | DEF_HELPER_FLAGS_2(psrah, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 374 | |
95bf787e AJ |
375 | DEF_HELPER_FLAGS_2(pmullh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
376 | DEF_HELPER_FLAGS_2(pmulhh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
377 | DEF_HELPER_FLAGS_2(pmulhuh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
378 | DEF_HELPER_FLAGS_2(pmaddhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 379 | |
95bf787e AJ |
380 | DEF_HELPER_FLAGS_2(pasubub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
381 | DEF_HELPER_FLAGS_1(biadd, TCG_CALL_NO_RWG_SE, i64, i64) | |
382 | DEF_HELPER_FLAGS_1(pmovmskb, TCG_CALL_NO_RWG_SE, i64, i64) | |
bd277fa1 | 383 | |
461c08df JL |
384 | /*** MIPS DSP ***/ |
385 | /* DSP Arithmetic Sub-class insns */ | |
386 | DEF_HELPER_FLAGS_3(addq_ph, 0, tl, tl, tl, env) | |
387 | DEF_HELPER_FLAGS_3(addq_s_ph, 0, tl, tl, tl, env) | |
388 | #if defined(TARGET_MIPS64) | |
389 | DEF_HELPER_FLAGS_3(addq_qh, 0, tl, tl, tl, env) | |
390 | DEF_HELPER_FLAGS_3(addq_s_qh, 0, tl, tl, tl, env) | |
391 | #endif | |
392 | DEF_HELPER_FLAGS_3(addq_s_w, 0, tl, tl, tl, env) | |
393 | #if defined(TARGET_MIPS64) | |
394 | DEF_HELPER_FLAGS_3(addq_pw, 0, tl, tl, tl, env) | |
395 | DEF_HELPER_FLAGS_3(addq_s_pw, 0, tl, tl, tl, env) | |
396 | #endif | |
397 | DEF_HELPER_FLAGS_3(addu_qb, 0, tl, tl, tl, env) | |
398 | DEF_HELPER_FLAGS_3(addu_s_qb, 0, tl, tl, tl, env) | |
399 | DEF_HELPER_FLAGS_2(adduh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
400 | DEF_HELPER_FLAGS_2(adduh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
401 | DEF_HELPER_FLAGS_3(addu_ph, 0, tl, tl, tl, env) | |
402 | DEF_HELPER_FLAGS_3(addu_s_ph, 0, tl, tl, tl, env) | |
403 | DEF_HELPER_FLAGS_2(addqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
404 | DEF_HELPER_FLAGS_2(addqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
405 | DEF_HELPER_FLAGS_2(addqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
406 | DEF_HELPER_FLAGS_2(addqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
407 | #if defined(TARGET_MIPS64) | |
408 | DEF_HELPER_FLAGS_3(addu_ob, 0, tl, tl, tl, env) | |
409 | DEF_HELPER_FLAGS_3(addu_s_ob, 0, tl, tl, tl, env) | |
410 | DEF_HELPER_FLAGS_2(adduh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
411 | DEF_HELPER_FLAGS_2(adduh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
412 | DEF_HELPER_FLAGS_3(addu_qh, 0, tl, tl, tl, env) | |
413 | DEF_HELPER_FLAGS_3(addu_s_qh, 0, tl, tl, tl, env) | |
414 | #endif | |
415 | DEF_HELPER_FLAGS_3(subq_ph, 0, tl, tl, tl, env) | |
416 | DEF_HELPER_FLAGS_3(subq_s_ph, 0, tl, tl, tl, env) | |
417 | #if defined(TARGET_MIPS64) | |
418 | DEF_HELPER_FLAGS_3(subq_qh, 0, tl, tl, tl, env) | |
419 | DEF_HELPER_FLAGS_3(subq_s_qh, 0, tl, tl, tl, env) | |
420 | #endif | |
421 | DEF_HELPER_FLAGS_3(subq_s_w, 0, tl, tl, tl, env) | |
422 | #if defined(TARGET_MIPS64) | |
423 | DEF_HELPER_FLAGS_3(subq_pw, 0, tl, tl, tl, env) | |
424 | DEF_HELPER_FLAGS_3(subq_s_pw, 0, tl, tl, tl, env) | |
425 | #endif | |
426 | DEF_HELPER_FLAGS_3(subu_qb, 0, tl, tl, tl, env) | |
427 | DEF_HELPER_FLAGS_3(subu_s_qb, 0, tl, tl, tl, env) | |
428 | DEF_HELPER_FLAGS_2(subuh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
429 | DEF_HELPER_FLAGS_2(subuh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
430 | DEF_HELPER_FLAGS_3(subu_ph, 0, tl, tl, tl, env) | |
431 | DEF_HELPER_FLAGS_3(subu_s_ph, 0, tl, tl, tl, env) | |
432 | DEF_HELPER_FLAGS_2(subqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
433 | DEF_HELPER_FLAGS_2(subqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
434 | DEF_HELPER_FLAGS_2(subqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
435 | DEF_HELPER_FLAGS_2(subqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
436 | #if defined(TARGET_MIPS64) | |
437 | DEF_HELPER_FLAGS_3(subu_ob, 0, tl, tl, tl, env) | |
438 | DEF_HELPER_FLAGS_3(subu_s_ob, 0, tl, tl, tl, env) | |
439 | DEF_HELPER_FLAGS_2(subuh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
440 | DEF_HELPER_FLAGS_2(subuh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
441 | DEF_HELPER_FLAGS_3(subu_qh, 0, tl, tl, tl, env) | |
442 | DEF_HELPER_FLAGS_3(subu_s_qh, 0, tl, tl, tl, env) | |
443 | #endif | |
444 | DEF_HELPER_FLAGS_3(addsc, 0, tl, tl, tl, env) | |
445 | DEF_HELPER_FLAGS_3(addwc, 0, tl, tl, tl, env) | |
446 | DEF_HELPER_FLAGS_2(modsub, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
447 | DEF_HELPER_FLAGS_1(raddu_w_qb, TCG_CALL_NO_RWG_SE, tl, tl) | |
448 | #if defined(TARGET_MIPS64) | |
449 | DEF_HELPER_FLAGS_1(raddu_l_ob, TCG_CALL_NO_RWG_SE, tl, tl) | |
450 | #endif | |
451 | DEF_HELPER_FLAGS_2(absq_s_qb, 0, tl, tl, env) | |
452 | DEF_HELPER_FLAGS_2(absq_s_ph, 0, tl, tl, env) | |
453 | DEF_HELPER_FLAGS_2(absq_s_w, 0, tl, tl, env) | |
454 | #if defined(TARGET_MIPS64) | |
455 | DEF_HELPER_FLAGS_2(absq_s_ob, 0, tl, tl, env) | |
456 | DEF_HELPER_FLAGS_2(absq_s_qh, 0, tl, tl, env) | |
457 | DEF_HELPER_FLAGS_2(absq_s_pw, 0, tl, tl, env) | |
458 | #endif | |
459 | DEF_HELPER_FLAGS_2(precr_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
460 | DEF_HELPER_FLAGS_2(precrq_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
461 | DEF_HELPER_FLAGS_3(precr_sra_ph_w, TCG_CALL_NO_RWG_SE, | |
462 | tl, i32, tl, tl) | |
463 | DEF_HELPER_FLAGS_3(precr_sra_r_ph_w, TCG_CALL_NO_RWG_SE, | |
464 | tl, i32, tl, tl) | |
465 | DEF_HELPER_FLAGS_2(precrq_ph_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
466 | DEF_HELPER_FLAGS_3(precrq_rs_ph_w, 0, tl, tl, tl, env) | |
467 | #if defined(TARGET_MIPS64) | |
468 | DEF_HELPER_FLAGS_2(precr_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
469 | DEF_HELPER_FLAGS_3(precr_sra_qh_pw, | |
470 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
471 | DEF_HELPER_FLAGS_3(precr_sra_r_qh_pw, | |
472 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
473 | DEF_HELPER_FLAGS_2(precrq_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
474 | DEF_HELPER_FLAGS_2(precrq_qh_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
475 | DEF_HELPER_FLAGS_3(precrq_rs_qh_pw, | |
476 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
477 | DEF_HELPER_FLAGS_2(precrq_pw_l, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
478 | #endif | |
479 | DEF_HELPER_FLAGS_3(precrqu_s_qb_ph, 0, tl, tl, tl, env) | |
480 | #if defined(TARGET_MIPS64) | |
481 | DEF_HELPER_FLAGS_3(precrqu_s_ob_qh, | |
482 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
483 | ||
484 | DEF_HELPER_FLAGS_1(preceq_pw_qhl, TCG_CALL_NO_RWG_SE, tl, tl) | |
485 | DEF_HELPER_FLAGS_1(preceq_pw_qhr, TCG_CALL_NO_RWG_SE, tl, tl) | |
486 | DEF_HELPER_FLAGS_1(preceq_pw_qhla, TCG_CALL_NO_RWG_SE, tl, tl) | |
487 | DEF_HELPER_FLAGS_1(preceq_pw_qhra, TCG_CALL_NO_RWG_SE, tl, tl) | |
488 | #endif | |
489 | DEF_HELPER_FLAGS_1(precequ_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
490 | DEF_HELPER_FLAGS_1(precequ_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
491 | DEF_HELPER_FLAGS_1(precequ_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
492 | DEF_HELPER_FLAGS_1(precequ_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
493 | #if defined(TARGET_MIPS64) | |
494 | DEF_HELPER_FLAGS_1(precequ_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
495 | DEF_HELPER_FLAGS_1(precequ_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
496 | DEF_HELPER_FLAGS_1(precequ_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
497 | DEF_HELPER_FLAGS_1(precequ_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
498 | #endif | |
499 | DEF_HELPER_FLAGS_1(preceu_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
500 | DEF_HELPER_FLAGS_1(preceu_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
501 | DEF_HELPER_FLAGS_1(preceu_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
502 | DEF_HELPER_FLAGS_1(preceu_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
503 | #if defined(TARGET_MIPS64) | |
504 | DEF_HELPER_FLAGS_1(preceu_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
505 | DEF_HELPER_FLAGS_1(preceu_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
506 | DEF_HELPER_FLAGS_1(preceu_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
507 | DEF_HELPER_FLAGS_1(preceu_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
508 | #endif | |
509 | ||
77c5fa8b JL |
510 | /* DSP GPR-Based Shift Sub-class insns */ |
511 | DEF_HELPER_FLAGS_3(shll_qb, 0, tl, tl, tl, env) | |
512 | #if defined(TARGET_MIPS64) | |
513 | DEF_HELPER_FLAGS_3(shll_ob, 0, tl, tl, tl, env) | |
514 | #endif | |
515 | DEF_HELPER_FLAGS_3(shll_ph, 0, tl, tl, tl, env) | |
516 | DEF_HELPER_FLAGS_3(shll_s_ph, 0, tl, tl, tl, env) | |
517 | #if defined(TARGET_MIPS64) | |
518 | DEF_HELPER_FLAGS_3(shll_qh, 0, tl, tl, tl, env) | |
519 | DEF_HELPER_FLAGS_3(shll_s_qh, 0, tl, tl, tl, env) | |
520 | #endif | |
521 | DEF_HELPER_FLAGS_3(shll_s_w, 0, tl, tl, tl, env) | |
522 | #if defined(TARGET_MIPS64) | |
523 | DEF_HELPER_FLAGS_3(shll_pw, 0, tl, tl, tl, env) | |
524 | DEF_HELPER_FLAGS_3(shll_s_pw, 0, tl, tl, tl, env) | |
525 | #endif | |
526 | DEF_HELPER_FLAGS_2(shrl_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
527 | DEF_HELPER_FLAGS_2(shrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
528 | #if defined(TARGET_MIPS64) | |
529 | DEF_HELPER_FLAGS_2(shrl_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
530 | DEF_HELPER_FLAGS_2(shrl_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
531 | #endif | |
532 | DEF_HELPER_FLAGS_2(shra_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
533 | DEF_HELPER_FLAGS_2(shra_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
534 | #if defined(TARGET_MIPS64) | |
535 | DEF_HELPER_FLAGS_2(shra_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
536 | DEF_HELPER_FLAGS_2(shra_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
537 | #endif | |
538 | DEF_HELPER_FLAGS_2(shra_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
539 | DEF_HELPER_FLAGS_2(shra_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
540 | DEF_HELPER_FLAGS_2(shra_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
541 | #if defined(TARGET_MIPS64) | |
542 | DEF_HELPER_FLAGS_2(shra_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
543 | DEF_HELPER_FLAGS_2(shra_r_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
544 | DEF_HELPER_FLAGS_2(shra_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
545 | DEF_HELPER_FLAGS_2(shra_r_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
546 | #endif | |
547 | ||
a22260ae JL |
548 | /* DSP Multiply Sub-class insns */ |
549 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbl, 0, tl, tl, tl, env) | |
550 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbr, 0, tl, tl, tl, env) | |
551 | #if defined(TARGET_MIPS64) | |
552 | DEF_HELPER_FLAGS_3(muleu_s_qh_obl, 0, tl, tl, tl, env) | |
553 | DEF_HELPER_FLAGS_3(muleu_s_qh_obr, 0, tl, tl, tl, env) | |
554 | #endif | |
555 | DEF_HELPER_FLAGS_3(mulq_rs_ph, 0, tl, tl, tl, env) | |
556 | #if defined(TARGET_MIPS64) | |
557 | DEF_HELPER_FLAGS_3(mulq_rs_qh, 0, tl, tl, tl, env) | |
558 | #endif | |
559 | DEF_HELPER_FLAGS_3(muleq_s_w_phl, 0, tl, tl, tl, env) | |
560 | DEF_HELPER_FLAGS_3(muleq_s_w_phr, 0, tl, tl, tl, env) | |
561 | #if defined(TARGET_MIPS64) | |
562 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhl, 0, tl, tl, tl, env) | |
563 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhr, 0, tl, tl, tl, env) | |
564 | #endif | |
565 | DEF_HELPER_FLAGS_4(dpau_h_qbl, 0, void, i32, tl, tl, env) | |
566 | DEF_HELPER_FLAGS_4(dpau_h_qbr, 0, void, i32, tl, tl, env) | |
567 | #if defined(TARGET_MIPS64) | |
568 | DEF_HELPER_FLAGS_4(dpau_h_obl, 0, void, tl, tl, i32, env) | |
569 | DEF_HELPER_FLAGS_4(dpau_h_obr, 0, void, tl, tl, i32, env) | |
570 | #endif | |
571 | DEF_HELPER_FLAGS_4(dpsu_h_qbl, 0, void, i32, tl, tl, env) | |
572 | DEF_HELPER_FLAGS_4(dpsu_h_qbr, 0, void, i32, tl, tl, env) | |
573 | #if defined(TARGET_MIPS64) | |
574 | DEF_HELPER_FLAGS_4(dpsu_h_obl, 0, void, tl, tl, i32, env) | |
575 | DEF_HELPER_FLAGS_4(dpsu_h_obr, 0, void, tl, tl, i32, env) | |
576 | #endif | |
577 | DEF_HELPER_FLAGS_4(dpa_w_ph, 0, void, i32, tl, tl, env) | |
578 | #if defined(TARGET_MIPS64) | |
579 | DEF_HELPER_FLAGS_4(dpa_w_qh, 0, void, tl, tl, i32, env) | |
580 | #endif | |
581 | DEF_HELPER_FLAGS_4(dpax_w_ph, 0, void, i32, tl, tl, env) | |
582 | DEF_HELPER_FLAGS_4(dpaq_s_w_ph, 0, void, i32, tl, tl, env) | |
583 | #if defined(TARGET_MIPS64) | |
584 | DEF_HELPER_FLAGS_4(dpaq_s_w_qh, 0, void, tl, tl, i32, env) | |
585 | #endif | |
586 | DEF_HELPER_FLAGS_4(dpaqx_s_w_ph, 0, void, i32, tl, tl, env) | |
587 | DEF_HELPER_FLAGS_4(dpaqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
588 | DEF_HELPER_FLAGS_4(dps_w_ph, 0, void, i32, tl, tl, env) | |
589 | #if defined(TARGET_MIPS64) | |
590 | DEF_HELPER_FLAGS_4(dps_w_qh, 0, void, tl, tl, i32, env) | |
591 | #endif | |
592 | DEF_HELPER_FLAGS_4(dpsx_w_ph, 0, void, i32, tl, tl, env) | |
593 | DEF_HELPER_FLAGS_4(dpsq_s_w_ph, 0, void, i32, tl, tl, env) | |
594 | #if defined(TARGET_MIPS64) | |
595 | DEF_HELPER_FLAGS_4(dpsq_s_w_qh, 0, void, tl, tl, i32, env) | |
596 | #endif | |
597 | DEF_HELPER_FLAGS_4(dpsqx_s_w_ph, 0, void, i32, tl, tl, env) | |
598 | DEF_HELPER_FLAGS_4(dpsqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
599 | DEF_HELPER_FLAGS_4(mulsaq_s_w_ph, 0, void, i32, tl, tl, env) | |
600 | #if defined(TARGET_MIPS64) | |
601 | DEF_HELPER_FLAGS_4(mulsaq_s_w_qh, 0, void, tl, tl, i32, env) | |
602 | #endif | |
603 | DEF_HELPER_FLAGS_4(dpaq_sa_l_w, 0, void, i32, tl, tl, env) | |
604 | #if defined(TARGET_MIPS64) | |
605 | DEF_HELPER_FLAGS_4(dpaq_sa_l_pw, 0, void, tl, tl, i32, env) | |
606 | #endif | |
607 | DEF_HELPER_FLAGS_4(dpsq_sa_l_w, 0, void, i32, tl, tl, env) | |
608 | #if defined(TARGET_MIPS64) | |
609 | DEF_HELPER_FLAGS_4(dpsq_sa_l_pw, 0, void, tl, tl, i32, env) | |
610 | DEF_HELPER_FLAGS_4(mulsaq_s_l_pw, 0, void, tl, tl, i32, env) | |
611 | #endif | |
612 | DEF_HELPER_FLAGS_4(maq_s_w_phl, 0, void, i32, tl, tl, env) | |
613 | DEF_HELPER_FLAGS_4(maq_s_w_phr, 0, void, i32, tl, tl, env) | |
614 | DEF_HELPER_FLAGS_4(maq_sa_w_phl, 0, void, i32, tl, tl, env) | |
615 | DEF_HELPER_FLAGS_4(maq_sa_w_phr, 0, void, i32, tl, tl, env) | |
616 | DEF_HELPER_FLAGS_3(mul_ph, 0, tl, tl, tl, env) | |
617 | DEF_HELPER_FLAGS_3(mul_s_ph, 0, tl, tl, tl, env) | |
618 | DEF_HELPER_FLAGS_3(mulq_s_ph, 0, tl, tl, tl, env) | |
619 | DEF_HELPER_FLAGS_3(mulq_s_w, 0, tl, tl, tl, env) | |
620 | DEF_HELPER_FLAGS_3(mulq_rs_w, 0, tl, tl, tl, env) | |
621 | DEF_HELPER_FLAGS_4(mulsa_w_ph, 0, void, i32, tl, tl, env) | |
622 | #if defined(TARGET_MIPS64) | |
623 | DEF_HELPER_FLAGS_4(maq_s_w_qhll, 0, void, tl, tl, i32, env) | |
624 | DEF_HELPER_FLAGS_4(maq_s_w_qhlr, 0, void, tl, tl, i32, env) | |
625 | DEF_HELPER_FLAGS_4(maq_s_w_qhrl, 0, void, tl, tl, i32, env) | |
626 | DEF_HELPER_FLAGS_4(maq_s_w_qhrr, 0, void, tl, tl, i32, env) | |
627 | DEF_HELPER_FLAGS_4(maq_sa_w_qhll, 0, void, tl, tl, i32, env) | |
628 | DEF_HELPER_FLAGS_4(maq_sa_w_qhlr, 0, void, tl, tl, i32, env) | |
629 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrl, 0, void, tl, tl, i32, env) | |
630 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrr, 0, void, tl, tl, i32, env) | |
631 | DEF_HELPER_FLAGS_4(maq_s_l_pwl, 0, void, tl, tl, i32, env) | |
632 | DEF_HELPER_FLAGS_4(maq_s_l_pwr, 0, void, tl, tl, i32, env) | |
633 | DEF_HELPER_FLAGS_4(dmadd, 0, void, tl, tl, i32, env) | |
634 | DEF_HELPER_FLAGS_4(dmaddu, 0, void, tl, tl, i32, env) | |
635 | DEF_HELPER_FLAGS_4(dmsub, 0, void, tl, tl, i32, env) | |
636 | DEF_HELPER_FLAGS_4(dmsubu, 0, void, tl, tl, i32, env) | |
637 | #endif | |
638 | ||
1cb6686c JL |
639 | /* DSP Bit/Manipulation Sub-class insns */ |
640 | DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_NO_RWG_SE, tl, tl) | |
641 | DEF_HELPER_FLAGS_3(insv, 0, tl, env, tl, tl) | |
642 | #if defined(TARGET_MIPS64) | |
f5daeec4 | 643 | DEF_HELPER_FLAGS_3(dinsv, 0, tl, env, tl, tl) |
1cb6686c JL |
644 | #endif |
645 | ||
26690560 JL |
646 | /* DSP Compare-Pick Sub-class insns */ |
647 | DEF_HELPER_FLAGS_3(cmpu_eq_qb, 0, void, tl, tl, env) | |
648 | DEF_HELPER_FLAGS_3(cmpu_lt_qb, 0, void, tl, tl, env) | |
649 | DEF_HELPER_FLAGS_3(cmpu_le_qb, 0, void, tl, tl, env) | |
650 | DEF_HELPER_FLAGS_2(cmpgu_eq_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
651 | DEF_HELPER_FLAGS_2(cmpgu_lt_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
652 | DEF_HELPER_FLAGS_2(cmpgu_le_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
653 | DEF_HELPER_FLAGS_3(cmp_eq_ph, 0, void, tl, tl, env) | |
654 | DEF_HELPER_FLAGS_3(cmp_lt_ph, 0, void, tl, tl, env) | |
655 | DEF_HELPER_FLAGS_3(cmp_le_ph, 0, void, tl, tl, env) | |
656 | #if defined(TARGET_MIPS64) | |
657 | DEF_HELPER_FLAGS_3(cmpu_eq_ob, 0, void, tl, tl, env) | |
658 | DEF_HELPER_FLAGS_3(cmpu_lt_ob, 0, void, tl, tl, env) | |
659 | DEF_HELPER_FLAGS_3(cmpu_le_ob, 0, void, tl, tl, env) | |
660 | DEF_HELPER_FLAGS_3(cmpgdu_eq_ob, 0, tl, tl, tl, env) | |
661 | DEF_HELPER_FLAGS_3(cmpgdu_lt_ob, 0, tl, tl, tl, env) | |
662 | DEF_HELPER_FLAGS_3(cmpgdu_le_ob, 0, tl, tl, tl, env) | |
663 | DEF_HELPER_FLAGS_2(cmpgu_eq_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
664 | DEF_HELPER_FLAGS_2(cmpgu_lt_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
665 | DEF_HELPER_FLAGS_2(cmpgu_le_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
666 | DEF_HELPER_FLAGS_3(cmp_eq_qh, 0, void, tl, tl, env) | |
667 | DEF_HELPER_FLAGS_3(cmp_lt_qh, 0, void, tl, tl, env) | |
668 | DEF_HELPER_FLAGS_3(cmp_le_qh, 0, void, tl, tl, env) | |
669 | DEF_HELPER_FLAGS_3(cmp_eq_pw, 0, void, tl, tl, env) | |
670 | DEF_HELPER_FLAGS_3(cmp_lt_pw, 0, void, tl, tl, env) | |
671 | DEF_HELPER_FLAGS_3(cmp_le_pw, 0, void, tl, tl, env) | |
672 | #endif | |
673 | DEF_HELPER_FLAGS_3(pick_qb, 0, tl, tl, tl, env) | |
674 | DEF_HELPER_FLAGS_3(pick_ph, 0, tl, tl, tl, env) | |
675 | #if defined(TARGET_MIPS64) | |
676 | DEF_HELPER_FLAGS_3(pick_ob, 0, tl, tl, tl, env) | |
677 | DEF_HELPER_FLAGS_3(pick_qh, 0, tl, tl, tl, env) | |
678 | DEF_HELPER_FLAGS_3(pick_pw, 0, tl, tl, tl, env) | |
679 | #endif | |
26690560 JL |
680 | DEF_HELPER_FLAGS_2(packrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
681 | #if defined(TARGET_MIPS64) | |
682 | DEF_HELPER_FLAGS_2(packrl_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
683 | #endif | |
684 | ||
b53371ed JL |
685 | /* DSP Accumulator and DSPControl Access Sub-class insns */ |
686 | DEF_HELPER_FLAGS_3(extr_w, 0, tl, tl, tl, env) | |
687 | DEF_HELPER_FLAGS_3(extr_r_w, 0, tl, tl, tl, env) | |
688 | DEF_HELPER_FLAGS_3(extr_rs_w, 0, tl, tl, tl, env) | |
689 | #if defined(TARGET_MIPS64) | |
690 | DEF_HELPER_FLAGS_3(dextr_w, 0, tl, tl, tl, env) | |
691 | DEF_HELPER_FLAGS_3(dextr_r_w, 0, tl, tl, tl, env) | |
692 | DEF_HELPER_FLAGS_3(dextr_rs_w, 0, tl, tl, tl, env) | |
693 | DEF_HELPER_FLAGS_3(dextr_l, 0, tl, tl, tl, env) | |
694 | DEF_HELPER_FLAGS_3(dextr_r_l, 0, tl, tl, tl, env) | |
695 | DEF_HELPER_FLAGS_3(dextr_rs_l, 0, tl, tl, tl, env) | |
696 | #endif | |
697 | DEF_HELPER_FLAGS_3(extr_s_h, 0, tl, tl, tl, env) | |
698 | #if defined(TARGET_MIPS64) | |
699 | DEF_HELPER_FLAGS_3(dextr_s_h, 0, tl, tl, tl, env) | |
700 | #endif | |
701 | DEF_HELPER_FLAGS_3(extp, 0, tl, tl, tl, env) | |
702 | DEF_HELPER_FLAGS_3(extpdp, 0, tl, tl, tl, env) | |
703 | #if defined(TARGET_MIPS64) | |
704 | DEF_HELPER_FLAGS_3(dextp, 0, tl, tl, tl, env) | |
705 | DEF_HELPER_FLAGS_3(dextpdp, 0, tl, tl, tl, env) | |
706 | #endif | |
707 | DEF_HELPER_FLAGS_3(shilo, 0, void, tl, tl, env) | |
708 | #if defined(TARGET_MIPS64) | |
709 | DEF_HELPER_FLAGS_3(dshilo, 0, void, tl, tl, env) | |
710 | #endif | |
711 | DEF_HELPER_FLAGS_3(mthlip, 0, void, tl, tl, env) | |
712 | #if defined(TARGET_MIPS64) | |
713 | DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) | |
714 | #endif | |
715 | DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) | |
716 | DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env) |