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42daa9be YK |
1 | /* |
2 | * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU. | |
3 | * | |
4 | * Copyright (c) 2014 Imagination Technologies | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "cpu.h" | |
21 | #include "exec/helper-proto.h" | |
22 | ||
23 | /* Data format min and max values */ | |
24 | #define DF_BITS(df) (1 << ((df) + 3)) | |
25 | ||
26 | #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1) | |
27 | #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1) | |
28 | ||
29 | #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1))) | |
30 | #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1))) | |
31 | ||
32 | #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df))) | |
33 | #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m))) | |
34 | ||
35 | #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df)) | |
36 | #define SIGNED(x, df) \ | |
37 | ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df))) | |
38 | ||
39 | /* Element-by-element access macros */ | |
40 | #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df)) | |
41 | ||
42 | static inline void msa_move_v(wr_t *pwd, wr_t *pws) | |
43 | { | |
44 | uint32_t i; | |
45 | ||
46 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
47 | pwd->d[i] = pws->d[i]; | |
48 | } | |
49 | } | |
4c789546 YK |
50 | |
51 | #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \ | |
52 | void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \ | |
53 | uint32_t i8) \ | |
54 | { \ | |
55 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
56 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
57 | uint32_t i; \ | |
58 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
59 | DEST = OPERATION; \ | |
60 | } \ | |
61 | } | |
62 | ||
63 | MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8) | |
64 | MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8) | |
65 | MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8)) | |
66 | MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8) | |
67 | ||
68 | #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \ | |
69 | UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df) | |
70 | MSA_FN_IMM8(bmnzi_b, pwd->b[i], | |
71 | BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE)) | |
72 | ||
73 | #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \ | |
74 | UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df) | |
75 | MSA_FN_IMM8(bmzi_b, pwd->b[i], | |
76 | BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE)) | |
77 | ||
78 | #define BIT_SELECT(dest, arg1, arg2, df) \ | |
79 | UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df) | |
80 | MSA_FN_IMM8(bseli_b, pwd->b[i], | |
81 | BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE)) | |
82 | ||
83 | #undef MSA_FN_IMM8 | |
84 | ||
85 | #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03)) | |
86 | ||
87 | void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
88 | uint32_t ws, uint32_t imm) | |
89 | { | |
90 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
91 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
92 | wr_t wx, *pwx = &wx; | |
93 | uint32_t i; | |
94 | ||
95 | switch (df) { | |
96 | case DF_BYTE: | |
97 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { | |
98 | pwx->b[i] = pws->b[SHF_POS(i, imm)]; | |
99 | } | |
100 | break; | |
101 | case DF_HALF: | |
102 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { | |
103 | pwx->h[i] = pws->h[SHF_POS(i, imm)]; | |
104 | } | |
105 | break; | |
106 | case DF_WORD: | |
107 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
108 | pwx->w[i] = pws->w[SHF_POS(i, imm)]; | |
109 | } | |
110 | break; | |
111 | default: | |
112 | assert(0); | |
113 | } | |
114 | msa_move_v(pwd, pwx); | |
115 | } | |
80e71591 | 116 | |
cbe50b9a YK |
117 | #define MSA_FN_VECTOR(FUNC, DEST, OPERATION) \ |
118 | void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \ | |
119 | uint32_t wt) \ | |
120 | { \ | |
121 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
122 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
123 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \ | |
124 | uint32_t i; \ | |
125 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
126 | DEST = OPERATION; \ | |
127 | } \ | |
128 | } | |
129 | ||
130 | MSA_FN_VECTOR(and_v, pwd->d[i], pws->d[i] & pwt->d[i]) | |
131 | MSA_FN_VECTOR(or_v, pwd->d[i], pws->d[i] | pwt->d[i]) | |
132 | MSA_FN_VECTOR(nor_v, pwd->d[i], ~(pws->d[i] | pwt->d[i])) | |
133 | MSA_FN_VECTOR(xor_v, pwd->d[i], pws->d[i] ^ pwt->d[i]) | |
134 | MSA_FN_VECTOR(bmnz_v, pwd->d[i], | |
135 | BIT_MOVE_IF_NOT_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE)) | |
136 | MSA_FN_VECTOR(bmz_v, pwd->d[i], | |
137 | BIT_MOVE_IF_ZERO(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE)) | |
138 | MSA_FN_VECTOR(bsel_v, pwd->d[i], | |
139 | BIT_SELECT(pwd->d[i], pws->d[i], pwt->d[i], DF_DOUBLE)) | |
140 | #undef BIT_MOVE_IF_NOT_ZERO | |
141 | #undef BIT_MOVE_IF_ZERO | |
142 | #undef BIT_SELECT | |
143 | #undef MSA_FN_VECTOR | |
144 | ||
80e71591 YK |
145 | static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2) |
146 | { | |
147 | return arg1 + arg2; | |
148 | } | |
149 | ||
150 | static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2) | |
151 | { | |
152 | return arg1 - arg2; | |
153 | } | |
154 | ||
155 | static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2) | |
156 | { | |
157 | return arg1 == arg2 ? -1 : 0; | |
158 | } | |
159 | ||
160 | static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
161 | { | |
162 | return arg1 <= arg2 ? -1 : 0; | |
163 | } | |
164 | ||
165 | static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
166 | { | |
167 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
168 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
169 | return u_arg1 <= u_arg2 ? -1 : 0; | |
170 | } | |
171 | ||
172 | static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
173 | { | |
174 | return arg1 < arg2 ? -1 : 0; | |
175 | } | |
176 | ||
177 | static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
178 | { | |
179 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
180 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
181 | return u_arg1 < u_arg2 ? -1 : 0; | |
182 | } | |
183 | ||
184 | static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
185 | { | |
186 | return arg1 > arg2 ? arg1 : arg2; | |
187 | } | |
188 | ||
189 | static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
190 | { | |
191 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
192 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
193 | return u_arg1 > u_arg2 ? arg1 : arg2; | |
194 | } | |
195 | ||
196 | static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
197 | { | |
198 | return arg1 < arg2 ? arg1 : arg2; | |
199 | } | |
200 | ||
201 | static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
202 | { | |
203 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
204 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
205 | return u_arg1 < u_arg2 ? arg1 : arg2; | |
206 | } | |
207 | ||
208 | #define MSA_BINOP_IMM_DF(helper, func) \ | |
209 | void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \ | |
210 | uint32_t wd, uint32_t ws, int32_t u5) \ | |
211 | { \ | |
212 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
213 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
214 | uint32_t i; \ | |
215 | \ | |
216 | switch (df) { \ | |
217 | case DF_BYTE: \ | |
218 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
219 | pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \ | |
220 | } \ | |
221 | break; \ | |
222 | case DF_HALF: \ | |
223 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
224 | pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \ | |
225 | } \ | |
226 | break; \ | |
227 | case DF_WORD: \ | |
228 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
229 | pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \ | |
230 | } \ | |
231 | break; \ | |
232 | case DF_DOUBLE: \ | |
233 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
234 | pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \ | |
235 | } \ | |
236 | break; \ | |
237 | default: \ | |
238 | assert(0); \ | |
239 | } \ | |
240 | } | |
241 | ||
242 | MSA_BINOP_IMM_DF(addvi, addv) | |
243 | MSA_BINOP_IMM_DF(subvi, subv) | |
244 | MSA_BINOP_IMM_DF(ceqi, ceq) | |
245 | MSA_BINOP_IMM_DF(clei_s, cle_s) | |
246 | MSA_BINOP_IMM_DF(clei_u, cle_u) | |
247 | MSA_BINOP_IMM_DF(clti_s, clt_s) | |
248 | MSA_BINOP_IMM_DF(clti_u, clt_u) | |
249 | MSA_BINOP_IMM_DF(maxi_s, max_s) | |
250 | MSA_BINOP_IMM_DF(maxi_u, max_u) | |
251 | MSA_BINOP_IMM_DF(mini_s, min_s) | |
252 | MSA_BINOP_IMM_DF(mini_u, min_u) | |
253 | #undef MSA_BINOP_IMM_DF | |
254 | ||
255 | void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
256 | int32_t s10) | |
257 | { | |
258 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
259 | uint32_t i; | |
260 | ||
261 | switch (df) { | |
262 | case DF_BYTE: | |
263 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { | |
264 | pwd->b[i] = (int8_t)s10; | |
265 | } | |
266 | break; | |
267 | case DF_HALF: | |
268 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { | |
269 | pwd->h[i] = (int16_t)s10; | |
270 | } | |
271 | break; | |
272 | case DF_WORD: | |
273 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
274 | pwd->w[i] = (int32_t)s10; | |
275 | } | |
276 | break; | |
277 | case DF_DOUBLE: | |
278 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
279 | pwd->d[i] = (int64_t)s10; | |
280 | } | |
281 | break; | |
282 | default: | |
283 | assert(0); | |
284 | } | |
285 | } | |
d4cf28de YK |
286 | |
287 | /* Data format bit position and unsigned values */ | |
288 | #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df)) | |
289 | ||
290 | static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2) | |
291 | { | |
292 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
293 | return arg1 << b_arg2; | |
294 | } | |
295 | ||
296 | static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2) | |
297 | { | |
298 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
299 | return arg1 >> b_arg2; | |
300 | } | |
301 | ||
302 | static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2) | |
303 | { | |
304 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
305 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
306 | return u_arg1 >> b_arg2; | |
307 | } | |
308 | ||
309 | static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2) | |
310 | { | |
311 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
312 | return UNSIGNED(arg1 & (~(1LL << b_arg2)), df); | |
313 | } | |
314 | ||
315 | static inline int64_t msa_bset_df(uint32_t df, int64_t arg1, | |
316 | int64_t arg2) | |
317 | { | |
318 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
319 | return UNSIGNED(arg1 | (1LL << b_arg2), df); | |
320 | } | |
321 | ||
322 | static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2) | |
323 | { | |
324 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
325 | return UNSIGNED(arg1 ^ (1LL << b_arg2), df); | |
326 | } | |
327 | ||
328 | static inline int64_t msa_binsl_df(uint32_t df, int64_t dest, int64_t arg1, | |
329 | int64_t arg2) | |
330 | { | |
331 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
332 | uint64_t u_dest = UNSIGNED(dest, df); | |
333 | int32_t sh_d = BIT_POSITION(arg2, df) + 1; | |
334 | int32_t sh_a = DF_BITS(df) - sh_d; | |
335 | if (sh_d == DF_BITS(df)) { | |
336 | return u_arg1; | |
337 | } else { | |
338 | return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) | | |
339 | UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df); | |
340 | } | |
341 | } | |
342 | ||
343 | static inline int64_t msa_binsr_df(uint32_t df, int64_t dest, int64_t arg1, | |
344 | int64_t arg2) | |
345 | { | |
346 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
347 | uint64_t u_dest = UNSIGNED(dest, df); | |
348 | int32_t sh_d = BIT_POSITION(arg2, df) + 1; | |
349 | int32_t sh_a = DF_BITS(df) - sh_d; | |
350 | if (sh_d == DF_BITS(df)) { | |
351 | return u_arg1; | |
352 | } else { | |
353 | return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) | | |
354 | UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df); | |
355 | } | |
356 | } | |
357 | ||
358 | static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m) | |
359 | { | |
360 | return arg < M_MIN_INT(m+1) ? M_MIN_INT(m+1) : | |
361 | arg > M_MAX_INT(m+1) ? M_MAX_INT(m+1) : | |
362 | arg; | |
363 | } | |
364 | ||
365 | static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m) | |
366 | { | |
367 | uint64_t u_arg = UNSIGNED(arg, df); | |
368 | return u_arg < M_MAX_UINT(m+1) ? u_arg : | |
369 | M_MAX_UINT(m+1); | |
370 | } | |
371 | ||
372 | static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2) | |
373 | { | |
374 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
375 | if (b_arg2 == 0) { | |
376 | return arg1; | |
377 | } else { | |
378 | int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1; | |
379 | return (arg1 >> b_arg2) + r_bit; | |
380 | } | |
381 | } | |
382 | ||
383 | static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2) | |
384 | { | |
385 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
386 | int32_t b_arg2 = BIT_POSITION(arg2, df); | |
387 | if (b_arg2 == 0) { | |
388 | return u_arg1; | |
389 | } else { | |
390 | uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1; | |
391 | return (u_arg1 >> b_arg2) + r_bit; | |
392 | } | |
393 | } | |
394 | ||
395 | #define MSA_BINOP_IMMU_DF(helper, func) \ | |
396 | void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ | |
397 | uint32_t ws, uint32_t u5) \ | |
398 | { \ | |
399 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
400 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
401 | uint32_t i; \ | |
402 | \ | |
403 | switch (df) { \ | |
404 | case DF_BYTE: \ | |
405 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
406 | pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \ | |
407 | } \ | |
408 | break; \ | |
409 | case DF_HALF: \ | |
410 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
411 | pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \ | |
412 | } \ | |
413 | break; \ | |
414 | case DF_WORD: \ | |
415 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
416 | pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \ | |
417 | } \ | |
418 | break; \ | |
419 | case DF_DOUBLE: \ | |
420 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
421 | pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \ | |
422 | } \ | |
423 | break; \ | |
424 | default: \ | |
425 | assert(0); \ | |
426 | } \ | |
427 | } | |
428 | ||
429 | MSA_BINOP_IMMU_DF(slli, sll) | |
430 | MSA_BINOP_IMMU_DF(srai, sra) | |
431 | MSA_BINOP_IMMU_DF(srli, srl) | |
432 | MSA_BINOP_IMMU_DF(bclri, bclr) | |
433 | MSA_BINOP_IMMU_DF(bseti, bset) | |
434 | MSA_BINOP_IMMU_DF(bnegi, bneg) | |
435 | MSA_BINOP_IMMU_DF(sat_s, sat_s) | |
436 | MSA_BINOP_IMMU_DF(sat_u, sat_u) | |
437 | MSA_BINOP_IMMU_DF(srari, srar) | |
438 | MSA_BINOP_IMMU_DF(srlri, srlr) | |
439 | #undef MSA_BINOP_IMMU_DF | |
440 | ||
441 | #define MSA_TEROP_IMMU_DF(helper, func) \ | |
442 | void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \ | |
443 | uint32_t wd, uint32_t ws, uint32_t u5) \ | |
444 | { \ | |
445 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
446 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
447 | uint32_t i; \ | |
448 | \ | |
449 | switch (df) { \ | |
450 | case DF_BYTE: \ | |
451 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
452 | pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \ | |
453 | u5); \ | |
454 | } \ | |
455 | break; \ | |
456 | case DF_HALF: \ | |
457 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
458 | pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \ | |
459 | u5); \ | |
460 | } \ | |
461 | break; \ | |
462 | case DF_WORD: \ | |
463 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
464 | pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \ | |
465 | u5); \ | |
466 | } \ | |
467 | break; \ | |
468 | case DF_DOUBLE: \ | |
469 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
470 | pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \ | |
471 | u5); \ | |
472 | } \ | |
473 | break; \ | |
474 | default: \ | |
475 | assert(0); \ | |
476 | } \ | |
477 | } | |
478 | ||
479 | MSA_TEROP_IMMU_DF(binsli, binsl) | |
480 | MSA_TEROP_IMMU_DF(binsri, binsr) | |
481 | #undef MSA_TEROP_IMMU_DF | |
28f99f08 YK |
482 | |
483 | static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2) | |
484 | { | |
485 | uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1; | |
486 | uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2; | |
487 | return abs_arg1 > abs_arg2 ? arg1 : arg2; | |
488 | } | |
489 | ||
490 | static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2) | |
491 | { | |
492 | uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1; | |
493 | uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2; | |
494 | return abs_arg1 < abs_arg2 ? arg1 : arg2; | |
495 | } | |
496 | ||
497 | static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2) | |
498 | { | |
499 | uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1; | |
500 | uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2; | |
501 | return abs_arg1 + abs_arg2; | |
502 | } | |
503 | ||
504 | static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2) | |
505 | { | |
506 | uint64_t max_int = (uint64_t)DF_MAX_INT(df); | |
507 | uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1; | |
508 | uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2; | |
509 | if (abs_arg1 > max_int || abs_arg2 > max_int) { | |
510 | return (int64_t)max_int; | |
511 | } else { | |
512 | return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int; | |
513 | } | |
514 | } | |
515 | ||
516 | static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
517 | { | |
518 | int64_t max_int = DF_MAX_INT(df); | |
519 | int64_t min_int = DF_MIN_INT(df); | |
520 | if (arg1 < 0) { | |
521 | return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int; | |
522 | } else { | |
523 | return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int; | |
524 | } | |
525 | } | |
526 | ||
527 | static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2) | |
528 | { | |
529 | uint64_t max_uint = DF_MAX_UINT(df); | |
530 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
531 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
532 | return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint; | |
533 | } | |
534 | ||
535 | static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
536 | { | |
537 | /* signed shift */ | |
538 | return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1); | |
539 | } | |
540 | ||
541 | static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2) | |
542 | { | |
543 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
544 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
545 | /* unsigned shift */ | |
546 | return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1); | |
547 | } | |
548 | ||
549 | static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
550 | { | |
551 | /* signed shift */ | |
552 | return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1); | |
553 | } | |
554 | ||
555 | static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2) | |
556 | { | |
557 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
558 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
559 | /* unsigned shift */ | |
560 | return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1); | |
561 | } | |
562 | ||
563 | static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
564 | { | |
565 | int64_t max_int = DF_MAX_INT(df); | |
566 | int64_t min_int = DF_MIN_INT(df); | |
567 | if (arg2 > 0) { | |
568 | return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int; | |
569 | } else { | |
570 | return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int; | |
571 | } | |
572 | } | |
573 | ||
574 | static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
575 | { | |
576 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
577 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
578 | return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0; | |
579 | } | |
580 | ||
581 | static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
582 | { | |
583 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
584 | uint64_t max_uint = DF_MAX_UINT(df); | |
585 | if (arg2 >= 0) { | |
586 | uint64_t u_arg2 = (uint64_t)arg2; | |
587 | return (u_arg1 > u_arg2) ? | |
588 | (int64_t)(u_arg1 - u_arg2) : | |
589 | 0; | |
590 | } else { | |
591 | uint64_t u_arg2 = (uint64_t)(-arg2); | |
592 | return (u_arg1 < max_uint - u_arg2) ? | |
593 | (int64_t)(u_arg1 + u_arg2) : | |
594 | (int64_t)max_uint; | |
595 | } | |
596 | } | |
597 | ||
598 | static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
599 | { | |
600 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
601 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
602 | int64_t max_int = DF_MAX_INT(df); | |
603 | int64_t min_int = DF_MIN_INT(df); | |
604 | if (u_arg1 > u_arg2) { | |
605 | return u_arg1 - u_arg2 < (uint64_t)max_int ? | |
606 | (int64_t)(u_arg1 - u_arg2) : | |
607 | max_int; | |
608 | } else { | |
609 | return u_arg2 - u_arg1 < (uint64_t)(-min_int) ? | |
610 | (int64_t)(u_arg1 - u_arg2) : | |
611 | min_int; | |
612 | } | |
613 | } | |
614 | ||
615 | static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
616 | { | |
617 | /* signed compare */ | |
618 | return (arg1 < arg2) ? | |
619 | (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2); | |
620 | } | |
621 | ||
622 | static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2) | |
623 | { | |
624 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
625 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
626 | /* unsigned compare */ | |
627 | return (u_arg1 < u_arg2) ? | |
628 | (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2); | |
629 | } | |
630 | ||
631 | static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2) | |
632 | { | |
633 | return arg1 * arg2; | |
634 | } | |
635 | ||
636 | static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
637 | { | |
638 | if (arg1 == DF_MIN_INT(df) && arg2 == -1) { | |
639 | return DF_MIN_INT(df); | |
640 | } | |
641 | return arg2 ? arg1 / arg2 : 0; | |
642 | } | |
643 | ||
644 | static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
645 | { | |
646 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
647 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
648 | return u_arg2 ? u_arg1 / u_arg2 : 0; | |
649 | } | |
650 | ||
651 | static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
652 | { | |
653 | if (arg1 == DF_MIN_INT(df) && arg2 == -1) { | |
654 | return 0; | |
655 | } | |
656 | return arg2 ? arg1 % arg2 : 0; | |
657 | } | |
658 | ||
659 | static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
660 | { | |
661 | uint64_t u_arg1 = UNSIGNED(arg1, df); | |
662 | uint64_t u_arg2 = UNSIGNED(arg2, df); | |
663 | return u_arg2 ? u_arg1 % u_arg2 : 0; | |
664 | } | |
665 | ||
666 | #define SIGNED_EVEN(a, df) \ | |
667 | ((((int64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2)) | |
668 | ||
669 | #define UNSIGNED_EVEN(a, df) \ | |
670 | ((((uint64_t)(a)) << (64 - DF_BITS(df)/2)) >> (64 - DF_BITS(df)/2)) | |
671 | ||
672 | #define SIGNED_ODD(a, df) \ | |
673 | ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2)) | |
674 | ||
675 | #define UNSIGNED_ODD(a, df) \ | |
676 | ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)/2)) | |
677 | ||
678 | #define SIGNED_EXTRACT(e, o, a, df) \ | |
679 | do { \ | |
680 | e = SIGNED_EVEN(a, df); \ | |
681 | o = SIGNED_ODD(a, df); \ | |
682 | } while (0); | |
683 | ||
684 | #define UNSIGNED_EXTRACT(e, o, a, df) \ | |
685 | do { \ | |
686 | e = UNSIGNED_EVEN(a, df); \ | |
687 | o = UNSIGNED_ODD(a, df); \ | |
688 | } while (0); | |
689 | ||
690 | static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
691 | { | |
692 | int64_t even_arg1; | |
693 | int64_t even_arg2; | |
694 | int64_t odd_arg1; | |
695 | int64_t odd_arg2; | |
696 | SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
697 | SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
698 | return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2); | |
699 | } | |
700 | ||
701 | static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
702 | { | |
703 | int64_t even_arg1; | |
704 | int64_t even_arg2; | |
705 | int64_t odd_arg1; | |
706 | int64_t odd_arg2; | |
707 | UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
708 | UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
709 | return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2); | |
710 | } | |
711 | ||
712 | #define CONCATENATE_AND_SLIDE(s, k) \ | |
713 | do { \ | |
714 | for (i = 0; i < s; i++) { \ | |
715 | v[i] = pws->b[s * k + i]; \ | |
716 | v[i + s] = pwd->b[s * k + i]; \ | |
717 | } \ | |
718 | for (i = 0; i < s; i++) { \ | |
719 | pwd->b[s * k + i] = v[i + n]; \ | |
720 | } \ | |
721 | } while (0) | |
722 | ||
723 | static inline void msa_sld_df(uint32_t df, wr_t *pwd, | |
724 | wr_t *pws, target_ulong rt) | |
725 | { | |
726 | uint32_t n = rt % DF_ELEMENTS(df); | |
727 | uint8_t v[64]; | |
728 | uint32_t i, k; | |
729 | ||
730 | switch (df) { | |
731 | case DF_BYTE: | |
732 | CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0); | |
733 | break; | |
734 | case DF_HALF: | |
735 | for (k = 0; k < 2; k++) { | |
736 | CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k); | |
737 | } | |
738 | break; | |
739 | case DF_WORD: | |
740 | for (k = 0; k < 4; k++) { | |
741 | CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k); | |
742 | } | |
743 | break; | |
744 | case DF_DOUBLE: | |
745 | for (k = 0; k < 8; k++) { | |
746 | CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k); | |
747 | } | |
748 | break; | |
749 | default: | |
750 | assert(0); | |
751 | } | |
752 | } | |
753 | ||
754 | static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
755 | { | |
756 | return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df); | |
757 | } | |
758 | ||
759 | static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
760 | { | |
761 | return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df); | |
762 | } | |
763 | ||
764 | static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2) | |
765 | { | |
766 | return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df); | |
767 | } | |
768 | ||
769 | static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2) | |
770 | { | |
771 | return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df); | |
772 | } | |
773 | ||
7d05b9c8 YK |
774 | static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2) |
775 | { | |
776 | int64_t q_min = DF_MIN_INT(df); | |
777 | int64_t q_max = DF_MAX_INT(df); | |
778 | ||
779 | if (arg1 == q_min && arg2 == q_min) { | |
780 | return q_max; | |
781 | } | |
782 | return (arg1 * arg2) >> (DF_BITS(df) - 1); | |
783 | } | |
784 | ||
785 | static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2) | |
786 | { | |
787 | int64_t q_min = DF_MIN_INT(df); | |
788 | int64_t q_max = DF_MAX_INT(df); | |
789 | int64_t r_bit = 1 << (DF_BITS(df) - 2); | |
790 | ||
791 | if (arg1 == q_min && arg2 == q_min) { | |
792 | return q_max; | |
793 | } | |
794 | return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1); | |
795 | } | |
796 | ||
28f99f08 YK |
797 | #define MSA_BINOP_DF(func) \ |
798 | void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \ | |
799 | uint32_t wd, uint32_t ws, uint32_t wt) \ | |
800 | { \ | |
801 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
802 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
803 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \ | |
804 | uint32_t i; \ | |
805 | \ | |
806 | switch (df) { \ | |
807 | case DF_BYTE: \ | |
808 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
809 | pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], pwt->b[i]); \ | |
810 | } \ | |
811 | break; \ | |
812 | case DF_HALF: \ | |
813 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
814 | pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], pwt->h[i]); \ | |
815 | } \ | |
816 | break; \ | |
817 | case DF_WORD: \ | |
818 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
819 | pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], pwt->w[i]); \ | |
820 | } \ | |
821 | break; \ | |
822 | case DF_DOUBLE: \ | |
823 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
824 | pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], pwt->d[i]); \ | |
825 | } \ | |
826 | break; \ | |
827 | default: \ | |
828 | assert(0); \ | |
829 | } \ | |
830 | } | |
831 | ||
832 | MSA_BINOP_DF(sll) | |
833 | MSA_BINOP_DF(sra) | |
834 | MSA_BINOP_DF(srl) | |
835 | MSA_BINOP_DF(bclr) | |
836 | MSA_BINOP_DF(bset) | |
837 | MSA_BINOP_DF(bneg) | |
838 | MSA_BINOP_DF(addv) | |
839 | MSA_BINOP_DF(subv) | |
840 | MSA_BINOP_DF(max_s) | |
841 | MSA_BINOP_DF(max_u) | |
842 | MSA_BINOP_DF(min_s) | |
843 | MSA_BINOP_DF(min_u) | |
844 | MSA_BINOP_DF(max_a) | |
845 | MSA_BINOP_DF(min_a) | |
846 | MSA_BINOP_DF(ceq) | |
847 | MSA_BINOP_DF(clt_s) | |
848 | MSA_BINOP_DF(clt_u) | |
849 | MSA_BINOP_DF(cle_s) | |
850 | MSA_BINOP_DF(cle_u) | |
851 | MSA_BINOP_DF(add_a) | |
852 | MSA_BINOP_DF(adds_a) | |
853 | MSA_BINOP_DF(adds_s) | |
854 | MSA_BINOP_DF(adds_u) | |
855 | MSA_BINOP_DF(ave_s) | |
856 | MSA_BINOP_DF(ave_u) | |
857 | MSA_BINOP_DF(aver_s) | |
858 | MSA_BINOP_DF(aver_u) | |
859 | MSA_BINOP_DF(subs_s) | |
860 | MSA_BINOP_DF(subs_u) | |
861 | MSA_BINOP_DF(subsus_u) | |
862 | MSA_BINOP_DF(subsuu_s) | |
863 | MSA_BINOP_DF(asub_s) | |
864 | MSA_BINOP_DF(asub_u) | |
865 | MSA_BINOP_DF(mulv) | |
866 | MSA_BINOP_DF(div_s) | |
867 | MSA_BINOP_DF(div_u) | |
868 | MSA_BINOP_DF(mod_s) | |
869 | MSA_BINOP_DF(mod_u) | |
870 | MSA_BINOP_DF(dotp_s) | |
871 | MSA_BINOP_DF(dotp_u) | |
872 | MSA_BINOP_DF(srar) | |
873 | MSA_BINOP_DF(srlr) | |
874 | MSA_BINOP_DF(hadd_s) | |
875 | MSA_BINOP_DF(hadd_u) | |
876 | MSA_BINOP_DF(hsub_s) | |
877 | MSA_BINOP_DF(hsub_u) | |
7d05b9c8 YK |
878 | |
879 | MSA_BINOP_DF(mul_q) | |
880 | MSA_BINOP_DF(mulr_q) | |
28f99f08 YK |
881 | #undef MSA_BINOP_DF |
882 | ||
883 | void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
884 | uint32_t ws, uint32_t rt) | |
885 | { | |
886 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
887 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
888 | ||
889 | msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]); | |
890 | } | |
891 | ||
892 | static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1, | |
893 | int64_t arg2) | |
894 | { | |
895 | return dest + arg1 * arg2; | |
896 | } | |
897 | ||
898 | static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1, | |
899 | int64_t arg2) | |
900 | { | |
901 | return dest - arg1 * arg2; | |
902 | } | |
903 | ||
904 | static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1, | |
905 | int64_t arg2) | |
906 | { | |
907 | int64_t even_arg1; | |
908 | int64_t even_arg2; | |
909 | int64_t odd_arg1; | |
910 | int64_t odd_arg2; | |
911 | SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
912 | SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
913 | return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2); | |
914 | } | |
915 | ||
916 | static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1, | |
917 | int64_t arg2) | |
918 | { | |
919 | int64_t even_arg1; | |
920 | int64_t even_arg2; | |
921 | int64_t odd_arg1; | |
922 | int64_t odd_arg2; | |
923 | UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
924 | UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
925 | return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2); | |
926 | } | |
927 | ||
928 | static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1, | |
929 | int64_t arg2) | |
930 | { | |
931 | int64_t even_arg1; | |
932 | int64_t even_arg2; | |
933 | int64_t odd_arg1; | |
934 | int64_t odd_arg2; | |
935 | SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
936 | SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
937 | return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2)); | |
938 | } | |
939 | ||
940 | static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1, | |
941 | int64_t arg2) | |
942 | { | |
943 | int64_t even_arg1; | |
944 | int64_t even_arg2; | |
945 | int64_t odd_arg1; | |
946 | int64_t odd_arg2; | |
947 | UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df); | |
948 | UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df); | |
949 | return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2)); | |
950 | } | |
951 | ||
7d05b9c8 YK |
952 | static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1, |
953 | int64_t arg2) | |
954 | { | |
955 | int64_t q_prod, q_ret; | |
956 | ||
957 | int64_t q_max = DF_MAX_INT(df); | |
958 | int64_t q_min = DF_MIN_INT(df); | |
959 | ||
960 | q_prod = arg1 * arg2; | |
961 | q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1); | |
962 | ||
963 | return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret; | |
964 | } | |
965 | ||
966 | static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1, | |
967 | int64_t arg2) | |
968 | { | |
969 | int64_t q_prod, q_ret; | |
970 | ||
971 | int64_t q_max = DF_MAX_INT(df); | |
972 | int64_t q_min = DF_MIN_INT(df); | |
973 | ||
974 | q_prod = arg1 * arg2; | |
975 | q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1); | |
976 | ||
977 | return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret; | |
978 | } | |
979 | ||
980 | static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1, | |
981 | int64_t arg2) | |
982 | { | |
983 | int64_t q_prod, q_ret; | |
984 | ||
985 | int64_t q_max = DF_MAX_INT(df); | |
986 | int64_t q_min = DF_MIN_INT(df); | |
987 | int64_t r_bit = 1 << (DF_BITS(df) - 2); | |
988 | ||
989 | q_prod = arg1 * arg2; | |
990 | q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1); | |
991 | ||
992 | return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret; | |
993 | } | |
994 | ||
995 | static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1, | |
996 | int64_t arg2) | |
997 | { | |
998 | int64_t q_prod, q_ret; | |
999 | ||
1000 | int64_t q_max = DF_MAX_INT(df); | |
1001 | int64_t q_min = DF_MIN_INT(df); | |
1002 | int64_t r_bit = 1 << (DF_BITS(df) - 2); | |
1003 | ||
1004 | q_prod = arg1 * arg2; | |
1005 | q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1); | |
1006 | ||
1007 | return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret; | |
1008 | } | |
1009 | ||
28f99f08 YK |
1010 | #define MSA_TEROP_DF(func) \ |
1011 | void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \ | |
1012 | uint32_t ws, uint32_t wt) \ | |
1013 | { \ | |
1014 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
1015 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
1016 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \ | |
1017 | uint32_t i; \ | |
1018 | \ | |
1019 | switch (df) { \ | |
1020 | case DF_BYTE: \ | |
1021 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
1022 | pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \ | |
1023 | pwt->b[i]); \ | |
1024 | } \ | |
1025 | break; \ | |
1026 | case DF_HALF: \ | |
1027 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
1028 | pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \ | |
1029 | pwt->h[i]); \ | |
1030 | } \ | |
1031 | break; \ | |
1032 | case DF_WORD: \ | |
1033 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
1034 | pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \ | |
1035 | pwt->w[i]); \ | |
1036 | } \ | |
1037 | break; \ | |
1038 | case DF_DOUBLE: \ | |
1039 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
1040 | pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \ | |
1041 | pwt->d[i]); \ | |
1042 | } \ | |
1043 | break; \ | |
1044 | default: \ | |
1045 | assert(0); \ | |
1046 | } \ | |
1047 | } | |
1048 | ||
1049 | MSA_TEROP_DF(maddv) | |
1050 | MSA_TEROP_DF(msubv) | |
1051 | MSA_TEROP_DF(dpadd_s) | |
1052 | MSA_TEROP_DF(dpadd_u) | |
1053 | MSA_TEROP_DF(dpsub_s) | |
1054 | MSA_TEROP_DF(dpsub_u) | |
1055 | MSA_TEROP_DF(binsl) | |
1056 | MSA_TEROP_DF(binsr) | |
7d05b9c8 YK |
1057 | MSA_TEROP_DF(madd_q) |
1058 | MSA_TEROP_DF(msub_q) | |
1059 | MSA_TEROP_DF(maddr_q) | |
1060 | MSA_TEROP_DF(msubr_q) | |
28f99f08 YK |
1061 | #undef MSA_TEROP_DF |
1062 | ||
1063 | static inline void msa_splat_df(uint32_t df, wr_t *pwd, | |
1064 | wr_t *pws, target_ulong rt) | |
1065 | { | |
1066 | uint32_t n = rt % DF_ELEMENTS(df); | |
1067 | uint32_t i; | |
1068 | ||
1069 | switch (df) { | |
1070 | case DF_BYTE: | |
1071 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { | |
1072 | pwd->b[i] = pws->b[n]; | |
1073 | } | |
1074 | break; | |
1075 | case DF_HALF: | |
1076 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { | |
1077 | pwd->h[i] = pws->h[n]; | |
1078 | } | |
1079 | break; | |
1080 | case DF_WORD: | |
1081 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1082 | pwd->w[i] = pws->w[n]; | |
1083 | } | |
1084 | break; | |
1085 | case DF_DOUBLE: | |
1086 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1087 | pwd->d[i] = pws->d[n]; | |
1088 | } | |
1089 | break; | |
1090 | default: | |
1091 | assert(0); | |
1092 | } | |
1093 | } | |
1094 | ||
1095 | void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1096 | uint32_t ws, uint32_t rt) | |
1097 | { | |
1098 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1099 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
1100 | ||
1101 | msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]); | |
1102 | } | |
1103 | ||
1104 | #define MSA_DO_B MSA_DO(b) | |
1105 | #define MSA_DO_H MSA_DO(h) | |
1106 | #define MSA_DO_W MSA_DO(w) | |
1107 | #define MSA_DO_D MSA_DO(d) | |
1108 | ||
1109 | #define MSA_LOOP_B MSA_LOOP(B) | |
1110 | #define MSA_LOOP_H MSA_LOOP(H) | |
1111 | #define MSA_LOOP_W MSA_LOOP(W) | |
1112 | #define MSA_LOOP_D MSA_LOOP(D) | |
1113 | ||
1114 | #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE) | |
1115 | #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF) | |
1116 | #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD) | |
1117 | #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE) | |
1118 | ||
1119 | #define MSA_LOOP(DF) \ | |
1120 | for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \ | |
1121 | MSA_DO_ ## DF \ | |
1122 | } | |
1123 | ||
1124 | #define MSA_FN_DF(FUNC) \ | |
1125 | void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \ | |
1126 | uint32_t ws, uint32_t wt) \ | |
1127 | { \ | |
1128 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
1129 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
1130 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \ | |
1131 | wr_t wx, *pwx = &wx; \ | |
1132 | uint32_t i; \ | |
1133 | switch (df) { \ | |
1134 | case DF_BYTE: \ | |
1135 | MSA_LOOP_B \ | |
1136 | break; \ | |
1137 | case DF_HALF: \ | |
1138 | MSA_LOOP_H \ | |
1139 | break; \ | |
1140 | case DF_WORD: \ | |
1141 | MSA_LOOP_W \ | |
1142 | break; \ | |
1143 | case DF_DOUBLE: \ | |
1144 | MSA_LOOP_D \ | |
1145 | break; \ | |
1146 | default: \ | |
1147 | assert(0); \ | |
1148 | } \ | |
1149 | msa_move_v(pwd, pwx); \ | |
1150 | } | |
1151 | ||
1152 | #define MSA_LOOP_COND(DF) \ | |
1153 | (DF_ELEMENTS(DF) / 2) | |
1154 | ||
1155 | #define Rb(pwr, i) (pwr->b[i]) | |
1156 | #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE)/2]) | |
1157 | #define Rh(pwr, i) (pwr->h[i]) | |
1158 | #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF)/2]) | |
1159 | #define Rw(pwr, i) (pwr->w[i]) | |
1160 | #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD)/2]) | |
1161 | #define Rd(pwr, i) (pwr->d[i]) | |
1162 | #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE)/2]) | |
1163 | ||
1164 | #define MSA_DO(DF) \ | |
1165 | do { \ | |
1166 | R##DF(pwx, i) = pwt->DF[2*i]; \ | |
1167 | L##DF(pwx, i) = pws->DF[2*i]; \ | |
1168 | } while (0); | |
1169 | MSA_FN_DF(pckev_df) | |
1170 | #undef MSA_DO | |
1171 | ||
1172 | #define MSA_DO(DF) \ | |
1173 | do { \ | |
1174 | R##DF(pwx, i) = pwt->DF[2*i+1]; \ | |
1175 | L##DF(pwx, i) = pws->DF[2*i+1]; \ | |
1176 | } while (0); | |
1177 | MSA_FN_DF(pckod_df) | |
1178 | #undef MSA_DO | |
1179 | ||
1180 | #define MSA_DO(DF) \ | |
1181 | do { \ | |
1182 | pwx->DF[2*i] = L##DF(pwt, i); \ | |
1183 | pwx->DF[2*i+1] = L##DF(pws, i); \ | |
1184 | } while (0); | |
1185 | MSA_FN_DF(ilvl_df) | |
1186 | #undef MSA_DO | |
1187 | ||
1188 | #define MSA_DO(DF) \ | |
1189 | do { \ | |
1190 | pwx->DF[2*i] = R##DF(pwt, i); \ | |
1191 | pwx->DF[2*i+1] = R##DF(pws, i); \ | |
1192 | } while (0); | |
1193 | MSA_FN_DF(ilvr_df) | |
1194 | #undef MSA_DO | |
1195 | ||
1196 | #define MSA_DO(DF) \ | |
1197 | do { \ | |
1198 | pwx->DF[2*i] = pwt->DF[2*i]; \ | |
1199 | pwx->DF[2*i+1] = pws->DF[2*i]; \ | |
1200 | } while (0); | |
1201 | MSA_FN_DF(ilvev_df) | |
1202 | #undef MSA_DO | |
1203 | ||
1204 | #define MSA_DO(DF) \ | |
1205 | do { \ | |
1206 | pwx->DF[2*i] = pwt->DF[2*i+1]; \ | |
1207 | pwx->DF[2*i+1] = pws->DF[2*i+1]; \ | |
1208 | } while (0); | |
1209 | MSA_FN_DF(ilvod_df) | |
1210 | #undef MSA_DO | |
1211 | #undef MSA_LOOP_COND | |
1212 | ||
1213 | #define MSA_LOOP_COND(DF) \ | |
1214 | (DF_ELEMENTS(DF)) | |
1215 | ||
1216 | #define MSA_DO(DF) \ | |
1217 | do { \ | |
1218 | uint32_t n = DF_ELEMENTS(df); \ | |
1219 | uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \ | |
1220 | pwx->DF[i] = \ | |
1221 | (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \ | |
1222 | } while (0); | |
1223 | MSA_FN_DF(vshf_df) | |
1224 | #undef MSA_DO | |
1225 | #undef MSA_LOOP_COND | |
1226 | #undef MSA_FN_DF | |
1e608ec1 YK |
1227 | |
1228 | void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1229 | uint32_t ws, uint32_t n) | |
1230 | { | |
1231 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1232 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
1233 | ||
1234 | msa_sld_df(df, pwd, pws, n); | |
1235 | } | |
1236 | ||
1237 | void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1238 | uint32_t ws, uint32_t n) | |
1239 | { | |
1240 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1241 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
1242 | ||
1243 | msa_splat_df(df, pwd, pws, n); | |
1244 | } | |
1245 | ||
1246 | void helper_msa_copy_s_df(CPUMIPSState *env, uint32_t df, uint32_t rd, | |
1247 | uint32_t ws, uint32_t n) | |
1248 | { | |
1249 | n %= DF_ELEMENTS(df); | |
1250 | ||
1251 | switch (df) { | |
1252 | case DF_BYTE: | |
1253 | env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n]; | |
1254 | break; | |
1255 | case DF_HALF: | |
1256 | env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n]; | |
1257 | break; | |
1258 | case DF_WORD: | |
1259 | env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n]; | |
1260 | break; | |
1261 | #ifdef TARGET_MIPS64 | |
1262 | case DF_DOUBLE: | |
1263 | env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n]; | |
1264 | break; | |
1265 | #endif | |
1266 | default: | |
1267 | assert(0); | |
1268 | } | |
1269 | } | |
1270 | ||
1271 | void helper_msa_copy_u_df(CPUMIPSState *env, uint32_t df, uint32_t rd, | |
1272 | uint32_t ws, uint32_t n) | |
1273 | { | |
1274 | n %= DF_ELEMENTS(df); | |
1275 | ||
1276 | switch (df) { | |
1277 | case DF_BYTE: | |
1278 | env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n]; | |
1279 | break; | |
1280 | case DF_HALF: | |
1281 | env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n]; | |
1282 | break; | |
1283 | case DF_WORD: | |
1284 | env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n]; | |
1285 | break; | |
1286 | #ifdef TARGET_MIPS64 | |
1287 | case DF_DOUBLE: | |
1288 | env->active_tc.gpr[rd] = (uint64_t)env->active_fpu.fpr[ws].wr.d[n]; | |
1289 | break; | |
1290 | #endif | |
1291 | default: | |
1292 | assert(0); | |
1293 | } | |
1294 | } | |
1295 | ||
1296 | void helper_msa_insert_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1297 | uint32_t rs_num, uint32_t n) | |
1298 | { | |
1299 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1300 | target_ulong rs = env->active_tc.gpr[rs_num]; | |
1301 | ||
1302 | switch (df) { | |
1303 | case DF_BYTE: | |
1304 | pwd->b[n] = (int8_t)rs; | |
1305 | break; | |
1306 | case DF_HALF: | |
1307 | pwd->h[n] = (int16_t)rs; | |
1308 | break; | |
1309 | case DF_WORD: | |
1310 | pwd->w[n] = (int32_t)rs; | |
1311 | break; | |
1312 | case DF_DOUBLE: | |
1313 | pwd->d[n] = (int64_t)rs; | |
1314 | break; | |
1315 | default: | |
1316 | assert(0); | |
1317 | } | |
1318 | } | |
1319 | ||
1320 | void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1321 | uint32_t ws, uint32_t n) | |
1322 | { | |
1323 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1324 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
1325 | ||
1326 | switch (df) { | |
1327 | case DF_BYTE: | |
1328 | pwd->b[n] = (int8_t)pws->b[0]; | |
1329 | break; | |
1330 | case DF_HALF: | |
1331 | pwd->h[n] = (int16_t)pws->h[0]; | |
1332 | break; | |
1333 | case DF_WORD: | |
1334 | pwd->w[n] = (int32_t)pws->w[0]; | |
1335 | break; | |
1336 | case DF_DOUBLE: | |
1337 | pwd->d[n] = (int64_t)pws->d[0]; | |
1338 | break; | |
1339 | default: | |
1340 | assert(0); | |
1341 | } | |
1342 | } | |
1343 | ||
1344 | void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd) | |
1345 | { | |
1346 | switch (cd) { | |
1347 | case 0: | |
1348 | break; | |
1349 | case 1: | |
1350 | env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK; | |
1351 | /* set float_status rounding mode */ | |
1352 | set_float_rounding_mode( | |
1353 | ieee_rm[(env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM], | |
1354 | &env->active_tc.msa_fp_status); | |
1355 | /* set float_status flush modes */ | |
1356 | set_flush_to_zero( | |
1357 | (env->active_tc.msacsr & MSACSR_FS_MASK) != 0 ? 1 : 0, | |
1358 | &env->active_tc.msa_fp_status); | |
1359 | set_flush_inputs_to_zero( | |
1360 | (env->active_tc.msacsr & MSACSR_FS_MASK) != 0 ? 1 : 0, | |
1361 | &env->active_tc.msa_fp_status); | |
1362 | /* check exception */ | |
1363 | if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED) | |
1364 | & GET_FP_CAUSE(env->active_tc.msacsr)) { | |
1365 | helper_raise_exception(env, EXCP_MSAFPE); | |
1366 | } | |
1367 | break; | |
1368 | } | |
1369 | } | |
1370 | ||
1371 | target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs) | |
1372 | { | |
1373 | switch (cs) { | |
1374 | case 0: | |
1375 | return env->msair; | |
1376 | case 1: | |
1377 | return env->active_tc.msacsr & MSACSR_MASK; | |
1378 | } | |
1379 | return 0; | |
1380 | } | |
1381 | ||
1382 | void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws) | |
1383 | { | |
1384 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1385 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
1386 | ||
1387 | msa_move_v(pwd, pws); | |
1388 | } | |
7d05b9c8 | 1389 | |
cbe50b9a YK |
1390 | static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg) |
1391 | { | |
1392 | uint64_t x; | |
1393 | ||
1394 | x = UNSIGNED(arg, df); | |
1395 | ||
1396 | x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL); | |
1397 | x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL); | |
1398 | x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL); | |
1399 | x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL); | |
1400 | x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL); | |
1401 | x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32)); | |
1402 | ||
1403 | return x; | |
1404 | } | |
1405 | ||
1406 | static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg) | |
1407 | { | |
1408 | uint64_t x, y; | |
1409 | int n, c; | |
1410 | ||
1411 | x = UNSIGNED(arg, df); | |
1412 | n = DF_BITS(df); | |
1413 | c = DF_BITS(df) / 2; | |
1414 | ||
1415 | do { | |
1416 | y = x >> c; | |
1417 | if (y != 0) { | |
1418 | n = n - c; | |
1419 | x = y; | |
1420 | } | |
1421 | c = c >> 1; | |
1422 | } while (c != 0); | |
1423 | ||
1424 | return n - x; | |
1425 | } | |
1426 | ||
1427 | static inline int64_t msa_nloc_df(uint32_t df, int64_t arg) | |
1428 | { | |
1429 | return msa_nlzc_df(df, UNSIGNED((~arg), df)); | |
1430 | } | |
1431 | ||
1432 | void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
1433 | uint32_t rs) | |
1434 | { | |
1435 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
1436 | uint32_t i; | |
1437 | ||
1438 | switch (df) { | |
1439 | case DF_BYTE: | |
1440 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { | |
1441 | pwd->b[i] = (int8_t)env->active_tc.gpr[rs]; | |
1442 | } | |
1443 | break; | |
1444 | case DF_HALF: | |
1445 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { | |
1446 | pwd->h[i] = (int16_t)env->active_tc.gpr[rs]; | |
1447 | } | |
1448 | break; | |
1449 | case DF_WORD: | |
1450 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1451 | pwd->w[i] = (int32_t)env->active_tc.gpr[rs]; | |
1452 | } | |
1453 | break; | |
1454 | case DF_DOUBLE: | |
1455 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1456 | pwd->d[i] = (int64_t)env->active_tc.gpr[rs]; | |
1457 | } | |
1458 | break; | |
1459 | default: | |
1460 | assert(0); | |
1461 | } | |
1462 | } | |
1463 | ||
1464 | #define MSA_UNOP_DF(func) \ | |
1465 | void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \ | |
1466 | uint32_t wd, uint32_t ws) \ | |
1467 | { \ | |
1468 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \ | |
1469 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); \ | |
1470 | uint32_t i; \ | |
1471 | \ | |
1472 | switch (df) { \ | |
1473 | case DF_BYTE: \ | |
1474 | for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \ | |
1475 | pwd->b[i] = msa_ ## func ## _df(df, pws->b[i]); \ | |
1476 | } \ | |
1477 | break; \ | |
1478 | case DF_HALF: \ | |
1479 | for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \ | |
1480 | pwd->h[i] = msa_ ## func ## _df(df, pws->h[i]); \ | |
1481 | } \ | |
1482 | break; \ | |
1483 | case DF_WORD: \ | |
1484 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \ | |
1485 | pwd->w[i] = msa_ ## func ## _df(df, pws->w[i]); \ | |
1486 | } \ | |
1487 | break; \ | |
1488 | case DF_DOUBLE: \ | |
1489 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \ | |
1490 | pwd->d[i] = msa_ ## func ## _df(df, pws->d[i]); \ | |
1491 | } \ | |
1492 | break; \ | |
1493 | default: \ | |
1494 | assert(0); \ | |
1495 | } \ | |
1496 | } | |
1497 | ||
1498 | MSA_UNOP_DF(nlzc) | |
1499 | MSA_UNOP_DF(nloc) | |
1500 | MSA_UNOP_DF(pcnt) | |
3bdeb688 | 1501 | #undef MSA_UNOP_DF |
cbe50b9a | 1502 | |
7d05b9c8 YK |
1503 | #define FLOAT_ONE32 make_float32(0x3f8 << 20) |
1504 | #define FLOAT_ONE64 make_float64(0x3ffULL << 52) | |
1505 | ||
1506 | #define FLOAT_SNAN16 (float16_default_nan ^ 0x0220) | |
1507 | /* 0x7c20 */ | |
1508 | #define FLOAT_SNAN32 (float32_default_nan ^ 0x00400020) | |
1509 | /* 0x7f800020 */ | |
1510 | #define FLOAT_SNAN64 (float64_default_nan ^ 0x0008000000000020ULL) | |
1511 | /* 0x7ff0000000000020 */ | |
1512 | ||
1513 | static inline void clear_msacsr_cause(CPUMIPSState *env) | |
1514 | { | |
1515 | SET_FP_CAUSE(env->active_tc.msacsr, 0); | |
1516 | } | |
1517 | ||
1518 | static inline void check_msacsr_cause(CPUMIPSState *env) | |
1519 | { | |
1520 | if ((GET_FP_CAUSE(env->active_tc.msacsr) & | |
1521 | (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) { | |
1522 | UPDATE_FP_FLAGS(env->active_tc.msacsr, | |
1523 | GET_FP_CAUSE(env->active_tc.msacsr)); | |
1524 | } else { | |
1525 | helper_raise_exception(env, EXCP_MSAFPE); | |
1526 | } | |
1527 | } | |
1528 | ||
1529 | /* Flush-to-zero use cases for update_msacsr() */ | |
1530 | #define CLEAR_FS_UNDERFLOW 1 | |
1531 | #define CLEAR_IS_INEXACT 2 | |
1532 | #define RECIPROCAL_INEXACT 4 | |
1533 | ||
1534 | static inline int update_msacsr(CPUMIPSState *env, int action, int denormal) | |
1535 | { | |
1536 | int ieee_ex; | |
1537 | ||
1538 | int c; | |
1539 | int cause; | |
1540 | int enable; | |
1541 | ||
1542 | ieee_ex = get_float_exception_flags(&env->active_tc.msa_fp_status); | |
1543 | ||
1544 | /* QEMU softfloat does not signal all underflow cases */ | |
1545 | if (denormal) { | |
1546 | ieee_ex |= float_flag_underflow; | |
1547 | } | |
1548 | ||
1549 | c = ieee_ex_to_mips(ieee_ex); | |
1550 | enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED; | |
1551 | ||
1552 | /* Set Inexact (I) when flushing inputs to zero */ | |
1553 | if ((ieee_ex & float_flag_input_denormal) && | |
1554 | (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) { | |
1555 | if (action & CLEAR_IS_INEXACT) { | |
1556 | c &= ~FP_INEXACT; | |
1557 | } else { | |
1558 | c |= FP_INEXACT; | |
1559 | } | |
1560 | } | |
1561 | ||
1562 | /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */ | |
1563 | if ((ieee_ex & float_flag_output_denormal) && | |
1564 | (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) { | |
1565 | c |= FP_INEXACT; | |
1566 | if (action & CLEAR_FS_UNDERFLOW) { | |
1567 | c &= ~FP_UNDERFLOW; | |
1568 | } else { | |
1569 | c |= FP_UNDERFLOW; | |
1570 | } | |
1571 | } | |
1572 | ||
1573 | /* Set Inexact (I) when Overflow (O) is not enabled */ | |
1574 | if ((c & FP_OVERFLOW) != 0 && (enable & FP_OVERFLOW) == 0) { | |
1575 | c |= FP_INEXACT; | |
1576 | } | |
1577 | ||
1578 | /* Clear Exact Underflow when Underflow (U) is not enabled */ | |
1579 | if ((c & FP_UNDERFLOW) != 0 && (enable & FP_UNDERFLOW) == 0 && | |
1580 | (c & FP_INEXACT) == 0) { | |
1581 | c &= ~FP_UNDERFLOW; | |
1582 | } | |
1583 | ||
1584 | /* Reciprocal operations set only Inexact when valid and not | |
1585 | divide by zero */ | |
1586 | if ((action & RECIPROCAL_INEXACT) && | |
1587 | (c & (FP_INVALID | FP_DIV0)) == 0) { | |
1588 | c = FP_INEXACT; | |
1589 | } | |
1590 | ||
1591 | cause = c & enable; /* all current enabled exceptions */ | |
1592 | ||
1593 | if (cause == 0) { | |
1594 | /* No enabled exception, update the MSACSR Cause | |
1595 | with all current exceptions */ | |
1596 | SET_FP_CAUSE(env->active_tc.msacsr, | |
1597 | (GET_FP_CAUSE(env->active_tc.msacsr) | c)); | |
1598 | } else { | |
1599 | /* Current exceptions are enabled */ | |
1600 | if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) { | |
1601 | /* Exception(s) will trap, update MSACSR Cause | |
1602 | with all enabled exceptions */ | |
1603 | SET_FP_CAUSE(env->active_tc.msacsr, | |
1604 | (GET_FP_CAUSE(env->active_tc.msacsr) | c)); | |
1605 | } | |
1606 | } | |
1607 | ||
1608 | return c; | |
1609 | } | |
1610 | ||
1611 | static inline int get_enabled_exceptions(const CPUMIPSState *env, int c) | |
1612 | { | |
1613 | int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED; | |
1614 | return c & enable; | |
1615 | } | |
1616 | ||
e5a41ffa PM |
1617 | static inline float16 float16_from_float32(int32 a, flag ieee, |
1618 | float_status *status) | |
7d05b9c8 YK |
1619 | { |
1620 | float16 f_val; | |
1621 | ||
ff32e16e | 1622 | f_val = float32_to_float16((float32)a, ieee, status); |
7d05b9c8 YK |
1623 | f_val = float16_maybe_silence_nan(f_val); |
1624 | ||
1625 | return a < 0 ? (f_val | (1 << 15)) : f_val; | |
1626 | } | |
1627 | ||
e5a41ffa | 1628 | static inline float32 float32_from_float64(int64 a, float_status *status) |
7d05b9c8 YK |
1629 | { |
1630 | float32 f_val; | |
1631 | ||
ff32e16e | 1632 | f_val = float64_to_float32((float64)a, status); |
7d05b9c8 YK |
1633 | f_val = float32_maybe_silence_nan(f_val); |
1634 | ||
1635 | return a < 0 ? (f_val | (1 << 31)) : f_val; | |
1636 | } | |
1637 | ||
e5a41ffa PM |
1638 | static inline float32 float32_from_float16(int16_t a, flag ieee, |
1639 | float_status *status) | |
7d05b9c8 YK |
1640 | { |
1641 | float32 f_val; | |
1642 | ||
ff32e16e | 1643 | f_val = float16_to_float32((float16)a, ieee, status); |
7d05b9c8 YK |
1644 | f_val = float32_maybe_silence_nan(f_val); |
1645 | ||
1646 | return a < 0 ? (f_val | (1 << 31)) : f_val; | |
1647 | } | |
1648 | ||
e5a41ffa | 1649 | static inline float64 float64_from_float32(int32 a, float_status *status) |
7d05b9c8 YK |
1650 | { |
1651 | float64 f_val; | |
1652 | ||
ff32e16e | 1653 | f_val = float32_to_float64((float64)a, status); |
7d05b9c8 YK |
1654 | f_val = float64_maybe_silence_nan(f_val); |
1655 | ||
1656 | return a < 0 ? (f_val | (1ULL << 63)) : f_val; | |
1657 | } | |
1658 | ||
e5a41ffa | 1659 | static inline float32 float32_from_q16(int16_t a, float_status *status) |
7d05b9c8 YK |
1660 | { |
1661 | float32 f_val; | |
1662 | ||
1663 | /* conversion as integer and scaling */ | |
ff32e16e PM |
1664 | f_val = int32_to_float32(a, status); |
1665 | f_val = float32_scalbn(f_val, -15, status); | |
7d05b9c8 YK |
1666 | |
1667 | return f_val; | |
1668 | } | |
1669 | ||
e5a41ffa | 1670 | static inline float64 float64_from_q32(int32 a, float_status *status) |
7d05b9c8 YK |
1671 | { |
1672 | float64 f_val; | |
1673 | ||
1674 | /* conversion as integer and scaling */ | |
ff32e16e PM |
1675 | f_val = int32_to_float64(a, status); |
1676 | f_val = float64_scalbn(f_val, -31, status); | |
7d05b9c8 YK |
1677 | |
1678 | return f_val; | |
1679 | } | |
1680 | ||
e5a41ffa | 1681 | static inline int16_t float32_to_q16(float32 a, float_status *status) |
7d05b9c8 YK |
1682 | { |
1683 | int32 q_val; | |
1684 | int32 q_min = 0xffff8000; | |
1685 | int32 q_max = 0x00007fff; | |
1686 | ||
1687 | int ieee_ex; | |
1688 | ||
1689 | if (float32_is_any_nan(a)) { | |
ff32e16e | 1690 | float_raise(float_flag_invalid, status); |
7d05b9c8 YK |
1691 | return 0; |
1692 | } | |
1693 | ||
1694 | /* scaling */ | |
ff32e16e | 1695 | a = float32_scalbn(a, 15, status); |
7d05b9c8 YK |
1696 | |
1697 | ieee_ex = get_float_exception_flags(status); | |
1698 | set_float_exception_flags(ieee_ex & (~float_flag_underflow) | |
ff32e16e | 1699 | , status); |
7d05b9c8 YK |
1700 | |
1701 | if (ieee_ex & float_flag_overflow) { | |
ff32e16e | 1702 | float_raise(float_flag_inexact, status); |
7d05b9c8 YK |
1703 | return (int32)a < 0 ? q_min : q_max; |
1704 | } | |
1705 | ||
1706 | /* conversion to int */ | |
ff32e16e | 1707 | q_val = float32_to_int32(a, status); |
7d05b9c8 YK |
1708 | |
1709 | ieee_ex = get_float_exception_flags(status); | |
1710 | set_float_exception_flags(ieee_ex & (~float_flag_underflow) | |
ff32e16e | 1711 | , status); |
7d05b9c8 YK |
1712 | |
1713 | if (ieee_ex & float_flag_invalid) { | |
1714 | set_float_exception_flags(ieee_ex & (~float_flag_invalid) | |
ff32e16e PM |
1715 | , status); |
1716 | float_raise(float_flag_overflow | float_flag_inexact, status); | |
7d05b9c8 YK |
1717 | return (int32)a < 0 ? q_min : q_max; |
1718 | } | |
1719 | ||
1720 | if (q_val < q_min) { | |
ff32e16e | 1721 | float_raise(float_flag_overflow | float_flag_inexact, status); |
7d05b9c8 YK |
1722 | return (int16_t)q_min; |
1723 | } | |
1724 | ||
1725 | if (q_max < q_val) { | |
ff32e16e | 1726 | float_raise(float_flag_overflow | float_flag_inexact, status); |
7d05b9c8 YK |
1727 | return (int16_t)q_max; |
1728 | } | |
1729 | ||
1730 | return (int16_t)q_val; | |
1731 | } | |
1732 | ||
e5a41ffa | 1733 | static inline int32 float64_to_q32(float64 a, float_status *status) |
7d05b9c8 YK |
1734 | { |
1735 | int64 q_val; | |
1736 | int64 q_min = 0xffffffff80000000LL; | |
1737 | int64 q_max = 0x000000007fffffffLL; | |
1738 | ||
1739 | int ieee_ex; | |
1740 | ||
1741 | if (float64_is_any_nan(a)) { | |
ff32e16e | 1742 | float_raise(float_flag_invalid, status); |
7d05b9c8 YK |
1743 | return 0; |
1744 | } | |
1745 | ||
1746 | /* scaling */ | |
ff32e16e | 1747 | a = float64_scalbn(a, 31, status); |
7d05b9c8 YK |
1748 | |
1749 | ieee_ex = get_float_exception_flags(status); | |
1750 | set_float_exception_flags(ieee_ex & (~float_flag_underflow) | |
ff32e16e | 1751 | , status); |
7d05b9c8 YK |
1752 | |
1753 | if (ieee_ex & float_flag_overflow) { | |
ff32e16e | 1754 | float_raise(float_flag_inexact, status); |
7d05b9c8 YK |
1755 | return (int64)a < 0 ? q_min : q_max; |
1756 | } | |
1757 | ||
1758 | /* conversion to integer */ | |
ff32e16e | 1759 | q_val = float64_to_int64(a, status); |
7d05b9c8 YK |
1760 | |
1761 | ieee_ex = get_float_exception_flags(status); | |
1762 | set_float_exception_flags(ieee_ex & (~float_flag_underflow) | |
ff32e16e | 1763 | , status); |
7d05b9c8 YK |
1764 | |
1765 | if (ieee_ex & float_flag_invalid) { | |
1766 | set_float_exception_flags(ieee_ex & (~float_flag_invalid) | |
ff32e16e PM |
1767 | , status); |
1768 | float_raise(float_flag_overflow | float_flag_inexact, status); | |
7d05b9c8 YK |
1769 | return (int64)a < 0 ? q_min : q_max; |
1770 | } | |
1771 | ||
1772 | if (q_val < q_min) { | |
ff32e16e | 1773 | float_raise(float_flag_overflow | float_flag_inexact, status); |
7d05b9c8 YK |
1774 | return (int32)q_min; |
1775 | } | |
1776 | ||
1777 | if (q_max < q_val) { | |
ff32e16e | 1778 | float_raise(float_flag_overflow | float_flag_inexact, status); |
7d05b9c8 YK |
1779 | return (int32)q_max; |
1780 | } | |
1781 | ||
1782 | return (int32)q_val; | |
1783 | } | |
1784 | ||
1785 | #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \ | |
1786 | do { \ | |
1a4d5700 | 1787 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
1788 | int c; \ |
1789 | int64_t cond; \ | |
1a4d5700 | 1790 | set_float_exception_flags(0, status); \ |
7d05b9c8 | 1791 | if (!QUIET) { \ |
1a4d5700 | 1792 | cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ |
7d05b9c8 | 1793 | } else { \ |
1a4d5700 | 1794 | cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \ |
7d05b9c8 YK |
1795 | } \ |
1796 | DEST = cond ? M_MAX_UINT(BITS) : 0; \ | |
1797 | c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \ | |
1798 | \ | |
1799 | if (get_enabled_exceptions(env, c)) { \ | |
1800 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
1801 | } \ | |
1802 | } while (0) | |
1803 | ||
1804 | #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1805 | do { \ | |
1806 | MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \ | |
1807 | if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \ | |
1808 | DEST = 0; \ | |
1809 | } \ | |
1810 | } while (0) | |
1811 | ||
1812 | #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1813 | do { \ | |
1814 | MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \ | |
1815 | if (DEST == 0) { \ | |
1816 | MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \ | |
1817 | } \ | |
1818 | } while (0) | |
1819 | ||
1820 | #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1821 | do { \ | |
1822 | MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \ | |
1823 | if (DEST == 0) { \ | |
1824 | MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \ | |
1825 | } \ | |
1826 | } while (0) | |
1827 | ||
1828 | #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1829 | do { \ | |
1830 | MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \ | |
1831 | if (DEST == 0) { \ | |
1832 | MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \ | |
1833 | if (DEST == 0) { \ | |
1834 | MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \ | |
1835 | } \ | |
1836 | } \ | |
1837 | } while (0) | |
1838 | ||
1839 | #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1840 | do { \ | |
1841 | MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \ | |
1842 | if (DEST == 0) { \ | |
1843 | MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \ | |
1844 | } \ | |
1845 | } while (0) | |
1846 | ||
1847 | #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1848 | do { \ | |
1849 | MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \ | |
1850 | if (DEST == 0) { \ | |
1851 | MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \ | |
1852 | } \ | |
1853 | } while (0) | |
1854 | ||
1855 | #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \ | |
1856 | do { \ | |
1857 | MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \ | |
1858 | if (DEST == 0) { \ | |
1859 | MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \ | |
1860 | } \ | |
1861 | } while (0) | |
1862 | ||
1863 | static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
1864 | wr_t *pwt, uint32_t df, int quiet) | |
1865 | { | |
1866 | wr_t wx, *pwx = &wx; | |
1867 | uint32_t i; | |
1868 | ||
1869 | clear_msacsr_cause(env); | |
1870 | ||
1871 | switch (df) { | |
1872 | case DF_WORD: | |
1873 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1874 | MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
1875 | } | |
1876 | break; | |
1877 | case DF_DOUBLE: | |
1878 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1879 | MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
1880 | } | |
1881 | break; | |
1882 | default: | |
1883 | assert(0); | |
1884 | } | |
1885 | ||
1886 | check_msacsr_cause(env); | |
1887 | ||
1888 | msa_move_v(pwd, pwx); | |
1889 | } | |
1890 | ||
1891 | static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
1892 | wr_t *pwt, uint32_t df, int quiet) | |
1893 | { | |
1894 | wr_t wx, *pwx = &wx; | |
1895 | uint32_t i; | |
1896 | ||
1897 | clear_msacsr_cause(env); | |
1898 | ||
1899 | switch (df) { | |
1900 | case DF_WORD: | |
1901 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1902 | MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32, | |
1903 | quiet); | |
1904 | } | |
1905 | break; | |
1906 | case DF_DOUBLE: | |
1907 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1908 | MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64, | |
1909 | quiet); | |
1910 | } | |
1911 | break; | |
1912 | default: | |
1913 | assert(0); | |
1914 | } | |
1915 | ||
1916 | check_msacsr_cause(env); | |
1917 | ||
1918 | msa_move_v(pwd, pwx); | |
1919 | } | |
1920 | ||
1921 | static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
1922 | wr_t *pwt, uint32_t df, int quiet) | |
1923 | { | |
1924 | wr_t wx, *pwx = &wx; | |
1925 | uint32_t i; | |
1926 | ||
1927 | clear_msacsr_cause(env); | |
1928 | ||
1929 | switch (df) { | |
1930 | case DF_WORD: | |
1931 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1932 | MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet); | |
1933 | } | |
1934 | break; | |
1935 | case DF_DOUBLE: | |
1936 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1937 | MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet); | |
1938 | } | |
1939 | break; | |
1940 | default: | |
1941 | assert(0); | |
1942 | } | |
1943 | ||
1944 | check_msacsr_cause(env); | |
1945 | ||
1946 | msa_move_v(pwd, pwx); | |
1947 | } | |
1948 | ||
1949 | static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
1950 | wr_t *pwt, uint32_t df, int quiet) | |
1951 | { | |
1952 | wr_t wx, *pwx = &wx; | |
1953 | uint32_t i; | |
1954 | ||
1955 | clear_msacsr_cause(env); | |
1956 | ||
1957 | switch (df) { | |
1958 | case DF_WORD: | |
1959 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1960 | MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
1961 | } | |
1962 | break; | |
1963 | case DF_DOUBLE: | |
1964 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1965 | MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
1966 | } | |
1967 | break; | |
1968 | default: | |
1969 | assert(0); | |
1970 | } | |
1971 | ||
1972 | check_msacsr_cause(env); | |
1973 | ||
1974 | msa_move_v(pwd, pwx); | |
1975 | } | |
1976 | ||
1977 | static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
1978 | wr_t *pwt, uint32_t df, int quiet) | |
1979 | { | |
1980 | wr_t wx, *pwx = &wx; | |
1981 | uint32_t i; | |
1982 | ||
1983 | clear_msacsr_cause(env); | |
1984 | ||
1985 | switch (df) { | |
1986 | case DF_WORD: | |
1987 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
1988 | MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet); | |
1989 | } | |
1990 | break; | |
1991 | case DF_DOUBLE: | |
1992 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
1993 | MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet); | |
1994 | } | |
1995 | break; | |
1996 | default: | |
1997 | assert(0); | |
1998 | } | |
1999 | ||
2000 | check_msacsr_cause(env); | |
2001 | ||
2002 | msa_move_v(pwd, pwx); | |
2003 | } | |
2004 | ||
2005 | static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2006 | wr_t *pwt, uint32_t df, int quiet) | |
2007 | { | |
2008 | wr_t wx, *pwx = &wx; | |
2009 | uint32_t i; | |
2010 | ||
2011 | clear_msacsr_cause(env); | |
2012 | ||
2013 | switch (df) { | |
2014 | case DF_WORD: | |
2015 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2016 | MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
2017 | } | |
2018 | break; | |
2019 | case DF_DOUBLE: | |
2020 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2021 | MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
2022 | } | |
2023 | break; | |
2024 | default: | |
2025 | assert(0); | |
2026 | } | |
2027 | ||
2028 | check_msacsr_cause(env); | |
2029 | ||
2030 | msa_move_v(pwd, pwx); | |
2031 | } | |
2032 | ||
2033 | static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2034 | wr_t *pwt, uint32_t df, int quiet) | |
2035 | { | |
2036 | wr_t wx, *pwx = &wx; | |
2037 | uint32_t i; | |
2038 | ||
2039 | clear_msacsr_cause(env); | |
2040 | ||
2041 | switch (df) { | |
2042 | case DF_WORD: | |
2043 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2044 | MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet); | |
2045 | } | |
2046 | break; | |
2047 | case DF_DOUBLE: | |
2048 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2049 | MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet); | |
2050 | } | |
2051 | break; | |
2052 | default: | |
2053 | assert(0); | |
2054 | } | |
2055 | ||
2056 | check_msacsr_cause(env); | |
2057 | ||
2058 | msa_move_v(pwd, pwx); | |
2059 | } | |
2060 | ||
2061 | static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2062 | wr_t *pwt, uint32_t df, int quiet) | |
2063 | { | |
2064 | wr_t wx, *pwx = &wx; | |
2065 | uint32_t i; | |
2066 | ||
2067 | clear_msacsr_cause(env); | |
2068 | ||
2069 | switch (df) { | |
2070 | case DF_WORD: | |
2071 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2072 | MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
2073 | } | |
2074 | break; | |
2075 | case DF_DOUBLE: | |
2076 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2077 | MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
2078 | } | |
2079 | break; | |
2080 | default: | |
2081 | assert(0); | |
2082 | } | |
2083 | ||
2084 | check_msacsr_cause(env); | |
2085 | ||
2086 | msa_move_v(pwd, pwx); | |
2087 | } | |
2088 | ||
2089 | static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2090 | wr_t *pwt, uint32_t df, int quiet) | |
2091 | { | |
2092 | wr_t wx, *pwx = &wx; | |
2093 | uint32_t i; | |
2094 | ||
2095 | clear_msacsr_cause(env); | |
2096 | ||
2097 | switch (df) { | |
2098 | case DF_WORD: | |
2099 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2100 | MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
2101 | } | |
2102 | break; | |
2103 | case DF_DOUBLE: | |
2104 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2105 | MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
2106 | } | |
2107 | break; | |
2108 | default: | |
2109 | assert(0); | |
2110 | } | |
2111 | ||
2112 | check_msacsr_cause(env); | |
2113 | ||
2114 | msa_move_v(pwd, pwx); | |
2115 | } | |
2116 | ||
2117 | static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2118 | wr_t *pwt, uint32_t df, int quiet) | |
2119 | { | |
2120 | wr_t wx, *pwx = &wx; | |
2121 | uint32_t i; | |
2122 | ||
2123 | clear_msacsr_cause(env); | |
2124 | ||
2125 | switch (df) { | |
2126 | case DF_WORD: | |
2127 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2128 | MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
2129 | } | |
2130 | break; | |
2131 | case DF_DOUBLE: | |
2132 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2133 | MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
2134 | } | |
2135 | break; | |
2136 | default: | |
2137 | assert(0); | |
2138 | } | |
2139 | ||
2140 | check_msacsr_cause(env); | |
2141 | ||
2142 | msa_move_v(pwd, pwx); | |
2143 | } | |
2144 | ||
2145 | static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws, | |
2146 | wr_t *pwt, uint32_t df, int quiet) { | |
2147 | wr_t wx, *pwx = &wx; | |
2148 | uint32_t i; | |
2149 | ||
2150 | clear_msacsr_cause(env); | |
2151 | ||
2152 | switch (df) { | |
2153 | case DF_WORD: | |
2154 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2155 | MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet); | |
2156 | } | |
2157 | break; | |
2158 | case DF_DOUBLE: | |
2159 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2160 | MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet); | |
2161 | } | |
2162 | break; | |
2163 | default: | |
2164 | assert(0); | |
2165 | } | |
2166 | ||
2167 | check_msacsr_cause(env); | |
2168 | ||
2169 | msa_move_v(pwd, pwx); | |
2170 | } | |
2171 | ||
2172 | void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2173 | uint32_t ws, uint32_t wt) | |
2174 | { | |
2175 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2176 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2177 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2178 | compare_af(env, pwd, pws, pwt, df, 1); | |
2179 | } | |
2180 | ||
2181 | void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2182 | uint32_t ws, uint32_t wt) | |
2183 | { | |
2184 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2185 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2186 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2187 | compare_un(env, pwd, pws, pwt, df, 1); | |
2188 | } | |
2189 | ||
2190 | void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2191 | uint32_t ws, uint32_t wt) | |
2192 | { | |
2193 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2194 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2195 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2196 | compare_eq(env, pwd, pws, pwt, df, 1); | |
2197 | } | |
2198 | ||
2199 | void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2200 | uint32_t ws, uint32_t wt) | |
2201 | { | |
2202 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2203 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2204 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2205 | compare_ueq(env, pwd, pws, pwt, df, 1); | |
2206 | } | |
2207 | ||
2208 | void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2209 | uint32_t ws, uint32_t wt) | |
2210 | { | |
2211 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2212 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2213 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2214 | compare_lt(env, pwd, pws, pwt, df, 1); | |
2215 | } | |
2216 | ||
2217 | void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2218 | uint32_t ws, uint32_t wt) | |
2219 | { | |
2220 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2221 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2222 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2223 | compare_ult(env, pwd, pws, pwt, df, 1); | |
2224 | } | |
2225 | ||
2226 | void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2227 | uint32_t ws, uint32_t wt) | |
2228 | { | |
2229 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2230 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2231 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2232 | compare_le(env, pwd, pws, pwt, df, 1); | |
2233 | } | |
2234 | ||
2235 | void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2236 | uint32_t ws, uint32_t wt) | |
2237 | { | |
2238 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2239 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2240 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2241 | compare_ule(env, pwd, pws, pwt, df, 1); | |
2242 | } | |
2243 | ||
2244 | void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2245 | uint32_t ws, uint32_t wt) | |
2246 | { | |
2247 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2248 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2249 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2250 | compare_af(env, pwd, pws, pwt, df, 0); | |
2251 | } | |
2252 | ||
2253 | void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2254 | uint32_t ws, uint32_t wt) | |
2255 | { | |
2256 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2257 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2258 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2259 | compare_un(env, pwd, pws, pwt, df, 0); | |
2260 | } | |
2261 | ||
2262 | void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2263 | uint32_t ws, uint32_t wt) | |
2264 | { | |
2265 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2266 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2267 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2268 | compare_eq(env, pwd, pws, pwt, df, 0); | |
2269 | } | |
2270 | ||
2271 | void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2272 | uint32_t ws, uint32_t wt) | |
2273 | { | |
2274 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2275 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2276 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2277 | compare_ueq(env, pwd, pws, pwt, df, 0); | |
2278 | } | |
2279 | ||
2280 | void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2281 | uint32_t ws, uint32_t wt) | |
2282 | { | |
2283 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2284 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2285 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2286 | compare_lt(env, pwd, pws, pwt, df, 0); | |
2287 | } | |
2288 | ||
2289 | void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2290 | uint32_t ws, uint32_t wt) | |
2291 | { | |
2292 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2293 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2294 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2295 | compare_ult(env, pwd, pws, pwt, df, 0); | |
2296 | } | |
2297 | ||
2298 | void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2299 | uint32_t ws, uint32_t wt) | |
2300 | { | |
2301 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2302 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2303 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2304 | compare_le(env, pwd, pws, pwt, df, 0); | |
2305 | } | |
2306 | ||
2307 | void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2308 | uint32_t ws, uint32_t wt) | |
2309 | { | |
2310 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2311 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2312 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2313 | compare_ule(env, pwd, pws, pwt, df, 0); | |
2314 | } | |
2315 | ||
2316 | void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2317 | uint32_t ws, uint32_t wt) | |
2318 | { | |
2319 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2320 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2321 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2322 | compare_or(env, pwd, pws, pwt, df, 1); | |
2323 | } | |
2324 | ||
2325 | void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2326 | uint32_t ws, uint32_t wt) | |
2327 | { | |
2328 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2329 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2330 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2331 | compare_une(env, pwd, pws, pwt, df, 1); | |
2332 | } | |
2333 | ||
2334 | void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2335 | uint32_t ws, uint32_t wt) | |
2336 | { | |
2337 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2338 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2339 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2340 | compare_ne(env, pwd, pws, pwt, df, 1); | |
2341 | } | |
2342 | ||
2343 | void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2344 | uint32_t ws, uint32_t wt) | |
2345 | { | |
2346 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2347 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2348 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2349 | compare_or(env, pwd, pws, pwt, df, 0); | |
2350 | } | |
2351 | ||
2352 | void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2353 | uint32_t ws, uint32_t wt) | |
2354 | { | |
2355 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2356 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2357 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2358 | compare_une(env, pwd, pws, pwt, df, 0); | |
2359 | } | |
2360 | ||
2361 | void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2362 | uint32_t ws, uint32_t wt) | |
2363 | { | |
2364 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2365 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2366 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2367 | compare_ne(env, pwd, pws, pwt, df, 0); | |
2368 | } | |
2369 | ||
2370 | #define float16_is_zero(ARG) 0 | |
2371 | #define float16_is_zero_or_denormal(ARG) 0 | |
2372 | ||
2373 | #define IS_DENORMAL(ARG, BITS) \ | |
2374 | (!float ## BITS ## _is_zero(ARG) \ | |
2375 | && float ## BITS ## _is_zero_or_denormal(ARG)) | |
2376 | ||
2377 | #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \ | |
2378 | do { \ | |
1a4d5700 | 2379 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
2380 | int c; \ |
2381 | \ | |
1a4d5700 MR |
2382 | set_float_exception_flags(0, status); \ |
2383 | DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ | |
7d05b9c8 YK |
2384 | c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ |
2385 | \ | |
2386 | if (get_enabled_exceptions(env, c)) { \ | |
2387 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
2388 | } \ | |
2389 | } while (0) | |
2390 | ||
2391 | void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2392 | uint32_t ws, uint32_t wt) | |
2393 | { | |
2394 | wr_t wx, *pwx = &wx; | |
2395 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2396 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2397 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2398 | uint32_t i; | |
2399 | ||
2400 | clear_msacsr_cause(env); | |
2401 | ||
2402 | switch (df) { | |
2403 | case DF_WORD: | |
2404 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2405 | MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32); | |
2406 | } | |
2407 | break; | |
2408 | case DF_DOUBLE: | |
2409 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2410 | MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64); | |
2411 | } | |
2412 | break; | |
2413 | default: | |
2414 | assert(0); | |
2415 | } | |
2416 | ||
2417 | check_msacsr_cause(env); | |
2418 | msa_move_v(pwd, pwx); | |
2419 | } | |
2420 | ||
2421 | void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2422 | uint32_t ws, uint32_t wt) | |
2423 | { | |
2424 | wr_t wx, *pwx = &wx; | |
2425 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2426 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2427 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2428 | uint32_t i; | |
2429 | ||
2430 | clear_msacsr_cause(env); | |
2431 | ||
2432 | switch (df) { | |
2433 | case DF_WORD: | |
2434 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2435 | MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32); | |
2436 | } | |
2437 | break; | |
2438 | case DF_DOUBLE: | |
2439 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2440 | MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64); | |
2441 | } | |
2442 | break; | |
2443 | default: | |
2444 | assert(0); | |
2445 | } | |
2446 | ||
2447 | check_msacsr_cause(env); | |
2448 | msa_move_v(pwd, pwx); | |
2449 | } | |
2450 | ||
2451 | void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2452 | uint32_t ws, uint32_t wt) | |
2453 | { | |
2454 | wr_t wx, *pwx = &wx; | |
2455 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2456 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2457 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2458 | uint32_t i; | |
2459 | ||
2460 | clear_msacsr_cause(env); | |
2461 | ||
2462 | switch (df) { | |
2463 | case DF_WORD: | |
2464 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2465 | MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32); | |
2466 | } | |
2467 | break; | |
2468 | case DF_DOUBLE: | |
2469 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2470 | MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64); | |
2471 | } | |
2472 | break; | |
2473 | default: | |
2474 | assert(0); | |
2475 | } | |
2476 | ||
2477 | check_msacsr_cause(env); | |
2478 | ||
2479 | msa_move_v(pwd, pwx); | |
2480 | } | |
2481 | ||
2482 | void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2483 | uint32_t ws, uint32_t wt) | |
2484 | { | |
2485 | wr_t wx, *pwx = &wx; | |
2486 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2487 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2488 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2489 | uint32_t i; | |
2490 | ||
2491 | clear_msacsr_cause(env); | |
2492 | ||
2493 | switch (df) { | |
2494 | case DF_WORD: | |
2495 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2496 | MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32); | |
2497 | } | |
2498 | break; | |
2499 | case DF_DOUBLE: | |
2500 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2501 | MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64); | |
2502 | } | |
2503 | break; | |
2504 | default: | |
2505 | assert(0); | |
2506 | } | |
2507 | ||
2508 | check_msacsr_cause(env); | |
2509 | ||
2510 | msa_move_v(pwd, pwx); | |
2511 | } | |
2512 | ||
2513 | #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \ | |
2514 | do { \ | |
1a4d5700 | 2515 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
2516 | int c; \ |
2517 | \ | |
1a4d5700 MR |
2518 | set_float_exception_flags(0, status); \ |
2519 | DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \ | |
7d05b9c8 YK |
2520 | c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ |
2521 | \ | |
2522 | if (get_enabled_exceptions(env, c)) { \ | |
2523 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
2524 | } \ | |
2525 | } while (0) | |
2526 | ||
2527 | void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2528 | uint32_t ws, uint32_t wt) | |
2529 | { | |
2530 | wr_t wx, *pwx = &wx; | |
2531 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2532 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2533 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2534 | uint32_t i; | |
2535 | ||
2536 | clear_msacsr_cause(env); | |
2537 | ||
2538 | switch (df) { | |
2539 | case DF_WORD: | |
2540 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2541 | MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i], | |
2542 | pws->w[i], pwt->w[i], 0, 32); | |
2543 | } | |
2544 | break; | |
2545 | case DF_DOUBLE: | |
2546 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2547 | MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i], | |
2548 | pws->d[i], pwt->d[i], 0, 64); | |
2549 | } | |
2550 | break; | |
2551 | default: | |
2552 | assert(0); | |
2553 | } | |
2554 | ||
2555 | check_msacsr_cause(env); | |
2556 | ||
2557 | msa_move_v(pwd, pwx); | |
2558 | } | |
2559 | ||
2560 | void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2561 | uint32_t ws, uint32_t wt) | |
2562 | { | |
2563 | wr_t wx, *pwx = &wx; | |
2564 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2565 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2566 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2567 | uint32_t i; | |
2568 | ||
2569 | clear_msacsr_cause(env); | |
2570 | ||
2571 | switch (df) { | |
2572 | case DF_WORD: | |
2573 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2574 | MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i], | |
2575 | pws->w[i], pwt->w[i], | |
2576 | float_muladd_negate_product, 32); | |
2577 | } | |
2578 | break; | |
2579 | case DF_DOUBLE: | |
2580 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2581 | MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i], | |
2582 | pws->d[i], pwt->d[i], | |
2583 | float_muladd_negate_product, 64); | |
2584 | } | |
2585 | break; | |
2586 | default: | |
2587 | assert(0); | |
2588 | } | |
2589 | ||
2590 | check_msacsr_cause(env); | |
2591 | ||
2592 | msa_move_v(pwd, pwx); | |
2593 | } | |
2594 | ||
2595 | void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2596 | uint32_t ws, uint32_t wt) | |
2597 | { | |
2598 | wr_t wx, *pwx = &wx; | |
2599 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2600 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2601 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2602 | uint32_t i; | |
2603 | ||
2604 | clear_msacsr_cause(env); | |
2605 | ||
2606 | switch (df) { | |
2607 | case DF_WORD: | |
2608 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2609 | MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i], | |
2610 | pwt->w[i] > 0x200 ? 0x200 : | |
2611 | pwt->w[i] < -0x200 ? -0x200 : pwt->w[i], | |
2612 | 32); | |
2613 | } | |
2614 | break; | |
2615 | case DF_DOUBLE: | |
2616 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2617 | MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i], | |
2618 | pwt->d[i] > 0x1000 ? 0x1000 : | |
2619 | pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i], | |
2620 | 64); | |
2621 | } | |
2622 | break; | |
2623 | default: | |
2624 | assert(0); | |
2625 | } | |
2626 | ||
2627 | check_msacsr_cause(env); | |
2628 | ||
2629 | msa_move_v(pwd, pwx); | |
2630 | } | |
2631 | ||
2632 | #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \ | |
2633 | do { \ | |
1a4d5700 | 2634 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
2635 | int c; \ |
2636 | \ | |
1a4d5700 MR |
2637 | set_float_exception_flags(0, status); \ |
2638 | DEST = float ## BITS ## _ ## OP(ARG, status); \ | |
7d05b9c8 YK |
2639 | c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ |
2640 | \ | |
2641 | if (get_enabled_exceptions(env, c)) { \ | |
2642 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
2643 | } \ | |
2644 | } while (0) | |
2645 | ||
2646 | void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2647 | uint32_t ws, uint32_t wt) | |
2648 | { | |
2649 | wr_t wx, *pwx = &wx; | |
2650 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2651 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2652 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2653 | uint32_t i; | |
2654 | ||
2655 | switch (df) { | |
2656 | case DF_WORD: | |
2657 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2658 | /* Half precision floats come in two formats: standard | |
2659 | IEEE and "ARM" format. The latter gains extra exponent | |
2660 | range by omitting the NaN/Inf encodings. */ | |
2661 | flag ieee = 1; | |
2662 | ||
2663 | MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16); | |
2664 | MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16); | |
2665 | } | |
2666 | break; | |
2667 | case DF_DOUBLE: | |
2668 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2669 | MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32); | |
2670 | MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32); | |
2671 | } | |
2672 | break; | |
2673 | default: | |
2674 | assert(0); | |
2675 | } | |
2676 | ||
2677 | check_msacsr_cause(env); | |
2678 | msa_move_v(pwd, pwx); | |
2679 | } | |
2680 | ||
2681 | #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \ | |
2682 | do { \ | |
1a4d5700 | 2683 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
2684 | int c; \ |
2685 | \ | |
1a4d5700 MR |
2686 | set_float_exception_flags(0, status); \ |
2687 | DEST = float ## BITS ## _ ## OP(ARG, status); \ | |
7d05b9c8 YK |
2688 | c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ |
2689 | \ | |
2690 | if (get_enabled_exceptions(env, c)) { \ | |
2691 | DEST = ((FLOAT_SNAN ## XBITS >> 6) << 6) | c; \ | |
2692 | } \ | |
2693 | } while (0) | |
2694 | ||
2695 | void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2696 | uint32_t ws, uint32_t wt) | |
2697 | { | |
2698 | wr_t wx, *pwx = &wx; | |
2699 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2700 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2701 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2702 | uint32_t i; | |
2703 | ||
2704 | clear_msacsr_cause(env); | |
2705 | ||
2706 | switch (df) { | |
2707 | case DF_WORD: | |
2708 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2709 | MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16); | |
2710 | MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16); | |
2711 | } | |
2712 | break; | |
2713 | case DF_DOUBLE: | |
2714 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2715 | MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32); | |
2716 | MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32); | |
2717 | } | |
2718 | break; | |
2719 | default: | |
2720 | assert(0); | |
2721 | } | |
2722 | ||
2723 | check_msacsr_cause(env); | |
2724 | ||
2725 | msa_move_v(pwd, pwx); | |
2726 | } | |
2727 | ||
2728 | #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS) \ | |
2729 | !float ## BITS ## _is_any_nan(ARG1) \ | |
2730 | && float ## BITS ## _is_quiet_nan(ARG2) | |
2731 | ||
2732 | #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \ | |
2733 | do { \ | |
1a4d5700 | 2734 | float_status *status = &env->active_tc.msa_fp_status; \ |
7d05b9c8 YK |
2735 | int c; \ |
2736 | \ | |
1a4d5700 MR |
2737 | set_float_exception_flags(0, status); \ |
2738 | DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ | |
7d05b9c8 YK |
2739 | c = update_msacsr(env, 0, 0); \ |
2740 | \ | |
2741 | if (get_enabled_exceptions(env, c)) { \ | |
2742 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
2743 | } \ | |
2744 | } while (0) | |
2745 | ||
2746 | #define FMAXMIN_A(F, G, X, _S, _T, BITS) \ | |
2747 | do { \ | |
2748 | uint## BITS ##_t S = _S, T = _T; \ | |
2749 | uint## BITS ##_t as, at, xs, xt, xd; \ | |
2750 | if (NUMBER_QNAN_PAIR(S, T, BITS)) { \ | |
2751 | T = S; \ | |
2752 | } \ | |
2753 | else if (NUMBER_QNAN_PAIR(T, S, BITS)) { \ | |
2754 | S = T; \ | |
2755 | } \ | |
2756 | as = float## BITS ##_abs(S); \ | |
2757 | at = float## BITS ##_abs(T); \ | |
2758 | MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \ | |
2759 | MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \ | |
2760 | MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \ | |
2761 | X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \ | |
2762 | } while (0) | |
2763 | ||
2764 | void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2765 | uint32_t ws, uint32_t wt) | |
2766 | { | |
2767 | wr_t wx, *pwx = &wx; | |
2768 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2769 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2770 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2771 | uint32_t i; | |
2772 | ||
2773 | clear_msacsr_cause(env); | |
2774 | ||
2775 | switch (df) { | |
2776 | case DF_WORD: | |
2777 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2778 | if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { | |
2779 | MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32); | |
2780 | } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { | |
2781 | MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32); | |
2782 | } else { | |
2783 | MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32); | |
2784 | } | |
2785 | } | |
2786 | break; | |
2787 | case DF_DOUBLE: | |
2788 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2789 | if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { | |
2790 | MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64); | |
2791 | } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { | |
2792 | MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64); | |
2793 | } else { | |
2794 | MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64); | |
2795 | } | |
2796 | } | |
2797 | break; | |
2798 | default: | |
2799 | assert(0); | |
2800 | } | |
2801 | ||
2802 | check_msacsr_cause(env); | |
2803 | ||
2804 | msa_move_v(pwd, pwx); | |
2805 | } | |
2806 | ||
2807 | void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2808 | uint32_t ws, uint32_t wt) | |
2809 | { | |
2810 | wr_t wx, *pwx = &wx; | |
2811 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2812 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2813 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2814 | uint32_t i; | |
2815 | ||
2816 | clear_msacsr_cause(env); | |
2817 | ||
2818 | switch (df) { | |
2819 | case DF_WORD: | |
2820 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2821 | FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32); | |
2822 | } | |
2823 | break; | |
2824 | case DF_DOUBLE: | |
2825 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2826 | FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64); | |
2827 | } | |
2828 | break; | |
2829 | default: | |
2830 | assert(0); | |
2831 | } | |
2832 | ||
2833 | check_msacsr_cause(env); | |
2834 | ||
2835 | msa_move_v(pwd, pwx); | |
2836 | } | |
2837 | ||
2838 | void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2839 | uint32_t ws, uint32_t wt) | |
2840 | { | |
2841 | wr_t wx, *pwx = &wx; | |
2842 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2843 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2844 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2845 | uint32_t i; | |
2846 | ||
2847 | clear_msacsr_cause(env); | |
2848 | ||
2849 | switch (df) { | |
2850 | case DF_WORD: | |
2851 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2852 | if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { | |
2853 | MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32); | |
2854 | } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { | |
2855 | MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32); | |
2856 | } else { | |
2857 | MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32); | |
2858 | } | |
2859 | } | |
2860 | break; | |
2861 | case DF_DOUBLE: | |
2862 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2863 | if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { | |
2864 | MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64); | |
2865 | } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { | |
2866 | MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64); | |
2867 | } else { | |
2868 | MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64); | |
2869 | } | |
2870 | } | |
2871 | break; | |
2872 | default: | |
2873 | assert(0); | |
2874 | } | |
2875 | ||
2876 | check_msacsr_cause(env); | |
2877 | ||
2878 | msa_move_v(pwd, pwx); | |
2879 | } | |
2880 | ||
2881 | void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2882 | uint32_t ws, uint32_t wt) | |
2883 | { | |
2884 | wr_t wx, *pwx = &wx; | |
2885 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2886 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2887 | wr_t *pwt = &(env->active_fpu.fpr[wt].wr); | |
2888 | uint32_t i; | |
2889 | ||
2890 | clear_msacsr_cause(env); | |
2891 | ||
2892 | switch (df) { | |
2893 | case DF_WORD: | |
2894 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2895 | FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32); | |
2896 | } | |
2897 | break; | |
2898 | case DF_DOUBLE: | |
2899 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2900 | FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64); | |
2901 | } | |
2902 | break; | |
2903 | default: | |
2904 | assert(0); | |
2905 | } | |
2906 | ||
2907 | check_msacsr_cause(env); | |
2908 | ||
2909 | msa_move_v(pwd, pwx); | |
2910 | } | |
3bdeb688 YK |
2911 | |
2912 | void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df, | |
2913 | uint32_t wd, uint32_t ws) | |
2914 | { | |
2915 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2916 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2917 | if (df == DF_WORD) { | |
2918 | pwd->w[0] = helper_float_class_s(pws->w[0]); | |
2919 | pwd->w[1] = helper_float_class_s(pws->w[1]); | |
2920 | pwd->w[2] = helper_float_class_s(pws->w[2]); | |
2921 | pwd->w[3] = helper_float_class_s(pws->w[3]); | |
2922 | } else { | |
2923 | pwd->d[0] = helper_float_class_d(pws->d[0]); | |
2924 | pwd->d[1] = helper_float_class_d(pws->d[1]); | |
2925 | } | |
2926 | } | |
2927 | ||
2928 | #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \ | |
2929 | do { \ | |
1a4d5700 | 2930 | float_status *status = &env->active_tc.msa_fp_status; \ |
3bdeb688 YK |
2931 | int c; \ |
2932 | \ | |
1a4d5700 MR |
2933 | set_float_exception_flags(0, status); \ |
2934 | DEST = float ## BITS ## _ ## OP(ARG, status); \ | |
3bdeb688 YK |
2935 | c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ |
2936 | \ | |
2937 | if (get_enabled_exceptions(env, c)) { \ | |
2938 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
2939 | } else if (float ## BITS ## _is_any_nan(ARG)) { \ | |
2940 | DEST = 0; \ | |
2941 | } \ | |
2942 | } while (0) | |
2943 | ||
2944 | void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2945 | uint32_t ws) | |
2946 | { | |
2947 | wr_t wx, *pwx = &wx; | |
2948 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2949 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2950 | uint32_t i; | |
2951 | ||
2952 | clear_msacsr_cause(env); | |
2953 | ||
2954 | switch (df) { | |
2955 | case DF_WORD: | |
2956 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2957 | MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32); | |
2958 | } | |
2959 | break; | |
2960 | case DF_DOUBLE: | |
2961 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2962 | MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64); | |
2963 | } | |
2964 | break; | |
2965 | default: | |
2966 | assert(0); | |
2967 | } | |
2968 | ||
2969 | check_msacsr_cause(env); | |
2970 | ||
2971 | msa_move_v(pwd, pwx); | |
2972 | } | |
2973 | ||
2974 | void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
2975 | uint32_t ws) | |
2976 | { | |
2977 | wr_t wx, *pwx = &wx; | |
2978 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
2979 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
2980 | uint32_t i; | |
2981 | ||
2982 | clear_msacsr_cause(env); | |
2983 | ||
2984 | switch (df) { | |
2985 | case DF_WORD: | |
2986 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
2987 | MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32); | |
2988 | } | |
2989 | break; | |
2990 | case DF_DOUBLE: | |
2991 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
2992 | MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64); | |
2993 | } | |
2994 | break; | |
2995 | default: | |
2996 | assert(0); | |
2997 | } | |
2998 | ||
2999 | check_msacsr_cause(env); | |
3000 | ||
3001 | msa_move_v(pwd, pwx); | |
3002 | } | |
3003 | ||
3004 | void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3005 | uint32_t ws) | |
3006 | { | |
3007 | wr_t wx, *pwx = &wx; | |
3008 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3009 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3010 | uint32_t i; | |
3011 | ||
3012 | clear_msacsr_cause(env); | |
3013 | ||
3014 | switch (df) { | |
3015 | case DF_WORD: | |
3016 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3017 | MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32); | |
3018 | } | |
3019 | break; | |
3020 | case DF_DOUBLE: | |
3021 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3022 | MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64); | |
3023 | } | |
3024 | break; | |
3025 | default: | |
3026 | assert(0); | |
3027 | } | |
3028 | ||
3029 | check_msacsr_cause(env); | |
3030 | ||
3031 | msa_move_v(pwd, pwx); | |
3032 | } | |
3033 | ||
3034 | #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \ | |
3035 | do { \ | |
1a4d5700 | 3036 | float_status *status = &env->active_tc.msa_fp_status; \ |
3bdeb688 YK |
3037 | int c; \ |
3038 | \ | |
1a4d5700 MR |
3039 | set_float_exception_flags(0, status); \ |
3040 | DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \ | |
3bdeb688 YK |
3041 | c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \ |
3042 | float ## BITS ## _is_quiet_nan(DEST) ? \ | |
3043 | 0 : RECIPROCAL_INEXACT, \ | |
3044 | IS_DENORMAL(DEST, BITS)); \ | |
3045 | \ | |
3046 | if (get_enabled_exceptions(env, c)) { \ | |
3047 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
3048 | } \ | |
3049 | } while (0) | |
3050 | ||
3051 | void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3052 | uint32_t ws) | |
3053 | { | |
3054 | wr_t wx, *pwx = &wx; | |
3055 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3056 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3057 | uint32_t i; | |
3058 | ||
3059 | clear_msacsr_cause(env); | |
3060 | ||
3061 | switch (df) { | |
3062 | case DF_WORD: | |
3063 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3064 | MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i], | |
3065 | &env->active_tc.msa_fp_status), 32); | |
3066 | } | |
3067 | break; | |
3068 | case DF_DOUBLE: | |
3069 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3070 | MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i], | |
3071 | &env->active_tc.msa_fp_status), 64); | |
3072 | } | |
3073 | break; | |
3074 | default: | |
3075 | assert(0); | |
3076 | } | |
3077 | ||
3078 | check_msacsr_cause(env); | |
3079 | ||
3080 | msa_move_v(pwd, pwx); | |
3081 | } | |
3082 | ||
3083 | void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3084 | uint32_t ws) | |
3085 | { | |
3086 | wr_t wx, *pwx = &wx; | |
3087 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3088 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3089 | uint32_t i; | |
3090 | ||
3091 | clear_msacsr_cause(env); | |
3092 | ||
3093 | switch (df) { | |
3094 | case DF_WORD: | |
3095 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3096 | MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32); | |
3097 | } | |
3098 | break; | |
3099 | case DF_DOUBLE: | |
3100 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3101 | MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64); | |
3102 | } | |
3103 | break; | |
3104 | default: | |
3105 | assert(0); | |
3106 | } | |
3107 | ||
3108 | check_msacsr_cause(env); | |
3109 | ||
3110 | msa_move_v(pwd, pwx); | |
3111 | } | |
3112 | ||
3113 | void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3114 | uint32_t ws) | |
3115 | { | |
3116 | wr_t wx, *pwx = &wx; | |
3117 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3118 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3119 | uint32_t i; | |
3120 | ||
3121 | clear_msacsr_cause(env); | |
3122 | ||
3123 | switch (df) { | |
3124 | case DF_WORD: | |
3125 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3126 | MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32); | |
3127 | } | |
3128 | break; | |
3129 | case DF_DOUBLE: | |
3130 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3131 | MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64); | |
3132 | } | |
3133 | break; | |
3134 | default: | |
3135 | assert(0); | |
3136 | } | |
3137 | ||
3138 | check_msacsr_cause(env); | |
3139 | ||
3140 | msa_move_v(pwd, pwx); | |
3141 | } | |
3142 | ||
3143 | #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \ | |
3144 | do { \ | |
1a4d5700 | 3145 | float_status *status = &env->active_tc.msa_fp_status; \ |
3bdeb688 YK |
3146 | int c; \ |
3147 | \ | |
1a4d5700 MR |
3148 | set_float_exception_flags(0, status); \ |
3149 | set_float_rounding_mode(float_round_down, status); \ | |
3150 | DEST = float ## BITS ## _ ## log2(ARG, status); \ | |
3151 | DEST = float ## BITS ## _ ## round_to_int(DEST, status); \ | |
3bdeb688 YK |
3152 | set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \ |
3153 | MSACSR_RM_MASK) >> MSACSR_RM], \ | |
1a4d5700 | 3154 | status); \ |
3bdeb688 | 3155 | \ |
1a4d5700 MR |
3156 | set_float_exception_flags(get_float_exception_flags(status) & \ |
3157 | (~float_flag_inexact), \ | |
3158 | status); \ | |
3bdeb688 YK |
3159 | \ |
3160 | c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ | |
3161 | \ | |
3162 | if (get_enabled_exceptions(env, c)) { \ | |
3163 | DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ | |
3164 | } \ | |
3165 | } while (0) | |
3166 | ||
3167 | void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3168 | uint32_t ws) | |
3169 | { | |
3170 | wr_t wx, *pwx = &wx; | |
3171 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3172 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3173 | uint32_t i; | |
3174 | ||
3175 | clear_msacsr_cause(env); | |
3176 | ||
3177 | switch (df) { | |
3178 | case DF_WORD: | |
3179 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3180 | MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32); | |
3181 | } | |
3182 | break; | |
3183 | case DF_DOUBLE: | |
3184 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3185 | MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64); | |
3186 | } | |
3187 | break; | |
3188 | default: | |
3189 | assert(0); | |
3190 | } | |
3191 | ||
3192 | check_msacsr_cause(env); | |
3193 | ||
3194 | msa_move_v(pwd, pwx); | |
3195 | } | |
3196 | ||
3197 | void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3198 | uint32_t ws) | |
3199 | { | |
3200 | wr_t wx, *pwx = &wx; | |
3201 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3202 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3203 | uint32_t i; | |
3204 | ||
3205 | switch (df) { | |
3206 | case DF_WORD: | |
3207 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3208 | /* Half precision floats come in two formats: standard | |
3209 | IEEE and "ARM" format. The latter gains extra exponent | |
3210 | range by omitting the NaN/Inf encodings. */ | |
3211 | flag ieee = 1; | |
3212 | ||
3213 | MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32); | |
3214 | } | |
3215 | break; | |
3216 | case DF_DOUBLE: | |
3217 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3218 | MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64); | |
3219 | } | |
3220 | break; | |
3221 | default: | |
3222 | assert(0); | |
3223 | } | |
3224 | ||
3225 | check_msacsr_cause(env); | |
3226 | msa_move_v(pwd, pwx); | |
3227 | } | |
3228 | ||
3229 | void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3230 | uint32_t ws) | |
3231 | { | |
3232 | wr_t wx, *pwx = &wx; | |
3233 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3234 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3235 | uint32_t i; | |
3236 | ||
3237 | switch (df) { | |
3238 | case DF_WORD: | |
3239 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3240 | /* Half precision floats come in two formats: standard | |
3241 | IEEE and "ARM" format. The latter gains extra exponent | |
3242 | range by omitting the NaN/Inf encodings. */ | |
3243 | flag ieee = 1; | |
3244 | ||
3245 | MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32); | |
3246 | } | |
3247 | break; | |
3248 | case DF_DOUBLE: | |
3249 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3250 | MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64); | |
3251 | } | |
3252 | break; | |
3253 | default: | |
3254 | assert(0); | |
3255 | } | |
3256 | ||
3257 | check_msacsr_cause(env); | |
3258 | msa_move_v(pwd, pwx); | |
3259 | } | |
3260 | ||
3261 | void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3262 | uint32_t ws) | |
3263 | { | |
3264 | wr_t wx, *pwx = &wx; | |
3265 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3266 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3267 | uint32_t i; | |
3268 | ||
3269 | switch (df) { | |
3270 | case DF_WORD: | |
3271 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3272 | MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32); | |
3273 | } | |
3274 | break; | |
3275 | case DF_DOUBLE: | |
3276 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3277 | MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64); | |
3278 | } | |
3279 | break; | |
3280 | default: | |
3281 | assert(0); | |
3282 | } | |
3283 | ||
3284 | msa_move_v(pwd, pwx); | |
3285 | } | |
3286 | ||
3287 | void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3288 | uint32_t ws) | |
3289 | { | |
3290 | wr_t wx, *pwx = &wx; | |
3291 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3292 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3293 | uint32_t i; | |
3294 | ||
3295 | switch (df) { | |
3296 | case DF_WORD: | |
3297 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3298 | MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32); | |
3299 | } | |
3300 | break; | |
3301 | case DF_DOUBLE: | |
3302 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3303 | MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64); | |
3304 | } | |
3305 | break; | |
3306 | default: | |
3307 | assert(0); | |
3308 | } | |
3309 | ||
3310 | msa_move_v(pwd, pwx); | |
3311 | } | |
3312 | ||
3313 | void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3314 | uint32_t ws) | |
3315 | { | |
3316 | wr_t wx, *pwx = &wx; | |
3317 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3318 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3319 | uint32_t i; | |
3320 | ||
3321 | clear_msacsr_cause(env); | |
3322 | ||
3323 | switch (df) { | |
3324 | case DF_WORD: | |
3325 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3326 | MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32); | |
3327 | } | |
3328 | break; | |
3329 | case DF_DOUBLE: | |
3330 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3331 | MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64); | |
3332 | } | |
3333 | break; | |
3334 | default: | |
3335 | assert(0); | |
3336 | } | |
3337 | ||
3338 | check_msacsr_cause(env); | |
3339 | ||
3340 | msa_move_v(pwd, pwx); | |
3341 | } | |
3342 | ||
3343 | void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3344 | uint32_t ws) | |
3345 | { | |
3346 | wr_t wx, *pwx = &wx; | |
3347 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3348 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3349 | uint32_t i; | |
3350 | ||
3351 | clear_msacsr_cause(env); | |
3352 | ||
3353 | switch (df) { | |
3354 | case DF_WORD: | |
3355 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3356 | MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32); | |
3357 | } | |
3358 | break; | |
3359 | case DF_DOUBLE: | |
3360 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3361 | MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64); | |
3362 | } | |
3363 | break; | |
3364 | default: | |
3365 | assert(0); | |
3366 | } | |
3367 | ||
3368 | check_msacsr_cause(env); | |
3369 | ||
3370 | msa_move_v(pwd, pwx); | |
3371 | } | |
3372 | ||
3373 | #define float32_from_int32 int32_to_float32 | |
3374 | #define float32_from_uint32 uint32_to_float32 | |
3375 | ||
3376 | #define float64_from_int64 int64_to_float64 | |
3377 | #define float64_from_uint64 uint64_to_float64 | |
3378 | ||
3379 | void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3380 | uint32_t ws) | |
3381 | { | |
3382 | wr_t wx, *pwx = &wx; | |
3383 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3384 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3385 | uint32_t i; | |
3386 | ||
3387 | clear_msacsr_cause(env); | |
3388 | ||
3389 | switch (df) { | |
3390 | case DF_WORD: | |
3391 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3392 | MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32); | |
3393 | } | |
3394 | break; | |
3395 | case DF_DOUBLE: | |
3396 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3397 | MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64); | |
3398 | } | |
3399 | break; | |
3400 | default: | |
3401 | assert(0); | |
3402 | } | |
3403 | ||
3404 | check_msacsr_cause(env); | |
3405 | ||
3406 | msa_move_v(pwd, pwx); | |
3407 | } | |
3408 | ||
3409 | void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd, | |
3410 | uint32_t ws) | |
3411 | { | |
3412 | wr_t wx, *pwx = &wx; | |
3413 | wr_t *pwd = &(env->active_fpu.fpr[wd].wr); | |
3414 | wr_t *pws = &(env->active_fpu.fpr[ws].wr); | |
3415 | uint32_t i; | |
3416 | ||
3417 | clear_msacsr_cause(env); | |
3418 | ||
3419 | switch (df) { | |
3420 | case DF_WORD: | |
3421 | for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { | |
3422 | MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32); | |
3423 | } | |
3424 | break; | |
3425 | case DF_DOUBLE: | |
3426 | for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { | |
3427 | MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64); | |
3428 | } | |
3429 | break; | |
3430 | default: | |
3431 | assert(0); | |
3432 | } | |
3433 | ||
3434 | check_msacsr_cause(env); | |
3435 | ||
3436 | msa_move_v(pwd, pwx); | |
3437 | } |