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b6a71ef7 JL |
1 | /* |
2 | * OpenRISC interrupt helper routines | |
3 | * | |
4 | * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> | |
5 | * Feng Gao <gf91597@gmail.com> | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include "cpu.h" | |
22 | #include "helper.h" | |
23 | ||
24 | void HELPER(rfe)(CPUOpenRISCState *env) | |
25 | { | |
26 | OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); | |
27 | #ifndef CONFIG_USER_ONLY | |
28 | int need_flush_tlb = (cpu->env.sr & (SR_SM | SR_IME | SR_DME)) ^ | |
29 | (cpu->env.esr & (SR_SM | SR_IME | SR_DME)); | |
30 | #endif | |
31 | cpu->env.pc = cpu->env.epcr; | |
32 | cpu->env.npc = cpu->env.epcr; | |
33 | cpu->env.sr = cpu->env.esr; | |
34 | ||
35 | #ifndef CONFIG_USER_ONLY | |
36 | if (cpu->env.sr & SR_DME) { | |
37 | cpu->env.tlb->cpu_openrisc_map_address_data = | |
38 | &cpu_openrisc_get_phys_data; | |
39 | } else { | |
40 | cpu->env.tlb->cpu_openrisc_map_address_data = | |
41 | &cpu_openrisc_get_phys_nommu; | |
42 | } | |
43 | ||
44 | if (cpu->env.sr & SR_IME) { | |
45 | cpu->env.tlb->cpu_openrisc_map_address_code = | |
46 | &cpu_openrisc_get_phys_code; | |
47 | } else { | |
48 | cpu->env.tlb->cpu_openrisc_map_address_code = | |
49 | &cpu_openrisc_get_phys_nommu; | |
50 | } | |
51 | ||
52 | if (need_flush_tlb) { | |
53 | tlb_flush(&cpu->env, 1); | |
54 | } | |
55 | #endif | |
56 | cpu->env.interrupt_request |= CPU_INTERRUPT_EXITTB; | |
57 | } |