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Commit | Line | Data |
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79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation definitions for qemu. |
79aceca5 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | #if !defined (__PPC_H__) | |
21 | #define __PPC_H__ | |
22 | ||
fdabc366 FB |
23 | #include "config.h" |
24 | ||
79aceca5 FB |
25 | #include "dyngen-exec.h" |
26 | ||
76a66253 JM |
27 | #include "cpu.h" |
28 | #include "exec-all.h" | |
fdabc366 | 29 | |
79aceca5 | 30 | register struct CPUPPCState *env asm(AREG0); |
76a66253 JM |
31 | #if TARGET_LONG_BITS > HOST_LONG_BITS |
32 | /* no registers can be used */ | |
33 | #define T0 (env->t0) | |
34 | #define T1 (env->t1) | |
35 | #define T2 (env->t2) | |
36 | #else | |
37 | /* This may be more efficient if HOST_LONG_BITS > TARGET_LONG_BITS | |
38 | * To be set to one when we'll be sure it does not cause bugs.... | |
39 | */ | |
40 | #if 0 | |
41 | register unsigned long T0 asm(AREG1); | |
42 | register unsigned long T1 asm(AREG2); | |
43 | register unsigned long T2 asm(AREG3); | |
44 | #else | |
45 | register target_ulong T0 asm(AREG1); | |
46 | register target_ulong T1 asm(AREG2); | |
47 | register target_ulong T2 asm(AREG3); | |
48 | #endif | |
49 | #endif | |
79aceca5 | 50 | |
76a66253 | 51 | /* XXX: to clean: remove this mess */ |
79aceca5 FB |
52 | #define PARAM(n) ((uint32_t)PARAM##n) |
53 | #define SPARAM(n) ((int32_t)PARAM##n) | |
76a66253 | 54 | |
fb0eaffc FB |
55 | #define FT0 (env->ft0) |
56 | #define FT1 (env->ft1) | |
57 | #define FT2 (env->ft2) | |
79aceca5 | 58 | |
a541f297 | 59 | #if defined (DEBUG_OP) |
70ead434 | 60 | # define RETURN() __asm__ __volatile__("nop" : : : "memory"); |
a541f297 | 61 | #else |
70ead434 | 62 | # define RETURN() __asm__ __volatile__("" : : : "memory"); |
a541f297 | 63 | #endif |
79aceca5 | 64 | |
76a66253 JM |
65 | static inline target_ulong rotl8 (target_ulong i, int n) |
66 | { | |
67 | return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n))); | |
68 | } | |
69 | ||
70 | static inline target_ulong rotl16 (target_ulong i, int n) | |
71 | { | |
72 | return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n))); | |
73 | } | |
79aceca5 | 74 | |
76a66253 | 75 | static inline target_ulong rotl32 (target_ulong i, int n) |
79aceca5 | 76 | { |
76a66253 | 77 | return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n))); |
79aceca5 FB |
78 | } |
79 | ||
76a66253 JM |
80 | #if defined(TARGET_PPC64) |
81 | static inline target_ulong rotl64 (target_ulong i, int n) | |
82 | { | |
83 | return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n))); | |
84 | } | |
85 | #endif | |
86 | ||
9a64fbe4 | 87 | #if !defined(CONFIG_USER_ONLY) |
a9049a07 | 88 | #include "softmmu_exec.h" |
9a64fbe4 | 89 | #endif /* !defined(CONFIG_USER_ONLY) */ |
79aceca5 | 90 | |
9fddaa0c FB |
91 | void do_raise_exception_err (uint32_t exception, int error_code); |
92 | void do_raise_exception (uint32_t exception); | |
79aceca5 | 93 | |
76a66253 JM |
94 | int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr, |
95 | int rw, int access_type, int check_BATs); | |
79aceca5 | 96 | |
76a66253 JM |
97 | void ppc6xx_tlb_invalidate_all (CPUState *env); |
98 | void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr, | |
99 | int is_code); | |
100 | void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, | |
101 | target_ulong pte0, target_ulong pte1); | |
9a64fbe4 | 102 | |
0d1a29f9 FB |
103 | static inline void env_to_regs(void) |
104 | { | |
105 | } | |
106 | ||
107 | static inline void regs_to_env(void) | |
108 | { | |
109 | } | |
110 | ||
76a66253 | 111 | int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
0fa85d43 FB |
112 | int is_user, int is_softmmu); |
113 | ||
79aceca5 | 114 | #endif /* !defined (__PPC_H__) */ |