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1/*
2 * Copyright 2008 IBM Corporation.
3 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
4 *
5 * This work is licensed under the GNU GPL license version 2 or later.
6 *
7 */
8
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9#ifndef KVM_PPC_H
10#define KVM_PPC_H
d76d1650 11
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12#define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
13
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14#ifdef CONFIG_KVM
15
dc333cd6 16uint32_t kvmppc_get_tbfreq(void);
eadaada1 17uint64_t kvmppc_get_clockfreq(void);
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18uint32_t kvmppc_get_vmx(void);
19uint32_t kvmppc_get_dfp(void);
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20bool kvmppc_get_host_model(char **buf);
21bool kvmppc_get_host_serial(char **buf);
1a61a9ae 22int kvmppc_get_hasidle(CPUPPCState *env);
1328c2bf 23int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
1bc22652 24int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
026bfd89 25void kvmppc_enable_logical_ci_hcalls(void);
ef9971dd 26void kvmppc_enable_set_mode_hcall(void);
1bc22652 27void kvmppc_set_papr(PowerPCCPU *cpu);
6db5bb0f 28int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version);
5b95b8b9 29void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
e97c3636 30int kvmppc_smt_threads(void);
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31int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
32int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
33int kvmppc_set_tcr(PowerPCCPU *cpu);
34int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
98efaf75 35#ifndef CONFIG_USER_ONLY
658fa66b 36off_t kvmppc_alloc_rma(void **rma);
da95324e 37bool kvmppc_spapr_use_multitce(void);
9bb62a07 38void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
6a81dd17 39 bool need_vfio);
0f5cb298 40int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
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41int kvmppc_reset_htab(int shift_hint);
42uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
98efaf75 43#endif /* !CONFIG_USER_ONLY */
3b961124 44bool kvmppc_has_cap_epr(void);
feaa64c4 45int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
7c43bca0 46bool kvmppc_has_cap_htab_fd(void);
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47int kvmppc_get_htab_fd(bool write);
48int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
49int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
50 uint16_t n_valid, uint16_t n_invalid);
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51uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu, target_ulong pte_index);
52void kvmppc_hash64_free_pteg(uint64_t token);
fc87e185 53
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54void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
55 target_ulong pte0, target_ulong pte1);
87a91de6 56bool kvmppc_has_cap_fixup_hcalls(void);
4d9392be 57int kvmppc_enable_hwrng(void);
e5c0d3ce 58int kvmppc_put_books_sregs(PowerPCCPU *cpu);
52b2519c 59PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
c1385933 60
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61#else
62
63static inline uint32_t kvmppc_get_tbfreq(void)
64{
65 return 0;
66}
67
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68static inline bool kvmppc_get_host_model(char **buf)
69{
70 return false;
71}
72
73static inline bool kvmppc_get_host_serial(char **buf)
74{
75 return false;
76}
77
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78static inline uint64_t kvmppc_get_clockfreq(void)
79{
80 return 0;
81}
82
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83static inline uint32_t kvmppc_get_vmx(void)
84{
85 return 0;
86}
87
88static inline uint32_t kvmppc_get_dfp(void)
89{
90 return 0;
91}
92
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93static inline int kvmppc_get_hasidle(CPUPPCState *env)
94{
95 return 0;
96}
97
1328c2bf 98static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
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99{
100 return -1;
101}
102
1bc22652 103static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
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104{
105 return -1;
106}
107
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108static inline void kvmppc_enable_logical_ci_hcalls(void)
109{
110}
111
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112static inline void kvmppc_enable_set_mode_hcall(void)
113{
114}
115
1bc22652 116static inline void kvmppc_set_papr(PowerPCCPU *cpu)
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117{
118}
119
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120static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)
121{
122 return 0;
123}
124
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125static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
126{
127}
128
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129static inline int kvmppc_smt_threads(void)
130{
131 return 1;
132}
133
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134static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
135{
136 return 0;
137}
138
139static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
140{
141 return 0;
142}
143
144static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
145{
146 return 0;
147}
148
149static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
150{
151 return -1;
152}
153
98efaf75 154#ifndef CONFIG_USER_ONLY
658fa66b 155static inline off_t kvmppc_alloc_rma(void **rma)
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156{
157 return 0;
158}
159
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160static inline bool kvmppc_spapr_use_multitce(void)
161{
162 return false;
163}
164
0f5cb298 165static inline void *kvmppc_create_spapr_tce(uint32_t liobn,
9bb62a07 166 uint32_t window_size, int *fd,
f94819d6 167 bool need_vfio)
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168{
169 return NULL;
170}
171
172static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
523e7b8a 173 uint32_t nb_table)
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174{
175 return -1;
176}
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177
178static inline int kvmppc_reset_htab(int shift_hint)
179{
a3166f8f 180 return 0;
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181}
182
183static inline uint64_t kvmppc_rma_size(uint64_t current_size,
184 unsigned int hash_shift)
185{
186 return ram_size;
187}
188
98efaf75 189#endif /* !CONFIG_USER_ONLY */
0f5cb298 190
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191static inline bool kvmppc_has_cap_epr(void)
192{
193 return false;
194}
e68cb8b4 195
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196static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
197 const char *function)
198{
199 return -1;
200}
201
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202static inline bool kvmppc_has_cap_htab_fd(void)
203{
204 return false;
205}
206
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207static inline int kvmppc_get_htab_fd(bool write)
208{
209 return -1;
210}
211
212static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
213 int64_t max_ns)
214{
215 abort();
216}
217
218static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
219 uint16_t n_valid, uint16_t n_invalid)
220{
221 abort();
222}
223
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224static inline uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu,
225 target_ulong pte_index)
226{
227 abort();
228}
229
230static inline void kvmppc_hash64_free_pteg(uint64_t token)
231{
232 abort();
233}
234
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235static inline void kvmppc_hash64_write_pte(CPUPPCState *env,
236 target_ulong pte_index,
237 target_ulong pte0, target_ulong pte1)
238{
239 abort();
240}
241
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242static inline bool kvmppc_has_cap_fixup_hcalls(void)
243{
244 abort();
245}
246
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247static inline int kvmppc_enable_hwrng(void)
248{
249 return -1;
250}
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251
252static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
253{
254 abort();
255}
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256
257static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
258{
259 return NULL;
260}
261
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262#endif
263
b45d63b6 264#ifndef CONFIG_KVM
3240dd9a 265
b45d63b6 266#define kvmppc_eieio() do { } while (0)
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267
268static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
269{
270}
271
272static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
273{
274}
275
276#else /* CONFIG_KVM */
277
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278#define kvmppc_eieio() \
279 do { \
280 if (kvm_enabled()) { \
281 asm volatile("eieio" : : : "memory"); \
282 } \
283 } while (0)
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284
285/* Store data cache blocks back to memory */
286static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
287{
288 uint8_t *p;
289
290 for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
291 asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
292 }
293}
294
295/* Invalidate instruction cache blocks */
296static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
297{
298 uint8_t *p;
299
300 for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
301 asm volatile("icbi 0,%0" : : "r"(p));
302 }
303}
304
305#endif /* CONFIG_KVM */
b45d63b6 306
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307#ifndef KVM_INTERRUPT_SET
308#define KVM_INTERRUPT_SET -1
309#endif
310
311#ifndef KVM_INTERRUPT_UNSET
312#define KVM_INTERRUPT_UNSET -2
313#endif
314
315#ifndef KVM_INTERRUPT_SET_LEVEL
316#define KVM_INTERRUPT_SET_LEVEL -3
317#endif
dc333cd6 318
2a6a4076 319#endif /* KVM_PPC_H */