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bf957284 PB |
1 | /* |
2 | * QEMU monitor | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "cpu.h" | |
25 | #include "monitor/monitor.h" | |
26 | #include "monitor/hmp-target.h" | |
27 | #include "hmp.h" | |
28 | ||
29 | static target_long monitor_get_ccr (const struct MonitorDef *md, int val) | |
30 | { | |
31 | CPUArchState *env = mon_get_cpu_env(); | |
32 | unsigned int u; | |
33 | int i; | |
34 | ||
35 | u = 0; | |
36 | for (i = 0; i < 8; i++) | |
37 | u |= env->crf[i] << (32 - (4 * (i + 1))); | |
38 | ||
39 | return u; | |
40 | } | |
41 | ||
bf957284 PB |
42 | static target_long monitor_get_decr (const struct MonitorDef *md, int val) |
43 | { | |
44 | CPUArchState *env = mon_get_cpu_env(); | |
45 | return cpu_ppc_load_decr(env); | |
46 | } | |
47 | ||
48 | static target_long monitor_get_tbu (const struct MonitorDef *md, int val) | |
49 | { | |
50 | CPUArchState *env = mon_get_cpu_env(); | |
51 | return cpu_ppc_load_tbu(env); | |
52 | } | |
53 | ||
54 | static target_long monitor_get_tbl (const struct MonitorDef *md, int val) | |
55 | { | |
56 | CPUArchState *env = mon_get_cpu_env(); | |
57 | return cpu_ppc_load_tbl(env); | |
58 | } | |
59 | ||
60 | void hmp_info_tlb(Monitor *mon, const QDict *qdict) | |
61 | { | |
62 | CPUArchState *env1 = mon_get_cpu_env(); | |
63 | ||
64 | dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); | |
65 | } | |
66 | ||
bf957284 | 67 | const MonitorDef monitor_defs[] = { |
bf957284 PB |
68 | { "fpscr", offsetof(CPUPPCState, fpscr) }, |
69 | /* Next instruction pointer */ | |
70 | { "nip|pc", offsetof(CPUPPCState, nip) }, | |
71 | { "lr", offsetof(CPUPPCState, lr) }, | |
72 | { "ctr", offsetof(CPUPPCState, ctr) }, | |
73 | { "decr", 0, &monitor_get_decr, }, | |
0a9516c2 | 74 | { "ccr|cr", 0, &monitor_get_ccr, }, |
bf957284 | 75 | /* Machine state register */ |
0a9516c2 AK |
76 | { "xer", offsetof(CPUPPCState, xer) }, |
77 | { "msr", offsetof(CPUPPCState, msr) }, | |
bf957284 PB |
78 | { "tbu", 0, &monitor_get_tbu, }, |
79 | { "tbl", 0, &monitor_get_tbl, }, | |
bf957284 PB |
80 | { NULL }, |
81 | }; | |
82 | ||
83 | const MonitorDef *target_monitor_defs(void) | |
84 | { | |
85 | return monitor_defs; | |
86 | } | |
0a9516c2 AK |
87 | |
88 | static int ppc_cpu_get_reg_num(const char *numstr, int maxnum, int *pregnum) | |
89 | { | |
90 | int regnum; | |
91 | char *endptr = NULL; | |
92 | ||
93 | if (!*numstr) { | |
94 | return false; | |
95 | } | |
96 | ||
97 | regnum = strtoul(numstr, &endptr, 10); | |
98 | if (*endptr || (regnum >= maxnum)) { | |
99 | return false; | |
100 | } | |
101 | *pregnum = regnum; | |
102 | ||
103 | return true; | |
104 | } | |
105 | ||
106 | int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval) | |
107 | { | |
108 | int i, regnum; | |
109 | PowerPCCPU *cpu = POWERPC_CPU(cs); | |
110 | CPUPPCState *env = &cpu->env; | |
111 | ||
112 | /* General purpose registers */ | |
113 | if ((tolower(name[0]) == 'r') && | |
114 | ppc_cpu_get_reg_num(name + 1, ARRAY_SIZE(env->gpr), ®num)) { | |
115 | *pval = env->gpr[regnum]; | |
116 | return 0; | |
117 | } | |
118 | ||
119 | /* Floating point registers */ | |
120 | if ((tolower(name[0]) == 'f') && | |
121 | ppc_cpu_get_reg_num(name + 1, ARRAY_SIZE(env->fpr), ®num)) { | |
122 | *pval = env->fpr[regnum]; | |
123 | return 0; | |
124 | } | |
125 | ||
126 | /* Special purpose registers */ | |
127 | for (i = 0; i < ARRAY_SIZE(env->spr_cb); ++i) { | |
128 | ppc_spr_t *spr = &env->spr_cb[i]; | |
129 | ||
130 | if (spr->name && (strcasecmp(name, spr->name) == 0)) { | |
131 | *pval = env->spr[i]; | |
132 | return 0; | |
133 | } | |
134 | } | |
135 | ||
136 | /* Segment registers */ | |
137 | #if !defined(CONFIG_USER_ONLY) | |
138 | if ((strncasecmp(name, "sr", 2) == 0) && | |
139 | ppc_cpu_get_reg_num(name + 2, ARRAY_SIZE(env->sr), ®num)) { | |
140 | *pval = env->sr[regnum]; | |
141 | return 0; | |
142 | } | |
143 | #endif | |
144 | ||
145 | return -EINVAL; | |
146 | } |