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Commit | Line | Data |
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9a64fbe4 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation helpers for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
9a64fbe4 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
9a64fbe4 FB |
20 | #include "exec.h" |
21 | ||
0487d6a8 JM |
22 | #include "op_helper.h" |
23 | ||
9a64fbe4 | 24 | #define MEMSUFFIX _raw |
0487d6a8 | 25 | #include "op_helper.h" |
9a64fbe4 | 26 | #include "op_helper_mem.h" |
a541f297 | 27 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 28 | #define MEMSUFFIX _user |
0487d6a8 | 29 | #include "op_helper.h" |
9a64fbe4 FB |
30 | #include "op_helper_mem.h" |
31 | #define MEMSUFFIX _kernel | |
0487d6a8 | 32 | #include "op_helper.h" |
9a64fbe4 FB |
33 | #include "op_helper_mem.h" |
34 | #endif | |
35 | ||
fdabc366 FB |
36 | //#define DEBUG_OP |
37 | //#define DEBUG_EXCEPTIONS | |
76a66253 | 38 | //#define DEBUG_SOFTWARE_TLB |
fdabc366 FB |
39 | //#define FLUSH_ALL_TLBS |
40 | ||
9a64fbe4 FB |
41 | /*****************************************************************************/ |
42 | /* Exceptions processing helpers */ | |
9a64fbe4 | 43 | |
9fddaa0c | 44 | void do_raise_exception_err (uint32_t exception, int error_code) |
9a64fbe4 | 45 | { |
9fddaa0c FB |
46 | #if 0 |
47 | printf("Raise exception %3x code : %d\n", exception, error_code); | |
48 | #endif | |
49 | switch (exception) { | |
9fddaa0c | 50 | case EXCP_PROGRAM: |
76a66253 JM |
51 | if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
52 | return; | |
53 | break; | |
9fddaa0c | 54 | default: |
76a66253 JM |
55 | break; |
56 | } | |
9fddaa0c FB |
57 | env->exception_index = exception; |
58 | env->error_code = error_code; | |
76a66253 JM |
59 | cpu_loop_exit(); |
60 | } | |
9fddaa0c FB |
61 | |
62 | void do_raise_exception (uint32_t exception) | |
63 | { | |
64 | do_raise_exception_err(exception, 0); | |
9a64fbe4 FB |
65 | } |
66 | ||
a496775f JM |
67 | void cpu_dump_EA (target_ulong EA); |
68 | void do_print_mem_EA (target_ulong EA) | |
69 | { | |
70 | cpu_dump_EA(EA); | |
71 | } | |
72 | ||
76a66253 JM |
73 | /*****************************************************************************/ |
74 | /* Registers load and stores */ | |
75 | void do_load_cr (void) | |
76 | { | |
77 | T0 = (env->crf[0] << 28) | | |
78 | (env->crf[1] << 24) | | |
79 | (env->crf[2] << 20) | | |
80 | (env->crf[3] << 16) | | |
81 | (env->crf[4] << 12) | | |
82 | (env->crf[5] << 8) | | |
83 | (env->crf[6] << 4) | | |
84 | (env->crf[7] << 0); | |
85 | } | |
86 | ||
87 | void do_store_cr (uint32_t mask) | |
88 | { | |
89 | int i, sh; | |
90 | ||
36081602 | 91 | for (i = 0, sh = 7; i < 8; i++, sh--) { |
76a66253 JM |
92 | if (mask & (1 << sh)) |
93 | env->crf[i] = (T0 >> (sh * 4)) & 0xFUL; | |
94 | } | |
95 | } | |
96 | ||
97 | void do_load_xer (void) | |
98 | { | |
99 | T0 = (xer_so << XER_SO) | | |
100 | (xer_ov << XER_OV) | | |
101 | (xer_ca << XER_CA) | | |
102 | (xer_bc << XER_BC) | | |
103 | (xer_cmp << XER_CMP); | |
104 | } | |
105 | ||
106 | void do_store_xer (void) | |
107 | { | |
108 | xer_so = (T0 >> XER_SO) & 0x01; | |
109 | xer_ov = (T0 >> XER_OV) & 0x01; | |
110 | xer_ca = (T0 >> XER_CA) & 0x01; | |
111 | xer_cmp = (T0 >> XER_CMP) & 0xFF; | |
d9bce9d9 | 112 | xer_bc = (T0 >> XER_BC) & 0x7F; |
76a66253 JM |
113 | } |
114 | ||
115 | void do_load_fpscr (void) | |
116 | { | |
117 | /* The 32 MSB of the target fpr are undefined. | |
118 | * They'll be zero... | |
119 | */ | |
120 | union { | |
121 | float64 d; | |
122 | struct { | |
123 | uint32_t u[2]; | |
124 | } s; | |
125 | } u; | |
126 | int i; | |
127 | ||
d9bce9d9 | 128 | #if defined(WORDS_BIGENDIAN) |
76a66253 JM |
129 | #define WORD0 0 |
130 | #define WORD1 1 | |
131 | #else | |
132 | #define WORD0 1 | |
133 | #define WORD1 0 | |
134 | #endif | |
135 | u.s.u[WORD0] = 0; | |
136 | u.s.u[WORD1] = 0; | |
137 | for (i = 0; i < 8; i++) | |
138 | u.s.u[WORD1] |= env->fpscr[i] << (4 * i); | |
139 | FT0 = u.d; | |
140 | } | |
141 | ||
142 | void do_store_fpscr (uint32_t mask) | |
143 | { | |
144 | /* | |
145 | * We use only the 32 LSB of the incoming fpr | |
146 | */ | |
147 | union { | |
148 | double d; | |
149 | struct { | |
150 | uint32_t u[2]; | |
151 | } s; | |
152 | } u; | |
153 | int i, rnd_type; | |
154 | ||
155 | u.d = FT0; | |
156 | if (mask & 0x80) | |
157 | env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9); | |
158 | for (i = 1; i < 7; i++) { | |
159 | if (mask & (1 << (7 - i))) | |
160 | env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF; | |
161 | } | |
162 | /* TODO: update FEX & VX */ | |
163 | /* Set rounding mode */ | |
164 | switch (env->fpscr[0] & 0x3) { | |
165 | case 0: | |
166 | /* Best approximation (round to nearest) */ | |
167 | rnd_type = float_round_nearest_even; | |
168 | break; | |
169 | case 1: | |
170 | /* Smaller magnitude (round toward zero) */ | |
171 | rnd_type = float_round_to_zero; | |
172 | break; | |
173 | case 2: | |
174 | /* Round toward +infinite */ | |
175 | rnd_type = float_round_up; | |
176 | break; | |
177 | default: | |
178 | case 3: | |
179 | /* Round toward -infinite */ | |
180 | rnd_type = float_round_down; | |
181 | break; | |
182 | } | |
183 | set_float_rounding_mode(rnd_type, &env->fp_status); | |
184 | } | |
185 | ||
a496775f JM |
186 | target_ulong ppc_load_dump_spr (int sprn) |
187 | { | |
6b80055d | 188 | if (loglevel != 0) { |
a496775f JM |
189 | fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
190 | sprn, sprn, env->spr[sprn]); | |
191 | } | |
192 | ||
193 | return env->spr[sprn]; | |
194 | } | |
195 | ||
196 | void ppc_store_dump_spr (int sprn, target_ulong val) | |
197 | { | |
6b80055d | 198 | if (loglevel != 0) { |
a496775f JM |
199 | fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", |
200 | sprn, sprn, env->spr[sprn], val); | |
201 | } | |
202 | env->spr[sprn] = val; | |
203 | } | |
204 | ||
9a64fbe4 | 205 | /*****************************************************************************/ |
fdabc366 | 206 | /* Fixed point operations helpers */ |
d9bce9d9 JM |
207 | #if defined(TARGET_PPC64) |
208 | static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) | |
fdabc366 | 209 | { |
d9bce9d9 JM |
210 | *plow += a; |
211 | /* carry test */ | |
212 | if (*plow < a) | |
213 | (*phigh)++; | |
214 | *phigh += b; | |
fdabc366 FB |
215 | } |
216 | ||
d9bce9d9 | 217 | static void neg128 (uint64_t *plow, uint64_t *phigh) |
fdabc366 | 218 | { |
36081602 JM |
219 | *plow = ~*plow; |
220 | *phigh = ~*phigh; | |
d9bce9d9 JM |
221 | add128(plow, phigh, 1, 0); |
222 | } | |
223 | ||
224 | static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) | |
225 | { | |
226 | uint32_t a0, a1, b0, b1; | |
227 | uint64_t v; | |
228 | ||
229 | a0 = a; | |
230 | a1 = a >> 32; | |
231 | ||
232 | b0 = b; | |
233 | b1 = b >> 32; | |
3b46e624 | 234 | |
d9bce9d9 JM |
235 | v = (uint64_t)a0 * (uint64_t)b0; |
236 | *plow = v; | |
237 | *phigh = 0; | |
238 | ||
239 | v = (uint64_t)a0 * (uint64_t)b1; | |
240 | add128(plow, phigh, v << 32, v >> 32); | |
241 | ||
242 | v = (uint64_t)a1 * (uint64_t)b0; | |
243 | add128(plow, phigh, v << 32, v >> 32); | |
244 | ||
245 | v = (uint64_t)a1 * (uint64_t)b1; | |
246 | *phigh += v; | |
247 | #if defined(DEBUG_MULDIV) | |
248 | printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n", | |
249 | a, b, *phigh, *plow); | |
250 | #endif | |
251 | } | |
252 | ||
253 | void do_mul64 (uint64_t *plow, uint64_t *phigh) | |
254 | { | |
255 | mul64(plow, phigh, T0, T1); | |
256 | } | |
257 | ||
0487d6a8 | 258 | static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) |
d9bce9d9 JM |
259 | { |
260 | int sa, sb; | |
36081602 | 261 | |
d9bce9d9 JM |
262 | sa = (a < 0); |
263 | if (sa) | |
264 | a = -a; | |
265 | sb = (b < 0); | |
266 | if (sb) | |
267 | b = -b; | |
268 | mul64(plow, phigh, a, b); | |
269 | if (sa ^ sb) { | |
270 | neg128(plow, phigh); | |
fdabc366 FB |
271 | } |
272 | } | |
273 | ||
d9bce9d9 JM |
274 | void do_imul64 (uint64_t *plow, uint64_t *phigh) |
275 | { | |
276 | imul64(plow, phigh, T0, T1); | |
277 | } | |
278 | #endif | |
279 | ||
fdabc366 FB |
280 | void do_adde (void) |
281 | { | |
282 | T2 = T0; | |
283 | T0 += T1 + xer_ca; | |
d9bce9d9 JM |
284 | if (likely(!((uint32_t)T0 < (uint32_t)T2 || |
285 | (xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) { | |
fdabc366 FB |
286 | xer_ca = 0; |
287 | } else { | |
288 | xer_ca = 1; | |
289 | } | |
290 | } | |
291 | ||
d9bce9d9 JM |
292 | #if defined(TARGET_PPC64) |
293 | void do_adde_64 (void) | |
fdabc366 FB |
294 | { |
295 | T2 = T0; | |
296 | T0 += T1 + xer_ca; | |
d9bce9d9 JM |
297 | if (likely(!((uint64_t)T0 < (uint64_t)T2 || |
298 | (xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) { | |
fdabc366 FB |
299 | xer_ca = 0; |
300 | } else { | |
301 | xer_ca = 1; | |
302 | } | |
fdabc366 | 303 | } |
d9bce9d9 | 304 | #endif |
fdabc366 FB |
305 | |
306 | void do_addmeo (void) | |
307 | { | |
308 | T1 = T0; | |
309 | T0 += xer_ca + (-1); | |
d9bce9d9 JM |
310 | if (likely(!((uint32_t)T1 & |
311 | ((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) { | |
fdabc366 FB |
312 | xer_ov = 0; |
313 | } else { | |
fdabc366 | 314 | xer_ov = 1; |
966439a6 | 315 | xer_so = 1; |
fdabc366 FB |
316 | } |
317 | if (likely(T1 != 0)) | |
318 | xer_ca = 1; | |
319 | } | |
320 | ||
d9bce9d9 JM |
321 | #if defined(TARGET_PPC64) |
322 | void do_addmeo_64 (void) | |
fdabc366 FB |
323 | { |
324 | T1 = T0; | |
d9bce9d9 JM |
325 | T0 += xer_ca + (-1); |
326 | if (likely(!((uint64_t)T1 & | |
327 | ((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) { | |
fdabc366 FB |
328 | xer_ov = 0; |
329 | } else { | |
fdabc366 | 330 | xer_ov = 1; |
966439a6 | 331 | xer_so = 1; |
fdabc366 | 332 | } |
d9bce9d9 | 333 | if (likely(T1 != 0)) |
fdabc366 | 334 | xer_ca = 1; |
fdabc366 | 335 | } |
d9bce9d9 | 336 | #endif |
fdabc366 FB |
337 | |
338 | void do_divwo (void) | |
339 | { | |
d9bce9d9 JM |
340 | if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
341 | (int32_t)T1 == 0))) { | |
fdabc366 | 342 | xer_ov = 0; |
d9bce9d9 | 343 | T0 = (int32_t)T0 / (int32_t)T1; |
fdabc366 | 344 | } else { |
fdabc366 | 345 | xer_ov = 1; |
966439a6 | 346 | xer_so = 1; |
fdabc366 FB |
347 | T0 = (-1) * ((uint32_t)T0 >> 31); |
348 | } | |
349 | } | |
350 | ||
d9bce9d9 JM |
351 | #if defined(TARGET_PPC64) |
352 | void do_divdo (void) | |
353 | { | |
354 | if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) || | |
355 | (int64_t)T1 == 0))) { | |
356 | xer_ov = 0; | |
357 | T0 = (int64_t)T0 / (int64_t)T1; | |
358 | } else { | |
d9bce9d9 | 359 | xer_ov = 1; |
966439a6 | 360 | xer_so = 1; |
d9bce9d9 JM |
361 | T0 = (-1ULL) * ((uint64_t)T0 >> 63); |
362 | } | |
363 | } | |
364 | #endif | |
365 | ||
fdabc366 FB |
366 | void do_divwuo (void) |
367 | { | |
368 | if (likely((uint32_t)T1 != 0)) { | |
369 | xer_ov = 0; | |
370 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
371 | } else { | |
fdabc366 | 372 | xer_ov = 1; |
966439a6 | 373 | xer_so = 1; |
fdabc366 FB |
374 | T0 = 0; |
375 | } | |
376 | } | |
377 | ||
d9bce9d9 JM |
378 | #if defined(TARGET_PPC64) |
379 | void do_divduo (void) | |
380 | { | |
381 | if (likely((uint64_t)T1 != 0)) { | |
382 | xer_ov = 0; | |
383 | T0 = (uint64_t)T0 / (uint64_t)T1; | |
384 | } else { | |
d9bce9d9 | 385 | xer_ov = 1; |
966439a6 | 386 | xer_so = 1; |
d9bce9d9 JM |
387 | T0 = 0; |
388 | } | |
389 | } | |
390 | #endif | |
391 | ||
fdabc366 FB |
392 | void do_mullwo (void) |
393 | { | |
d9bce9d9 | 394 | int64_t res = (int64_t)T0 * (int64_t)T1; |
fdabc366 FB |
395 | |
396 | if (likely((int32_t)res == res)) { | |
397 | xer_ov = 0; | |
398 | } else { | |
399 | xer_ov = 1; | |
400 | xer_so = 1; | |
401 | } | |
402 | T0 = (int32_t)res; | |
403 | } | |
404 | ||
d9bce9d9 JM |
405 | #if defined(TARGET_PPC64) |
406 | void do_mulldo (void) | |
fdabc366 | 407 | { |
d9bce9d9 JM |
408 | int64_t th; |
409 | uint64_t tl; | |
410 | ||
411 | do_imul64(&tl, &th); | |
412 | if (likely(th == 0)) { | |
fdabc366 | 413 | xer_ov = 0; |
fdabc366 FB |
414 | } else { |
415 | xer_ov = 1; | |
416 | xer_so = 1; | |
417 | } | |
d9bce9d9 | 418 | T0 = (int64_t)tl; |
fdabc366 | 419 | } |
d9bce9d9 | 420 | #endif |
fdabc366 | 421 | |
d9bce9d9 | 422 | void do_nego (void) |
fdabc366 | 423 | { |
d9bce9d9 | 424 | if (likely((int32_t)T0 != INT32_MIN)) { |
fdabc366 | 425 | xer_ov = 0; |
d9bce9d9 | 426 | T0 = -(int32_t)T0; |
fdabc366 | 427 | } else { |
fdabc366 | 428 | xer_ov = 1; |
d9bce9d9 | 429 | xer_so = 1; |
fdabc366 | 430 | } |
fdabc366 FB |
431 | } |
432 | ||
d9bce9d9 JM |
433 | #if defined(TARGET_PPC64) |
434 | void do_nego_64 (void) | |
fdabc366 | 435 | { |
d9bce9d9 | 436 | if (likely((int64_t)T0 != INT64_MIN)) { |
fdabc366 | 437 | xer_ov = 0; |
d9bce9d9 | 438 | T0 = -(int64_t)T0; |
fdabc366 | 439 | } else { |
fdabc366 | 440 | xer_ov = 1; |
d9bce9d9 | 441 | xer_so = 1; |
fdabc366 FB |
442 | } |
443 | } | |
d9bce9d9 | 444 | #endif |
fdabc366 FB |
445 | |
446 | void do_subfe (void) | |
447 | { | |
448 | T0 = T1 + ~T0 + xer_ca; | |
d9bce9d9 JM |
449 | if (likely((uint32_t)T0 >= (uint32_t)T1 && |
450 | (xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) { | |
fdabc366 FB |
451 | xer_ca = 0; |
452 | } else { | |
453 | xer_ca = 1; | |
454 | } | |
455 | } | |
456 | ||
d9bce9d9 JM |
457 | #if defined(TARGET_PPC64) |
458 | void do_subfe_64 (void) | |
fdabc366 | 459 | { |
fdabc366 | 460 | T0 = T1 + ~T0 + xer_ca; |
d9bce9d9 JM |
461 | if (likely((uint64_t)T0 >= (uint64_t)T1 && |
462 | (xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) { | |
463 | xer_ca = 0; | |
464 | } else { | |
465 | xer_ca = 1; | |
466 | } | |
467 | } | |
468 | #endif | |
469 | ||
470 | void do_subfmeo (void) | |
471 | { | |
472 | T1 = T0; | |
473 | T0 = ~T0 + xer_ca - 1; | |
474 | if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) & | |
475 | (1UL << 31)))) { | |
fdabc366 FB |
476 | xer_ov = 0; |
477 | } else { | |
fdabc366 | 478 | xer_ov = 1; |
966439a6 | 479 | xer_so = 1; |
fdabc366 | 480 | } |
d9bce9d9 | 481 | if (likely((uint32_t)T1 != UINT32_MAX)) |
fdabc366 | 482 | xer_ca = 1; |
fdabc366 FB |
483 | } |
484 | ||
d9bce9d9 JM |
485 | #if defined(TARGET_PPC64) |
486 | void do_subfmeo_64 (void) | |
fdabc366 FB |
487 | { |
488 | T1 = T0; | |
489 | T0 = ~T0 + xer_ca - 1; | |
d9bce9d9 JM |
490 | if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) & |
491 | (1ULL << 63)))) { | |
fdabc366 FB |
492 | xer_ov = 0; |
493 | } else { | |
fdabc366 | 494 | xer_ov = 1; |
966439a6 | 495 | xer_so = 1; |
fdabc366 | 496 | } |
d9bce9d9 | 497 | if (likely((uint64_t)T1 != UINT64_MAX)) |
fdabc366 FB |
498 | xer_ca = 1; |
499 | } | |
d9bce9d9 | 500 | #endif |
fdabc366 FB |
501 | |
502 | void do_subfzeo (void) | |
503 | { | |
504 | T1 = T0; | |
505 | T0 = ~T0 + xer_ca; | |
d9bce9d9 JM |
506 | if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) & |
507 | ((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) { | |
fdabc366 FB |
508 | xer_ov = 0; |
509 | } else { | |
510 | xer_ov = 1; | |
511 | xer_so = 1; | |
512 | } | |
d9bce9d9 | 513 | if (likely((uint32_t)T0 >= (uint32_t)~T1)) { |
fdabc366 FB |
514 | xer_ca = 0; |
515 | } else { | |
516 | xer_ca = 1; | |
517 | } | |
518 | } | |
519 | ||
d9bce9d9 JM |
520 | #if defined(TARGET_PPC64) |
521 | void do_subfzeo_64 (void) | |
522 | { | |
523 | T1 = T0; | |
524 | T0 = ~T0 + xer_ca; | |
525 | if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) & | |
526 | ((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) { | |
527 | xer_ov = 0; | |
528 | } else { | |
529 | xer_ov = 1; | |
530 | xer_so = 1; | |
531 | } | |
532 | if (likely((uint64_t)T0 >= (uint64_t)~T1)) { | |
533 | xer_ca = 0; | |
534 | } else { | |
535 | xer_ca = 1; | |
536 | } | |
537 | } | |
538 | #endif | |
539 | ||
9a64fbe4 FB |
540 | /* shift right arithmetic helper */ |
541 | void do_sraw (void) | |
542 | { | |
543 | int32_t ret; | |
544 | ||
fdabc366 | 545 | if (likely(!(T1 & 0x20UL))) { |
d9bce9d9 | 546 | if (likely((uint32_t)T1 != 0)) { |
fdabc366 FB |
547 | ret = (int32_t)T0 >> (T1 & 0x1fUL); |
548 | if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { | |
76a66253 | 549 | xer_ca = 0; |
fdabc366 | 550 | } else { |
76a66253 | 551 | xer_ca = 1; |
fdabc366 FB |
552 | } |
553 | } else { | |
76a66253 | 554 | ret = T0; |
fdabc366 FB |
555 | xer_ca = 0; |
556 | } | |
557 | } else { | |
558 | ret = (-1) * ((uint32_t)T0 >> 31); | |
559 | if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { | |
560 | xer_ca = 0; | |
76a66253 | 561 | } else { |
9a64fbe4 | 562 | xer_ca = 1; |
76a66253 | 563 | } |
fdabc366 | 564 | } |
4b3686fa | 565 | T0 = ret; |
9a64fbe4 FB |
566 | } |
567 | ||
d9bce9d9 JM |
568 | #if defined(TARGET_PPC64) |
569 | void do_srad (void) | |
570 | { | |
571 | int64_t ret; | |
572 | ||
573 | if (likely(!(T1 & 0x40UL))) { | |
574 | if (likely((uint64_t)T1 != 0)) { | |
575 | ret = (int64_t)T0 >> (T1 & 0x3FUL); | |
576 | if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) { | |
577 | xer_ca = 0; | |
578 | } else { | |
579 | xer_ca = 1; | |
580 | } | |
581 | } else { | |
582 | ret = T0; | |
583 | xer_ca = 0; | |
584 | } | |
585 | } else { | |
586 | ret = (-1) * ((uint64_t)T0 >> 63); | |
587 | if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) { | |
588 | xer_ca = 0; | |
589 | } else { | |
590 | xer_ca = 1; | |
591 | } | |
592 | } | |
593 | T0 = ret; | |
594 | } | |
595 | #endif | |
596 | ||
597 | static inline int popcnt (uint32_t val) | |
598 | { | |
599 | int i; | |
600 | ||
601 | for (i = 0; val != 0;) | |
602 | val = val ^ (val - 1); | |
603 | ||
604 | return i; | |
605 | } | |
606 | ||
607 | void do_popcntb (void) | |
608 | { | |
609 | uint32_t ret; | |
610 | int i; | |
611 | ||
612 | ret = 0; | |
613 | for (i = 0; i < 32; i += 8) | |
614 | ret |= popcnt((T0 >> i) & 0xFF) << i; | |
615 | T0 = ret; | |
616 | } | |
617 | ||
618 | #if defined(TARGET_PPC64) | |
619 | void do_popcntb_64 (void) | |
620 | { | |
621 | uint64_t ret; | |
622 | int i; | |
623 | ||
624 | ret = 0; | |
625 | for (i = 0; i < 64; i += 8) | |
626 | ret |= popcnt((T0 >> i) & 0xFF) << i; | |
627 | T0 = ret; | |
628 | } | |
629 | #endif | |
630 | ||
fdabc366 | 631 | /*****************************************************************************/ |
9a64fbe4 | 632 | /* Floating point operations helpers */ |
9a64fbe4 FB |
633 | void do_fctiw (void) |
634 | { | |
635 | union { | |
636 | double d; | |
637 | uint64_t i; | |
4ecc3190 | 638 | } p; |
9a64fbe4 | 639 | |
e864cabd JM |
640 | p.i = float64_to_int32(FT0, &env->fp_status); |
641 | #if USE_PRECISE_EMULATION | |
4ecc3190 | 642 | /* XXX: higher bits are not supposed to be significant. |
76a66253 | 643 | * to make tests easier, return the same as a real PowerPC 750 (aka G3) |
4ecc3190 | 644 | */ |
4ecc3190 | 645 | p.i |= 0xFFF80000ULL << 32; |
e864cabd | 646 | #endif |
4ecc3190 | 647 | FT0 = p.d; |
9a64fbe4 FB |
648 | } |
649 | ||
650 | void do_fctiwz (void) | |
651 | { | |
652 | union { | |
653 | double d; | |
654 | uint64_t i; | |
4ecc3190 FB |
655 | } p; |
656 | ||
e864cabd JM |
657 | p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
658 | #if USE_PRECISE_EMULATION | |
4ecc3190 | 659 | /* XXX: higher bits are not supposed to be significant. |
d9bce9d9 | 660 | * to make tests easier, return the same as a real PowerPC 750 (aka G3) |
4ecc3190 | 661 | */ |
4ecc3190 | 662 | p.i |= 0xFFF80000ULL << 32; |
e864cabd | 663 | #endif |
4ecc3190 | 664 | FT0 = p.d; |
9a64fbe4 FB |
665 | } |
666 | ||
426613db JM |
667 | #if defined(TARGET_PPC64) |
668 | void do_fcfid (void) | |
669 | { | |
670 | union { | |
671 | double d; | |
672 | uint64_t i; | |
673 | } p; | |
674 | ||
675 | p.d = FT0; | |
676 | FT0 = int64_to_float64(p.i, &env->fp_status); | |
677 | } | |
678 | ||
679 | void do_fctid (void) | |
680 | { | |
681 | union { | |
682 | double d; | |
683 | uint64_t i; | |
684 | } p; | |
685 | ||
686 | p.i = float64_to_int64(FT0, &env->fp_status); | |
687 | FT0 = p.d; | |
688 | } | |
689 | ||
690 | void do_fctidz (void) | |
691 | { | |
692 | union { | |
693 | double d; | |
694 | uint64_t i; | |
695 | } p; | |
696 | ||
697 | p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status); | |
698 | FT0 = p.d; | |
699 | } | |
700 | ||
701 | #endif | |
702 | ||
e864cabd JM |
703 | #if USE_PRECISE_EMULATION |
704 | void do_fmadd (void) | |
705 | { | |
706 | #ifdef FLOAT128 | |
707 | float128 ft0_128, ft1_128; | |
708 | ||
709 | ft0_128 = float64_to_float128(FT0, &env->fp_status); | |
710 | ft1_128 = float64_to_float128(FT1, &env->fp_status); | |
711 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); | |
712 | ft1_128 = float64_to_float128(FT2, &env->fp_status); | |
713 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); | |
714 | FT0 = float128_to_float64(ft0_128, &env->fp_status); | |
715 | #else | |
716 | /* This is OK on x86 hosts */ | |
717 | FT0 = (FT0 * FT1) + FT2; | |
718 | #endif | |
719 | } | |
720 | ||
721 | void do_fmsub (void) | |
722 | { | |
723 | #ifdef FLOAT128 | |
724 | float128 ft0_128, ft1_128; | |
725 | ||
726 | ft0_128 = float64_to_float128(FT0, &env->fp_status); | |
727 | ft1_128 = float64_to_float128(FT1, &env->fp_status); | |
728 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); | |
729 | ft1_128 = float64_to_float128(FT2, &env->fp_status); | |
730 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); | |
731 | FT0 = float128_to_float64(ft0_128, &env->fp_status); | |
732 | #else | |
733 | /* This is OK on x86 hosts */ | |
734 | FT0 = (FT0 * FT1) - FT2; | |
735 | #endif | |
736 | } | |
737 | #endif /* USE_PRECISE_EMULATION */ | |
738 | ||
4b3686fa FB |
739 | void do_fnmadd (void) |
740 | { | |
e864cabd JM |
741 | #if USE_PRECISE_EMULATION |
742 | #ifdef FLOAT128 | |
743 | float128 ft0_128, ft1_128; | |
744 | ||
745 | ft0_128 = float64_to_float128(FT0, &env->fp_status); | |
746 | ft1_128 = float64_to_float128(FT1, &env->fp_status); | |
747 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); | |
748 | ft1_128 = float64_to_float128(FT2, &env->fp_status); | |
749 | ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); | |
750 | FT0 = float128_to_float64(ft0_128, &env->fp_status); | |
751 | #else | |
752 | /* This is OK on x86 hosts */ | |
753 | FT0 = (FT0 * FT1) + FT2; | |
754 | #endif | |
755 | #else | |
fdabc366 FB |
756 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
757 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 758 | #endif |
fdabc366 FB |
759 | if (likely(!isnan(FT0))) |
760 | FT0 = float64_chs(FT0); | |
4b3686fa FB |
761 | } |
762 | ||
763 | void do_fnmsub (void) | |
764 | { | |
e864cabd JM |
765 | #if USE_PRECISE_EMULATION |
766 | #ifdef FLOAT128 | |
767 | float128 ft0_128, ft1_128; | |
768 | ||
769 | ft0_128 = float64_to_float128(FT0, &env->fp_status); | |
770 | ft1_128 = float64_to_float128(FT1, &env->fp_status); | |
771 | ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); | |
772 | ft1_128 = float64_to_float128(FT2, &env->fp_status); | |
773 | ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); | |
774 | FT0 = float128_to_float64(ft0_128, &env->fp_status); | |
775 | #else | |
776 | /* This is OK on x86 hosts */ | |
777 | FT0 = (FT0 * FT1) - FT2; | |
778 | #endif | |
779 | #else | |
fdabc366 FB |
780 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
781 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 782 | #endif |
fdabc366 FB |
783 | if (likely(!isnan(FT0))) |
784 | FT0 = float64_chs(FT0); | |
1ef59d0a FB |
785 | } |
786 | ||
9a64fbe4 FB |
787 | void do_fsqrt (void) |
788 | { | |
fdabc366 | 789 | FT0 = float64_sqrt(FT0, &env->fp_status); |
9a64fbe4 FB |
790 | } |
791 | ||
9a64fbe4 FB |
792 | void do_fres (void) |
793 | { | |
4ecc3190 FB |
794 | union { |
795 | double d; | |
796 | uint64_t i; | |
797 | } p; | |
798 | ||
fdabc366 | 799 | if (likely(isnormal(FT0))) { |
e864cabd JM |
800 | #if USE_PRECISE_EMULATION |
801 | FT0 = float64_div(1.0, FT0, &env->fp_status); | |
802 | FT0 = float64_to_float32(FT0, &env->fp_status); | |
803 | #else | |
76a66253 | 804 | FT0 = float32_div(1.0, FT0, &env->fp_status); |
e864cabd | 805 | #endif |
4ecc3190 FB |
806 | } else { |
807 | p.d = FT0; | |
808 | if (p.i == 0x8000000000000000ULL) { | |
809 | p.i = 0xFFF0000000000000ULL; | |
810 | } else if (p.i == 0x0000000000000000ULL) { | |
811 | p.i = 0x7FF0000000000000ULL; | |
812 | } else if (isnan(FT0)) { | |
813 | p.i = 0x7FF8000000000000ULL; | |
814 | } else if (FT0 < 0.0) { | |
815 | p.i = 0x8000000000000000ULL; | |
816 | } else { | |
817 | p.i = 0x0000000000000000ULL; | |
818 | } | |
819 | FT0 = p.d; | |
820 | } | |
9a64fbe4 FB |
821 | } |
822 | ||
4ecc3190 | 823 | void do_frsqrte (void) |
9a64fbe4 | 824 | { |
4ecc3190 FB |
825 | union { |
826 | double d; | |
827 | uint64_t i; | |
828 | } p; | |
829 | ||
fdabc366 FB |
830 | if (likely(isnormal(FT0) && FT0 > 0.0)) { |
831 | FT0 = float64_sqrt(FT0, &env->fp_status); | |
832 | FT0 = float32_div(1.0, FT0, &env->fp_status); | |
4ecc3190 FB |
833 | } else { |
834 | p.d = FT0; | |
835 | if (p.i == 0x8000000000000000ULL) { | |
836 | p.i = 0xFFF0000000000000ULL; | |
837 | } else if (p.i == 0x0000000000000000ULL) { | |
838 | p.i = 0x7FF0000000000000ULL; | |
839 | } else if (isnan(FT0)) { | |
840 | if (!(p.i & 0x0008000000000000ULL)) | |
841 | p.i |= 0x000FFFFFFFFFFFFFULL; | |
842 | } else if (FT0 < 0) { | |
843 | p.i = 0x7FF8000000000000ULL; | |
844 | } else { | |
845 | p.i = 0x0000000000000000ULL; | |
846 | } | |
847 | FT0 = p.d; | |
848 | } | |
9a64fbe4 FB |
849 | } |
850 | ||
851 | void do_fsel (void) | |
852 | { | |
853 | if (FT0 >= 0) | |
9a64fbe4 | 854 | FT0 = FT1; |
4ecc3190 FB |
855 | else |
856 | FT0 = FT2; | |
9a64fbe4 FB |
857 | } |
858 | ||
859 | void do_fcmpu (void) | |
860 | { | |
fdabc366 FB |
861 | if (likely(!isnan(FT0) && !isnan(FT1))) { |
862 | if (float64_lt(FT0, FT1, &env->fp_status)) { | |
863 | T0 = 0x08UL; | |
864 | } else if (!float64_le(FT0, FT1, &env->fp_status)) { | |
865 | T0 = 0x04UL; | |
866 | } else { | |
867 | T0 = 0x02UL; | |
868 | } | |
869 | } else { | |
870 | T0 = 0x01UL; | |
9a64fbe4 FB |
871 | env->fpscr[4] |= 0x1; |
872 | env->fpscr[6] |= 0x1; | |
9a64fbe4 | 873 | } |
4b3686fa | 874 | env->fpscr[3] = T0; |
9a64fbe4 FB |
875 | } |
876 | ||
877 | void do_fcmpo (void) | |
878 | { | |
879 | env->fpscr[4] &= ~0x1; | |
fdabc366 FB |
880 | if (likely(!isnan(FT0) && !isnan(FT1))) { |
881 | if (float64_lt(FT0, FT1, &env->fp_status)) { | |
882 | T0 = 0x08UL; | |
883 | } else if (!float64_le(FT0, FT1, &env->fp_status)) { | |
884 | T0 = 0x04UL; | |
885 | } else { | |
886 | T0 = 0x02UL; | |
887 | } | |
888 | } else { | |
889 | T0 = 0x01UL; | |
9a64fbe4 | 890 | env->fpscr[4] |= 0x1; |
76a66253 JM |
891 | if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) { |
892 | /* Quiet NaN case */ | |
9a64fbe4 FB |
893 | env->fpscr[6] |= 0x1; |
894 | if (!(env->fpscr[1] & 0x8)) | |
895 | env->fpscr[4] |= 0x8; | |
896 | } else { | |
897 | env->fpscr[4] |= 0x8; | |
898 | } | |
9a64fbe4 | 899 | } |
4b3686fa | 900 | env->fpscr[3] = T0; |
9a64fbe4 FB |
901 | } |
902 | ||
76a66253 | 903 | #if !defined (CONFIG_USER_ONLY) |
6b80055d | 904 | void cpu_dump_rfi (target_ulong RA, target_ulong msr); |
fdabc366 | 905 | void do_rfi (void) |
9a64fbe4 | 906 | { |
426613db | 907 | #if defined(TARGET_PPC64) |
a42bd6cc JM |
908 | if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
909 | env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003); | |
910 | do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL)); | |
911 | } else { | |
912 | env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003); | |
913 | ppc_store_msr_32(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL)); | |
914 | } | |
426613db | 915 | #else |
a42bd6cc JM |
916 | env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003); |
917 | do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL)); | |
426613db | 918 | #endif |
fdabc366 | 919 | #if defined (DEBUG_OP) |
6b80055d | 920 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
fdabc366 FB |
921 | #endif |
922 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; | |
9a64fbe4 | 923 | } |
d9bce9d9 JM |
924 | |
925 | #if defined(TARGET_PPC64) | |
426613db JM |
926 | void do_rfid (void) |
927 | { | |
a42bd6cc JM |
928 | if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
929 | env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003); | |
930 | do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL)); | |
931 | } else { | |
932 | env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003); | |
933 | do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL)); | |
934 | } | |
d9bce9d9 | 935 | #if defined (DEBUG_OP) |
6b80055d | 936 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
d9bce9d9 JM |
937 | #endif |
938 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; | |
939 | } | |
940 | #endif | |
76a66253 | 941 | #endif |
9a64fbe4 | 942 | |
76a66253 | 943 | void do_tw (int flags) |
9a64fbe4 | 944 | { |
d9bce9d9 JM |
945 | if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) || |
946 | ((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) || | |
947 | ((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) || | |
948 | ((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) || | |
a42bd6cc | 949 | ((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) { |
fdabc366 | 950 | do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
a42bd6cc | 951 | } |
9a64fbe4 FB |
952 | } |
953 | ||
d9bce9d9 JM |
954 | #if defined(TARGET_PPC64) |
955 | void do_td (int flags) | |
956 | { | |
957 | if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) || | |
958 | ((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) || | |
959 | ((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) || | |
960 | ((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) || | |
961 | ((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01))))) | |
962 | do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); | |
963 | } | |
964 | #endif | |
965 | ||
fdabc366 | 966 | /*****************************************************************************/ |
76a66253 JM |
967 | /* PowerPC 601 specific instructions (POWER bridge) */ |
968 | void do_POWER_abso (void) | |
9a64fbe4 | 969 | { |
d9bce9d9 | 970 | if ((uint32_t)T0 == INT32_MIN) { |
76a66253 JM |
971 | T0 = INT32_MAX; |
972 | xer_ov = 1; | |
973 | xer_so = 1; | |
974 | } else { | |
975 | T0 = -T0; | |
976 | xer_ov = 0; | |
977 | } | |
9a64fbe4 FB |
978 | } |
979 | ||
76a66253 | 980 | void do_POWER_clcs (void) |
9a64fbe4 | 981 | { |
76a66253 JM |
982 | switch (T0) { |
983 | case 0x0CUL: | |
984 | /* Instruction cache line size */ | |
985 | T0 = ICACHE_LINE_SIZE; | |
986 | break; | |
987 | case 0x0DUL: | |
988 | /* Data cache line size */ | |
989 | T0 = DCACHE_LINE_SIZE; | |
990 | break; | |
991 | case 0x0EUL: | |
992 | /* Minimum cache line size */ | |
993 | T0 = ICACHE_LINE_SIZE < DCACHE_LINE_SIZE ? | |
994 | ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; | |
995 | break; | |
996 | case 0x0FUL: | |
997 | /* Maximum cache line size */ | |
998 | T0 = ICACHE_LINE_SIZE > DCACHE_LINE_SIZE ? | |
999 | ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; | |
1000 | break; | |
1001 | default: | |
1002 | /* Undefined */ | |
1003 | break; | |
1004 | } | |
1005 | } | |
1006 | ||
1007 | void do_POWER_div (void) | |
1008 | { | |
1009 | uint64_t tmp; | |
1010 | ||
d9bce9d9 | 1011 | if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
76a66253 JM |
1012 | T0 = (long)((-1) * (T0 >> 31)); |
1013 | env->spr[SPR_MQ] = 0; | |
1014 | } else { | |
1015 | tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ]; | |
1016 | env->spr[SPR_MQ] = tmp % T1; | |
d9bce9d9 | 1017 | T0 = tmp / (int32_t)T1; |
76a66253 JM |
1018 | } |
1019 | } | |
1020 | ||
1021 | void do_POWER_divo (void) | |
1022 | { | |
1023 | int64_t tmp; | |
1024 | ||
d9bce9d9 | 1025 | if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
76a66253 JM |
1026 | T0 = (long)((-1) * (T0 >> 31)); |
1027 | env->spr[SPR_MQ] = 0; | |
1028 | xer_ov = 1; | |
1029 | xer_so = 1; | |
1030 | } else { | |
1031 | tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ]; | |
1032 | env->spr[SPR_MQ] = tmp % T1; | |
d9bce9d9 | 1033 | tmp /= (int32_t)T1; |
76a66253 JM |
1034 | if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) { |
1035 | xer_ov = 1; | |
1036 | xer_so = 1; | |
1037 | } else { | |
1038 | xer_ov = 0; | |
1039 | } | |
1040 | T0 = tmp; | |
1041 | } | |
1042 | } | |
1043 | ||
1044 | void do_POWER_divs (void) | |
1045 | { | |
d9bce9d9 | 1046 | if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
76a66253 JM |
1047 | T0 = (long)((-1) * (T0 >> 31)); |
1048 | env->spr[SPR_MQ] = 0; | |
1049 | } else { | |
1050 | env->spr[SPR_MQ] = T0 % T1; | |
d9bce9d9 | 1051 | T0 = (int32_t)T0 / (int32_t)T1; |
76a66253 JM |
1052 | } |
1053 | } | |
1054 | ||
1055 | void do_POWER_divso (void) | |
1056 | { | |
d9bce9d9 | 1057 | if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
76a66253 JM |
1058 | T0 = (long)((-1) * (T0 >> 31)); |
1059 | env->spr[SPR_MQ] = 0; | |
1060 | xer_ov = 1; | |
1061 | xer_so = 1; | |
1062 | } else { | |
d9bce9d9 JM |
1063 | T0 = (int32_t)T0 / (int32_t)T1; |
1064 | env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1; | |
76a66253 JM |
1065 | xer_ov = 0; |
1066 | } | |
1067 | } | |
1068 | ||
1069 | void do_POWER_dozo (void) | |
1070 | { | |
d9bce9d9 | 1071 | if ((int32_t)T1 > (int32_t)T0) { |
76a66253 JM |
1072 | T2 = T0; |
1073 | T0 = T1 - T0; | |
d9bce9d9 JM |
1074 | if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & |
1075 | ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) { | |
76a66253 | 1076 | xer_ov = 1; |
966439a6 | 1077 | xer_so = 1; |
76a66253 JM |
1078 | } else { |
1079 | xer_ov = 0; | |
1080 | } | |
1081 | } else { | |
1082 | T0 = 0; | |
1083 | xer_ov = 0; | |
1084 | } | |
1085 | } | |
1086 | ||
1087 | void do_POWER_maskg (void) | |
1088 | { | |
1089 | uint32_t ret; | |
1090 | ||
d9bce9d9 | 1091 | if ((uint32_t)T0 == (uint32_t)(T1 + 1)) { |
76a66253 JM |
1092 | ret = -1; |
1093 | } else { | |
d9bce9d9 JM |
1094 | ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^ |
1095 | (((uint32_t)(-1) >> ((uint32_t)T1)) >> 1); | |
1096 | if ((uint32_t)T0 > (uint32_t)T1) | |
76a66253 JM |
1097 | ret = ~ret; |
1098 | } | |
1099 | T0 = ret; | |
1100 | } | |
1101 | ||
1102 | void do_POWER_mulo (void) | |
1103 | { | |
1104 | uint64_t tmp; | |
1105 | ||
1106 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
1107 | env->spr[SPR_MQ] = tmp >> 32; | |
1108 | T0 = tmp; | |
1109 | if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) { | |
1110 | xer_ov = 1; | |
1111 | xer_so = 1; | |
1112 | } else { | |
1113 | xer_ov = 0; | |
1114 | } | |
1115 | } | |
1116 | ||
1117 | #if !defined (CONFIG_USER_ONLY) | |
1118 | void do_POWER_rac (void) | |
1119 | { | |
1120 | #if 0 | |
1121 | mmu_ctx_t ctx; | |
1122 | ||
1123 | /* We don't have to generate many instances of this instruction, | |
1124 | * as rac is supervisor only. | |
1125 | */ | |
1126 | if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0) | |
1127 | T0 = ctx.raddr; | |
1128 | #endif | |
1129 | } | |
1130 | ||
1131 | void do_POWER_rfsvc (void) | |
1132 | { | |
1133 | env->nip = env->lr & ~0x00000003UL; | |
1134 | T0 = env->ctr & 0x0000FFFFUL; | |
1135 | do_store_msr(env, T0); | |
1136 | #if defined (DEBUG_OP) | |
6b80055d | 1137 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
76a66253 JM |
1138 | #endif |
1139 | env->interrupt_request |= CPU_INTERRUPT_EXITTB; | |
1140 | } | |
1141 | ||
1142 | /* PowerPC 601 BAT management helper */ | |
1143 | void do_store_601_batu (int nr) | |
1144 | { | |
d9bce9d9 | 1145 | do_store_ibatu(env, nr, (uint32_t)T0); |
76a66253 JM |
1146 | env->DBAT[0][nr] = env->IBAT[0][nr]; |
1147 | env->DBAT[1][nr] = env->IBAT[1][nr]; | |
1148 | } | |
1149 | #endif | |
1150 | ||
1151 | /*****************************************************************************/ | |
1152 | /* 602 specific instructions */ | |
1153 | /* mfrom is the most crazy instruction ever seen, imho ! */ | |
1154 | /* Real implementation uses a ROM table. Do the same */ | |
1155 | #define USE_MFROM_ROM_TABLE | |
1156 | void do_op_602_mfrom (void) | |
1157 | { | |
1158 | if (likely(T0 < 602)) { | |
d9bce9d9 | 1159 | #if defined(USE_MFROM_ROM_TABLE) |
76a66253 JM |
1160 | #include "mfrom_table.c" |
1161 | T0 = mfrom_ROM_table[T0]; | |
fdabc366 | 1162 | #else |
76a66253 JM |
1163 | double d; |
1164 | /* Extremly decomposed: | |
1165 | * -T0 / 256 | |
1166 | * T0 = 256 * log10(10 + 1.0) + 0.5 | |
1167 | */ | |
1168 | d = T0; | |
1169 | d = float64_div(d, 256, &env->fp_status); | |
1170 | d = float64_chs(d); | |
1171 | d = exp10(d); // XXX: use float emulation function | |
1172 | d = float64_add(d, 1.0, &env->fp_status); | |
1173 | d = log10(d); // XXX: use float emulation function | |
1174 | d = float64_mul(d, 256, &env->fp_status); | |
1175 | d = float64_add(d, 0.5, &env->fp_status); | |
1176 | T0 = float64_round_to_int(d, &env->fp_status); | |
fdabc366 | 1177 | #endif |
76a66253 JM |
1178 | } else { |
1179 | T0 = 0; | |
1180 | } | |
1181 | } | |
1182 | ||
1183 | /*****************************************************************************/ | |
1184 | /* Embedded PowerPC specific helpers */ | |
1185 | void do_405_check_ov (void) | |
1186 | { | |
d9bce9d9 JM |
1187 | if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1188 | !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) { | |
76a66253 JM |
1189 | xer_ov = 0; |
1190 | } else { | |
1191 | xer_ov = 1; | |
1192 | xer_so = 1; | |
1193 | } | |
1194 | } | |
1195 | ||
1196 | void do_405_check_sat (void) | |
1197 | { | |
d9bce9d9 JM |
1198 | if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1199 | !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) { | |
76a66253 JM |
1200 | /* Saturate result */ |
1201 | if (T2 >> 31) { | |
1202 | T0 = INT32_MIN; | |
1203 | } else { | |
1204 | T0 = INT32_MAX; | |
1205 | } | |
1206 | } | |
1207 | } | |
1208 | ||
1209 | #if !defined(CONFIG_USER_ONLY) | |
a42bd6cc | 1210 | void do_40x_rfci (void) |
76a66253 JM |
1211 | { |
1212 | env->nip = env->spr[SPR_40x_SRR2]; | |
a42bd6cc JM |
1213 | do_store_msr(env, env->spr[SPR_40x_SRR3] & ~0xFFFF0000); |
1214 | #if defined (DEBUG_OP) | |
6b80055d | 1215 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
a42bd6cc JM |
1216 | #endif |
1217 | env->interrupt_request = CPU_INTERRUPT_EXITTB; | |
1218 | } | |
1219 | ||
1220 | void do_rfci (void) | |
1221 | { | |
1222 | #if defined(TARGET_PPC64) | |
1223 | if (env->spr[SPR_BOOKE_CSRR1] & (1 << MSR_CM)) { | |
1224 | env->nip = (uint64_t)env->spr[SPR_BOOKE_CSRR0]; | |
1225 | } else | |
1226 | #endif | |
1227 | { | |
1228 | env->nip = (uint32_t)env->spr[SPR_BOOKE_CSRR0]; | |
1229 | } | |
1230 | do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_CSRR1] & ~0x3FFF0000); | |
1231 | #if defined (DEBUG_OP) | |
6b80055d | 1232 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
a42bd6cc JM |
1233 | #endif |
1234 | env->interrupt_request = CPU_INTERRUPT_EXITTB; | |
1235 | } | |
1236 | ||
1237 | void do_rfdi (void) | |
1238 | { | |
1239 | #if defined(TARGET_PPC64) | |
1240 | if (env->spr[SPR_BOOKE_DSRR1] & (1 << MSR_CM)) { | |
1241 | env->nip = (uint64_t)env->spr[SPR_BOOKE_DSRR0]; | |
1242 | } else | |
1243 | #endif | |
1244 | { | |
1245 | env->nip = (uint32_t)env->spr[SPR_BOOKE_DSRR0]; | |
1246 | } | |
1247 | do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_DSRR1] & ~0x3FFF0000); | |
1248 | #if defined (DEBUG_OP) | |
6b80055d | 1249 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
a42bd6cc JM |
1250 | #endif |
1251 | env->interrupt_request = CPU_INTERRUPT_EXITTB; | |
1252 | } | |
1253 | ||
1254 | void do_rfmci (void) | |
1255 | { | |
1256 | #if defined(TARGET_PPC64) | |
1257 | if (env->spr[SPR_BOOKE_MCSRR1] & (1 << MSR_CM)) { | |
1258 | env->nip = (uint64_t)env->spr[SPR_BOOKE_MCSRR0]; | |
1259 | } else | |
1260 | #endif | |
1261 | { | |
1262 | env->nip = (uint32_t)env->spr[SPR_BOOKE_MCSRR0]; | |
1263 | } | |
1264 | do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_MCSRR1] & ~0x3FFF0000); | |
76a66253 | 1265 | #if defined (DEBUG_OP) |
6b80055d | 1266 | cpu_dump_rfi(env->nip, do_load_msr(env)); |
76a66253 JM |
1267 | #endif |
1268 | env->interrupt_request = CPU_INTERRUPT_EXITTB; | |
1269 | } | |
1270 | ||
a42bd6cc | 1271 | void do_load_dcr (void) |
76a66253 JM |
1272 | { |
1273 | target_ulong val; | |
3b46e624 | 1274 | |
2e719ba3 | 1275 | if (unlikely(env->dcr_env == NULL)) { |
6b80055d | 1276 | if (loglevel != 0) { |
a496775f JM |
1277 | fprintf(logfile, "No DCR environment\n"); |
1278 | } | |
76a66253 | 1279 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
2e719ba3 | 1280 | } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
6b80055d | 1281 | if (loglevel != 0) { |
a496775f JM |
1282 | fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); |
1283 | } | |
76a66253 | 1284 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
2e719ba3 | 1285 | } else { |
76a66253 | 1286 | T0 = val; |
2e719ba3 | 1287 | } |
76a66253 JM |
1288 | } |
1289 | ||
a42bd6cc | 1290 | void do_store_dcr (void) |
76a66253 | 1291 | { |
2e719ba3 | 1292 | if (unlikely(env->dcr_env == NULL)) { |
6b80055d | 1293 | if (loglevel != 0) { |
a496775f JM |
1294 | fprintf(logfile, "No DCR environment\n"); |
1295 | } | |
76a66253 | 1296 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
2e719ba3 | 1297 | } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
6b80055d | 1298 | if (loglevel != 0) { |
a496775f JM |
1299 | fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); |
1300 | } | |
76a66253 | 1301 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
2e719ba3 | 1302 | } |
76a66253 JM |
1303 | } |
1304 | ||
1305 | void do_load_403_pb (int num) | |
1306 | { | |
1307 | T0 = env->pb[num]; | |
1308 | } | |
1309 | ||
1310 | void do_store_403_pb (int num) | |
1311 | { | |
1312 | if (likely(env->pb[num] != T0)) { | |
1313 | env->pb[num] = T0; | |
1314 | /* Should be optimized */ | |
1315 | tlb_flush(env, 1); | |
1316 | } | |
1317 | } | |
1318 | #endif | |
1319 | ||
1320 | /* 440 specific */ | |
1321 | void do_440_dlmzb (void) | |
1322 | { | |
1323 | target_ulong mask; | |
1324 | int i; | |
1325 | ||
1326 | i = 1; | |
1327 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { | |
1328 | if ((T0 & mask) == 0) | |
1329 | goto done; | |
1330 | i++; | |
1331 | } | |
1332 | for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { | |
1333 | if ((T1 & mask) == 0) | |
1334 | break; | |
1335 | i++; | |
1336 | } | |
1337 | done: | |
1338 | T0 = i; | |
fdabc366 FB |
1339 | } |
1340 | ||
35cdaad6 | 1341 | #if defined(TARGET_PPCEMB) |
0487d6a8 JM |
1342 | /* SPE extension helpers */ |
1343 | /* Use a table to make this quicker */ | |
1344 | static uint8_t hbrev[16] = { | |
1345 | 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, | |
1346 | 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, | |
1347 | }; | |
1348 | ||
1349 | static inline uint8_t byte_reverse (uint8_t val) | |
1350 | { | |
1351 | return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); | |
1352 | } | |
1353 | ||
1354 | static inline uint32_t word_reverse (uint32_t val) | |
1355 | { | |
1356 | return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | | |
1357 | (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); | |
1358 | } | |
1359 | ||
1360 | #define MASKBITS 16 // Random value - to be fixed | |
1361 | void do_brinc (void) | |
1362 | { | |
1363 | uint32_t a, b, d, mask; | |
1364 | ||
1365 | mask = (uint32_t)(-1UL) >> MASKBITS; | |
1366 | b = T1_64 & mask; | |
1367 | a = T0_64 & mask; | |
1368 | d = word_reverse(1 + word_reverse(a | ~mask)); | |
1369 | T0_64 = (T0_64 & ~mask) | (d & mask); | |
1370 | } | |
1371 | ||
1372 | #define DO_SPE_OP2(name) \ | |
1373 | void do_ev##name (void) \ | |
1374 | { \ | |
1375 | T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \ | |
1376 | (uint64_t)_do_e##name(T0_64, T1_64); \ | |
1377 | } | |
1378 | ||
1379 | #define DO_SPE_OP1(name) \ | |
1380 | void do_ev##name (void) \ | |
1381 | { \ | |
1382 | T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \ | |
1383 | (uint64_t)_do_e##name(T0_64); \ | |
1384 | } | |
1385 | ||
1386 | /* Fixed-point vector arithmetic */ | |
1387 | static inline uint32_t _do_eabs (uint32_t val) | |
1388 | { | |
1389 | if (val != 0x80000000) | |
1390 | val &= ~0x80000000; | |
1391 | ||
1392 | return val; | |
1393 | } | |
1394 | ||
1395 | static inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2) | |
1396 | { | |
1397 | return op1 + op2; | |
1398 | } | |
1399 | ||
1400 | static inline int _do_ecntlsw (uint32_t val) | |
1401 | { | |
1402 | if (val & 0x80000000) | |
1403 | return _do_cntlzw(~val); | |
1404 | else | |
1405 | return _do_cntlzw(val); | |
1406 | } | |
1407 | ||
1408 | static inline int _do_ecntlzw (uint32_t val) | |
1409 | { | |
1410 | return _do_cntlzw(val); | |
1411 | } | |
1412 | ||
1413 | static inline uint32_t _do_eneg (uint32_t val) | |
1414 | { | |
1415 | if (val != 0x80000000) | |
1416 | val ^= 0x80000000; | |
1417 | ||
1418 | return val; | |
1419 | } | |
1420 | ||
1421 | static inline uint32_t _do_erlw (uint32_t op1, uint32_t op2) | |
1422 | { | |
1423 | return rotl32(op1, op2); | |
1424 | } | |
1425 | ||
1426 | static inline uint32_t _do_erndw (uint32_t val) | |
1427 | { | |
1428 | return (val + 0x000080000000) & 0xFFFF0000; | |
1429 | } | |
1430 | ||
1431 | static inline uint32_t _do_eslw (uint32_t op1, uint32_t op2) | |
1432 | { | |
1433 | /* No error here: 6 bits are used */ | |
1434 | return op1 << (op2 & 0x3F); | |
1435 | } | |
1436 | ||
1437 | static inline int32_t _do_esrws (int32_t op1, uint32_t op2) | |
1438 | { | |
1439 | /* No error here: 6 bits are used */ | |
1440 | return op1 >> (op2 & 0x3F); | |
1441 | } | |
1442 | ||
1443 | static inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2) | |
1444 | { | |
1445 | /* No error here: 6 bits are used */ | |
1446 | return op1 >> (op2 & 0x3F); | |
1447 | } | |
1448 | ||
1449 | static inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2) | |
1450 | { | |
1451 | return op2 - op1; | |
1452 | } | |
1453 | ||
1454 | /* evabs */ | |
1455 | DO_SPE_OP1(abs); | |
1456 | /* evaddw */ | |
1457 | DO_SPE_OP2(addw); | |
1458 | /* evcntlsw */ | |
1459 | DO_SPE_OP1(cntlsw); | |
1460 | /* evcntlzw */ | |
1461 | DO_SPE_OP1(cntlzw); | |
1462 | /* evneg */ | |
1463 | DO_SPE_OP1(neg); | |
1464 | /* evrlw */ | |
1465 | DO_SPE_OP2(rlw); | |
1466 | /* evrnd */ | |
1467 | DO_SPE_OP1(rndw); | |
1468 | /* evslw */ | |
1469 | DO_SPE_OP2(slw); | |
1470 | /* evsrws */ | |
1471 | DO_SPE_OP2(srws); | |
1472 | /* evsrwu */ | |
1473 | DO_SPE_OP2(srwu); | |
1474 | /* evsubfw */ | |
1475 | DO_SPE_OP2(subfw); | |
1476 | ||
1477 | /* evsel is a little bit more complicated... */ | |
1478 | static inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n) | |
1479 | { | |
1480 | if (n) | |
1481 | return op1; | |
1482 | else | |
1483 | return op2; | |
1484 | } | |
1485 | ||
1486 | void do_evsel (void) | |
1487 | { | |
1488 | T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) | | |
1489 | (uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1); | |
1490 | } | |
1491 | ||
1492 | /* Fixed-point vector comparisons */ | |
1493 | #define DO_SPE_CMP(name) \ | |
1494 | void do_ev##name (void) \ | |
1495 | { \ | |
1496 | T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \ | |
1497 | T1_64 >> 32) << 32, \ | |
1498 | _do_e##name(T0_64, T1_64)); \ | |
1499 | } | |
1500 | ||
1501 | static inline uint32_t _do_evcmp_merge (int t0, int t1) | |
1502 | { | |
1503 | return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); | |
1504 | } | |
1505 | static inline int _do_ecmpeq (uint32_t op1, uint32_t op2) | |
1506 | { | |
1507 | return op1 == op2 ? 1 : 0; | |
1508 | } | |
1509 | ||
1510 | static inline int _do_ecmpgts (int32_t op1, int32_t op2) | |
1511 | { | |
1512 | return op1 > op2 ? 1 : 0; | |
1513 | } | |
1514 | ||
1515 | static inline int _do_ecmpgtu (uint32_t op1, uint32_t op2) | |
1516 | { | |
1517 | return op1 > op2 ? 1 : 0; | |
1518 | } | |
1519 | ||
1520 | static inline int _do_ecmplts (int32_t op1, int32_t op2) | |
1521 | { | |
1522 | return op1 < op2 ? 1 : 0; | |
1523 | } | |
1524 | ||
1525 | static inline int _do_ecmpltu (uint32_t op1, uint32_t op2) | |
1526 | { | |
1527 | return op1 < op2 ? 1 : 0; | |
1528 | } | |
1529 | ||
1530 | /* evcmpeq */ | |
1531 | DO_SPE_CMP(cmpeq); | |
1532 | /* evcmpgts */ | |
1533 | DO_SPE_CMP(cmpgts); | |
1534 | /* evcmpgtu */ | |
1535 | DO_SPE_CMP(cmpgtu); | |
1536 | /* evcmplts */ | |
1537 | DO_SPE_CMP(cmplts); | |
1538 | /* evcmpltu */ | |
1539 | DO_SPE_CMP(cmpltu); | |
1540 | ||
1541 | /* Single precision floating-point conversions from/to integer */ | |
1542 | static inline uint32_t _do_efscfsi (int32_t val) | |
1543 | { | |
1544 | union { | |
1545 | uint32_t u; | |
1546 | float32 f; | |
1547 | } u; | |
1548 | ||
1549 | u.f = int32_to_float32(val, &env->spe_status); | |
1550 | ||
1551 | return u.u; | |
1552 | } | |
1553 | ||
1554 | static inline uint32_t _do_efscfui (uint32_t val) | |
1555 | { | |
1556 | union { | |
1557 | uint32_t u; | |
1558 | float32 f; | |
1559 | } u; | |
1560 | ||
1561 | u.f = uint32_to_float32(val, &env->spe_status); | |
1562 | ||
1563 | return u.u; | |
1564 | } | |
1565 | ||
1566 | static inline int32_t _do_efsctsi (uint32_t val) | |
1567 | { | |
1568 | union { | |
1569 | int32_t u; | |
1570 | float32 f; | |
1571 | } u; | |
1572 | ||
1573 | u.u = val; | |
1574 | /* NaN are not treated the same way IEEE 754 does */ | |
1575 | if (unlikely(isnan(u.f))) | |
1576 | return 0; | |
1577 | ||
1578 | return float32_to_int32(u.f, &env->spe_status); | |
1579 | } | |
1580 | ||
1581 | static inline uint32_t _do_efsctui (uint32_t val) | |
1582 | { | |
1583 | union { | |
1584 | int32_t u; | |
1585 | float32 f; | |
1586 | } u; | |
1587 | ||
1588 | u.u = val; | |
1589 | /* NaN are not treated the same way IEEE 754 does */ | |
1590 | if (unlikely(isnan(u.f))) | |
1591 | return 0; | |
1592 | ||
1593 | return float32_to_uint32(u.f, &env->spe_status); | |
1594 | } | |
1595 | ||
1596 | static inline int32_t _do_efsctsiz (uint32_t val) | |
1597 | { | |
1598 | union { | |
1599 | int32_t u; | |
1600 | float32 f; | |
1601 | } u; | |
1602 | ||
1603 | u.u = val; | |
1604 | /* NaN are not treated the same way IEEE 754 does */ | |
1605 | if (unlikely(isnan(u.f))) | |
1606 | return 0; | |
1607 | ||
1608 | return float32_to_int32_round_to_zero(u.f, &env->spe_status); | |
1609 | } | |
1610 | ||
1611 | static inline uint32_t _do_efsctuiz (uint32_t val) | |
1612 | { | |
1613 | union { | |
1614 | int32_t u; | |
1615 | float32 f; | |
1616 | } u; | |
1617 | ||
1618 | u.u = val; | |
1619 | /* NaN are not treated the same way IEEE 754 does */ | |
1620 | if (unlikely(isnan(u.f))) | |
1621 | return 0; | |
1622 | ||
1623 | return float32_to_uint32_round_to_zero(u.f, &env->spe_status); | |
1624 | } | |
1625 | ||
1626 | void do_efscfsi (void) | |
1627 | { | |
1628 | T0_64 = _do_efscfsi(T0_64); | |
1629 | } | |
1630 | ||
1631 | void do_efscfui (void) | |
1632 | { | |
1633 | T0_64 = _do_efscfui(T0_64); | |
1634 | } | |
1635 | ||
1636 | void do_efsctsi (void) | |
1637 | { | |
1638 | T0_64 = _do_efsctsi(T0_64); | |
1639 | } | |
1640 | ||
1641 | void do_efsctui (void) | |
1642 | { | |
1643 | T0_64 = _do_efsctui(T0_64); | |
1644 | } | |
1645 | ||
1646 | void do_efsctsiz (void) | |
1647 | { | |
1648 | T0_64 = _do_efsctsiz(T0_64); | |
1649 | } | |
1650 | ||
1651 | void do_efsctuiz (void) | |
1652 | { | |
1653 | T0_64 = _do_efsctuiz(T0_64); | |
1654 | } | |
1655 | ||
1656 | /* Single precision floating-point conversion to/from fractional */ | |
1657 | static inline uint32_t _do_efscfsf (uint32_t val) | |
1658 | { | |
1659 | union { | |
1660 | uint32_t u; | |
1661 | float32 f; | |
1662 | } u; | |
1663 | float32 tmp; | |
1664 | ||
1665 | u.f = int32_to_float32(val, &env->spe_status); | |
1666 | tmp = int64_to_float32(1ULL << 32, &env->spe_status); | |
1667 | u.f = float32_div(u.f, tmp, &env->spe_status); | |
1668 | ||
1669 | return u.u; | |
1670 | } | |
1671 | ||
1672 | static inline uint32_t _do_efscfuf (uint32_t val) | |
1673 | { | |
1674 | union { | |
1675 | uint32_t u; | |
1676 | float32 f; | |
1677 | } u; | |
1678 | float32 tmp; | |
1679 | ||
1680 | u.f = uint32_to_float32(val, &env->spe_status); | |
1681 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); | |
1682 | u.f = float32_div(u.f, tmp, &env->spe_status); | |
1683 | ||
1684 | return u.u; | |
1685 | } | |
1686 | ||
1687 | static inline int32_t _do_efsctsf (uint32_t val) | |
1688 | { | |
1689 | union { | |
1690 | int32_t u; | |
1691 | float32 f; | |
1692 | } u; | |
1693 | float32 tmp; | |
1694 | ||
1695 | u.u = val; | |
1696 | /* NaN are not treated the same way IEEE 754 does */ | |
1697 | if (unlikely(isnan(u.f))) | |
1698 | return 0; | |
1699 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); | |
1700 | u.f = float32_mul(u.f, tmp, &env->spe_status); | |
1701 | ||
1702 | return float32_to_int32(u.f, &env->spe_status); | |
1703 | } | |
1704 | ||
1705 | static inline uint32_t _do_efsctuf (uint32_t val) | |
1706 | { | |
1707 | union { | |
1708 | int32_t u; | |
1709 | float32 f; | |
1710 | } u; | |
1711 | float32 tmp; | |
1712 | ||
1713 | u.u = val; | |
1714 | /* NaN are not treated the same way IEEE 754 does */ | |
1715 | if (unlikely(isnan(u.f))) | |
1716 | return 0; | |
1717 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); | |
1718 | u.f = float32_mul(u.f, tmp, &env->spe_status); | |
1719 | ||
1720 | return float32_to_uint32(u.f, &env->spe_status); | |
1721 | } | |
1722 | ||
1723 | static inline int32_t _do_efsctsfz (uint32_t val) | |
1724 | { | |
1725 | union { | |
1726 | int32_t u; | |
1727 | float32 f; | |
1728 | } u; | |
1729 | float32 tmp; | |
1730 | ||
1731 | u.u = val; | |
1732 | /* NaN are not treated the same way IEEE 754 does */ | |
1733 | if (unlikely(isnan(u.f))) | |
1734 | return 0; | |
1735 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); | |
1736 | u.f = float32_mul(u.f, tmp, &env->spe_status); | |
1737 | ||
1738 | return float32_to_int32_round_to_zero(u.f, &env->spe_status); | |
1739 | } | |
1740 | ||
1741 | static inline uint32_t _do_efsctufz (uint32_t val) | |
1742 | { | |
1743 | union { | |
1744 | int32_t u; | |
1745 | float32 f; | |
1746 | } u; | |
1747 | float32 tmp; | |
1748 | ||
1749 | u.u = val; | |
1750 | /* NaN are not treated the same way IEEE 754 does */ | |
1751 | if (unlikely(isnan(u.f))) | |
1752 | return 0; | |
1753 | tmp = uint64_to_float32(1ULL << 32, &env->spe_status); | |
1754 | u.f = float32_mul(u.f, tmp, &env->spe_status); | |
1755 | ||
1756 | return float32_to_uint32_round_to_zero(u.f, &env->spe_status); | |
1757 | } | |
1758 | ||
1759 | void do_efscfsf (void) | |
1760 | { | |
1761 | T0_64 = _do_efscfsf(T0_64); | |
1762 | } | |
1763 | ||
1764 | void do_efscfuf (void) | |
1765 | { | |
1766 | T0_64 = _do_efscfuf(T0_64); | |
1767 | } | |
1768 | ||
1769 | void do_efsctsf (void) | |
1770 | { | |
1771 | T0_64 = _do_efsctsf(T0_64); | |
1772 | } | |
1773 | ||
1774 | void do_efsctuf (void) | |
1775 | { | |
1776 | T0_64 = _do_efsctuf(T0_64); | |
1777 | } | |
1778 | ||
1779 | void do_efsctsfz (void) | |
1780 | { | |
1781 | T0_64 = _do_efsctsfz(T0_64); | |
1782 | } | |
1783 | ||
1784 | void do_efsctufz (void) | |
1785 | { | |
1786 | T0_64 = _do_efsctufz(T0_64); | |
1787 | } | |
1788 | ||
1789 | /* Double precision floating point helpers */ | |
1790 | static inline int _do_efdcmplt (uint64_t op1, uint64_t op2) | |
1791 | { | |
1792 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
1793 | return _do_efdtstlt(op1, op2); | |
1794 | } | |
1795 | ||
1796 | static inline int _do_efdcmpgt (uint64_t op1, uint64_t op2) | |
1797 | { | |
1798 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
1799 | return _do_efdtstgt(op1, op2); | |
1800 | } | |
1801 | ||
1802 | static inline int _do_efdcmpeq (uint64_t op1, uint64_t op2) | |
1803 | { | |
1804 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
1805 | return _do_efdtsteq(op1, op2); | |
1806 | } | |
1807 | ||
1808 | void do_efdcmplt (void) | |
1809 | { | |
1810 | T0 = _do_efdcmplt(T0_64, T1_64); | |
1811 | } | |
1812 | ||
1813 | void do_efdcmpgt (void) | |
1814 | { | |
1815 | T0 = _do_efdcmpgt(T0_64, T1_64); | |
1816 | } | |
1817 | ||
1818 | void do_efdcmpeq (void) | |
1819 | { | |
1820 | T0 = _do_efdcmpeq(T0_64, T1_64); | |
1821 | } | |
1822 | ||
1823 | /* Double precision floating-point conversion to/from integer */ | |
1824 | static inline uint64_t _do_efdcfsi (int64_t val) | |
1825 | { | |
1826 | union { | |
1827 | uint64_t u; | |
1828 | float64 f; | |
1829 | } u; | |
1830 | ||
1831 | u.f = int64_to_float64(val, &env->spe_status); | |
1832 | ||
1833 | return u.u; | |
1834 | } | |
1835 | ||
1836 | static inline uint64_t _do_efdcfui (uint64_t val) | |
1837 | { | |
1838 | union { | |
1839 | uint64_t u; | |
1840 | float64 f; | |
1841 | } u; | |
1842 | ||
1843 | u.f = uint64_to_float64(val, &env->spe_status); | |
1844 | ||
1845 | return u.u; | |
1846 | } | |
1847 | ||
1848 | static inline int64_t _do_efdctsi (uint64_t val) | |
1849 | { | |
1850 | union { | |
1851 | int64_t u; | |
1852 | float64 f; | |
1853 | } u; | |
1854 | ||
1855 | u.u = val; | |
1856 | /* NaN are not treated the same way IEEE 754 does */ | |
1857 | if (unlikely(isnan(u.f))) | |
1858 | return 0; | |
1859 | ||
1860 | return float64_to_int64(u.f, &env->spe_status); | |
1861 | } | |
1862 | ||
1863 | static inline uint64_t _do_efdctui (uint64_t val) | |
1864 | { | |
1865 | union { | |
1866 | int64_t u; | |
1867 | float64 f; | |
1868 | } u; | |
1869 | ||
1870 | u.u = val; | |
1871 | /* NaN are not treated the same way IEEE 754 does */ | |
1872 | if (unlikely(isnan(u.f))) | |
1873 | return 0; | |
1874 | ||
1875 | return float64_to_uint64(u.f, &env->spe_status); | |
1876 | } | |
1877 | ||
1878 | static inline int64_t _do_efdctsiz (uint64_t val) | |
1879 | { | |
1880 | union { | |
1881 | int64_t u; | |
1882 | float64 f; | |
1883 | } u; | |
1884 | ||
1885 | u.u = val; | |
1886 | /* NaN are not treated the same way IEEE 754 does */ | |
1887 | if (unlikely(isnan(u.f))) | |
1888 | return 0; | |
1889 | ||
1890 | return float64_to_int64_round_to_zero(u.f, &env->spe_status); | |
1891 | } | |
1892 | ||
1893 | static inline uint64_t _do_efdctuiz (uint64_t val) | |
1894 | { | |
1895 | union { | |
1896 | int64_t u; | |
1897 | float64 f; | |
1898 | } u; | |
1899 | ||
1900 | u.u = val; | |
1901 | /* NaN are not treated the same way IEEE 754 does */ | |
1902 | if (unlikely(isnan(u.f))) | |
1903 | return 0; | |
1904 | ||
1905 | return float64_to_uint64_round_to_zero(u.f, &env->spe_status); | |
1906 | } | |
1907 | ||
1908 | void do_efdcfsi (void) | |
1909 | { | |
1910 | T0_64 = _do_efdcfsi(T0_64); | |
1911 | } | |
1912 | ||
1913 | void do_efdcfui (void) | |
1914 | { | |
1915 | T0_64 = _do_efdcfui(T0_64); | |
1916 | } | |
1917 | ||
1918 | void do_efdctsi (void) | |
1919 | { | |
1920 | T0_64 = _do_efdctsi(T0_64); | |
1921 | } | |
1922 | ||
1923 | void do_efdctui (void) | |
1924 | { | |
1925 | T0_64 = _do_efdctui(T0_64); | |
1926 | } | |
1927 | ||
1928 | void do_efdctsiz (void) | |
1929 | { | |
1930 | T0_64 = _do_efdctsiz(T0_64); | |
1931 | } | |
1932 | ||
1933 | void do_efdctuiz (void) | |
1934 | { | |
1935 | T0_64 = _do_efdctuiz(T0_64); | |
1936 | } | |
1937 | ||
1938 | /* Double precision floating-point conversion to/from fractional */ | |
1939 | static inline uint64_t _do_efdcfsf (int64_t val) | |
1940 | { | |
1941 | union { | |
1942 | uint64_t u; | |
1943 | float64 f; | |
1944 | } u; | |
1945 | float64 tmp; | |
1946 | ||
1947 | u.f = int32_to_float64(val, &env->spe_status); | |
1948 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); | |
1949 | u.f = float64_div(u.f, tmp, &env->spe_status); | |
1950 | ||
1951 | return u.u; | |
1952 | } | |
1953 | ||
1954 | static inline uint64_t _do_efdcfuf (uint64_t val) | |
1955 | { | |
1956 | union { | |
1957 | uint64_t u; | |
1958 | float64 f; | |
1959 | } u; | |
1960 | float64 tmp; | |
1961 | ||
1962 | u.f = uint32_to_float64(val, &env->spe_status); | |
1963 | tmp = int64_to_float64(1ULL << 32, &env->spe_status); | |
1964 | u.f = float64_div(u.f, tmp, &env->spe_status); | |
1965 | ||
1966 | return u.u; | |
1967 | } | |
1968 | ||
1969 | static inline int64_t _do_efdctsf (uint64_t val) | |
1970 | { | |
1971 | union { | |
1972 | int64_t u; | |
1973 | float64 f; | |
1974 | } u; | |
1975 | float64 tmp; | |
1976 | ||
1977 | u.u = val; | |
1978 | /* NaN are not treated the same way IEEE 754 does */ | |
1979 | if (unlikely(isnan(u.f))) | |
1980 | return 0; | |
1981 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); | |
1982 | u.f = float64_mul(u.f, tmp, &env->spe_status); | |
1983 | ||
1984 | return float64_to_int32(u.f, &env->spe_status); | |
1985 | } | |
1986 | ||
1987 | static inline uint64_t _do_efdctuf (uint64_t val) | |
1988 | { | |
1989 | union { | |
1990 | int64_t u; | |
1991 | float64 f; | |
1992 | } u; | |
1993 | float64 tmp; | |
1994 | ||
1995 | u.u = val; | |
1996 | /* NaN are not treated the same way IEEE 754 does */ | |
1997 | if (unlikely(isnan(u.f))) | |
1998 | return 0; | |
1999 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); | |
2000 | u.f = float64_mul(u.f, tmp, &env->spe_status); | |
2001 | ||
2002 | return float64_to_uint32(u.f, &env->spe_status); | |
2003 | } | |
2004 | ||
2005 | static inline int64_t _do_efdctsfz (uint64_t val) | |
2006 | { | |
2007 | union { | |
2008 | int64_t u; | |
2009 | float64 f; | |
2010 | } u; | |
2011 | float64 tmp; | |
2012 | ||
2013 | u.u = val; | |
2014 | /* NaN are not treated the same way IEEE 754 does */ | |
2015 | if (unlikely(isnan(u.f))) | |
2016 | return 0; | |
2017 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); | |
2018 | u.f = float64_mul(u.f, tmp, &env->spe_status); | |
2019 | ||
2020 | return float64_to_int32_round_to_zero(u.f, &env->spe_status); | |
2021 | } | |
2022 | ||
2023 | static inline uint64_t _do_efdctufz (uint64_t val) | |
2024 | { | |
2025 | union { | |
2026 | int64_t u; | |
2027 | float64 f; | |
2028 | } u; | |
2029 | float64 tmp; | |
2030 | ||
2031 | u.u = val; | |
2032 | /* NaN are not treated the same way IEEE 754 does */ | |
2033 | if (unlikely(isnan(u.f))) | |
2034 | return 0; | |
2035 | tmp = uint64_to_float64(1ULL << 32, &env->spe_status); | |
2036 | u.f = float64_mul(u.f, tmp, &env->spe_status); | |
2037 | ||
2038 | return float64_to_uint32_round_to_zero(u.f, &env->spe_status); | |
2039 | } | |
2040 | ||
2041 | void do_efdcfsf (void) | |
2042 | { | |
2043 | T0_64 = _do_efdcfsf(T0_64); | |
2044 | } | |
2045 | ||
2046 | void do_efdcfuf (void) | |
2047 | { | |
2048 | T0_64 = _do_efdcfuf(T0_64); | |
2049 | } | |
2050 | ||
2051 | void do_efdctsf (void) | |
2052 | { | |
2053 | T0_64 = _do_efdctsf(T0_64); | |
2054 | } | |
2055 | ||
2056 | void do_efdctuf (void) | |
2057 | { | |
2058 | T0_64 = _do_efdctuf(T0_64); | |
2059 | } | |
2060 | ||
2061 | void do_efdctsfz (void) | |
2062 | { | |
2063 | T0_64 = _do_efdctsfz(T0_64); | |
2064 | } | |
2065 | ||
2066 | void do_efdctufz (void) | |
2067 | { | |
2068 | T0_64 = _do_efdctufz(T0_64); | |
2069 | } | |
2070 | ||
2071 | /* Floating point conversion between single and double precision */ | |
2072 | static inline uint32_t _do_efscfd (uint64_t val) | |
2073 | { | |
2074 | union { | |
2075 | uint64_t u; | |
2076 | float64 f; | |
2077 | } u1; | |
2078 | union { | |
2079 | uint32_t u; | |
2080 | float32 f; | |
2081 | } u2; | |
2082 | ||
2083 | u1.u = val; | |
2084 | u2.f = float64_to_float32(u1.f, &env->spe_status); | |
2085 | ||
2086 | return u2.u; | |
2087 | } | |
2088 | ||
2089 | static inline uint64_t _do_efdcfs (uint32_t val) | |
2090 | { | |
2091 | union { | |
2092 | uint64_t u; | |
2093 | float64 f; | |
2094 | } u2; | |
2095 | union { | |
2096 | uint32_t u; | |
2097 | float32 f; | |
2098 | } u1; | |
2099 | ||
2100 | u1.u = val; | |
2101 | u2.f = float32_to_float64(u1.f, &env->spe_status); | |
2102 | ||
2103 | return u2.u; | |
2104 | } | |
2105 | ||
2106 | void do_efscfd (void) | |
2107 | { | |
2108 | T0_64 = _do_efscfd(T0_64); | |
2109 | } | |
2110 | ||
2111 | void do_efdcfs (void) | |
2112 | { | |
2113 | T0_64 = _do_efdcfs(T0_64); | |
2114 | } | |
2115 | ||
2116 | /* Single precision fixed-point vector arithmetic */ | |
2117 | /* evfsabs */ | |
2118 | DO_SPE_OP1(fsabs); | |
2119 | /* evfsnabs */ | |
2120 | DO_SPE_OP1(fsnabs); | |
2121 | /* evfsneg */ | |
2122 | DO_SPE_OP1(fsneg); | |
2123 | /* evfsadd */ | |
2124 | DO_SPE_OP2(fsadd); | |
2125 | /* evfssub */ | |
2126 | DO_SPE_OP2(fssub); | |
2127 | /* evfsmul */ | |
2128 | DO_SPE_OP2(fsmul); | |
2129 | /* evfsdiv */ | |
2130 | DO_SPE_OP2(fsdiv); | |
2131 | ||
2132 | /* Single-precision floating-point comparisons */ | |
2133 | static inline int _do_efscmplt (uint32_t op1, uint32_t op2) | |
2134 | { | |
2135 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
2136 | return _do_efststlt(op1, op2); | |
2137 | } | |
2138 | ||
2139 | static inline int _do_efscmpgt (uint32_t op1, uint32_t op2) | |
2140 | { | |
2141 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
2142 | return _do_efststgt(op1, op2); | |
2143 | } | |
2144 | ||
2145 | static inline int _do_efscmpeq (uint32_t op1, uint32_t op2) | |
2146 | { | |
2147 | /* XXX: TODO: test special values (NaN, infinites, ...) */ | |
2148 | return _do_efststeq(op1, op2); | |
2149 | } | |
2150 | ||
2151 | void do_efscmplt (void) | |
2152 | { | |
2153 | T0 = _do_efscmplt(T0_64, T1_64); | |
2154 | } | |
2155 | ||
2156 | void do_efscmpgt (void) | |
2157 | { | |
2158 | T0 = _do_efscmpgt(T0_64, T1_64); | |
2159 | } | |
2160 | ||
2161 | void do_efscmpeq (void) | |
2162 | { | |
2163 | T0 = _do_efscmpeq(T0_64, T1_64); | |
2164 | } | |
2165 | ||
2166 | /* Single-precision floating-point vector comparisons */ | |
2167 | /* evfscmplt */ | |
2168 | DO_SPE_CMP(fscmplt); | |
2169 | /* evfscmpgt */ | |
2170 | DO_SPE_CMP(fscmpgt); | |
2171 | /* evfscmpeq */ | |
2172 | DO_SPE_CMP(fscmpeq); | |
2173 | /* evfststlt */ | |
2174 | DO_SPE_CMP(fststlt); | |
2175 | /* evfststgt */ | |
2176 | DO_SPE_CMP(fststgt); | |
2177 | /* evfststeq */ | |
2178 | DO_SPE_CMP(fststeq); | |
2179 | ||
2180 | /* Single-precision floating-point vector conversions */ | |
2181 | /* evfscfsi */ | |
2182 | DO_SPE_OP1(fscfsi); | |
2183 | /* evfscfui */ | |
2184 | DO_SPE_OP1(fscfui); | |
2185 | /* evfscfuf */ | |
2186 | DO_SPE_OP1(fscfuf); | |
2187 | /* evfscfsf */ | |
2188 | DO_SPE_OP1(fscfsf); | |
2189 | /* evfsctsi */ | |
2190 | DO_SPE_OP1(fsctsi); | |
2191 | /* evfsctui */ | |
2192 | DO_SPE_OP1(fsctui); | |
2193 | /* evfsctsiz */ | |
2194 | DO_SPE_OP1(fsctsiz); | |
2195 | /* evfsctuiz */ | |
2196 | DO_SPE_OP1(fsctuiz); | |
2197 | /* evfsctsf */ | |
2198 | DO_SPE_OP1(fsctsf); | |
2199 | /* evfsctuf */ | |
2200 | DO_SPE_OP1(fsctuf); | |
35cdaad6 | 2201 | #endif /* defined(TARGET_PPCEMB) */ |
0487d6a8 | 2202 | |
fdabc366 FB |
2203 | /*****************************************************************************/ |
2204 | /* Softmmu support */ | |
2205 | #if !defined (CONFIG_USER_ONLY) | |
2206 | ||
2207 | #define MMUSUFFIX _mmu | |
2208 | #define GETPC() (__builtin_return_address(0)) | |
2209 | ||
2210 | #define SHIFT 0 | |
2211 | #include "softmmu_template.h" | |
2212 | ||
2213 | #define SHIFT 1 | |
2214 | #include "softmmu_template.h" | |
2215 | ||
2216 | #define SHIFT 2 | |
2217 | #include "softmmu_template.h" | |
2218 | ||
2219 | #define SHIFT 3 | |
2220 | #include "softmmu_template.h" | |
2221 | ||
2222 | /* try to fill the TLB and return an exception if error. If retaddr is | |
2223 | NULL, it means that the function was called in C code (i.e. not | |
2224 | from generated code or from helper.c) */ | |
2225 | /* XXX: fix it to restore all registers */ | |
2226 | void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr) | |
2227 | { | |
2228 | TranslationBlock *tb; | |
2229 | CPUState *saved_env; | |
2230 | target_phys_addr_t pc; | |
2231 | int ret; | |
2232 | ||
2233 | /* XXX: hack to restore env in all cases, even if not called from | |
2234 | generated code */ | |
2235 | saved_env = env; | |
2236 | env = cpu_single_env; | |
2237 | ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1); | |
76a66253 | 2238 | if (unlikely(ret != 0)) { |
fdabc366 FB |
2239 | if (likely(retaddr)) { |
2240 | /* now we have a real cpu fault */ | |
2241 | pc = (target_phys_addr_t)retaddr; | |
2242 | tb = tb_find_pc(pc); | |
2243 | if (likely(tb)) { | |
2244 | /* the PC is inside the translated code. It means that we have | |
2245 | a virtual CPU fault */ | |
2246 | cpu_restore_state(tb, env, pc, NULL); | |
76a66253 | 2247 | } |
fdabc366 FB |
2248 | } |
2249 | do_raise_exception_err(env->exception_index, env->error_code); | |
2250 | } | |
2251 | env = saved_env; | |
9a64fbe4 FB |
2252 | } |
2253 | ||
76a66253 JM |
2254 | /* TLB invalidation helpers */ |
2255 | void do_tlbia (void) | |
2256 | { | |
0a032cbe | 2257 | ppc_tlb_invalidate_all(env); |
76a66253 JM |
2258 | } |
2259 | ||
2260 | void do_tlbie (void) | |
2261 | { | |
d9bce9d9 | 2262 | T0 = (uint32_t)T0; |
76a66253 JM |
2263 | #if !defined(FLUSH_ALL_TLBS) |
2264 | if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) { | |
2265 | ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0); | |
2266 | if (env->id_tlbs == 1) | |
2267 | ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1); | |
2268 | } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { | |
2269 | /* XXX: TODO */ | |
2270 | #if 0 | |
2271 | ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, | |
2272 | env->spr[SPR_BOOKE_PID]); | |
2273 | #endif | |
2274 | } else { | |
2275 | /* tlbie invalidate TLBs for all segments */ | |
2276 | T0 &= TARGET_PAGE_MASK; | |
2277 | T0 &= ~((target_ulong)-1 << 28); | |
2278 | /* XXX: this case should be optimized, | |
2279 | * giving a mask to tlb_flush_page | |
2280 | */ | |
2281 | tlb_flush_page(env, T0 | (0x0 << 28)); | |
2282 | tlb_flush_page(env, T0 | (0x1 << 28)); | |
2283 | tlb_flush_page(env, T0 | (0x2 << 28)); | |
2284 | tlb_flush_page(env, T0 | (0x3 << 28)); | |
2285 | tlb_flush_page(env, T0 | (0x4 << 28)); | |
2286 | tlb_flush_page(env, T0 | (0x5 << 28)); | |
2287 | tlb_flush_page(env, T0 | (0x6 << 28)); | |
2288 | tlb_flush_page(env, T0 | (0x7 << 28)); | |
2289 | tlb_flush_page(env, T0 | (0x8 << 28)); | |
2290 | tlb_flush_page(env, T0 | (0x9 << 28)); | |
2291 | tlb_flush_page(env, T0 | (0xA << 28)); | |
2292 | tlb_flush_page(env, T0 | (0xB << 28)); | |
2293 | tlb_flush_page(env, T0 | (0xC << 28)); | |
2294 | tlb_flush_page(env, T0 | (0xD << 28)); | |
2295 | tlb_flush_page(env, T0 | (0xE << 28)); | |
2296 | tlb_flush_page(env, T0 | (0xF << 28)); | |
2297 | } | |
2298 | #else | |
2299 | do_tlbia(); | |
2300 | #endif | |
2301 | } | |
2302 | ||
d9bce9d9 JM |
2303 | #if defined(TARGET_PPC64) |
2304 | void do_tlbie_64 (void) | |
2305 | { | |
2306 | T0 = (uint64_t)T0; | |
2307 | #if !defined(FLUSH_ALL_TLBS) | |
2308 | if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) { | |
2309 | ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0); | |
2310 | if (env->id_tlbs == 1) | |
2311 | ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1); | |
2312 | } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { | |
2313 | /* XXX: TODO */ | |
2314 | #if 0 | |
2315 | ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, | |
2316 | env->spr[SPR_BOOKE_PID]); | |
2317 | #endif | |
2318 | } else { | |
2319 | /* tlbie invalidate TLBs for all segments | |
2320 | * As we have 2^36 segments, invalidate all qemu TLBs | |
2321 | */ | |
2322 | #if 0 | |
2323 | T0 &= TARGET_PAGE_MASK; | |
2324 | T0 &= ~((target_ulong)-1 << 28); | |
2325 | /* XXX: this case should be optimized, | |
2326 | * giving a mask to tlb_flush_page | |
2327 | */ | |
2328 | tlb_flush_page(env, T0 | (0x0 << 28)); | |
2329 | tlb_flush_page(env, T0 | (0x1 << 28)); | |
2330 | tlb_flush_page(env, T0 | (0x2 << 28)); | |
2331 | tlb_flush_page(env, T0 | (0x3 << 28)); | |
2332 | tlb_flush_page(env, T0 | (0x4 << 28)); | |
2333 | tlb_flush_page(env, T0 | (0x5 << 28)); | |
2334 | tlb_flush_page(env, T0 | (0x6 << 28)); | |
2335 | tlb_flush_page(env, T0 | (0x7 << 28)); | |
2336 | tlb_flush_page(env, T0 | (0x8 << 28)); | |
2337 | tlb_flush_page(env, T0 | (0x9 << 28)); | |
2338 | tlb_flush_page(env, T0 | (0xA << 28)); | |
2339 | tlb_flush_page(env, T0 | (0xB << 28)); | |
2340 | tlb_flush_page(env, T0 | (0xC << 28)); | |
2341 | tlb_flush_page(env, T0 | (0xD << 28)); | |
2342 | tlb_flush_page(env, T0 | (0xE << 28)); | |
2343 | tlb_flush_page(env, T0 | (0xF << 28)); | |
2344 | #else | |
2345 | tlb_flush(env, 1); | |
2346 | #endif | |
2347 | } | |
2348 | #else | |
2349 | do_tlbia(); | |
2350 | #endif | |
2351 | } | |
2352 | #endif | |
2353 | ||
2354 | #if defined(TARGET_PPC64) | |
2355 | void do_slbia (void) | |
2356 | { | |
2357 | /* XXX: TODO */ | |
2358 | tlb_flush(env, 1); | |
2359 | } | |
2360 | ||
2361 | void do_slbie (void) | |
2362 | { | |
2363 | /* XXX: TODO */ | |
2364 | tlb_flush(env, 1); | |
2365 | } | |
2366 | #endif | |
2367 | ||
76a66253 JM |
2368 | /* Software driven TLBs management */ |
2369 | /* PowerPC 602/603 software TLB load instructions helpers */ | |
2370 | void do_load_6xx_tlb (int is_code) | |
2371 | { | |
2372 | target_ulong RPN, CMP, EPN; | |
2373 | int way; | |
d9bce9d9 | 2374 | |
76a66253 JM |
2375 | RPN = env->spr[SPR_RPA]; |
2376 | if (is_code) { | |
2377 | CMP = env->spr[SPR_ICMP]; | |
2378 | EPN = env->spr[SPR_IMISS]; | |
2379 | } else { | |
2380 | CMP = env->spr[SPR_DCMP]; | |
2381 | EPN = env->spr[SPR_DMISS]; | |
2382 | } | |
2383 | way = (env->spr[SPR_SRR1] >> 17) & 1; | |
2384 | #if defined (DEBUG_SOFTWARE_TLB) | |
2385 | if (loglevel != 0) { | |
2386 | fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n", | |
2387 | __func__, (unsigned long)T0, (unsigned long)EPN, | |
2388 | (unsigned long)CMP, (unsigned long)RPN, way); | |
2389 | } | |
2390 | #endif | |
2391 | /* Store this TLB */ | |
d9bce9d9 JM |
2392 | ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2393 | way, is_code, CMP, RPN); | |
76a66253 JM |
2394 | } |
2395 | ||
a8dea12f JM |
2396 | static target_ulong booke_tlb_to_page_size (int size) |
2397 | { | |
2398 | return 1024 << (2 * size); | |
2399 | } | |
2400 | ||
2401 | static int booke_page_size_to_tlb (target_ulong page_size) | |
2402 | { | |
2403 | int size; | |
2404 | ||
2405 | switch (page_size) { | |
2406 | case 0x00000400UL: | |
2407 | size = 0x0; | |
2408 | break; | |
2409 | case 0x00001000UL: | |
2410 | size = 0x1; | |
2411 | break; | |
2412 | case 0x00004000UL: | |
2413 | size = 0x2; | |
2414 | break; | |
2415 | case 0x00010000UL: | |
2416 | size = 0x3; | |
2417 | break; | |
2418 | case 0x00040000UL: | |
2419 | size = 0x4; | |
2420 | break; | |
2421 | case 0x00100000UL: | |
2422 | size = 0x5; | |
2423 | break; | |
2424 | case 0x00400000UL: | |
2425 | size = 0x6; | |
2426 | break; | |
2427 | case 0x01000000UL: | |
2428 | size = 0x7; | |
2429 | break; | |
2430 | case 0x04000000UL: | |
2431 | size = 0x8; | |
2432 | break; | |
2433 | case 0x10000000UL: | |
2434 | size = 0x9; | |
2435 | break; | |
2436 | case 0x40000000UL: | |
2437 | size = 0xA; | |
2438 | break; | |
2439 | #if defined (TARGET_PPC64) | |
2440 | case 0x000100000000ULL: | |
2441 | size = 0xB; | |
2442 | break; | |
2443 | case 0x000400000000ULL: | |
2444 | size = 0xC; | |
2445 | break; | |
2446 | case 0x001000000000ULL: | |
2447 | size = 0xD; | |
2448 | break; | |
2449 | case 0x004000000000ULL: | |
2450 | size = 0xE; | |
2451 | break; | |
2452 | case 0x010000000000ULL: | |
2453 | size = 0xF; | |
2454 | break; | |
2455 | #endif | |
2456 | default: | |
2457 | size = -1; | |
2458 | break; | |
2459 | } | |
2460 | ||
2461 | return size; | |
2462 | } | |
2463 | ||
76a66253 | 2464 | /* Helpers for 4xx TLB management */ |
76a66253 JM |
2465 | void do_4xx_tlbre_lo (void) |
2466 | { | |
a8dea12f JM |
2467 | ppcemb_tlb_t *tlb; |
2468 | int size; | |
76a66253 JM |
2469 | |
2470 | T0 &= 0x3F; | |
a8dea12f JM |
2471 | tlb = &env->tlb[T0].tlbe; |
2472 | T0 = tlb->EPN; | |
2473 | if (tlb->prot & PAGE_VALID) | |
2474 | T0 |= 0x400; | |
2475 | size = booke_page_size_to_tlb(tlb->size); | |
2476 | if (size < 0 || size > 0x7) | |
2477 | size = 1; | |
2478 | T0 |= size << 7; | |
2479 | env->spr[SPR_40x_PID] = tlb->PID; | |
76a66253 JM |
2480 | } |
2481 | ||
2482 | void do_4xx_tlbre_hi (void) | |
2483 | { | |
a8dea12f | 2484 | ppcemb_tlb_t *tlb; |
76a66253 JM |
2485 | |
2486 | T0 &= 0x3F; | |
a8dea12f JM |
2487 | tlb = &env->tlb[T0].tlbe; |
2488 | T0 = tlb->RPN; | |
2489 | if (tlb->prot & PAGE_EXEC) | |
2490 | T0 |= 0x200; | |
2491 | if (tlb->prot & PAGE_WRITE) | |
2492 | T0 |= 0x100; | |
76a66253 JM |
2493 | } |
2494 | ||
76a66253 JM |
2495 | void do_4xx_tlbsx (void) |
2496 | { | |
36081602 | 2497 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2498 | } |
2499 | ||
2500 | void do_4xx_tlbsx_ (void) | |
2501 | { | |
966439a6 | 2502 | int tmp = xer_so; |
76a66253 | 2503 | |
36081602 | 2504 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2505 | if (T0 != -1) |
2506 | tmp |= 0x02; | |
2507 | env->crf[0] = tmp; | |
2508 | } | |
2509 | ||
c55e9aef | 2510 | void do_4xx_tlbwe_hi (void) |
76a66253 | 2511 | { |
a8dea12f | 2512 | ppcemb_tlb_t *tlb; |
76a66253 JM |
2513 | target_ulong page, end; |
2514 | ||
c55e9aef | 2515 | #if defined (DEBUG_SOFTWARE_TLB) |
6b80055d | 2516 | if (loglevel != 0) { |
c55e9aef JM |
2517 | fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2518 | } | |
2519 | #endif | |
76a66253 | 2520 | T0 &= 0x3F; |
a8dea12f | 2521 | tlb = &env->tlb[T0].tlbe; |
76a66253 JM |
2522 | /* Invalidate previous TLB (if it's valid) */ |
2523 | if (tlb->prot & PAGE_VALID) { | |
2524 | end = tlb->EPN + tlb->size; | |
c55e9aef | 2525 | #if defined (DEBUG_SOFTWARE_TLB) |
6b80055d | 2526 | if (loglevel != 0) { |
c55e9aef JM |
2527 | fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX |
2528 | " end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); | |
2529 | } | |
2530 | #endif | |
76a66253 JM |
2531 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
2532 | tlb_flush_page(env, page); | |
2533 | } | |
a8dea12f | 2534 | tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7); |
c294fc58 JM |
2535 | /* We cannot handle TLB size < TARGET_PAGE_SIZE. |
2536 | * If this ever occurs, one should use the ppcemb target instead | |
2537 | * of the ppc or ppc64 one | |
2538 | */ | |
2539 | if ((T1 & 0x40) && tlb->size < TARGET_PAGE_SIZE) { | |
71c8b8fd JM |
2540 | cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
2541 | "are not supported (%d)\n", | |
c294fc58 JM |
2542 | tlb->size, TARGET_PAGE_SIZE, (int)((T1 >> 7) & 0x7)); |
2543 | } | |
76a66253 | 2544 | tlb->EPN = (T1 & 0xFFFFFC00) & ~(tlb->size - 1); |
c55e9aef | 2545 | if (T1 & 0x40) |
76a66253 JM |
2546 | tlb->prot |= PAGE_VALID; |
2547 | else | |
2548 | tlb->prot &= ~PAGE_VALID; | |
c294fc58 JM |
2549 | if (T1 & 0x20) { |
2550 | /* XXX: TO BE FIXED */ | |
2551 | cpu_abort(env, "Little-endian TLB entries are not supported by now\n"); | |
2552 | } | |
c55e9aef | 2553 | tlb->PID = env->spr[SPR_40x_PID]; /* PID */ |
a8dea12f | 2554 | tlb->attr = T1 & 0xFF; |
c55e9aef | 2555 | #if defined (DEBUG_SOFTWARE_TLB) |
c294fc58 JM |
2556 | if (loglevel != 0) { |
2557 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX | |
c55e9aef | 2558 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
5fafdf24 | 2559 | (int)T0, tlb->RPN, tlb->EPN, tlb->size, |
c55e9aef JM |
2560 | tlb->prot & PAGE_READ ? 'r' : '-', |
2561 | tlb->prot & PAGE_WRITE ? 'w' : '-', | |
2562 | tlb->prot & PAGE_EXEC ? 'x' : '-', | |
2563 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); | |
2564 | } | |
2565 | #endif | |
76a66253 JM |
2566 | /* Invalidate new TLB (if valid) */ |
2567 | if (tlb->prot & PAGE_VALID) { | |
2568 | end = tlb->EPN + tlb->size; | |
c55e9aef | 2569 | #if defined (DEBUG_SOFTWARE_TLB) |
6b80055d | 2570 | if (loglevel != 0) { |
c55e9aef JM |
2571 | fprintf(logfile, "%s: invalidate TLB %d start " ADDRX |
2572 | " end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); | |
2573 | } | |
2574 | #endif | |
76a66253 JM |
2575 | for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) |
2576 | tlb_flush_page(env, page); | |
2577 | } | |
76a66253 JM |
2578 | } |
2579 | ||
c55e9aef | 2580 | void do_4xx_tlbwe_lo (void) |
76a66253 | 2581 | { |
a8dea12f | 2582 | ppcemb_tlb_t *tlb; |
76a66253 | 2583 | |
c55e9aef | 2584 | #if defined (DEBUG_SOFTWARE_TLB) |
6b80055d | 2585 | if (loglevel != 0) { |
c55e9aef JM |
2586 | fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2587 | } | |
2588 | #endif | |
76a66253 | 2589 | T0 &= 0x3F; |
a8dea12f | 2590 | tlb = &env->tlb[T0].tlbe; |
76a66253 JM |
2591 | tlb->RPN = T1 & 0xFFFFFC00; |
2592 | tlb->prot = PAGE_READ; | |
2593 | if (T1 & 0x200) | |
2594 | tlb->prot |= PAGE_EXEC; | |
2595 | if (T1 & 0x100) | |
2596 | tlb->prot |= PAGE_WRITE; | |
c55e9aef | 2597 | #if defined (DEBUG_SOFTWARE_TLB) |
6b80055d JM |
2598 | if (loglevel != 0) { |
2599 | fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX | |
c55e9aef | 2600 | " size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
5fafdf24 | 2601 | (int)T0, tlb->RPN, tlb->EPN, tlb->size, |
c55e9aef JM |
2602 | tlb->prot & PAGE_READ ? 'r' : '-', |
2603 | tlb->prot & PAGE_WRITE ? 'w' : '-', | |
2604 | tlb->prot & PAGE_EXEC ? 'x' : '-', | |
2605 | tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); | |
2606 | } | |
2607 | #endif | |
76a66253 | 2608 | } |
5eb7995e JM |
2609 | |
2610 | /* BookE TLB management */ | |
2611 | void do_booke_tlbwe0 (void) | |
2612 | { | |
2613 | ppcemb_tlb_t *tlb; | |
2614 | target_ulong EPN, size; | |
2615 | int do_flush_tlbs; | |
2616 | ||
2617 | #if defined (DEBUG_SOFTWARE_TLB) | |
2618 | if (loglevel != 0) { | |
2619 | fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); | |
2620 | } | |
2621 | #endif | |
2622 | do_flush_tlbs = 0; | |
2623 | T0 &= 0x3F; | |
2624 | tlb = &env->tlb[T0].tlbe; | |
2625 | EPN = T1 & 0xFFFFFC00; | |
2626 | if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) | |
2627 | do_flush_tlbs = 1; | |
2628 | tlb->EPN = EPN; | |
2629 | size = booke_tlb_to_page_size((T1 >> 4) & 0xF); | |
2630 | if ((tlb->prot & PAGE_VALID) && tlb->size < size) | |
2631 | do_flush_tlbs = 1; | |
2632 | tlb->size = size; | |
2633 | tlb->attr &= ~0x1; | |
2634 | tlb->attr |= (T1 >> 8) & 1; | |
2635 | if (T1 & 0x200) { | |
2636 | tlb->prot |= PAGE_VALID; | |
2637 | } else { | |
2638 | if (tlb->prot & PAGE_VALID) { | |
2639 | tlb->prot &= ~PAGE_VALID; | |
2640 | do_flush_tlbs = 1; | |
2641 | } | |
2642 | } | |
2643 | tlb->PID = env->spr[SPR_BOOKE_PID]; | |
2644 | if (do_flush_tlbs) | |
2645 | tlb_flush(env, 1); | |
2646 | } | |
2647 | ||
2648 | void do_booke_tlbwe1 (void) | |
2649 | { | |
2650 | ppcemb_tlb_t *tlb; | |
2651 | target_phys_addr_t RPN; | |
2652 | ||
2653 | #if defined (DEBUG_SOFTWARE_TLB) | |
2654 | if (loglevel != 0) { | |
2655 | fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); | |
2656 | } | |
2657 | #endif | |
2658 | T0 &= 0x3F; | |
2659 | tlb = &env->tlb[T0].tlbe; | |
2660 | RPN = T1 & 0xFFFFFC0F; | |
2661 | if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) | |
2662 | tlb_flush(env, 1); | |
2663 | tlb->RPN = RPN; | |
2664 | } | |
2665 | ||
2666 | void do_booke_tlbwe2 (void) | |
2667 | { | |
2668 | ppcemb_tlb_t *tlb; | |
2669 | ||
2670 | #if defined (DEBUG_SOFTWARE_TLB) | |
2671 | if (loglevel != 0) { | |
2672 | fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); | |
2673 | } | |
2674 | #endif | |
2675 | T0 &= 0x3F; | |
2676 | tlb = &env->tlb[T0].tlbe; | |
2677 | tlb->attr = (tlb->attr & 0x1) | (T1 & 0x0000FF00); | |
2678 | tlb->prot = tlb->prot & PAGE_VALID; | |
2679 | if (T1 & 0x1) | |
2680 | tlb->prot |= PAGE_READ << 4; | |
2681 | if (T1 & 0x2) | |
2682 | tlb->prot |= PAGE_WRITE << 4; | |
2683 | if (T1 & 0x4) | |
2684 | tlb->prot |= PAGE_EXEC << 4; | |
2685 | if (T1 & 0x8) | |
2686 | tlb->prot |= PAGE_READ; | |
2687 | if (T1 & 0x10) | |
2688 | tlb->prot |= PAGE_WRITE; | |
2689 | if (T1 & 0x20) | |
2690 | tlb->prot |= PAGE_EXEC; | |
2691 | } | |
2692 | ||
2693 | void do_booke_tlbsx (void) | |
2694 | { | |
2695 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR]); | |
2696 | } | |
2697 | ||
2698 | void do_booke_tlbsx_ (void) | |
2699 | { | |
2700 | int tmp = xer_so; | |
2701 | ||
2702 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR]); | |
2703 | if (T0 != -1) | |
2704 | tmp |= 0x02; | |
2705 | env->crf[0] = tmp; | |
2706 | } | |
2707 | ||
2708 | void do_booke_tlbre0 (void) | |
2709 | { | |
2710 | ppcemb_tlb_t *tlb; | |
2711 | int size; | |
2712 | ||
2713 | T0 &= 0x3F; | |
2714 | tlb = &env->tlb[T0].tlbe; | |
2715 | T0 = tlb->EPN; | |
2716 | size = booke_page_size_to_tlb(tlb->size); | |
2717 | if (size < 0 || size > 0xF) | |
2718 | size = 1; | |
2719 | T0 |= size << 4; | |
2720 | if (tlb->attr & 0x1) | |
2721 | T0 |= 0x100; | |
2722 | if (tlb->prot & PAGE_VALID) | |
2723 | T0 |= 0x200; | |
2724 | env->spr[SPR_BOOKE_PID] = tlb->PID; | |
2725 | } | |
2726 | ||
2727 | void do_booke_tlbre1 (void) | |
2728 | { | |
2729 | ppcemb_tlb_t *tlb; | |
2730 | ||
2731 | T0 &= 0x3F; | |
2732 | tlb = &env->tlb[T0].tlbe; | |
2733 | T0 = tlb->RPN; | |
2734 | } | |
2735 | ||
2736 | void do_booke_tlbre2 (void) | |
2737 | { | |
2738 | ppcemb_tlb_t *tlb; | |
2739 | ||
2740 | T0 &= 0x3F; | |
2741 | tlb = &env->tlb[T0].tlbe; | |
2742 | T0 = tlb->attr & ~0x1; | |
2743 | if (tlb->prot & (PAGE_READ << 4)) | |
2744 | T0 |= 0x1; | |
2745 | if (tlb->prot & (PAGE_WRITE << 4)) | |
2746 | T0 |= 0x2; | |
2747 | if (tlb->prot & (PAGE_EXEC << 4)) | |
2748 | T0 |= 0x4; | |
2749 | if (tlb->prot & PAGE_READ) | |
2750 | T0 |= 0x8; | |
2751 | if (tlb->prot & PAGE_WRITE) | |
2752 | T0 |= 0x10; | |
2753 | if (tlb->prot & PAGE_EXEC) | |
2754 | T0 |= 0x20; | |
2755 | } | |
76a66253 | 2756 | #endif /* !CONFIG_USER_ONLY */ |