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Commit | Line | Data |
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a78b0504 BS |
1 | /* |
2 | * S/390 condition code helper routines | |
3 | * | |
4 | * Copyright (c) 2009 Ulrich Hecht | |
5 | * Copyright (c) 2009 Alexander Graf | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
9615495a | 21 | #include "qemu/osdep.h" |
a78b0504 | 22 | #include "cpu.h" |
2ef6175a | 23 | #include "exec/helper-proto.h" |
00d2dc19 | 24 | #include "qemu/host-utils.h" |
a78b0504 BS |
25 | |
26 | /* #define DEBUG_HELPER */ | |
27 | #ifdef DEBUG_HELPER | |
28 | #define HELPER_LOG(x...) qemu_log(x) | |
29 | #else | |
30 | #define HELPER_LOG(x...) | |
31 | #endif | |
32 | ||
443aaeb8 | 33 | static uint32_t cc_calc_ltgt_32(int32_t src, int32_t dst) |
a78b0504 BS |
34 | { |
35 | if (src == dst) { | |
36 | return 0; | |
37 | } else if (src < dst) { | |
38 | return 1; | |
39 | } else { | |
40 | return 2; | |
41 | } | |
42 | } | |
43 | ||
443aaeb8 | 44 | static uint32_t cc_calc_ltgt0_32(int32_t dst) |
a78b0504 | 45 | { |
443aaeb8 | 46 | return cc_calc_ltgt_32(dst, 0); |
a78b0504 BS |
47 | } |
48 | ||
443aaeb8 | 49 | static uint32_t cc_calc_ltgt_64(int64_t src, int64_t dst) |
a78b0504 BS |
50 | { |
51 | if (src == dst) { | |
52 | return 0; | |
53 | } else if (src < dst) { | |
54 | return 1; | |
55 | } else { | |
56 | return 2; | |
57 | } | |
58 | } | |
59 | ||
443aaeb8 | 60 | static uint32_t cc_calc_ltgt0_64(int64_t dst) |
a78b0504 | 61 | { |
443aaeb8 | 62 | return cc_calc_ltgt_64(dst, 0); |
a78b0504 BS |
63 | } |
64 | ||
443aaeb8 | 65 | static uint32_t cc_calc_ltugtu_32(uint32_t src, uint32_t dst) |
a78b0504 BS |
66 | { |
67 | if (src == dst) { | |
68 | return 0; | |
69 | } else if (src < dst) { | |
70 | return 1; | |
71 | } else { | |
72 | return 2; | |
73 | } | |
74 | } | |
75 | ||
443aaeb8 | 76 | static uint32_t cc_calc_ltugtu_64(uint64_t src, uint64_t dst) |
a78b0504 BS |
77 | { |
78 | if (src == dst) { | |
79 | return 0; | |
80 | } else if (src < dst) { | |
81 | return 1; | |
82 | } else { | |
83 | return 2; | |
84 | } | |
85 | } | |
86 | ||
443aaeb8 | 87 | static uint32_t cc_calc_tm_32(uint32_t val, uint32_t mask) |
a78b0504 | 88 | { |
00d2dc19 | 89 | uint32_t r = val & mask; |
a78b0504 | 90 | |
00d2dc19 | 91 | if (r == 0) { |
a78b0504 BS |
92 | return 0; |
93 | } else if (r == mask) { | |
94 | return 3; | |
95 | } else { | |
96 | return 1; | |
97 | } | |
98 | } | |
99 | ||
443aaeb8 | 100 | static uint32_t cc_calc_tm_64(uint64_t val, uint64_t mask) |
a78b0504 | 101 | { |
00d2dc19 | 102 | uint64_t r = val & mask; |
a78b0504 | 103 | |
00d2dc19 | 104 | if (r == 0) { |
a78b0504 BS |
105 | return 0; |
106 | } else if (r == mask) { | |
107 | return 3; | |
108 | } else { | |
00d2dc19 RH |
109 | int top = clz64(mask); |
110 | if ((int64_t)(val << top) < 0) { | |
a78b0504 BS |
111 | return 2; |
112 | } else { | |
113 | return 1; | |
114 | } | |
115 | } | |
116 | } | |
117 | ||
443aaeb8 | 118 | static uint32_t cc_calc_nz(uint64_t dst) |
a78b0504 BS |
119 | { |
120 | return !!dst; | |
121 | } | |
122 | ||
443aaeb8 | 123 | static uint32_t cc_calc_add_64(int64_t a1, int64_t a2, int64_t ar) |
a78b0504 BS |
124 | { |
125 | if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { | |
126 | return 3; /* overflow */ | |
127 | } else { | |
128 | if (ar < 0) { | |
129 | return 1; | |
130 | } else if (ar > 0) { | |
131 | return 2; | |
132 | } else { | |
133 | return 0; | |
134 | } | |
135 | } | |
136 | } | |
137 | ||
443aaeb8 | 138 | static uint32_t cc_calc_addu_64(uint64_t a1, uint64_t a2, uint64_t ar) |
a78b0504 | 139 | { |
4e4bb438 RH |
140 | return (ar != 0) + 2 * (ar < a1); |
141 | } | |
142 | ||
443aaeb8 | 143 | static uint32_t cc_calc_addc_64(uint64_t a1, uint64_t a2, uint64_t ar) |
4e4bb438 RH |
144 | { |
145 | /* Recover a2 + carry_in. */ | |
146 | uint64_t a2c = ar - a1; | |
147 | /* Check for a2+carry_in overflow, then a1+a2c overflow. */ | |
148 | int carry_out = (a2c < a2) || (ar < a1); | |
149 | ||
150 | return (ar != 0) + 2 * carry_out; | |
a78b0504 BS |
151 | } |
152 | ||
443aaeb8 | 153 | static uint32_t cc_calc_sub_64(int64_t a1, int64_t a2, int64_t ar) |
a78b0504 BS |
154 | { |
155 | if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { | |
156 | return 3; /* overflow */ | |
157 | } else { | |
158 | if (ar < 0) { | |
159 | return 1; | |
160 | } else if (ar > 0) { | |
161 | return 2; | |
162 | } else { | |
163 | return 0; | |
164 | } | |
165 | } | |
166 | } | |
167 | ||
443aaeb8 | 168 | static uint32_t cc_calc_subu_64(uint64_t a1, uint64_t a2, uint64_t ar) |
a78b0504 BS |
169 | { |
170 | if (ar == 0) { | |
171 | return 2; | |
172 | } else { | |
173 | if (a2 > a1) { | |
174 | return 1; | |
175 | } else { | |
176 | return 3; | |
177 | } | |
178 | } | |
179 | } | |
180 | ||
443aaeb8 | 181 | static uint32_t cc_calc_subb_64(uint64_t a1, uint64_t a2, uint64_t ar) |
4e4bb438 | 182 | { |
4e4bb438 RH |
183 | int borrow_out; |
184 | ||
9ef14736 TG |
185 | if (ar != a1 - a2) { /* difference means borrow-in */ |
186 | borrow_out = (a2 >= a1); | |
4e4bb438 | 187 | } else { |
4e4bb438 RH |
188 | borrow_out = (a2 > a1); |
189 | } | |
190 | ||
191 | return (ar != 0) + 2 * !borrow_out; | |
192 | } | |
193 | ||
443aaeb8 | 194 | static uint32_t cc_calc_abs_64(int64_t dst) |
a78b0504 BS |
195 | { |
196 | if ((uint64_t)dst == 0x8000000000000000ULL) { | |
197 | return 3; | |
198 | } else if (dst) { | |
2aaa1940 | 199 | return 2; |
a78b0504 BS |
200 | } else { |
201 | return 0; | |
202 | } | |
203 | } | |
204 | ||
443aaeb8 | 205 | static uint32_t cc_calc_nabs_64(int64_t dst) |
a78b0504 BS |
206 | { |
207 | return !!dst; | |
208 | } | |
209 | ||
443aaeb8 | 210 | static uint32_t cc_calc_comp_64(int64_t dst) |
a78b0504 BS |
211 | { |
212 | if ((uint64_t)dst == 0x8000000000000000ULL) { | |
213 | return 3; | |
214 | } else if (dst < 0) { | |
215 | return 1; | |
216 | } else if (dst > 0) { | |
217 | return 2; | |
218 | } else { | |
219 | return 0; | |
220 | } | |
221 | } | |
222 | ||
223 | ||
443aaeb8 | 224 | static uint32_t cc_calc_add_32(int32_t a1, int32_t a2, int32_t ar) |
a78b0504 BS |
225 | { |
226 | if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { | |
227 | return 3; /* overflow */ | |
228 | } else { | |
229 | if (ar < 0) { | |
230 | return 1; | |
231 | } else if (ar > 0) { | |
232 | return 2; | |
233 | } else { | |
234 | return 0; | |
235 | } | |
236 | } | |
237 | } | |
238 | ||
443aaeb8 | 239 | static uint32_t cc_calc_addu_32(uint32_t a1, uint32_t a2, uint32_t ar) |
a78b0504 | 240 | { |
4e4bb438 RH |
241 | return (ar != 0) + 2 * (ar < a1); |
242 | } | |
243 | ||
443aaeb8 | 244 | static uint32_t cc_calc_addc_32(uint32_t a1, uint32_t a2, uint32_t ar) |
4e4bb438 RH |
245 | { |
246 | /* Recover a2 + carry_in. */ | |
247 | uint32_t a2c = ar - a1; | |
248 | /* Check for a2+carry_in overflow, then a1+a2c overflow. */ | |
249 | int carry_out = (a2c < a2) || (ar < a1); | |
250 | ||
251 | return (ar != 0) + 2 * carry_out; | |
a78b0504 BS |
252 | } |
253 | ||
443aaeb8 | 254 | static uint32_t cc_calc_sub_32(int32_t a1, int32_t a2, int32_t ar) |
a78b0504 BS |
255 | { |
256 | if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { | |
257 | return 3; /* overflow */ | |
258 | } else { | |
259 | if (ar < 0) { | |
260 | return 1; | |
261 | } else if (ar > 0) { | |
262 | return 2; | |
263 | } else { | |
264 | return 0; | |
265 | } | |
266 | } | |
267 | } | |
268 | ||
443aaeb8 | 269 | static uint32_t cc_calc_subu_32(uint32_t a1, uint32_t a2, uint32_t ar) |
a78b0504 BS |
270 | { |
271 | if (ar == 0) { | |
272 | return 2; | |
273 | } else { | |
274 | if (a2 > a1) { | |
275 | return 1; | |
276 | } else { | |
277 | return 3; | |
278 | } | |
279 | } | |
280 | } | |
281 | ||
443aaeb8 | 282 | static uint32_t cc_calc_subb_32(uint32_t a1, uint32_t a2, uint32_t ar) |
4e4bb438 | 283 | { |
4e4bb438 RH |
284 | int borrow_out; |
285 | ||
9ef14736 TG |
286 | if (ar != a1 - a2) { /* difference means borrow-in */ |
287 | borrow_out = (a2 >= a1); | |
4e4bb438 | 288 | } else { |
4e4bb438 RH |
289 | borrow_out = (a2 > a1); |
290 | } | |
291 | ||
292 | return (ar != 0) + 2 * !borrow_out; | |
293 | } | |
294 | ||
443aaeb8 | 295 | static uint32_t cc_calc_abs_32(int32_t dst) |
a78b0504 BS |
296 | { |
297 | if ((uint32_t)dst == 0x80000000UL) { | |
298 | return 3; | |
299 | } else if (dst) { | |
2aaa1940 | 300 | return 2; |
a78b0504 BS |
301 | } else { |
302 | return 0; | |
303 | } | |
304 | } | |
305 | ||
443aaeb8 | 306 | static uint32_t cc_calc_nabs_32(int32_t dst) |
a78b0504 BS |
307 | { |
308 | return !!dst; | |
309 | } | |
310 | ||
443aaeb8 | 311 | static uint32_t cc_calc_comp_32(int32_t dst) |
a78b0504 BS |
312 | { |
313 | if ((uint32_t)dst == 0x80000000UL) { | |
314 | return 3; | |
315 | } else if (dst < 0) { | |
316 | return 1; | |
317 | } else if (dst > 0) { | |
318 | return 2; | |
319 | } else { | |
320 | return 0; | |
321 | } | |
322 | } | |
323 | ||
324 | /* calculate condition code for insert character under mask insn */ | |
58a9e35b | 325 | static uint32_t cc_calc_icm(uint64_t mask, uint64_t val) |
a78b0504 | 326 | { |
58a9e35b RH |
327 | if ((val & mask) == 0) { |
328 | return 0; | |
329 | } else { | |
330 | int top = clz64(mask); | |
331 | if ((int64_t)(val << top) < 0) { | |
a78b0504 BS |
332 | return 1; |
333 | } else { | |
334 | return 2; | |
335 | } | |
336 | } | |
a78b0504 BS |
337 | } |
338 | ||
cbe24bfa | 339 | static uint32_t cc_calc_sla_32(uint32_t src, int shift) |
a78b0504 | 340 | { |
cbe24bfa RH |
341 | uint32_t mask = ((1U << shift) - 1U) << (32 - shift); |
342 | uint32_t sign = 1U << 31; | |
343 | uint32_t match; | |
344 | int32_t r; | |
a78b0504 | 345 | |
cbe24bfa RH |
346 | /* Check if the sign bit stays the same. */ |
347 | if (src & sign) { | |
a78b0504 BS |
348 | match = mask; |
349 | } else { | |
350 | match = 0; | |
351 | } | |
a78b0504 | 352 | if ((src & mask) != match) { |
cbe24bfa | 353 | /* Overflow. */ |
a78b0504 BS |
354 | return 3; |
355 | } | |
356 | ||
cbe24bfa RH |
357 | r = ((src << shift) & ~sign) | (src & sign); |
358 | if (r == 0) { | |
a78b0504 | 359 | return 0; |
cbe24bfa | 360 | } else if (r < 0) { |
a78b0504 BS |
361 | return 1; |
362 | } | |
a78b0504 BS |
363 | return 2; |
364 | } | |
365 | ||
cbe24bfa RH |
366 | static uint32_t cc_calc_sla_64(uint64_t src, int shift) |
367 | { | |
368 | uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift); | |
369 | uint64_t sign = 1ULL << 63; | |
370 | uint64_t match; | |
371 | int64_t r; | |
372 | ||
373 | /* Check if the sign bit stays the same. */ | |
374 | if (src & sign) { | |
375 | match = mask; | |
376 | } else { | |
377 | match = 0; | |
378 | } | |
379 | if ((src & mask) != match) { | |
380 | /* Overflow. */ | |
381 | return 3; | |
382 | } | |
383 | ||
384 | r = ((src << shift) & ~sign) | (src & sign); | |
385 | if (r == 0) { | |
386 | return 0; | |
387 | } else if (r < 0) { | |
388 | return 1; | |
389 | } | |
390 | return 2; | |
391 | } | |
a78b0504 | 392 | |
102bf2c6 RH |
393 | static uint32_t cc_calc_flogr(uint64_t dst) |
394 | { | |
395 | return dst ? 2 : 0; | |
396 | } | |
397 | ||
443aaeb8 | 398 | static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op, |
a78b0504 BS |
399 | uint64_t src, uint64_t dst, uint64_t vr) |
400 | { | |
a47dddd7 | 401 | S390CPU *cpu = s390_env_get_cpu(env); |
a78b0504 BS |
402 | uint32_t r = 0; |
403 | ||
404 | switch (cc_op) { | |
405 | case CC_OP_CONST0: | |
406 | case CC_OP_CONST1: | |
407 | case CC_OP_CONST2: | |
408 | case CC_OP_CONST3: | |
409 | /* cc_op value _is_ cc */ | |
410 | r = cc_op; | |
411 | break; | |
412 | case CC_OP_LTGT0_32: | |
443aaeb8 | 413 | r = cc_calc_ltgt0_32(dst); |
a78b0504 BS |
414 | break; |
415 | case CC_OP_LTGT0_64: | |
443aaeb8 | 416 | r = cc_calc_ltgt0_64(dst); |
a78b0504 BS |
417 | break; |
418 | case CC_OP_LTGT_32: | |
443aaeb8 | 419 | r = cc_calc_ltgt_32(src, dst); |
a78b0504 BS |
420 | break; |
421 | case CC_OP_LTGT_64: | |
443aaeb8 | 422 | r = cc_calc_ltgt_64(src, dst); |
a78b0504 BS |
423 | break; |
424 | case CC_OP_LTUGTU_32: | |
443aaeb8 | 425 | r = cc_calc_ltugtu_32(src, dst); |
a78b0504 BS |
426 | break; |
427 | case CC_OP_LTUGTU_64: | |
443aaeb8 | 428 | r = cc_calc_ltugtu_64(src, dst); |
a78b0504 BS |
429 | break; |
430 | case CC_OP_TM_32: | |
443aaeb8 | 431 | r = cc_calc_tm_32(src, dst); |
a78b0504 BS |
432 | break; |
433 | case CC_OP_TM_64: | |
443aaeb8 | 434 | r = cc_calc_tm_64(src, dst); |
a78b0504 BS |
435 | break; |
436 | case CC_OP_NZ: | |
443aaeb8 | 437 | r = cc_calc_nz(dst); |
a78b0504 BS |
438 | break; |
439 | case CC_OP_ADD_64: | |
443aaeb8 | 440 | r = cc_calc_add_64(src, dst, vr); |
a78b0504 BS |
441 | break; |
442 | case CC_OP_ADDU_64: | |
443aaeb8 | 443 | r = cc_calc_addu_64(src, dst, vr); |
a78b0504 | 444 | break; |
4e4bb438 | 445 | case CC_OP_ADDC_64: |
443aaeb8 | 446 | r = cc_calc_addc_64(src, dst, vr); |
4e4bb438 | 447 | break; |
a78b0504 | 448 | case CC_OP_SUB_64: |
443aaeb8 | 449 | r = cc_calc_sub_64(src, dst, vr); |
a78b0504 BS |
450 | break; |
451 | case CC_OP_SUBU_64: | |
443aaeb8 | 452 | r = cc_calc_subu_64(src, dst, vr); |
a78b0504 | 453 | break; |
4e4bb438 | 454 | case CC_OP_SUBB_64: |
443aaeb8 | 455 | r = cc_calc_subb_64(src, dst, vr); |
4e4bb438 | 456 | break; |
a78b0504 | 457 | case CC_OP_ABS_64: |
443aaeb8 | 458 | r = cc_calc_abs_64(dst); |
a78b0504 BS |
459 | break; |
460 | case CC_OP_NABS_64: | |
443aaeb8 | 461 | r = cc_calc_nabs_64(dst); |
a78b0504 BS |
462 | break; |
463 | case CC_OP_COMP_64: | |
443aaeb8 | 464 | r = cc_calc_comp_64(dst); |
a78b0504 BS |
465 | break; |
466 | ||
467 | case CC_OP_ADD_32: | |
443aaeb8 | 468 | r = cc_calc_add_32(src, dst, vr); |
a78b0504 BS |
469 | break; |
470 | case CC_OP_ADDU_32: | |
443aaeb8 | 471 | r = cc_calc_addu_32(src, dst, vr); |
a78b0504 | 472 | break; |
4e4bb438 | 473 | case CC_OP_ADDC_32: |
443aaeb8 | 474 | r = cc_calc_addc_32(src, dst, vr); |
4e4bb438 | 475 | break; |
a78b0504 | 476 | case CC_OP_SUB_32: |
443aaeb8 | 477 | r = cc_calc_sub_32(src, dst, vr); |
a78b0504 BS |
478 | break; |
479 | case CC_OP_SUBU_32: | |
443aaeb8 | 480 | r = cc_calc_subu_32(src, dst, vr); |
a78b0504 | 481 | break; |
4e4bb438 | 482 | case CC_OP_SUBB_32: |
443aaeb8 | 483 | r = cc_calc_subb_32(src, dst, vr); |
4e4bb438 | 484 | break; |
a78b0504 | 485 | case CC_OP_ABS_32: |
443aaeb8 | 486 | r = cc_calc_abs_32(dst); |
a78b0504 BS |
487 | break; |
488 | case CC_OP_NABS_32: | |
443aaeb8 | 489 | r = cc_calc_nabs_32(dst); |
a78b0504 BS |
490 | break; |
491 | case CC_OP_COMP_32: | |
443aaeb8 | 492 | r = cc_calc_comp_32(dst); |
a78b0504 BS |
493 | break; |
494 | ||
495 | case CC_OP_ICM: | |
58a9e35b | 496 | r = cc_calc_icm(src, dst); |
a78b0504 | 497 | break; |
cbe24bfa RH |
498 | case CC_OP_SLA_32: |
499 | r = cc_calc_sla_32(src, dst); | |
500 | break; | |
501 | case CC_OP_SLA_64: | |
502 | r = cc_calc_sla_64(src, dst); | |
a78b0504 | 503 | break; |
102bf2c6 RH |
504 | case CC_OP_FLOGR: |
505 | r = cc_calc_flogr(dst); | |
506 | break; | |
a78b0504 | 507 | |
a78b0504 BS |
508 | case CC_OP_NZ_F32: |
509 | r = set_cc_nz_f32(dst); | |
510 | break; | |
511 | case CC_OP_NZ_F64: | |
512 | r = set_cc_nz_f64(dst); | |
513 | break; | |
587626f8 RH |
514 | case CC_OP_NZ_F128: |
515 | r = set_cc_nz_f128(make_float128(src, dst)); | |
516 | break; | |
a78b0504 BS |
517 | |
518 | default: | |
a47dddd7 | 519 | cpu_abort(CPU(cpu), "Unknown CC operation: %s\n", cc_name(cc_op)); |
a78b0504 BS |
520 | } |
521 | ||
522 | HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__, | |
523 | cc_name(cc_op), src, dst, vr, r); | |
524 | return r; | |
525 | } | |
526 | ||
527 | uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst, | |
528 | uint64_t vr) | |
529 | { | |
530 | return do_calc_cc(env, cc_op, src, dst, vr); | |
531 | } | |
532 | ||
932385a3 BS |
533 | uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t cc_op, uint64_t src, |
534 | uint64_t dst, uint64_t vr) | |
a78b0504 BS |
535 | { |
536 | return do_calc_cc(env, cc_op, src, dst, vr); | |
537 | } | |
538 | ||
a78b0504 | 539 | #ifndef CONFIG_USER_ONLY |
932385a3 | 540 | void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr) |
a78b0504 BS |
541 | { |
542 | load_psw(env, mask, addr); | |
5638d180 | 543 | cpu_loop_exit(CPU(s390_env_get_cpu(env))); |
a78b0504 BS |
544 | } |
545 | ||
932385a3 | 546 | void HELPER(sacf)(CPUS390XState *env, uint64_t a1) |
a78b0504 BS |
547 | { |
548 | HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1); | |
549 | ||
550 | switch (a1 & 0xf00) { | |
551 | case 0x000: | |
552 | env->psw.mask &= ~PSW_MASK_ASC; | |
553 | env->psw.mask |= PSW_ASC_PRIMARY; | |
554 | break; | |
555 | case 0x100: | |
556 | env->psw.mask &= ~PSW_MASK_ASC; | |
557 | env->psw.mask |= PSW_ASC_SECONDARY; | |
558 | break; | |
559 | case 0x300: | |
560 | env->psw.mask &= ~PSW_MASK_ASC; | |
561 | env->psw.mask |= PSW_ASC_HOME; | |
562 | break; | |
563 | default: | |
aafcf80e | 564 | HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); |
a78b0504 BS |
565 | program_interrupt(env, PGM_SPECIFICATION, 2); |
566 | break; | |
567 | } | |
568 | } | |
569 | #endif |