]>
Commit | Line | Data |
---|---|---|
29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 AF |
8 | * |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2.1 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see | |
21 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
70bada03 JF |
22 | * Contributions after 2012-12-11 are licensed under the terms of the |
23 | * GNU GPL, version 2 or (at your option) any later version. | |
29e4bcb2 AF |
24 | */ |
25 | ||
564b863d | 26 | #include "cpu.h" |
29e4bcb2 | 27 | #include "qemu-common.h" |
1de7afc9 | 28 | #include "qemu/timer.h" |
70bada03 | 29 | #include "hw/hw.h" |
c7396bbb | 30 | #ifndef CONFIG_USER_ONLY |
904e5fd5 VM |
31 | #include "sysemu/arch_init.h" |
32 | #endif | |
33 | ||
70bada03 JF |
34 | #define CR0_RESET 0xE0UL |
35 | #define CR14_RESET 0xC2000000UL; | |
36 | ||
904e5fd5 VM |
37 | /* generate CPU information for cpu -? */ |
38 | void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
39 | { | |
40 | #ifdef CONFIG_KVM | |
41 | (*cpu_fprintf)(f, "s390 %16s\n", "host"); | |
42 | #endif | |
43 | } | |
29e4bcb2 | 44 | |
904e5fd5 VM |
45 | #ifndef CONFIG_USER_ONLY |
46 | CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) | |
47 | { | |
48 | CpuDefinitionInfoList *entry; | |
49 | CpuDefinitionInfo *info; | |
50 | ||
51 | info = g_malloc0(sizeof(*info)); | |
52 | info->name = g_strdup("host"); | |
53 | ||
54 | entry = g_malloc0(sizeof(*entry)); | |
55 | entry->value = info; | |
56 | ||
57 | return entry; | |
58 | } | |
59 | #endif | |
29e4bcb2 | 60 | |
f45748f1 AF |
61 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
62 | { | |
63 | S390CPU *cpu = S390_CPU(cs); | |
64 | ||
65 | cpu->env.psw.addr = value; | |
66 | } | |
67 | ||
1ac1a749 | 68 | /* CPUClass::reset() */ |
29e4bcb2 AF |
69 | static void s390_cpu_reset(CPUState *s) |
70 | { | |
71 | S390CPU *cpu = S390_CPU(s); | |
72 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
73 | CPUS390XState *env = &cpu->env; | |
74 | ||
49e15878 | 75 | s390_del_running_cpu(cpu); |
70bada03 | 76 | |
29e4bcb2 AF |
77 | scc->parent_reset(s); |
78 | ||
1ac1a749 | 79 | memset(env, 0, offsetof(CPUS390XState, breakpoints)); |
70bada03 JF |
80 | |
81 | /* architectured initial values for CR 0 and 14 */ | |
82 | env->cregs[0] = CR0_RESET; | |
83 | env->cregs[14] = CR14_RESET; | |
84 | /* set halted to 1 to make sure we can add the cpu in | |
259186a7 | 85 | * s390_ipl_cpu code, where CPUState::halted is set back to 0 |
70bada03 JF |
86 | * after incrementing the cpu counter */ |
87 | #if !defined(CONFIG_USER_ONLY) | |
259186a7 | 88 | s->halted = 1; |
70bada03 | 89 | #endif |
1ac1a749 | 90 | tlb_flush(env, 1); |
29e4bcb2 AF |
91 | } |
92 | ||
70bada03 JF |
93 | #if !defined(CONFIG_USER_ONLY) |
94 | static void s390_cpu_machine_reset_cb(void *opaque) | |
95 | { | |
96 | S390CPU *cpu = opaque; | |
97 | ||
98 | cpu_reset(CPU(cpu)); | |
99 | } | |
100 | #endif | |
101 | ||
1f136632 AF |
102 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
103 | { | |
14a10fc3 | 104 | CPUState *cs = CPU(dev); |
1f136632 AF |
105 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
106 | ||
14a10fc3 AF |
107 | qemu_init_vcpu(cs); |
108 | cpu_reset(cs); | |
1f136632 AF |
109 | |
110 | scc->parent_realize(dev, errp); | |
111 | } | |
112 | ||
8f22e0df AF |
113 | static void s390_cpu_initfn(Object *obj) |
114 | { | |
c05efcb1 | 115 | CPUState *cs = CPU(obj); |
8f22e0df AF |
116 | S390CPU *cpu = S390_CPU(obj); |
117 | CPUS390XState *env = &cpu->env; | |
2b7ac767 | 118 | static bool inited; |
8f22e0df AF |
119 | static int cpu_num = 0; |
120 | #if !defined(CONFIG_USER_ONLY) | |
121 | struct tm tm; | |
122 | #endif | |
123 | ||
c05efcb1 | 124 | cs->env_ptr = env; |
8f22e0df AF |
125 | cpu_exec_init(env); |
126 | #if !defined(CONFIG_USER_ONLY) | |
70bada03 | 127 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); |
8f22e0df AF |
128 | qemu_get_timedate(&tm, 0); |
129 | env->tod_offset = TOD_UNIX_EPOCH + | |
130 | (time2tod(mktimegm(&tm)) * 1000000000ULL); | |
131 | env->tod_basetime = 0; | |
bc72ad67 AB |
132 | env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); |
133 | env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
259186a7 | 134 | /* set CPUState::halted state to 1 to avoid decrementing the running |
70bada03 JF |
135 | * cpu counter in s390_cpu_reset to a negative number at |
136 | * initial ipl */ | |
259186a7 | 137 | cs->halted = 1; |
8f22e0df AF |
138 | #endif |
139 | env->cpu_num = cpu_num++; | |
140 | env->ext_index = -1; | |
2b7ac767 AF |
141 | |
142 | if (tcg_enabled() && !inited) { | |
143 | inited = true; | |
144 | s390x_translate_init(); | |
145 | } | |
8f22e0df AF |
146 | } |
147 | ||
d5627ce8 AF |
148 | static void s390_cpu_finalize(Object *obj) |
149 | { | |
150 | #if !defined(CONFIG_USER_ONLY) | |
151 | S390CPU *cpu = S390_CPU(obj); | |
152 | ||
153 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
154 | #endif | |
155 | } | |
156 | ||
c7396bbb AF |
157 | static const VMStateDescription vmstate_s390_cpu = { |
158 | .name = "cpu", | |
159 | .unmigratable = 1, | |
160 | }; | |
161 | ||
29e4bcb2 AF |
162 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
163 | { | |
164 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
165 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 166 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 167 | |
1f136632 AF |
168 | scc->parent_realize = dc->realize; |
169 | dc->realize = s390_cpu_realizefn; | |
170 | ||
29e4bcb2 AF |
171 | scc->parent_reset = cc->reset; |
172 | cc->reset = s390_cpu_reset; | |
c7396bbb | 173 | |
97a8ea5a | 174 | cc->do_interrupt = s390_cpu_do_interrupt; |
878096ee | 175 | cc->dump_state = s390_cpu_dump_state; |
f45748f1 | 176 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
177 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
178 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
00b941e5 AF |
179 | #ifndef CONFIG_USER_ONLY |
180 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; | |
9b4f38e1 ET |
181 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
182 | cc->write_elf64_qemunote = s390_cpu_write_elf64_qemunote; | |
00b941e5 | 183 | #endif |
c7396bbb | 184 | dc->vmsd = &vmstate_s390_cpu; |
a0e372f0 | 185 | cc->gdb_num_core_regs = S390_NUM_REGS; |
29e4bcb2 AF |
186 | } |
187 | ||
188 | static const TypeInfo s390_cpu_type_info = { | |
189 | .name = TYPE_S390_CPU, | |
190 | .parent = TYPE_CPU, | |
191 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 192 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 193 | .instance_finalize = s390_cpu_finalize, |
29e4bcb2 AF |
194 | .abstract = false, |
195 | .class_size = sizeof(S390CPUClass), | |
196 | .class_init = s390_cpu_class_init, | |
197 | }; | |
198 | ||
199 | static void s390_cpu_register_types(void) | |
200 | { | |
201 | type_register_static(&s390_cpu_type_info); | |
202 | } | |
203 | ||
204 | type_init(s390_cpu_register_types) |