[mirror_qemu.git] / target-s390x / gdbstub.c

/*
 * s390x gdb server stub
 *
 * Copyright (c) 2003-2005 Fabrice Bellard
 * Copyright (c) 2013 SUSE LINUX Products GmbH
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/gdbstub.h"
#include "qemu/bitops.h"

int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    uint64_t val;
    int cc_op;

    switch (n) {
    case S390_PSWM_REGNUM:
        if (tcg_enabled()) {
            cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
                            env->cc_vr);
            val = deposit64(env->psw.mask, 44, 2, cc_op);
            return gdb_get_regl(mem_buf, val);
        }
        return gdb_get_regl(mem_buf, env->psw.mask);
    case S390_PSWA_REGNUM:
        return gdb_get_regl(mem_buf, env->psw.addr);
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
    }
    return 0;
}

int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    target_ulong tmpl = ldtul_p(mem_buf);

    switch (n) {
    case S390_PSWM_REGNUM:
        env->psw.mask = tmpl;
        if (tcg_enabled()) {
            env->cc_op = extract64(tmpl, 44, 2);
        }
        break;
    case S390_PSWA_REGNUM:
        env->psw.addr = tmpl;
        break;
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        env->regs[n - S390_R0_REGNUM] = tmpl;
        break;
    default:
        return 0;
    }
    return 8;
}

/* the values represent the positions in s390-acr.xml */
#define S390_A0_REGNUM 0
#define S390_A15_REGNUM 15
/* total number of registers in s390-acr.xml */
#define S390_NUM_AC_REGS 16

static int cpu_read_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        return gdb_get_reg32(mem_buf, env->aregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        env->aregs[n] = ldl_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 4;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-fpr.xml */
#define S390_FPC_REGNUM 0
#define S390_F0_REGNUM 1
#define S390_F15_REGNUM 16
/* total number of registers in s390-fpr.xml */
#define S390_NUM_FP_REGS 17

static int cpu_read_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        return gdb_get_reg32(mem_buf, env->fpc);
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
    default:
        return 0;
    }
}

static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        env->fpc = ldl_p(mem_buf);
        return 4;
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-vx.xml */
#define S390_V0L_REGNUM 0
#define S390_V15L_REGNUM 15
#define S390_V16_REGNUM 16
#define S390_V31_REGNUM 31
/* total number of registers in s390-vx.xml */
#define S390_NUM_VREGS 32

static int cpu_read_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    int ret;

    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
        break;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
        ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
        break;
    default:
        ret = 0;
    }

    return ret;
}

static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 8;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        env->vregs[n][0].ll = ldtul_p(mem_buf);
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 16;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-cr.xml */
#define S390_C0_REGNUM 0
#define S390_C15_REGNUM 15
/* total number of registers in s390-cr.xml */
#define S390_NUM_C_REGS 16

#ifndef CONFIG_USER_ONLY
static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        return gdb_get_regl(mem_buf, env->cregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        env->cregs[n] = ldtul_p(mem_buf);
        if (tcg_enabled()) {
            tlb_flush(ENV_GET_CPU(env), 1);
        }
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-virt.xml */
#define S390_VIRT_CKC_REGNUM    0
#define S390_VIRT_CPUTM_REGNUM  1
#define S390_VIRT_BEA_REGNUM    2
#define S390_VIRT_PREFIX_REGNUM 3
#define S390_VIRT_PP_REGNUM     4
#define S390_VIRT_PFT_REGNUM    5
#define S390_VIRT_PFS_REGNUM    6
#define S390_VIRT_PFC_REGNUM    7
/* total number of registers in s390-virt.xml */
#define S390_NUM_VIRT_REGS 8

static int cpu_read_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        return gdb_get_regl(mem_buf, env->ckc);
    case S390_VIRT_CPUTM_REGNUM:
        return gdb_get_regl(mem_buf, env->cputm);
    case S390_VIRT_BEA_REGNUM:
        return gdb_get_regl(mem_buf, env->gbea);
    case S390_VIRT_PREFIX_REGNUM:
        return gdb_get_regl(mem_buf, env->psa);
    case S390_VIRT_PP_REGNUM:
        return gdb_get_regl(mem_buf, env->pp);
    case S390_VIRT_PFT_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_token);
    case S390_VIRT_PFS_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_select);
    case S390_VIRT_PFC_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_compare);
    default:
        return 0;
    }
}

static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        env->ckc = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_CPUTM_REGNUM:
        env->cputm = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_BEA_REGNUM:
        env->gbea = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PREFIX_REGNUM:
        env->psa = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PP_REGNUM:
        env->pp = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFT_REGNUM:
        env->pfault_token = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFS_REGNUM:
        env->pfault_select = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFC_REGNUM:
        env->pfault_compare = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}
#endif

void s390_cpu_gdb_init(CPUState *cs)
{
    gdb_register_coprocessor(cs, cpu_read_ac_reg,
                             cpu_write_ac_reg,
                             S390_NUM_AC_REGS, "s390-acr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_fp_reg,
                             cpu_write_fp_reg,
                             S390_NUM_FP_REGS, "s390-fpr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_vreg,
                             cpu_write_vreg,
                             S390_NUM_VREGS, "s390-vx.xml", 0);

#ifndef CONFIG_USER_ONLY
    gdb_register_coprocessor(cs, cpu_read_c_reg,
                             cpu_write_c_reg,
                             S390_NUM_C_REGS, "s390-cr.xml", 0);

    if (kvm_enabled()) {
        gdb_register_coprocessor(cs, cpu_read_virt_reg,
                                 cpu_write_virt_reg,
                                 S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
    }
#endif
}
Commit	Line	Data
cfae5c90 AF	1	/*
	2	* s390x gdb server stub
	3	*
	4	* Copyright (c) 2003-2005 Fabrice Bellard
	5	* Copyright (c) 2013 SUSE LINUX Products GmbH
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
9615495a	20	#include "qemu/osdep.h"
5b50e790	21	#include "qemu-common.h"
33c11879	22	#include "cpu.h"
5b50e790 AF	23	#include "exec/gdbstub.h"
5b50e790 AF	24	#include "qemu/bitops.h"
cfae5c90	25
5b50e790	26	int s390_cpu_gdb_read_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	27	{
5b50e790 AF	28	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	29	CPUS390XState *env = &cpu->env;
cfae5c90 AF	30	uint64_t val;
	31	int cc_op;
	32
	33	switch (n) {
	34	case S390_PSWM_REGNUM:
97fa52f0 DH	35	if (tcg_enabled()) {
	36	cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
	37	env->cc_vr);
	38	val = deposit64(env->psw.mask, 44, 2, cc_op);
	39	return gdb_get_regl(mem_buf, val);
	40	}
	41	return gdb_get_regl(mem_buf, env->psw.mask);
cfae5c90	42	case S390_PSWA_REGNUM:
986a2998	43	return gdb_get_regl(mem_buf, env->psw.addr);
cfae5c90	44	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	45	return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
cfae5c90	46	}
cfae5c90 AF	47	return 0;
	48	}
	49
5b50e790	50	int s390_cpu_gdb_write_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	51	{
5b50e790 AF	52	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	53	CPUS390XState *env = &cpu->env;
73d510c9	54	target_ulong tmpl = ldtul_p(mem_buf);
cfae5c90 AF	55
	56	switch (n) {
	57	case S390_PSWM_REGNUM:
	58	env->psw.mask = tmpl;
97fa52f0 DH	59	if (tcg_enabled()) {
	60	env->cc_op = extract64(tmpl, 44, 2);
	61	}
cfae5c90 AF	62	break;
	63	case S390_PSWA_REGNUM:
	64	env->psw.addr = tmpl;
	65	break;
	66	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	67	env->regs[n - S390_R0_REGNUM] = tmpl;
cfae5c90	68	break;
73d510c9 DH	69	default:
	70	return 0;
	71	}
	72	return 8;
	73	}
	74
	75	/* the values represent the positions in s390-acr.xml */
	76	#define S390_A0_REGNUM 0
	77	#define S390_A15_REGNUM 15
	78	/* total number of registers in s390-acr.xml */
	79	#define S390_NUM_AC_REGS 16
	80
	81	static int cpu_read_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	82	{
	83	switch (n) {
cfae5c90	84	case S390_A0_REGNUM ... S390_A15_REGNUM:
73d510c9 DH	85	return gdb_get_reg32(mem_buf, env->aregs[n]);
	86	default:
	87	return 0;
	88	}
	89	}
	90
	91	static int cpu_write_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	92	{
	93	switch (n) {
	94	case S390_A0_REGNUM ... S390_A15_REGNUM:
	95	env->aregs[n] = ldl_p(mem_buf);
55b1b753	96	cpu_synchronize_post_init(ENV_GET_CPU(env));
73d510c9 DH	97	return 4;
	98	default:
	99	return 0;
	100	}
	101	}
	102
	103	/* the values represent the positions in s390-fpr.xml */
	104	#define S390_FPC_REGNUM 0
	105	#define S390_F0_REGNUM 1
	106	#define S390_F15_REGNUM 16
	107	/* total number of registers in s390-fpr.xml */
	108	#define S390_NUM_FP_REGS 17
	109
	110	static int cpu_read_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	111	{
	112	switch (n) {
cfae5c90	113	case S390_FPC_REGNUM:
73d510c9	114	return gdb_get_reg32(mem_buf, env->fpc);
cfae5c90	115	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	116	return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
cfae5c90 AF	117	default:
	118	return 0;
	119	}
73d510c9 DH	120	}
	121
	122	static int cpu_write_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	123	{
	124	switch (n) {
	125	case S390_FPC_REGNUM:
	126	env->fpc = ldl_p(mem_buf);
	127	return 4;
	128	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	129	get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
73d510c9 DH	130	return 8;
	131	default:
	132	return 0;
	133	}
	134	}
	135
ca343c7a EF	136	/* the values represent the positions in s390-vx.xml */
	137	#define S390_V0L_REGNUM 0
	138	#define S390_V15L_REGNUM 15
	139	#define S390_V16_REGNUM 16
	140	#define S390_V31_REGNUM 31
	141	/* total number of registers in s390-vx.xml */
	142	#define S390_NUM_VREGS 32
	143
	144	static int cpu_read_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	145	{
	146	int ret;
	147
	148	switch (n) {
	149	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	150	ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
	151	break;
	152	case S390_V16_REGNUM ... S390_V31_REGNUM:
	153	ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
	154	ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
	155	break;
	156	default:
	157	ret = 0;
	158	}
	159
	160	return ret;
	161	}
	162
	163	static int cpu_write_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	164	{
	165	switch (n) {
	166	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	167	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	168	return 8;
	169	case S390_V16_REGNUM ... S390_V31_REGNUM:
	170	env->vregs[n][0].ll = ldtul_p(mem_buf);
	171	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	172	return 16;
	173	default:
	174	return 0;
	175	}
	176	}
	177
5b9f6345 DH	178	/* the values represent the positions in s390-cr.xml */
	179	#define S390_C0_REGNUM 0
	180	#define S390_C15_REGNUM 15
	181	/* total number of registers in s390-cr.xml */
	182	#define S390_NUM_C_REGS 16
	183
	184	#ifndef CONFIG_USER_ONLY
	185	static int cpu_read_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	186	{
	187	switch (n) {
	188	case S390_C0_REGNUM ... S390_C15_REGNUM:
	189	return gdb_get_regl(mem_buf, env->cregs[n]);
	190	default:
	191	return 0;
	192	}
	193	}
	194
	195	static int cpu_write_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	196	{
	197	switch (n) {
	198	case S390_C0_REGNUM ... S390_C15_REGNUM:
	199	env->cregs[n] = ldtul_p(mem_buf);
	200	if (tcg_enabled()) {
	201	tlb_flush(ENV_GET_CPU(env), 1);
	202	}
	203	cpu_synchronize_post_init(ENV_GET_CPU(env));
	204	return 8;
	205	default:
	206	return 0;
	207	}
	208	}
8a641ff6 DH	209
	210	/* the values represent the positions in s390-virt.xml */
	211	#define S390_VIRT_CKC_REGNUM 0
	212	#define S390_VIRT_CPUTM_REGNUM 1
	213	#define S390_VIRT_BEA_REGNUM 2
	214	#define S390_VIRT_PREFIX_REGNUM 3
	215	#define S390_VIRT_PP_REGNUM 4
	216	#define S390_VIRT_PFT_REGNUM 5
	217	#define S390_VIRT_PFS_REGNUM 6
	218	#define S390_VIRT_PFC_REGNUM 7
	219	/* total number of registers in s390-virt.xml */
	220	#define S390_NUM_VIRT_REGS 8
	221
	222	static int cpu_read_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	223	{
	224	switch (n) {
	225	case S390_VIRT_CKC_REGNUM:
	226	return gdb_get_regl(mem_buf, env->ckc);
	227	case S390_VIRT_CPUTM_REGNUM:
	228	return gdb_get_regl(mem_buf, env->cputm);
	229	case S390_VIRT_BEA_REGNUM:
	230	return gdb_get_regl(mem_buf, env->gbea);
	231	case S390_VIRT_PREFIX_REGNUM:
	232	return gdb_get_regl(mem_buf, env->psa);
	233	case S390_VIRT_PP_REGNUM:
	234	return gdb_get_regl(mem_buf, env->pp);
	235	case S390_VIRT_PFT_REGNUM:
	236	return gdb_get_regl(mem_buf, env->pfault_token);
	237	case S390_VIRT_PFS_REGNUM:
	238	return gdb_get_regl(mem_buf, env->pfault_select);
	239	case S390_VIRT_PFC_REGNUM:
	240	return gdb_get_regl(mem_buf, env->pfault_compare);
	241	default:
	242	return 0;
	243	}
	244	}
	245
	246	static int cpu_write_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	247	{
	248	switch (n) {
	249	case S390_VIRT_CKC_REGNUM:
	250	env->ckc = ldtul_p(mem_buf);
	251	cpu_synchronize_post_init(ENV_GET_CPU(env));
	252	return 8;
	253	case S390_VIRT_CPUTM_REGNUM:
	254	env->cputm = ldtul_p(mem_buf);
	255	cpu_synchronize_post_init(ENV_GET_CPU(env));
	256	return 8;
	257	case S390_VIRT_BEA_REGNUM:
	258	env->gbea = ldtul_p(mem_buf);
	259	cpu_synchronize_post_init(ENV_GET_CPU(env));
	260	return 8;
	261	case S390_VIRT_PREFIX_REGNUM:
	262	env->psa = ldtul_p(mem_buf);
	263	cpu_synchronize_post_init(ENV_GET_CPU(env));
	264	return 8;
	265	case S390_VIRT_PP_REGNUM:
	266	env->pp = ldtul_p(mem_buf);
	267	cpu_synchronize_post_init(ENV_GET_CPU(env));
	268	return 8;
	269	case S390_VIRT_PFT_REGNUM:
	270	env->pfault_token = ldtul_p(mem_buf);
	271	cpu_synchronize_post_init(ENV_GET_CPU(env));
	272	return 8;
273	case S390_VIRT_PFS_REGNUM:
274	env->pfault_select = ldtul_p(mem_buf);
275	cpu_synchronize_post_init(ENV_GET_CPU(env));
276	return 8;
277	case S390_VIRT_PFC_REGNUM:
278	env->pfault_compare = ldtul_p(mem_buf);
279	cpu_synchronize_post_init(ENV_GET_CPU(env));
280	return 8;
281	default:
282	return 0;
283	}
284	}
5b9f6345 DH	285	#endif
5b9f6345 DH	286
73d510c9 DH	287	void s390_cpu_gdb_init(CPUState *cs)
	288	{
	289	gdb_register_coprocessor(cs, cpu_read_ac_reg,
	290	cpu_write_ac_reg,
	291	S390_NUM_AC_REGS, "s390-acr.xml", 0);
	292
	293	gdb_register_coprocessor(cs, cpu_read_fp_reg,
	294	cpu_write_fp_reg,
	295	S390_NUM_FP_REGS, "s390-fpr.xml", 0);
ca343c7a EF	296
	297	gdb_register_coprocessor(cs, cpu_read_vreg,
	298	cpu_write_vreg,
	299	S390_NUM_VREGS, "s390-vx.xml", 0);
5b9f6345 DH	300
	301	#ifndef CONFIG_USER_ONLY
	302	gdb_register_coprocessor(cs, cpu_read_c_reg,
	303	cpu_write_c_reg,
	304	S390_NUM_C_REGS, "s390-cr.xml", 0);
8a641ff6 DH	305
	306	if (kvm_enabled()) {
	307	gdb_register_coprocessor(cs, cpu_read_virt_reg,
	308	cpu_write_virt_reg,
	309	S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
	310	}
5b9f6345	311	#endif
cfae5c90	312	}