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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
24 | #include <sys/types.h> | |
25 | #include <sys/ioctl.h> | |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
1de7afc9 | 32 | #include "qemu/timer.h" |
9c17d615 PB |
33 | #include "sysemu/sysemu.h" |
34 | #include "sysemu/kvm.h" | |
4cb88c3c | 35 | #include "hw/hw.h" |
0e60a699 | 36 | #include "cpu.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 CB |
38 | #include "qapi/qmp/qjson.h" |
39 | #include "monitor/monitor.h" | |
770a6379 | 40 | #include "exec/gdbstub.h" |
860643bc | 41 | #include "trace.h" |
3a449690 | 42 | #include "qapi-event.h" |
863f6f52 | 43 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 44 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 45 | #include "hw/s390x/ipl.h" |
0e60a699 AG |
46 | |
47 | /* #define DEBUG_KVM */ | |
48 | ||
49 | #ifdef DEBUG_KVM | |
e67137c6 | 50 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
51 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
52 | #else | |
e67137c6 | 53 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
54 | do { } while (0) |
55 | #endif | |
56 | ||
57 | #define IPA0_DIAG 0x8300 | |
58 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
59 | #define IPA0_B2 0xb200 |
60 | #define IPA0_B9 0xb900 | |
61 | #define IPA0_EB 0xeb00 | |
863f6f52 | 62 | #define IPA0_E3 0xe300 |
0e60a699 | 63 | |
1eecf41b FB |
64 | #define PRIV_B2_SCLP_CALL 0x20 |
65 | #define PRIV_B2_CSCH 0x30 | |
66 | #define PRIV_B2_HSCH 0x31 | |
67 | #define PRIV_B2_MSCH 0x32 | |
68 | #define PRIV_B2_SSCH 0x33 | |
69 | #define PRIV_B2_STSCH 0x34 | |
70 | #define PRIV_B2_TSCH 0x35 | |
71 | #define PRIV_B2_TPI 0x36 | |
72 | #define PRIV_B2_SAL 0x37 | |
73 | #define PRIV_B2_RSCH 0x38 | |
74 | #define PRIV_B2_STCRW 0x39 | |
75 | #define PRIV_B2_STCPS 0x3a | |
76 | #define PRIV_B2_RCHP 0x3b | |
77 | #define PRIV_B2_SCHM 0x3c | |
78 | #define PRIV_B2_CHSC 0x5f | |
79 | #define PRIV_B2_SIGA 0x74 | |
80 | #define PRIV_B2_XSCH 0x76 | |
81 | ||
82 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
83 | #define PRIV_EB_PCISTB 0xd0 |
84 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
85 | |
86 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
87 | #define PRIV_B9_CLP 0xa0 |
88 | #define PRIV_B9_PCISTG 0xd0 | |
89 | #define PRIV_B9_PCILG 0xd2 | |
90 | #define PRIV_B9_RPCIT 0xd3 | |
91 | ||
92 | #define PRIV_E3_MPCIFC 0xd0 | |
93 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 94 | |
268846ba | 95 | #define DIAG_IPL 0x308 |
0e60a699 AG |
96 | #define DIAG_KVM_HYPERCALL 0x500 |
97 | #define DIAG_KVM_BREAKPOINT 0x501 | |
98 | ||
0e60a699 | 99 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 100 | #define ICPT_PROGRAM 0x08 |
a2689242 | 101 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
102 | #define ICPT_WAITPSW 0x1c |
103 | #define ICPT_SOFT_INTERCEPT 0x24 | |
104 | #define ICPT_CPU_STOP 0x28 | |
105 | #define ICPT_IO 0x40 | |
106 | ||
770a6379 DH |
107 | static CPUWatchpoint hw_watchpoint; |
108 | /* | |
109 | * We don't use a list because this structure is also used to transmit the | |
110 | * hardware breakpoints to the kernel. | |
111 | */ | |
112 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
113 | static int nb_hw_breakpoints; | |
114 | ||
94a8d39a JK |
115 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
116 | KVM_CAP_LAST_INFO | |
117 | }; | |
118 | ||
5b08b344 | 119 | static int cap_sync_regs; |
819bd309 | 120 | static int cap_async_pf; |
5b08b344 | 121 | |
dc622deb | 122 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 123 | |
4cb88c3c DD |
124 | static int kvm_s390_check_clear_cmma(KVMState *s) |
125 | { | |
126 | struct kvm_device_attr attr = { | |
127 | .group = KVM_S390_VM_MEM_CTRL, | |
128 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
129 | }; | |
130 | ||
131 | return kvm_vm_ioctl(s, KVM_HAS_DEVICE_ATTR, &attr); | |
132 | } | |
133 | ||
134 | static int kvm_s390_check_enable_cmma(KVMState *s) | |
135 | { | |
136 | struct kvm_device_attr attr = { | |
137 | .group = KVM_S390_VM_MEM_CTRL, | |
138 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
139 | }; | |
140 | ||
141 | return kvm_vm_ioctl(s, KVM_HAS_DEVICE_ATTR, &attr); | |
142 | } | |
143 | ||
144 | void kvm_s390_clear_cmma_callback(void *opaque) | |
145 | { | |
146 | int rc; | |
147 | KVMState *s = opaque; | |
148 | struct kvm_device_attr attr = { | |
149 | .group = KVM_S390_VM_MEM_CTRL, | |
150 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
151 | }; | |
152 | ||
153 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
154 | trace_kvm_clear_cmma(rc); | |
155 | } | |
156 | ||
157 | static void kvm_s390_enable_cmma(KVMState *s) | |
158 | { | |
159 | int rc; | |
160 | struct kvm_device_attr attr = { | |
161 | .group = KVM_S390_VM_MEM_CTRL, | |
162 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
163 | }; | |
164 | ||
165 | if (kvm_s390_check_enable_cmma(s) || kvm_s390_check_clear_cmma(s)) { | |
166 | return; | |
167 | } | |
168 | ||
169 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
170 | if (!rc) { | |
171 | qemu_register_reset(kvm_s390_clear_cmma_callback, s); | |
172 | } | |
173 | trace_kvm_enable_cmma(rc); | |
174 | } | |
175 | ||
cad1e282 | 176 | int kvm_arch_init(KVMState *s) |
0e60a699 | 177 | { |
5b08b344 | 178 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 179 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
4cb88c3c DD |
180 | |
181 | if (kvm_check_extension(s, KVM_CAP_VM_ATTRIBUTES)) { | |
182 | kvm_s390_enable_cmma(s); | |
183 | } | |
184 | ||
91138037 MA |
185 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
186 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
187 | phys_mem_set_alloc(legacy_s390_alloc); | |
188 | } | |
0e60a699 AG |
189 | return 0; |
190 | } | |
191 | ||
b164e48e EH |
192 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
193 | { | |
194 | return cpu->cpu_index; | |
195 | } | |
196 | ||
c9e659c9 | 197 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 198 | { |
c9e659c9 DH |
199 | S390CPU *cpu = S390_CPU(cs); |
200 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
1c9d2a1d | 201 | return 0; |
0e60a699 AG |
202 | } |
203 | ||
50a2c6e5 | 204 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 205 | { |
50a2c6e5 PB |
206 | CPUState *cs = CPU(cpu); |
207 | ||
419831d7 AG |
208 | /* The initial reset call is needed here to reset in-kernel |
209 | * vcpu data that we can't access directly from QEMU | |
210 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
211 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
212 | * code (kvm-all) */ | |
50a2c6e5 | 213 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 214 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 215 | } |
0e60a699 AG |
216 | } |
217 | ||
fdb78ec0 DH |
218 | static int can_sync_regs(CPUState *cs, int regs) |
219 | { | |
220 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
221 | } | |
222 | ||
20d695a9 | 223 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 224 | { |
20d695a9 AF |
225 | S390CPU *cpu = S390_CPU(cs); |
226 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 227 | struct kvm_sregs sregs; |
0e60a699 | 228 | struct kvm_regs regs; |
e6eef7c2 | 229 | struct kvm_fpu fpu = {}; |
860643bc | 230 | int r; |
0e60a699 AG |
231 | int i; |
232 | ||
5b08b344 | 233 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
234 | cs->kvm_run->psw_addr = env->psw.addr; |
235 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 236 | |
fdb78ec0 | 237 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 238 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
239 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
240 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
241 | } |
242 | } else { | |
243 | for (i = 0; i < 16; i++) { | |
244 | regs.gprs[i] = env->regs[i]; | |
245 | } | |
860643bc CB |
246 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
247 | if (r < 0) { | |
248 | return r; | |
5b08b344 | 249 | } |
0e60a699 AG |
250 | } |
251 | ||
85ad6230 JH |
252 | /* Floating point */ |
253 | for (i = 0; i < 16; i++) { | |
254 | fpu.fprs[i] = env->fregs[i].ll; | |
255 | } | |
256 | fpu.fpc = env->fpc; | |
257 | ||
258 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); | |
259 | if (r < 0) { | |
260 | return r; | |
261 | } | |
262 | ||
44c68de0 DD |
263 | /* Do we need to save more than that? */ |
264 | if (level == KVM_PUT_RUNTIME_STATE) { | |
265 | return 0; | |
266 | } | |
420840e5 | 267 | |
59ac1532 DH |
268 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
269 | cs->kvm_run->s.regs.cputm = env->cputm; | |
270 | cs->kvm_run->s.regs.ckc = env->ckc; | |
271 | cs->kvm_run->s.regs.todpr = env->todpr; | |
272 | cs->kvm_run->s.regs.gbea = env->gbea; | |
273 | cs->kvm_run->s.regs.pp = env->pp; | |
274 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
275 | } else { | |
276 | /* | |
277 | * These ONE_REGS are not protected by a capability. As they are only | |
278 | * necessary for migration we just trace a possible error, but don't | |
279 | * return with an error return code. | |
280 | */ | |
281 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
282 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
283 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
284 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
285 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
286 | } | |
287 | ||
288 | /* pfault parameters */ | |
289 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
290 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
291 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
292 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
293 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
294 | } else if (cap_async_pf) { | |
860643bc CB |
295 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
296 | if (r < 0) { | |
297 | return r; | |
819bd309 | 298 | } |
860643bc CB |
299 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
300 | if (r < 0) { | |
301 | return r; | |
819bd309 | 302 | } |
860643bc CB |
303 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
304 | if (r < 0) { | |
305 | return r; | |
819bd309 DD |
306 | } |
307 | } | |
308 | ||
fdb78ec0 DH |
309 | /* access registers and control registers*/ |
310 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 311 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
312 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
313 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 314 | } |
f7575c96 AF |
315 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
316 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
317 | } else { |
318 | for (i = 0; i < 16; i++) { | |
319 | sregs.acrs[i] = env->aregs[i]; | |
320 | sregs.crs[i] = env->cregs[i]; | |
321 | } | |
860643bc CB |
322 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
323 | if (r < 0) { | |
324 | return r; | |
5b08b344 CB |
325 | } |
326 | } | |
0e60a699 | 327 | |
5b08b344 | 328 | /* Finally the prefix */ |
fdb78ec0 | 329 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
330 | cs->kvm_run->s.regs.prefix = env->psa; |
331 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
332 | } else { |
333 | /* prefix is only supported via sync regs */ | |
334 | } | |
335 | return 0; | |
0e60a699 AG |
336 | } |
337 | ||
20d695a9 | 338 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
339 | { |
340 | S390CPU *cpu = S390_CPU(cs); | |
341 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 342 | struct kvm_sregs sregs; |
0e60a699 | 343 | struct kvm_regs regs; |
85ad6230 | 344 | struct kvm_fpu fpu; |
44c68de0 | 345 | int i, r; |
420840e5 | 346 | |
5b08b344 | 347 | /* get the PSW */ |
f7575c96 AF |
348 | env->psw.addr = cs->kvm_run->psw_addr; |
349 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
350 | |
351 | /* the GPRS */ | |
fdb78ec0 | 352 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 353 | for (i = 0; i < 16; i++) { |
f7575c96 | 354 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
355 | } |
356 | } else { | |
44c68de0 DD |
357 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
358 | if (r < 0) { | |
359 | return r; | |
5b08b344 CB |
360 | } |
361 | for (i = 0; i < 16; i++) { | |
362 | env->regs[i] = regs.gprs[i]; | |
363 | } | |
0e60a699 AG |
364 | } |
365 | ||
5b08b344 | 366 | /* The ACRS and CRS */ |
fdb78ec0 | 367 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 368 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
369 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
370 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
371 | } |
372 | } else { | |
44c68de0 DD |
373 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
374 | if (r < 0) { | |
375 | return r; | |
5b08b344 CB |
376 | } |
377 | for (i = 0; i < 16; i++) { | |
378 | env->aregs[i] = sregs.acrs[i]; | |
379 | env->cregs[i] = sregs.crs[i]; | |
380 | } | |
0e60a699 AG |
381 | } |
382 | ||
85ad6230 JH |
383 | /* Floating point */ |
384 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
385 | if (r < 0) { | |
386 | return r; | |
387 | } | |
388 | for (i = 0; i < 16; i++) { | |
389 | env->fregs[i].ll = fpu.fprs[i]; | |
390 | } | |
391 | env->fpc = fpu.fpc; | |
392 | ||
44c68de0 | 393 | /* The prefix */ |
fdb78ec0 | 394 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 395 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 396 | } |
0e60a699 | 397 | |
59ac1532 DH |
398 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
399 | env->cputm = cs->kvm_run->s.regs.cputm; | |
400 | env->ckc = cs->kvm_run->s.regs.ckc; | |
401 | env->todpr = cs->kvm_run->s.regs.todpr; | |
402 | env->gbea = cs->kvm_run->s.regs.gbea; | |
403 | env->pp = cs->kvm_run->s.regs.pp; | |
404 | } else { | |
405 | /* | |
406 | * These ONE_REGS are not protected by a capability. As they are only | |
407 | * necessary for migration we just trace a possible error, but don't | |
408 | * return with an error return code. | |
409 | */ | |
410 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
411 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
412 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
413 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
414 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
415 | } | |
416 | ||
417 | /* pfault parameters */ | |
418 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
419 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
420 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
421 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
422 | } else if (cap_async_pf) { | |
860643bc | 423 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
424 | if (r < 0) { |
425 | return r; | |
426 | } | |
860643bc | 427 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
428 | if (r < 0) { |
429 | return r; | |
430 | } | |
860643bc | 431 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
432 | if (r < 0) { |
433 | return r; | |
434 | } | |
435 | } | |
436 | ||
0e60a699 AG |
437 | return 0; |
438 | } | |
439 | ||
fdec9918 CB |
440 | /* |
441 | * Legacy layout for s390: | |
442 | * Older S390 KVM requires the topmost vma of the RAM to be | |
443 | * smaller than an system defined value, which is at least 256GB. | |
444 | * Larger systems have larger values. We put the guest between | |
445 | * the end of data segment (system break) and this value. We | |
446 | * use 32GB as a base to have enough room for the system break | |
447 | * to grow. We also have to use MAP parameters that avoid | |
448 | * read-only mapping of guest pages. | |
449 | */ | |
dc622deb | 450 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
451 | { |
452 | void *mem; | |
453 | ||
454 | mem = mmap((void *) 0x800000000ULL, size, | |
455 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
456 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 457 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
458 | } |
459 | ||
8e4e86af DH |
460 | /* DIAG 501 is used for sw breakpoints */ |
461 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
462 | ||
20d695a9 | 463 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 464 | { |
0e60a699 | 465 | |
8e4e86af DH |
466 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
467 | sizeof(diag_501), 0) || | |
468 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
469 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
470 | return -EINVAL; |
471 | } | |
472 | return 0; | |
473 | } | |
474 | ||
20d695a9 | 475 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 476 | { |
8e4e86af | 477 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 478 | |
8e4e86af | 479 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 480 | return -EINVAL; |
8e4e86af | 481 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 482 | return -EINVAL; |
8e4e86af DH |
483 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
484 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
485 | return -EINVAL; |
486 | } | |
487 | ||
488 | return 0; | |
489 | } | |
490 | ||
770a6379 DH |
491 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
492 | int len, int type) | |
493 | { | |
494 | int n; | |
495 | ||
496 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
497 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
498 | (hw_breakpoints[n].len == len || len == -1)) { | |
499 | return &hw_breakpoints[n]; | |
500 | } | |
501 | } | |
502 | ||
503 | return NULL; | |
504 | } | |
505 | ||
506 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
507 | { | |
508 | int size; | |
509 | ||
510 | if (find_hw_breakpoint(addr, len, type)) { | |
511 | return -EEXIST; | |
512 | } | |
513 | ||
514 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
515 | ||
516 | if (!hw_breakpoints) { | |
517 | nb_hw_breakpoints = 0; | |
518 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
519 | } else { | |
520 | hw_breakpoints = | |
521 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
522 | } | |
523 | ||
524 | if (!hw_breakpoints) { | |
525 | nb_hw_breakpoints = 0; | |
526 | return -ENOMEM; | |
527 | } | |
528 | ||
529 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
530 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
531 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
532 | ||
533 | nb_hw_breakpoints++; | |
534 | ||
535 | return 0; | |
536 | } | |
537 | ||
8c012449 DH |
538 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
539 | target_ulong len, int type) | |
540 | { | |
770a6379 DH |
541 | switch (type) { |
542 | case GDB_BREAKPOINT_HW: | |
543 | type = KVM_HW_BP; | |
544 | break; | |
545 | case GDB_WATCHPOINT_WRITE: | |
546 | if (len < 1) { | |
547 | return -EINVAL; | |
548 | } | |
549 | type = KVM_HW_WP_WRITE; | |
550 | break; | |
551 | default: | |
552 | return -ENOSYS; | |
553 | } | |
554 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
555 | } |
556 | ||
557 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
558 | target_ulong len, int type) | |
559 | { | |
770a6379 DH |
560 | int size; |
561 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
562 | ||
563 | if (bp == NULL) { | |
564 | return -ENOENT; | |
565 | } | |
566 | ||
567 | nb_hw_breakpoints--; | |
568 | if (nb_hw_breakpoints > 0) { | |
569 | /* | |
570 | * In order to trim the array, move the last element to the position to | |
571 | * be removed - if necessary. | |
572 | */ | |
573 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
574 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
575 | } | |
576 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
577 | hw_breakpoints = | |
578 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
579 | } else { | |
580 | g_free(hw_breakpoints); | |
581 | hw_breakpoints = NULL; | |
582 | } | |
583 | ||
584 | return 0; | |
8c012449 DH |
585 | } |
586 | ||
587 | void kvm_arch_remove_all_hw_breakpoints(void) | |
588 | { | |
770a6379 DH |
589 | nb_hw_breakpoints = 0; |
590 | g_free(hw_breakpoints); | |
591 | hw_breakpoints = NULL; | |
8c012449 DH |
592 | } |
593 | ||
594 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
595 | { | |
770a6379 DH |
596 | int i; |
597 | ||
598 | if (nb_hw_breakpoints > 0) { | |
599 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
600 | dbg->arch.hw_bp = hw_breakpoints; | |
601 | ||
602 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
603 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
604 | hw_breakpoints[i].addr); | |
605 | } | |
606 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
607 | } else { | |
608 | dbg->arch.nr_hw_bp = 0; | |
609 | dbg->arch.hw_bp = NULL; | |
610 | } | |
8c012449 DH |
611 | } |
612 | ||
20d695a9 | 613 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 614 | { |
0e60a699 AG |
615 | } |
616 | ||
20d695a9 | 617 | void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 618 | { |
0e60a699 AG |
619 | } |
620 | ||
20d695a9 | 621 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 622 | { |
225dc991 | 623 | return cs->halted; |
0af691d7 MT |
624 | } |
625 | ||
66ad0893 CH |
626 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
627 | struct kvm_s390_interrupt *interrupt) | |
628 | { | |
629 | int r = 0; | |
630 | ||
631 | interrupt->type = irq->type; | |
632 | switch (irq->type) { | |
633 | case KVM_S390_INT_VIRTIO: | |
634 | interrupt->parm = irq->u.ext.ext_params; | |
635 | /* fall through */ | |
636 | case KVM_S390_INT_PFAULT_INIT: | |
637 | case KVM_S390_INT_PFAULT_DONE: | |
638 | interrupt->parm64 = irq->u.ext.ext_params2; | |
639 | break; | |
640 | case KVM_S390_PROGRAM_INT: | |
641 | interrupt->parm = irq->u.pgm.code; | |
642 | break; | |
643 | case KVM_S390_SIGP_SET_PREFIX: | |
644 | interrupt->parm = irq->u.prefix.address; | |
645 | break; | |
646 | case KVM_S390_INT_SERVICE: | |
647 | interrupt->parm = irq->u.ext.ext_params; | |
648 | break; | |
649 | case KVM_S390_MCHK: | |
650 | interrupt->parm = irq->u.mchk.cr14; | |
651 | interrupt->parm64 = irq->u.mchk.mcic; | |
652 | break; | |
653 | case KVM_S390_INT_EXTERNAL_CALL: | |
654 | interrupt->parm = irq->u.extcall.code; | |
655 | break; | |
656 | case KVM_S390_INT_EMERGENCY: | |
657 | interrupt->parm = irq->u.emerg.code; | |
658 | break; | |
659 | case KVM_S390_SIGP_STOP: | |
660 | case KVM_S390_RESTART: | |
661 | break; /* These types have no parameters */ | |
662 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
663 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
664 | interrupt->parm |= irq->u.io.subchannel_nr; | |
665 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
666 | interrupt->parm64 |= irq->u.io.io_int_word; | |
667 | break; | |
668 | default: | |
669 | r = -EINVAL; | |
670 | break; | |
671 | } | |
672 | return r; | |
673 | } | |
674 | ||
675 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) | |
676 | { | |
677 | struct kvm_s390_interrupt kvmint = {}; | |
678 | CPUState *cs = CPU(cpu); | |
679 | int r; | |
680 | ||
681 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
682 | if (r < 0) { | |
683 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
684 | exit(1); | |
685 | } | |
686 | ||
687 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
688 | if (r < 0) { | |
689 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
690 | exit(1); | |
691 | } | |
692 | } | |
693 | ||
bbd8bb8e | 694 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
695 | { |
696 | struct kvm_s390_interrupt kvmint = {}; | |
697 | int r; | |
698 | ||
699 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
700 | if (r < 0) { | |
701 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
702 | exit(1); | |
703 | } | |
704 | ||
705 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
706 | if (r < 0) { | |
707 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
708 | exit(1); | |
709 | } | |
710 | } | |
711 | ||
bbd8bb8e CH |
712 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
713 | { | |
714 | static bool use_flic = true; | |
715 | int r; | |
716 | ||
717 | if (use_flic) { | |
718 | r = kvm_s390_inject_flic(irq); | |
719 | if (r == -ENOSYS) { | |
720 | use_flic = false; | |
721 | } | |
722 | if (!r) { | |
723 | return; | |
724 | } | |
725 | } | |
726 | __kvm_s390_floating_interrupt(irq); | |
727 | } | |
728 | ||
de13d216 | 729 | void kvm_s390_virtio_irq(int config_change, uint64_t token) |
0e60a699 | 730 | { |
de13d216 CH |
731 | struct kvm_s390_irq irq = { |
732 | .type = KVM_S390_INT_VIRTIO, | |
733 | .u.ext.ext_params = config_change, | |
734 | .u.ext.ext_params2 = token, | |
735 | }; | |
0e60a699 | 736 | |
de13d216 | 737 | kvm_s390_floating_interrupt(&irq); |
0e60a699 AG |
738 | } |
739 | ||
de13d216 | 740 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 741 | { |
de13d216 CH |
742 | struct kvm_s390_irq irq = { |
743 | .type = KVM_S390_INT_SERVICE, | |
744 | .u.ext.ext_params = parm, | |
745 | }; | |
0e60a699 | 746 | |
de13d216 | 747 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
748 | } |
749 | ||
1bc22652 | 750 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 751 | { |
de13d216 CH |
752 | struct kvm_s390_irq irq = { |
753 | .type = KVM_S390_PROGRAM_INT, | |
754 | .u.pgm.code = code, | |
755 | }; | |
756 | ||
757 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
758 | } |
759 | ||
801cdd35 TH |
760 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
761 | { | |
762 | struct kvm_s390_irq irq = { | |
763 | .type = KVM_S390_PROGRAM_INT, | |
764 | .u.pgm.code = code, | |
765 | .u.pgm.trans_exc_code = te_code, | |
766 | .u.pgm.exc_access_id = te_code & 3, | |
767 | }; | |
768 | ||
769 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
770 | } | |
771 | ||
1bc22652 | 772 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 773 | uint16_t ipbh0) |
0e60a699 | 774 | { |
1bc22652 | 775 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
776 | uint64_t sccb; |
777 | uint32_t code; | |
0e60a699 AG |
778 | int r = 0; |
779 | ||
cb446eca | 780 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
781 | sccb = env->regs[ipbh0 & 0xf]; |
782 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
783 | ||
6e252802 | 784 | r = sclp_service_call(env, sccb, code); |
9abf567d | 785 | if (r < 0) { |
1bc22652 | 786 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
787 | } else { |
788 | setcc(cpu, r); | |
0e60a699 | 789 | } |
81f7c56c | 790 | |
0e60a699 AG |
791 | return 0; |
792 | } | |
793 | ||
1eecf41b | 794 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 795 | { |
09b99878 | 796 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
797 | int rc = 0; |
798 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 799 | |
44c68de0 | 800 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 801 | |
09b99878 | 802 | switch (ipa1) { |
1eecf41b | 803 | case PRIV_B2_XSCH: |
5d9bf1c0 | 804 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 805 | break; |
1eecf41b | 806 | case PRIV_B2_CSCH: |
5d9bf1c0 | 807 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 808 | break; |
1eecf41b | 809 | case PRIV_B2_HSCH: |
5d9bf1c0 | 810 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 811 | break; |
1eecf41b | 812 | case PRIV_B2_MSCH: |
5d9bf1c0 | 813 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 814 | break; |
1eecf41b | 815 | case PRIV_B2_SSCH: |
5d9bf1c0 | 816 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 817 | break; |
1eecf41b | 818 | case PRIV_B2_STCRW: |
5d9bf1c0 | 819 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 820 | break; |
1eecf41b | 821 | case PRIV_B2_STSCH: |
5d9bf1c0 | 822 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 823 | break; |
1eecf41b | 824 | case PRIV_B2_TSCH: |
09b99878 CH |
825 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
826 | fprintf(stderr, "Spurious tsch intercept\n"); | |
827 | break; | |
1eecf41b | 828 | case PRIV_B2_CHSC: |
5d9bf1c0 | 829 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 830 | break; |
1eecf41b | 831 | case PRIV_B2_TPI: |
09b99878 CH |
832 | /* This should have been handled by kvm already. */ |
833 | fprintf(stderr, "Spurious tpi intercept\n"); | |
834 | break; | |
1eecf41b | 835 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
836 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
837 | run->s390_sieic.ipb); | |
09b99878 | 838 | break; |
1eecf41b | 839 | case PRIV_B2_RSCH: |
5d9bf1c0 | 840 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 841 | break; |
1eecf41b | 842 | case PRIV_B2_RCHP: |
5d9bf1c0 | 843 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 844 | break; |
1eecf41b | 845 | case PRIV_B2_STCPS: |
09b99878 | 846 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 847 | break; |
1eecf41b | 848 | case PRIV_B2_SAL: |
5d9bf1c0 | 849 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 850 | break; |
1eecf41b | 851 | case PRIV_B2_SIGA: |
c1e8dfb5 | 852 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 853 | setcc(cpu, 3); |
09b99878 | 854 | break; |
1eecf41b FB |
855 | case PRIV_B2_SCLP_CALL: |
856 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
857 | break; | |
c1e8dfb5 | 858 | default: |
1eecf41b FB |
859 | rc = -1; |
860 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
861 | break; | |
09b99878 CH |
862 | } |
863 | ||
1eecf41b | 864 | return rc; |
09b99878 CH |
865 | } |
866 | ||
863f6f52 FB |
867 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run) |
868 | { | |
869 | CPUS390XState *env = &cpu->env; | |
870 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
871 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
872 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
873 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
874 | ||
875 | if (disp2 & 0x80000) { | |
876 | disp2 += 0xfff00000; | |
877 | } | |
878 | ||
879 | return (base2 ? env->regs[base2] : 0) + | |
880 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
881 | } | |
882 | ||
883 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run) | |
884 | { | |
885 | CPUS390XState *env = &cpu->env; | |
886 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
887 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
888 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
889 | ||
890 | if (disp2 & 0x80000) { | |
891 | disp2 += 0xfff00000; | |
892 | } | |
893 | ||
894 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
895 | } | |
896 | ||
897 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
898 | { | |
899 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
900 | ||
901 | return clp_service_call(cpu, r2); | |
902 | } | |
903 | ||
904 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
905 | { | |
906 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
907 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
908 | ||
909 | return pcilg_service_call(cpu, r1, r2); | |
910 | } | |
911 | ||
912 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
913 | { | |
914 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
915 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
916 | ||
917 | return pcistg_service_call(cpu, r1, r2); | |
918 | } | |
919 | ||
920 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
921 | { | |
922 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
923 | uint64_t fiba; | |
924 | ||
925 | cpu_synchronize_state(CPU(cpu)); | |
926 | fiba = get_base_disp_rxy(cpu, run); | |
927 | ||
928 | return stpcifc_service_call(cpu, r1, fiba); | |
929 | } | |
930 | ||
931 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
932 | { | |
933 | /* NOOP */ | |
934 | return 0; | |
935 | } | |
936 | ||
937 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
938 | { | |
939 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
940 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
941 | ||
942 | return rpcit_service_call(cpu, r1, r2); | |
943 | } | |
944 | ||
945 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
946 | { | |
947 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
948 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
949 | uint64_t gaddr; | |
950 | ||
951 | cpu_synchronize_state(CPU(cpu)); | |
952 | gaddr = get_base_disp_rsy(cpu, run); | |
953 | ||
954 | return pcistb_service_call(cpu, r1, r3, gaddr); | |
955 | } | |
956 | ||
957 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
958 | { | |
959 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
960 | uint64_t fiba; | |
961 | ||
962 | cpu_synchronize_state(CPU(cpu)); | |
963 | fiba = get_base_disp_rxy(cpu, run); | |
964 | ||
965 | return mpcifc_service_call(cpu, r1, fiba); | |
966 | } | |
967 | ||
1eecf41b | 968 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
969 | { |
970 | int r = 0; | |
0e60a699 | 971 | |
0e60a699 | 972 | switch (ipa1) { |
863f6f52 FB |
973 | case PRIV_B9_CLP: |
974 | r = kvm_clp_service_call(cpu, run); | |
975 | break; | |
976 | case PRIV_B9_PCISTG: | |
977 | r = kvm_pcistg_service_call(cpu, run); | |
978 | break; | |
979 | case PRIV_B9_PCILG: | |
980 | r = kvm_pcilg_service_call(cpu, run); | |
981 | break; | |
982 | case PRIV_B9_RPCIT: | |
983 | r = kvm_rpcit_service_call(cpu, run); | |
984 | break; | |
1eecf41b FB |
985 | case PRIV_B9_EQBS: |
986 | /* just inject exception */ | |
987 | r = -1; | |
988 | break; | |
989 | default: | |
990 | r = -1; | |
991 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
992 | break; | |
993 | } | |
994 | ||
995 | return r; | |
996 | } | |
997 | ||
80765f07 | 998 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
999 | { |
1000 | int r = 0; | |
1001 | ||
80765f07 | 1002 | switch (ipbl) { |
863f6f52 FB |
1003 | case PRIV_EB_PCISTB: |
1004 | r = kvm_pcistb_service_call(cpu, run); | |
1005 | break; | |
1006 | case PRIV_EB_SIC: | |
1007 | r = kvm_sic_service_call(cpu, run); | |
1008 | break; | |
1eecf41b FB |
1009 | case PRIV_EB_SQBS: |
1010 | /* just inject exception */ | |
1011 | r = -1; | |
1012 | break; | |
1013 | default: | |
1014 | r = -1; | |
80765f07 | 1015 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1016 | break; |
0e60a699 AG |
1017 | } |
1018 | ||
1019 | return r; | |
1020 | } | |
1021 | ||
863f6f52 FB |
1022 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1023 | { | |
1024 | int r = 0; | |
1025 | ||
1026 | switch (ipbl) { | |
1027 | case PRIV_E3_MPCIFC: | |
1028 | r = kvm_mpcifc_service_call(cpu, run); | |
1029 | break; | |
1030 | case PRIV_E3_STPCIFC: | |
1031 | r = kvm_stpcifc_service_call(cpu, run); | |
1032 | break; | |
1033 | default: | |
1034 | r = -1; | |
1035 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1036 | break; | |
1037 | } | |
1038 | ||
1039 | return r; | |
1040 | } | |
1041 | ||
4fd6dd06 | 1042 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1043 | { |
4fd6dd06 | 1044 | CPUS390XState *env = &cpu->env; |
77319f22 | 1045 | int ret; |
3474b679 | 1046 | |
44c68de0 | 1047 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1048 | ret = s390_virtio_hypercall(env); |
1049 | if (ret == -EINVAL) { | |
1050 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1051 | return 0; | |
1052 | } | |
0e60a699 | 1053 | |
77319f22 | 1054 | return ret; |
0e60a699 AG |
1055 | } |
1056 | ||
268846ba ED |
1057 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1058 | { | |
1059 | uint64_t r1, r3; | |
1060 | ||
1061 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1062 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1063 | r3 = run->s390_sieic.ipa & 0x000f; |
1064 | handle_diag_308(&cpu->env, r1, r3); | |
1065 | } | |
1066 | ||
b30f4dfb DH |
1067 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1068 | { | |
1069 | CPUS390XState *env = &cpu->env; | |
1070 | unsigned long pc; | |
1071 | ||
1072 | cpu_synchronize_state(CPU(cpu)); | |
1073 | ||
1074 | pc = env->psw.addr - 4; | |
1075 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1076 | env->psw.addr = pc; | |
1077 | return EXCP_DEBUG; | |
1078 | } | |
1079 | ||
1080 | return -ENOENT; | |
1081 | } | |
1082 | ||
638129ff CH |
1083 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1084 | ||
1085 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1086 | { |
1087 | int r = 0; | |
638129ff CH |
1088 | uint16_t func_code; |
1089 | ||
1090 | /* | |
1091 | * For any diagnose call we support, bits 48-63 of the resulting | |
1092 | * address specify the function code; the remainder is ignored. | |
1093 | */ | |
1094 | func_code = decode_basedisp_rs(&cpu->env, ipb) & DIAG_KVM_CODE_MASK; | |
1095 | switch (func_code) { | |
268846ba ED |
1096 | case DIAG_IPL: |
1097 | kvm_handle_diag_308(cpu, run); | |
1098 | break; | |
39fbc5c6 CB |
1099 | case DIAG_KVM_HYPERCALL: |
1100 | r = handle_hypercall(cpu, run); | |
1101 | break; | |
1102 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1103 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1104 | break; |
1105 | default: | |
638129ff | 1106 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1107 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1108 | break; |
0e60a699 AG |
1109 | } |
1110 | ||
1111 | return r; | |
1112 | } | |
1113 | ||
6e6ad8db | 1114 | static void sigp_cpu_start(void *arg) |
b20a461f | 1115 | { |
6e6ad8db DH |
1116 | CPUState *cs = arg; |
1117 | S390CPU *cpu = S390_CPU(cs); | |
1118 | ||
eb24f7c6 | 1119 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
b20a461f | 1120 | DPRINTF("DONE: KVM cpu start: %p\n", &cpu->env); |
b20a461f TH |
1121 | } |
1122 | ||
6e6ad8db | 1123 | static void sigp_cpu_restart(void *arg) |
0e60a699 | 1124 | { |
6e6ad8db DH |
1125 | CPUState *cs = arg; |
1126 | S390CPU *cpu = S390_CPU(cs); | |
de13d216 CH |
1127 | struct kvm_s390_irq irq = { |
1128 | .type = KVM_S390_RESTART, | |
1129 | }; | |
1130 | ||
1131 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
eb24f7c6 | 1132 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
6e6ad8db DH |
1133 | } |
1134 | ||
1135 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1136 | { | |
1137 | run_on_cpu(CPU(cpu), sigp_cpu_restart, CPU(cpu)); | |
7f7f9752 | 1138 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1139 | return 0; |
1140 | } | |
1141 | ||
f7d3e466 | 1142 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1143 | { |
f7d3e466 TH |
1144 | CPUState *cpu = arg; |
1145 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
d5900813 | 1146 | |
f7d3e466 TH |
1147 | cpu_synchronize_state(cpu); |
1148 | scc->initial_cpu_reset(cpu); | |
71dd7e69 | 1149 | cpu_synchronize_post_reset(cpu); |
0e60a699 AG |
1150 | } |
1151 | ||
04c2b516 TH |
1152 | static void sigp_cpu_reset(void *arg) |
1153 | { | |
1154 | CPUState *cpu = arg; | |
1155 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
1156 | ||
1157 | cpu_synchronize_state(cpu); | |
1158 | scc->cpu_reset(cpu); | |
71dd7e69 | 1159 | cpu_synchronize_post_reset(cpu); |
04c2b516 TH |
1160 | } |
1161 | ||
b8031adb TH |
1162 | #define SIGP_ORDER_MASK 0x000000ff |
1163 | ||
f7575c96 | 1164 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1165 | { |
f7575c96 | 1166 | CPUS390XState *env = &cpu->env; |
0e60a699 | 1167 | uint8_t order_code; |
0e60a699 | 1168 | uint16_t cpu_addr; |
45fa769b | 1169 | S390CPU *target_cpu; |
3796f0e1 TH |
1170 | uint64_t *statusreg = &env->regs[ipa1 >> 4]; |
1171 | int cc; | |
0e60a699 | 1172 | |
cb446eca | 1173 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1174 | |
1175 | /* get order code */ | |
b8031adb | 1176 | order_code = decode_basedisp_rs(env, run->s390_sieic.ipb) & SIGP_ORDER_MASK; |
0e60a699 | 1177 | |
0e60a699 | 1178 | cpu_addr = env->regs[ipa1 & 0x0f]; |
45fa769b AF |
1179 | target_cpu = s390_cpu_addr2state(cpu_addr); |
1180 | if (target_cpu == NULL) { | |
3796f0e1 | 1181 | cc = 3; /* not operational */ |
0e60a699 AG |
1182 | goto out; |
1183 | } | |
1184 | ||
1185 | switch (order_code) { | |
b20a461f | 1186 | case SIGP_START: |
6e6ad8db DH |
1187 | run_on_cpu(CPU(target_cpu), sigp_cpu_start, CPU(target_cpu)); |
1188 | cc = 0; | |
b20a461f | 1189 | break; |
0b9972a2 | 1190 | case SIGP_RESTART: |
6e6ad8db DH |
1191 | run_on_cpu(CPU(target_cpu), sigp_cpu_restart, CPU(target_cpu)); |
1192 | cc = 0; | |
0b9972a2 TH |
1193 | break; |
1194 | case SIGP_SET_ARCH: | |
0788082a TH |
1195 | *statusreg &= 0xffffffff00000000UL; |
1196 | *statusreg |= SIGP_STAT_INVALID_PARAMETER; | |
1197 | cc = 1; /* status stored */ | |
1198 | break; | |
0b9972a2 | 1199 | case SIGP_INITIAL_CPU_RESET: |
f7d3e466 TH |
1200 | run_on_cpu(CPU(target_cpu), sigp_initial_cpu_reset, CPU(target_cpu)); |
1201 | cc = 0; | |
0b9972a2 | 1202 | break; |
04c2b516 TH |
1203 | case SIGP_CPU_RESET: |
1204 | run_on_cpu(CPU(target_cpu), sigp_cpu_reset, CPU(target_cpu)); | |
1205 | cc = 0; | |
1206 | break; | |
0b9972a2 | 1207 | default: |
3796f0e1 TH |
1208 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order_code); |
1209 | *statusreg &= 0xffffffff00000000UL; | |
1210 | *statusreg |= SIGP_STAT_INVALID_ORDER; | |
1211 | cc = 1; /* status stored */ | |
0b9972a2 | 1212 | break; |
0e60a699 AG |
1213 | } |
1214 | ||
1215 | out: | |
3796f0e1 | 1216 | setcc(cpu, cc); |
0e60a699 AG |
1217 | return 0; |
1218 | } | |
1219 | ||
b30f4dfb | 1220 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1221 | { |
1222 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1223 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1224 | int r = -1; |
0e60a699 | 1225 | |
e67137c6 PM |
1226 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1227 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1228 | switch (ipa0) { |
09b99878 | 1229 | case IPA0_B2: |
1eecf41b FB |
1230 | r = handle_b2(cpu, run, ipa1); |
1231 | break; | |
09b99878 | 1232 | case IPA0_B9: |
1eecf41b FB |
1233 | r = handle_b9(cpu, run, ipa1); |
1234 | break; | |
09b99878 | 1235 | case IPA0_EB: |
80765f07 | 1236 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1237 | break; |
863f6f52 FB |
1238 | case IPA0_E3: |
1239 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1240 | break; | |
09b99878 | 1241 | case IPA0_DIAG: |
638129ff | 1242 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1243 | break; |
1244 | case IPA0_SIGP: | |
1245 | r = handle_sigp(cpu, run, ipa1); | |
1246 | break; | |
0e60a699 AG |
1247 | } |
1248 | ||
1249 | if (r < 0) { | |
b30f4dfb | 1250 | r = 0; |
1bc22652 | 1251 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1252 | } |
b30f4dfb DH |
1253 | |
1254 | return r; | |
0e60a699 AG |
1255 | } |
1256 | ||
f7575c96 | 1257 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1258 | { |
1259 | /* signal quiesce */ | |
f7575c96 | 1260 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1261 | } |
1262 | ||
a2689242 TH |
1263 | static void guest_panicked(void) |
1264 | { | |
3a449690 WX |
1265 | qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, |
1266 | &error_abort); | |
a2689242 TH |
1267 | vm_stop(RUN_STATE_GUEST_PANICKED); |
1268 | } | |
1269 | ||
1270 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) | |
1271 | { | |
1272 | CPUState *cs = CPU(cpu); | |
1273 | ||
1274 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1275 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1276 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1277 | s390_cpu_halt(cpu); |
a2689242 TH |
1278 | guest_panicked(); |
1279 | } | |
1280 | ||
1bc22652 | 1281 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1282 | { |
f7575c96 AF |
1283 | CPUState *cs = CPU(cpu); |
1284 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1285 | int icpt_code = run->s390_sieic.icptcode; |
1286 | int r = 0; | |
1287 | ||
e67137c6 | 1288 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1289 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1290 | switch (icpt_code) { |
1291 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1292 | r = handle_instruction(cpu, run); |
0e60a699 | 1293 | break; |
6449a41a TH |
1294 | case ICPT_PROGRAM: |
1295 | unmanageable_intercept(cpu, "program interrupt", | |
1296 | offsetof(LowCore, program_new_psw)); | |
1297 | r = EXCP_HALTED; | |
1298 | break; | |
a2689242 TH |
1299 | case ICPT_EXT_INT: |
1300 | unmanageable_intercept(cpu, "external interrupt", | |
1301 | offsetof(LowCore, external_new_psw)); | |
1302 | r = EXCP_HALTED; | |
1303 | break; | |
0e60a699 | 1304 | case ICPT_WAITPSW: |
08eb8c85 | 1305 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1306 | cpu_synchronize_state(cs); |
1307 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1308 | if (is_special_wait_psw(cs)) { |
1309 | qemu_system_shutdown_request(); | |
1310 | } else { | |
a2689242 | 1311 | guest_panicked(); |
08eb8c85 | 1312 | } |
eca3ed03 CB |
1313 | } |
1314 | r = EXCP_HALTED; | |
1315 | break; | |
854e42f3 | 1316 | case ICPT_CPU_STOP: |
eb24f7c6 | 1317 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1318 | qemu_system_shutdown_request(); |
1319 | } | |
1320 | r = EXCP_HALTED; | |
0e60a699 AG |
1321 | break; |
1322 | case ICPT_SOFT_INTERCEPT: | |
1323 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1324 | exit(1); | |
1325 | break; | |
0e60a699 AG |
1326 | case ICPT_IO: |
1327 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1328 | exit(1); | |
1329 | break; | |
1330 | default: | |
1331 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1332 | exit(1); | |
1333 | break; | |
1334 | } | |
1335 | ||
1336 | return r; | |
1337 | } | |
1338 | ||
09b99878 CH |
1339 | static int handle_tsch(S390CPU *cpu) |
1340 | { | |
09b99878 CH |
1341 | CPUState *cs = CPU(cpu); |
1342 | struct kvm_run *run = cs->kvm_run; | |
1343 | int ret; | |
1344 | ||
44c68de0 | 1345 | cpu_synchronize_state(cs); |
3474b679 | 1346 | |
653b0809 TH |
1347 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1348 | if (ret < 0) { | |
09b99878 CH |
1349 | /* |
1350 | * Failure. | |
1351 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1352 | */ | |
1353 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1354 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1355 | run->s390_tsch.subchannel_nr, | |
1356 | run->s390_tsch.io_int_parm, | |
1357 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1358 | } |
1359 | ret = 0; | |
1360 | } | |
1361 | return ret; | |
1362 | } | |
1363 | ||
8c012449 DH |
1364 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1365 | { | |
770a6379 DH |
1366 | CPUState *cs = CPU(cpu); |
1367 | struct kvm_run *run = cs->kvm_run; | |
1368 | ||
1369 | int ret = 0; | |
1370 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1371 | ||
1372 | switch (arch_info->type) { | |
1373 | case KVM_HW_WP_WRITE: | |
1374 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1375 | cs->watchpoint_hit = &hw_watchpoint; | |
1376 | hw_watchpoint.vaddr = arch_info->addr; | |
1377 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1378 | ret = EXCP_DEBUG; | |
1379 | } | |
1380 | break; | |
1381 | case KVM_HW_BP: | |
1382 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1383 | ret = EXCP_DEBUG; | |
1384 | } | |
1385 | break; | |
1386 | case KVM_SINGLESTEP: | |
1387 | if (cs->singlestep_enabled) { | |
1388 | ret = EXCP_DEBUG; | |
1389 | } | |
1390 | break; | |
1391 | default: | |
1392 | ret = -ENOSYS; | |
1393 | } | |
1394 | ||
1395 | return ret; | |
8c012449 DH |
1396 | } |
1397 | ||
20d695a9 | 1398 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 1399 | { |
20d695a9 | 1400 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
1401 | int ret = 0; |
1402 | ||
1403 | switch (run->exit_reason) { | |
1404 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 1405 | ret = handle_intercept(cpu); |
0e60a699 AG |
1406 | break; |
1407 | case KVM_EXIT_S390_RESET: | |
e91e972c | 1408 | s390_reipl_request(); |
0e60a699 | 1409 | break; |
09b99878 CH |
1410 | case KVM_EXIT_S390_TSCH: |
1411 | ret = handle_tsch(cpu); | |
1412 | break; | |
8c012449 DH |
1413 | case KVM_EXIT_DEBUG: |
1414 | ret = kvm_arch_handle_debug_exit(cpu); | |
1415 | break; | |
0e60a699 AG |
1416 | default: |
1417 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
1418 | break; | |
1419 | } | |
1420 | ||
bb4ea393 JK |
1421 | if (ret == 0) { |
1422 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 1423 | } |
0e60a699 AG |
1424 | return ret; |
1425 | } | |
4513d923 | 1426 | |
20d695a9 | 1427 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
1428 | { |
1429 | return true; | |
1430 | } | |
a1b87fe0 | 1431 | |
20d695a9 | 1432 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
1433 | { |
1434 | return 1; | |
1435 | } | |
1436 | ||
1437 | int kvm_arch_on_sigbus(int code, void *addr) | |
1438 | { | |
1439 | return 1; | |
1440 | } | |
09b99878 | 1441 | |
de13d216 | 1442 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
1443 | uint16_t subchannel_nr, uint32_t io_int_parm, |
1444 | uint32_t io_int_word) | |
1445 | { | |
de13d216 CH |
1446 | struct kvm_s390_irq irq = { |
1447 | .u.io.subchannel_id = subchannel_id, | |
1448 | .u.io.subchannel_nr = subchannel_nr, | |
1449 | .u.io.io_int_parm = io_int_parm, | |
1450 | .u.io.io_int_word = io_int_word, | |
1451 | }; | |
09b99878 | 1452 | |
7e749462 | 1453 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 1454 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 1455 | } else { |
de13d216 | 1456 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
1457 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
1458 | } | |
de13d216 | 1459 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
1460 | } |
1461 | ||
de13d216 | 1462 | void kvm_s390_crw_mchk(void) |
09b99878 | 1463 | { |
de13d216 CH |
1464 | struct kvm_s390_irq irq = { |
1465 | .type = KVM_S390_MCHK, | |
1466 | .u.mchk.cr14 = 1 << 28, | |
f0d4dc18 | 1467 | .u.mchk.mcic = 0x00400f1d40330000ULL, |
de13d216 CH |
1468 | }; |
1469 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
1470 | } |
1471 | ||
1472 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
1473 | { | |
09b99878 CH |
1474 | int r; |
1475 | ||
1476 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 1477 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
1478 | assert(r == 0); |
1479 | } | |
48475e14 AK |
1480 | |
1481 | void kvm_arch_init_irq_routing(KVMState *s) | |
1482 | { | |
d426d9fb CH |
1483 | /* |
1484 | * Note that while irqchip capabilities generally imply that cpustates | |
1485 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
1486 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
1487 | */ | |
1488 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
1489 | kvm_gsi_routing_allowed = true; |
1490 | kvm_halt_in_kernel_allowed = false; | |
1491 | } | |
48475e14 | 1492 | } |
b4436a0b | 1493 | |
cc3ac9c4 CH |
1494 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
1495 | int vq, bool assign) | |
b4436a0b CH |
1496 | { |
1497 | struct kvm_ioeventfd kick = { | |
1498 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
1499 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 1500 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
1501 | .datamatch = vq, |
1502 | .addr = sch, | |
1503 | .len = 8, | |
1504 | }; | |
1505 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
1506 | return -ENOSYS; | |
1507 | } | |
1508 | if (!assign) { | |
1509 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
1510 | } | |
1511 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
1512 | } | |
1def6656 MR |
1513 | |
1514 | int kvm_s390_get_memslot_count(KVMState *s) | |
1515 | { | |
1516 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
1517 | } | |
c9e659c9 DH |
1518 | |
1519 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) | |
1520 | { | |
1521 | struct kvm_mp_state mp_state = {}; | |
1522 | int ret; | |
1523 | ||
1524 | /* the kvm part might not have been initialized yet */ | |
1525 | if (CPU(cpu)->kvm_state == NULL) { | |
1526 | return 0; | |
1527 | } | |
1528 | ||
1529 | switch (cpu_state) { | |
1530 | case CPU_STATE_STOPPED: | |
1531 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
1532 | break; | |
1533 | case CPU_STATE_CHECK_STOP: | |
1534 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
1535 | break; | |
1536 | case CPU_STATE_OPERATING: | |
1537 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
1538 | break; | |
1539 | case CPU_STATE_LOAD: | |
1540 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
1541 | break; | |
1542 | default: | |
1543 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
1544 | cpu_state); | |
1545 | exit(1); | |
1546 | } | |
1547 | ||
1548 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
1549 | if (ret) { | |
1550 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
1551 | strerror(-ret)); | |
1552 | } | |
1553 | ||
1554 | return ret; | |
1555 | } | |
9e03a040 FB |
1556 | |
1557 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, | |
1558 | uint64_t address, uint32_t data) | |
1559 | { | |
1560 | S390PCIBusDevice *pbdev; | |
1561 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
1562 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
1563 | ||
1564 | pbdev = s390_pci_find_dev_by_fid(fid); | |
1565 | if (!pbdev) { | |
1566 | DPRINTF("add_msi_route no dev\n"); | |
1567 | return -ENODEV; | |
1568 | } | |
1569 | ||
1570 | pbdev->routes.adapter.ind_offset = vec; | |
1571 | ||
1572 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
1573 | route->flags = 0; | |
1574 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
1575 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
1576 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
1577 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
1578 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
1579 | return 0; | |
1580 | } |