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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
9615495a | 24 | #include "qemu/osdep.h" |
0e60a699 AG |
25 | #include <sys/ioctl.h> |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
d49b6836 | 32 | #include "qemu/error-report.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 PB |
34 | #include "sysemu/sysemu.h" |
35 | #include "sysemu/kvm.h" | |
4cb88c3c | 36 | #include "hw/hw.h" |
0e60a699 | 37 | #include "cpu.h" |
9c17d615 | 38 | #include "sysemu/device_tree.h" |
08eb8c85 | 39 | #include "qapi/qmp/qjson.h" |
770a6379 | 40 | #include "exec/gdbstub.h" |
18ff9494 | 41 | #include "exec/address-spaces.h" |
860643bc | 42 | #include "trace.h" |
3a449690 | 43 | #include "qapi-event.h" |
863f6f52 | 44 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 45 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 46 | #include "hw/s390x/ipl.h" |
f07177a5 | 47 | #include "hw/s390x/ebcdic.h" |
4c663752 | 48 | #include "exec/memattrs.h" |
0e60a699 AG |
49 | |
50 | /* #define DEBUG_KVM */ | |
51 | ||
52 | #ifdef DEBUG_KVM | |
e67137c6 | 53 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
54 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
55 | #else | |
e67137c6 | 56 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
57 | do { } while (0) |
58 | #endif | |
59 | ||
2b147555 DD |
60 | #define kvm_vm_check_mem_attr(s, attr) \ |
61 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
62 | ||
0e60a699 AG |
63 | #define IPA0_DIAG 0x8300 |
64 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
65 | #define IPA0_B2 0xb200 |
66 | #define IPA0_B9 0xb900 | |
67 | #define IPA0_EB 0xeb00 | |
863f6f52 | 68 | #define IPA0_E3 0xe300 |
0e60a699 | 69 | |
1eecf41b FB |
70 | #define PRIV_B2_SCLP_CALL 0x20 |
71 | #define PRIV_B2_CSCH 0x30 | |
72 | #define PRIV_B2_HSCH 0x31 | |
73 | #define PRIV_B2_MSCH 0x32 | |
74 | #define PRIV_B2_SSCH 0x33 | |
75 | #define PRIV_B2_STSCH 0x34 | |
76 | #define PRIV_B2_TSCH 0x35 | |
77 | #define PRIV_B2_TPI 0x36 | |
78 | #define PRIV_B2_SAL 0x37 | |
79 | #define PRIV_B2_RSCH 0x38 | |
80 | #define PRIV_B2_STCRW 0x39 | |
81 | #define PRIV_B2_STCPS 0x3a | |
82 | #define PRIV_B2_RCHP 0x3b | |
83 | #define PRIV_B2_SCHM 0x3c | |
84 | #define PRIV_B2_CHSC 0x5f | |
85 | #define PRIV_B2_SIGA 0x74 | |
86 | #define PRIV_B2_XSCH 0x76 | |
87 | ||
88 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
89 | #define PRIV_EB_PCISTB 0xd0 |
90 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
91 | |
92 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
93 | #define PRIV_B9_CLP 0xa0 |
94 | #define PRIV_B9_PCISTG 0xd0 | |
95 | #define PRIV_B9_PCILG 0xd2 | |
96 | #define PRIV_B9_RPCIT 0xd3 | |
97 | ||
98 | #define PRIV_E3_MPCIFC 0xd0 | |
99 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 100 | |
8fc639af | 101 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 102 | #define DIAG_IPL 0x308 |
0e60a699 AG |
103 | #define DIAG_KVM_HYPERCALL 0x500 |
104 | #define DIAG_KVM_BREAKPOINT 0x501 | |
105 | ||
0e60a699 | 106 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 107 | #define ICPT_PROGRAM 0x08 |
a2689242 | 108 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
109 | #define ICPT_WAITPSW 0x1c |
110 | #define ICPT_SOFT_INTERCEPT 0x24 | |
111 | #define ICPT_CPU_STOP 0x28 | |
112 | #define ICPT_IO 0x40 | |
113 | ||
3cda44f7 JF |
114 | #define NR_LOCAL_IRQS 32 |
115 | /* | |
116 | * Needs to be big enough to contain max_cpus emergency signals | |
117 | * and in addition NR_LOCAL_IRQS interrupts | |
118 | */ | |
119 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
120 | (max_cpus + NR_LOCAL_IRQS)) | |
121 | ||
770a6379 DH |
122 | static CPUWatchpoint hw_watchpoint; |
123 | /* | |
124 | * We don't use a list because this structure is also used to transmit the | |
125 | * hardware breakpoints to the kernel. | |
126 | */ | |
127 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
128 | static int nb_hw_breakpoints; | |
129 | ||
94a8d39a JK |
130 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
131 | KVM_CAP_LAST_INFO | |
132 | }; | |
133 | ||
5b08b344 | 134 | static int cap_sync_regs; |
819bd309 | 135 | static int cap_async_pf; |
a9bcd1b8 | 136 | static int cap_mem_op; |
1191c949 | 137 | static int cap_s390_irq; |
5b08b344 | 138 | |
dc622deb | 139 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 140 | |
a310b283 DD |
141 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
142 | { | |
143 | struct kvm_device_attr attr = { | |
144 | .group = KVM_S390_VM_MEM_CTRL, | |
145 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
146 | .addr = (uint64_t) memory_limit, | |
147 | }; | |
148 | ||
149 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
150 | } | |
151 | ||
152 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
153 | { | |
154 | int rc; | |
155 | ||
156 | struct kvm_device_attr attr = { | |
157 | .group = KVM_S390_VM_MEM_CTRL, | |
158 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
159 | .addr = (uint64_t) &new_limit, | |
160 | }; | |
161 | ||
2b147555 | 162 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
163 | return 0; |
164 | } | |
165 | ||
166 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
167 | if (rc) { | |
168 | return rc; | |
169 | } else if (*hw_limit < new_limit) { | |
170 | return -E2BIG; | |
171 | } | |
172 | ||
173 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
174 | } | |
175 | ||
1cd4e0f6 | 176 | void kvm_s390_cmma_reset(void) |
4cb88c3c DD |
177 | { |
178 | int rc; | |
4cb88c3c DD |
179 | struct kvm_device_attr attr = { |
180 | .group = KVM_S390_VM_MEM_CTRL, | |
181 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
182 | }; | |
183 | ||
1cd4e0f6 | 184 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
185 | trace_kvm_clear_cmma(rc); |
186 | } | |
187 | ||
188 | static void kvm_s390_enable_cmma(KVMState *s) | |
189 | { | |
190 | int rc; | |
191 | struct kvm_device_attr attr = { | |
192 | .group = KVM_S390_VM_MEM_CTRL, | |
193 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
194 | }; | |
195 | ||
2b147555 DD |
196 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_ENABLE_CMMA) || |
197 | !kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_CLR_CMMA)) { | |
4cb88c3c DD |
198 | return; |
199 | } | |
200 | ||
201 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
4cb88c3c DD |
202 | trace_kvm_enable_cmma(rc); |
203 | } | |
204 | ||
2eb1cd07 TK |
205 | static void kvm_s390_set_attr(uint64_t attr) |
206 | { | |
207 | struct kvm_device_attr attribute = { | |
208 | .group = KVM_S390_VM_CRYPTO, | |
209 | .attr = attr, | |
210 | }; | |
211 | ||
212 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
213 | ||
214 | if (ret) { | |
215 | error_report("Failed to set crypto device attribute %lu: %s", | |
216 | attr, strerror(-ret)); | |
217 | } | |
218 | } | |
219 | ||
220 | static void kvm_s390_init_aes_kw(void) | |
221 | { | |
222 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
223 | ||
224 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
225 | NULL)) { | |
226 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
227 | } | |
228 | ||
229 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
230 | kvm_s390_set_attr(attr); | |
231 | } | |
232 | } | |
233 | ||
234 | static void kvm_s390_init_dea_kw(void) | |
235 | { | |
236 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
237 | ||
238 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
239 | NULL)) { | |
240 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
241 | } | |
242 | ||
243 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
244 | kvm_s390_set_attr(attr); | |
245 | } | |
246 | } | |
247 | ||
4ab72920 | 248 | void kvm_s390_crypto_reset(void) |
2eb1cd07 TK |
249 | { |
250 | kvm_s390_init_aes_kw(); | |
251 | kvm_s390_init_dea_kw(); | |
252 | } | |
253 | ||
b16565b3 | 254 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 255 | { |
5b08b344 | 256 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 257 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 258 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 259 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 260 | |
4c292a00 DD |
261 | if (!mem_path) { |
262 | kvm_s390_enable_cmma(s); | |
263 | } | |
4cb88c3c | 264 | |
91138037 MA |
265 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
266 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
267 | phys_mem_set_alloc(legacy_s390_alloc); | |
268 | } | |
f16d3f58 DH |
269 | |
270 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 271 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 272 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
f16d3f58 | 273 | |
0e60a699 AG |
274 | return 0; |
275 | } | |
276 | ||
b164e48e EH |
277 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
278 | { | |
279 | return cpu->cpu_index; | |
280 | } | |
281 | ||
c9e659c9 | 282 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 283 | { |
c9e659c9 DH |
284 | S390CPU *cpu = S390_CPU(cs); |
285 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 286 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 287 | return 0; |
0e60a699 AG |
288 | } |
289 | ||
50a2c6e5 | 290 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 291 | { |
50a2c6e5 PB |
292 | CPUState *cs = CPU(cpu); |
293 | ||
419831d7 AG |
294 | /* The initial reset call is needed here to reset in-kernel |
295 | * vcpu data that we can't access directly from QEMU | |
296 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
297 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
298 | * code (kvm-all) */ | |
50a2c6e5 | 299 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 300 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 301 | } |
0e60a699 AG |
302 | } |
303 | ||
fdb78ec0 DH |
304 | static int can_sync_regs(CPUState *cs, int regs) |
305 | { | |
306 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
307 | } | |
308 | ||
20d695a9 | 309 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 310 | { |
20d695a9 AF |
311 | S390CPU *cpu = S390_CPU(cs); |
312 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 313 | struct kvm_sregs sregs; |
0e60a699 | 314 | struct kvm_regs regs; |
e6eef7c2 | 315 | struct kvm_fpu fpu = {}; |
860643bc | 316 | int r; |
0e60a699 AG |
317 | int i; |
318 | ||
5b08b344 | 319 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
320 | cs->kvm_run->psw_addr = env->psw.addr; |
321 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 322 | |
fdb78ec0 | 323 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 324 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
325 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
326 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
327 | } |
328 | } else { | |
329 | for (i = 0; i < 16; i++) { | |
330 | regs.gprs[i] = env->regs[i]; | |
331 | } | |
860643bc CB |
332 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
333 | if (r < 0) { | |
334 | return r; | |
5b08b344 | 335 | } |
0e60a699 AG |
336 | } |
337 | ||
fcb79802 EF |
338 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
339 | for (i = 0; i < 32; i++) { | |
340 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
341 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
342 | } | |
343 | cs->kvm_run->s.regs.fpc = env->fpc; | |
344 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
5ab0e547 DH |
345 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
346 | for (i = 0; i < 16; i++) { | |
347 | cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll; | |
348 | } | |
349 | cs->kvm_run->s.regs.fpc = env->fpc; | |
350 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS; | |
fcb79802 EF |
351 | } else { |
352 | /* Floating point */ | |
353 | for (i = 0; i < 16; i++) { | |
354 | fpu.fprs[i] = get_freg(env, i)->ll; | |
355 | } | |
356 | fpu.fpc = env->fpc; | |
85ad6230 | 357 | |
fcb79802 EF |
358 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
359 | if (r < 0) { | |
360 | return r; | |
361 | } | |
85ad6230 JH |
362 | } |
363 | ||
44c68de0 DD |
364 | /* Do we need to save more than that? */ |
365 | if (level == KVM_PUT_RUNTIME_STATE) { | |
366 | return 0; | |
367 | } | |
420840e5 | 368 | |
59ac1532 DH |
369 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
370 | cs->kvm_run->s.regs.cputm = env->cputm; | |
371 | cs->kvm_run->s.regs.ckc = env->ckc; | |
372 | cs->kvm_run->s.regs.todpr = env->todpr; | |
373 | cs->kvm_run->s.regs.gbea = env->gbea; | |
374 | cs->kvm_run->s.regs.pp = env->pp; | |
375 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
376 | } else { | |
377 | /* | |
378 | * These ONE_REGS are not protected by a capability. As they are only | |
379 | * necessary for migration we just trace a possible error, but don't | |
380 | * return with an error return code. | |
381 | */ | |
382 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
383 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
384 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
385 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
386 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
387 | } | |
388 | ||
389 | /* pfault parameters */ | |
390 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
391 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
392 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
393 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
394 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
395 | } else if (cap_async_pf) { | |
860643bc CB |
396 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
397 | if (r < 0) { | |
398 | return r; | |
819bd309 | 399 | } |
860643bc CB |
400 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
401 | if (r < 0) { | |
402 | return r; | |
819bd309 | 403 | } |
860643bc CB |
404 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
405 | if (r < 0) { | |
406 | return r; | |
819bd309 DD |
407 | } |
408 | } | |
409 | ||
fdb78ec0 DH |
410 | /* access registers and control registers*/ |
411 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 412 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
413 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
414 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 415 | } |
f7575c96 AF |
416 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
417 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
418 | } else { |
419 | for (i = 0; i < 16; i++) { | |
420 | sregs.acrs[i] = env->aregs[i]; | |
421 | sregs.crs[i] = env->cregs[i]; | |
422 | } | |
860643bc CB |
423 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
424 | if (r < 0) { | |
425 | return r; | |
5b08b344 CB |
426 | } |
427 | } | |
0e60a699 | 428 | |
5b08b344 | 429 | /* Finally the prefix */ |
fdb78ec0 | 430 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
431 | cs->kvm_run->s.regs.prefix = env->psa; |
432 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
433 | } else { |
434 | /* prefix is only supported via sync regs */ | |
435 | } | |
436 | return 0; | |
0e60a699 AG |
437 | } |
438 | ||
20d695a9 | 439 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
440 | { |
441 | S390CPU *cpu = S390_CPU(cs); | |
442 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 443 | struct kvm_sregs sregs; |
0e60a699 | 444 | struct kvm_regs regs; |
85ad6230 | 445 | struct kvm_fpu fpu; |
44c68de0 | 446 | int i, r; |
420840e5 | 447 | |
5b08b344 | 448 | /* get the PSW */ |
f7575c96 AF |
449 | env->psw.addr = cs->kvm_run->psw_addr; |
450 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
451 | |
452 | /* the GPRS */ | |
fdb78ec0 | 453 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 454 | for (i = 0; i < 16; i++) { |
f7575c96 | 455 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
456 | } |
457 | } else { | |
44c68de0 DD |
458 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
459 | if (r < 0) { | |
460 | return r; | |
5b08b344 CB |
461 | } |
462 | for (i = 0; i < 16; i++) { | |
463 | env->regs[i] = regs.gprs[i]; | |
464 | } | |
0e60a699 AG |
465 | } |
466 | ||
5b08b344 | 467 | /* The ACRS and CRS */ |
fdb78ec0 | 468 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 469 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
470 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
471 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
472 | } |
473 | } else { | |
44c68de0 DD |
474 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
475 | if (r < 0) { | |
476 | return r; | |
5b08b344 CB |
477 | } |
478 | for (i = 0; i < 16; i++) { | |
479 | env->aregs[i] = sregs.acrs[i]; | |
480 | env->cregs[i] = sregs.crs[i]; | |
481 | } | |
0e60a699 AG |
482 | } |
483 | ||
fcb79802 EF |
484 | /* Floating point and vector registers */ |
485 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
486 | for (i = 0; i < 32; i++) { | |
487 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
488 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
489 | } | |
490 | env->fpc = cs->kvm_run->s.regs.fpc; | |
5ab0e547 DH |
491 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
492 | for (i = 0; i < 16; i++) { | |
493 | get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i]; | |
494 | } | |
495 | env->fpc = cs->kvm_run->s.regs.fpc; | |
fcb79802 EF |
496 | } else { |
497 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
498 | if (r < 0) { | |
499 | return r; | |
500 | } | |
501 | for (i = 0; i < 16; i++) { | |
502 | get_freg(env, i)->ll = fpu.fprs[i]; | |
503 | } | |
504 | env->fpc = fpu.fpc; | |
85ad6230 | 505 | } |
85ad6230 | 506 | |
44c68de0 | 507 | /* The prefix */ |
fdb78ec0 | 508 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 509 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 510 | } |
0e60a699 | 511 | |
59ac1532 DH |
512 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
513 | env->cputm = cs->kvm_run->s.regs.cputm; | |
514 | env->ckc = cs->kvm_run->s.regs.ckc; | |
515 | env->todpr = cs->kvm_run->s.regs.todpr; | |
516 | env->gbea = cs->kvm_run->s.regs.gbea; | |
517 | env->pp = cs->kvm_run->s.regs.pp; | |
518 | } else { | |
519 | /* | |
520 | * These ONE_REGS are not protected by a capability. As they are only | |
521 | * necessary for migration we just trace a possible error, but don't | |
522 | * return with an error return code. | |
523 | */ | |
524 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
525 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
526 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
527 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
528 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
529 | } | |
530 | ||
531 | /* pfault parameters */ | |
532 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
533 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
534 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
535 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
536 | } else if (cap_async_pf) { | |
860643bc | 537 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
538 | if (r < 0) { |
539 | return r; | |
540 | } | |
860643bc | 541 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
542 | if (r < 0) { |
543 | return r; | |
544 | } | |
860643bc | 545 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
546 | if (r < 0) { |
547 | return r; | |
548 | } | |
549 | } | |
550 | ||
0e60a699 AG |
551 | return 0; |
552 | } | |
553 | ||
3f9e59bb JH |
554 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
555 | { | |
556 | int r; | |
557 | struct kvm_device_attr attr = { | |
558 | .group = KVM_S390_VM_TOD, | |
559 | .attr = KVM_S390_VM_TOD_LOW, | |
560 | .addr = (uint64_t)tod_low, | |
561 | }; | |
562 | ||
563 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
564 | if (r) { | |
565 | return r; | |
566 | } | |
567 | ||
568 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
569 | attr.addr = (uint64_t)tod_high; | |
570 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
571 | } | |
572 | ||
573 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
574 | { | |
575 | int r; | |
576 | ||
577 | struct kvm_device_attr attr = { | |
578 | .group = KVM_S390_VM_TOD, | |
579 | .attr = KVM_S390_VM_TOD_LOW, | |
580 | .addr = (uint64_t)tod_low, | |
581 | }; | |
582 | ||
583 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
584 | if (r) { | |
585 | return r; | |
586 | } | |
587 | ||
588 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
589 | attr.addr = (uint64_t)tod_high; | |
590 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
591 | } | |
592 | ||
a9bcd1b8 TH |
593 | /** |
594 | * kvm_s390_mem_op: | |
595 | * @addr: the logical start address in guest memory | |
6cb1e49d | 596 | * @ar: the access register number |
a9bcd1b8 | 597 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
67cc32eb | 598 | * @len: length that should be transferred |
a9bcd1b8 | 599 | * @is_write: true = write, false = read |
67cc32eb | 600 | * Returns: 0 on success, non-zero if an exception or error occurred |
a9bcd1b8 TH |
601 | * |
602 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
603 | * is injected into the vCPU in case of translation errors. | |
604 | */ | |
6cb1e49d AY |
605 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
606 | int len, bool is_write) | |
a9bcd1b8 TH |
607 | { |
608 | struct kvm_s390_mem_op mem_op = { | |
609 | .gaddr = addr, | |
610 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
611 | .size = len, | |
612 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
613 | : KVM_S390_MEMOP_LOGICAL_READ, | |
614 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 615 | .ar = ar, |
a9bcd1b8 TH |
616 | }; |
617 | int ret; | |
618 | ||
619 | if (!cap_mem_op) { | |
620 | return -ENOSYS; | |
621 | } | |
622 | if (!hostbuf) { | |
623 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
624 | } | |
625 | ||
626 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
627 | if (ret < 0) { | |
628 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
629 | } | |
630 | return ret; | |
631 | } | |
632 | ||
fdec9918 CB |
633 | /* |
634 | * Legacy layout for s390: | |
635 | * Older S390 KVM requires the topmost vma of the RAM to be | |
636 | * smaller than an system defined value, which is at least 256GB. | |
637 | * Larger systems have larger values. We put the guest between | |
638 | * the end of data segment (system break) and this value. We | |
639 | * use 32GB as a base to have enough room for the system break | |
640 | * to grow. We also have to use MAP parameters that avoid | |
641 | * read-only mapping of guest pages. | |
642 | */ | |
dc622deb | 643 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
644 | { |
645 | void *mem; | |
646 | ||
647 | mem = mmap((void *) 0x800000000ULL, size, | |
648 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
649 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 650 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
651 | } |
652 | ||
8e4e86af DH |
653 | /* DIAG 501 is used for sw breakpoints */ |
654 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
655 | ||
20d695a9 | 656 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 657 | { |
0e60a699 | 658 | |
8e4e86af DH |
659 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
660 | sizeof(diag_501), 0) || | |
661 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
662 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
663 | return -EINVAL; |
664 | } | |
665 | return 0; | |
666 | } | |
667 | ||
20d695a9 | 668 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 669 | { |
8e4e86af | 670 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 671 | |
8e4e86af | 672 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 673 | return -EINVAL; |
8e4e86af | 674 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 675 | return -EINVAL; |
8e4e86af DH |
676 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
677 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
678 | return -EINVAL; |
679 | } | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
770a6379 DH |
684 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
685 | int len, int type) | |
686 | { | |
687 | int n; | |
688 | ||
689 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
690 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
691 | (hw_breakpoints[n].len == len || len == -1)) { | |
692 | return &hw_breakpoints[n]; | |
693 | } | |
694 | } | |
695 | ||
696 | return NULL; | |
697 | } | |
698 | ||
699 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
700 | { | |
701 | int size; | |
702 | ||
703 | if (find_hw_breakpoint(addr, len, type)) { | |
704 | return -EEXIST; | |
705 | } | |
706 | ||
707 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
708 | ||
709 | if (!hw_breakpoints) { | |
710 | nb_hw_breakpoints = 0; | |
711 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
712 | } else { | |
713 | hw_breakpoints = | |
714 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
715 | } | |
716 | ||
717 | if (!hw_breakpoints) { | |
718 | nb_hw_breakpoints = 0; | |
719 | return -ENOMEM; | |
720 | } | |
721 | ||
722 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
723 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
724 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
725 | ||
726 | nb_hw_breakpoints++; | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
8c012449 DH |
731 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
732 | target_ulong len, int type) | |
733 | { | |
770a6379 DH |
734 | switch (type) { |
735 | case GDB_BREAKPOINT_HW: | |
736 | type = KVM_HW_BP; | |
737 | break; | |
738 | case GDB_WATCHPOINT_WRITE: | |
739 | if (len < 1) { | |
740 | return -EINVAL; | |
741 | } | |
742 | type = KVM_HW_WP_WRITE; | |
743 | break; | |
744 | default: | |
745 | return -ENOSYS; | |
746 | } | |
747 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
748 | } |
749 | ||
750 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
751 | target_ulong len, int type) | |
752 | { | |
770a6379 DH |
753 | int size; |
754 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
755 | ||
756 | if (bp == NULL) { | |
757 | return -ENOENT; | |
758 | } | |
759 | ||
760 | nb_hw_breakpoints--; | |
761 | if (nb_hw_breakpoints > 0) { | |
762 | /* | |
763 | * In order to trim the array, move the last element to the position to | |
764 | * be removed - if necessary. | |
765 | */ | |
766 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
767 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
768 | } | |
769 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
770 | hw_breakpoints = | |
771 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
772 | } else { | |
773 | g_free(hw_breakpoints); | |
774 | hw_breakpoints = NULL; | |
775 | } | |
776 | ||
777 | return 0; | |
8c012449 DH |
778 | } |
779 | ||
780 | void kvm_arch_remove_all_hw_breakpoints(void) | |
781 | { | |
770a6379 DH |
782 | nb_hw_breakpoints = 0; |
783 | g_free(hw_breakpoints); | |
784 | hw_breakpoints = NULL; | |
8c012449 DH |
785 | } |
786 | ||
787 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
788 | { | |
770a6379 DH |
789 | int i; |
790 | ||
791 | if (nb_hw_breakpoints > 0) { | |
792 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
793 | dbg->arch.hw_bp = hw_breakpoints; | |
794 | ||
795 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
796 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
797 | hw_breakpoints[i].addr); | |
798 | } | |
799 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
800 | } else { | |
801 | dbg->arch.nr_hw_bp = 0; | |
802 | dbg->arch.hw_bp = NULL; | |
803 | } | |
8c012449 DH |
804 | } |
805 | ||
20d695a9 | 806 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 807 | { |
0e60a699 AG |
808 | } |
809 | ||
4c663752 | 810 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 811 | { |
4c663752 | 812 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
813 | } |
814 | ||
20d695a9 | 815 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 816 | { |
225dc991 | 817 | return cs->halted; |
0af691d7 MT |
818 | } |
819 | ||
66ad0893 CH |
820 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
821 | struct kvm_s390_interrupt *interrupt) | |
822 | { | |
823 | int r = 0; | |
824 | ||
825 | interrupt->type = irq->type; | |
826 | switch (irq->type) { | |
827 | case KVM_S390_INT_VIRTIO: | |
828 | interrupt->parm = irq->u.ext.ext_params; | |
829 | /* fall through */ | |
830 | case KVM_S390_INT_PFAULT_INIT: | |
831 | case KVM_S390_INT_PFAULT_DONE: | |
832 | interrupt->parm64 = irq->u.ext.ext_params2; | |
833 | break; | |
834 | case KVM_S390_PROGRAM_INT: | |
835 | interrupt->parm = irq->u.pgm.code; | |
836 | break; | |
837 | case KVM_S390_SIGP_SET_PREFIX: | |
838 | interrupt->parm = irq->u.prefix.address; | |
839 | break; | |
840 | case KVM_S390_INT_SERVICE: | |
841 | interrupt->parm = irq->u.ext.ext_params; | |
842 | break; | |
843 | case KVM_S390_MCHK: | |
844 | interrupt->parm = irq->u.mchk.cr14; | |
845 | interrupt->parm64 = irq->u.mchk.mcic; | |
846 | break; | |
847 | case KVM_S390_INT_EXTERNAL_CALL: | |
848 | interrupt->parm = irq->u.extcall.code; | |
849 | break; | |
850 | case KVM_S390_INT_EMERGENCY: | |
851 | interrupt->parm = irq->u.emerg.code; | |
852 | break; | |
853 | case KVM_S390_SIGP_STOP: | |
854 | case KVM_S390_RESTART: | |
855 | break; /* These types have no parameters */ | |
856 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
857 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
858 | interrupt->parm |= irq->u.io.subchannel_nr; | |
859 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
860 | interrupt->parm64 |= irq->u.io.io_int_word; | |
861 | break; | |
862 | default: | |
863 | r = -EINVAL; | |
864 | break; | |
865 | } | |
866 | return r; | |
867 | } | |
868 | ||
1191c949 | 869 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
870 | { |
871 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
872 | int r; |
873 | ||
874 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
875 | if (r < 0) { | |
876 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
877 | exit(1); | |
878 | } | |
879 | ||
880 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
881 | if (r < 0) { | |
882 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
883 | exit(1); | |
884 | } | |
885 | } | |
886 | ||
1191c949 JF |
887 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
888 | { | |
889 | CPUState *cs = CPU(cpu); | |
890 | int r; | |
891 | ||
892 | if (cap_s390_irq) { | |
893 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
894 | if (!r) { | |
895 | return; | |
896 | } | |
897 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
898 | exit(1); | |
899 | } | |
900 | ||
901 | inject_vcpu_irq_legacy(cs, irq); | |
902 | } | |
903 | ||
bbd8bb8e | 904 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
905 | { |
906 | struct kvm_s390_interrupt kvmint = {}; | |
907 | int r; | |
908 | ||
909 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
910 | if (r < 0) { | |
911 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
912 | exit(1); | |
913 | } | |
914 | ||
915 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
916 | if (r < 0) { | |
917 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
918 | exit(1); | |
919 | } | |
920 | } | |
921 | ||
bbd8bb8e CH |
922 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
923 | { | |
924 | static bool use_flic = true; | |
925 | int r; | |
926 | ||
927 | if (use_flic) { | |
928 | r = kvm_s390_inject_flic(irq); | |
929 | if (r == -ENOSYS) { | |
930 | use_flic = false; | |
931 | } | |
932 | if (!r) { | |
933 | return; | |
934 | } | |
935 | } | |
936 | __kvm_s390_floating_interrupt(irq); | |
937 | } | |
938 | ||
de13d216 | 939 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 940 | { |
de13d216 CH |
941 | struct kvm_s390_irq irq = { |
942 | .type = KVM_S390_INT_SERVICE, | |
943 | .u.ext.ext_params = parm, | |
944 | }; | |
0e60a699 | 945 | |
de13d216 | 946 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
947 | } |
948 | ||
1bc22652 | 949 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 950 | { |
de13d216 CH |
951 | struct kvm_s390_irq irq = { |
952 | .type = KVM_S390_PROGRAM_INT, | |
953 | .u.pgm.code = code, | |
954 | }; | |
955 | ||
956 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
957 | } |
958 | ||
801cdd35 TH |
959 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
960 | { | |
961 | struct kvm_s390_irq irq = { | |
962 | .type = KVM_S390_PROGRAM_INT, | |
963 | .u.pgm.code = code, | |
964 | .u.pgm.trans_exc_code = te_code, | |
965 | .u.pgm.exc_access_id = te_code & 3, | |
966 | }; | |
967 | ||
968 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
969 | } | |
970 | ||
1bc22652 | 971 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 972 | uint16_t ipbh0) |
0e60a699 | 973 | { |
1bc22652 | 974 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
975 | uint64_t sccb; |
976 | uint32_t code; | |
0e60a699 AG |
977 | int r = 0; |
978 | ||
cb446eca | 979 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
980 | sccb = env->regs[ipbh0 & 0xf]; |
981 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
982 | ||
6e252802 | 983 | r = sclp_service_call(env, sccb, code); |
9abf567d | 984 | if (r < 0) { |
1bc22652 | 985 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
986 | } else { |
987 | setcc(cpu, r); | |
0e60a699 | 988 | } |
81f7c56c | 989 | |
0e60a699 AG |
990 | return 0; |
991 | } | |
992 | ||
1eecf41b | 993 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 994 | { |
09b99878 | 995 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
996 | int rc = 0; |
997 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 998 | |
44c68de0 | 999 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1000 | |
09b99878 | 1001 | switch (ipa1) { |
1eecf41b | 1002 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1003 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1004 | break; |
1eecf41b | 1005 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1006 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1007 | break; |
1eecf41b | 1008 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1009 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1010 | break; |
1eecf41b | 1011 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1012 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1013 | break; |
1eecf41b | 1014 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1015 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1016 | break; |
1eecf41b | 1017 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1018 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1019 | break; |
1eecf41b | 1020 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1021 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1022 | break; |
1eecf41b | 1023 | case PRIV_B2_TSCH: |
09b99878 CH |
1024 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1025 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1026 | break; | |
1eecf41b | 1027 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1028 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1029 | break; |
1eecf41b | 1030 | case PRIV_B2_TPI: |
09b99878 CH |
1031 | /* This should have been handled by kvm already. */ |
1032 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1033 | break; | |
1eecf41b | 1034 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1035 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1036 | run->s390_sieic.ipb); | |
09b99878 | 1037 | break; |
1eecf41b | 1038 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1039 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1040 | break; |
1eecf41b | 1041 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1042 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1043 | break; |
1eecf41b | 1044 | case PRIV_B2_STCPS: |
09b99878 | 1045 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1046 | break; |
1eecf41b | 1047 | case PRIV_B2_SAL: |
5d9bf1c0 | 1048 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1049 | break; |
1eecf41b | 1050 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1051 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1052 | setcc(cpu, 3); |
09b99878 | 1053 | break; |
1eecf41b FB |
1054 | case PRIV_B2_SCLP_CALL: |
1055 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1056 | break; | |
c1e8dfb5 | 1057 | default: |
1eecf41b FB |
1058 | rc = -1; |
1059 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1060 | break; | |
09b99878 CH |
1061 | } |
1062 | ||
1eecf41b | 1063 | return rc; |
09b99878 CH |
1064 | } |
1065 | ||
6cb1e49d AY |
1066 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1067 | uint8_t *ar) | |
863f6f52 FB |
1068 | { |
1069 | CPUS390XState *env = &cpu->env; | |
1070 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1071 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1072 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1073 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1074 | ||
1075 | if (disp2 & 0x80000) { | |
1076 | disp2 += 0xfff00000; | |
1077 | } | |
6cb1e49d AY |
1078 | if (ar) { |
1079 | *ar = base2; | |
1080 | } | |
863f6f52 FB |
1081 | |
1082 | return (base2 ? env->regs[base2] : 0) + | |
1083 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1084 | } | |
1085 | ||
6cb1e49d AY |
1086 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1087 | uint8_t *ar) | |
863f6f52 FB |
1088 | { |
1089 | CPUS390XState *env = &cpu->env; | |
1090 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1091 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1092 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1093 | ||
1094 | if (disp2 & 0x80000) { | |
1095 | disp2 += 0xfff00000; | |
1096 | } | |
6cb1e49d AY |
1097 | if (ar) { |
1098 | *ar = base2; | |
1099 | } | |
863f6f52 FB |
1100 | |
1101 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1102 | } | |
1103 | ||
1104 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1105 | { | |
1106 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1107 | ||
1108 | return clp_service_call(cpu, r2); | |
1109 | } | |
1110 | ||
1111 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1112 | { | |
1113 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1114 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1115 | ||
1116 | return pcilg_service_call(cpu, r1, r2); | |
1117 | } | |
1118 | ||
1119 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1120 | { | |
1121 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1122 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1123 | ||
1124 | return pcistg_service_call(cpu, r1, r2); | |
1125 | } | |
1126 | ||
1127 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1128 | { | |
1129 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1130 | uint64_t fiba; | |
6cb1e49d | 1131 | uint8_t ar; |
863f6f52 FB |
1132 | |
1133 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1134 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1135 | |
6cb1e49d | 1136 | return stpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1137 | } |
1138 | ||
1139 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1140 | { | |
1141 | /* NOOP */ | |
1142 | return 0; | |
1143 | } | |
1144 | ||
1145 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1146 | { | |
1147 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1148 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1149 | ||
1150 | return rpcit_service_call(cpu, r1, r2); | |
1151 | } | |
1152 | ||
1153 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1154 | { | |
1155 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1156 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1157 | uint64_t gaddr; | |
6cb1e49d | 1158 | uint8_t ar; |
863f6f52 FB |
1159 | |
1160 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1161 | gaddr = get_base_disp_rsy(cpu, run, &ar); |
863f6f52 | 1162 | |
6cb1e49d | 1163 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
863f6f52 FB |
1164 | } |
1165 | ||
1166 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1167 | { | |
1168 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1169 | uint64_t fiba; | |
6cb1e49d | 1170 | uint8_t ar; |
863f6f52 FB |
1171 | |
1172 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1173 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1174 | |
6cb1e49d | 1175 | return mpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1176 | } |
1177 | ||
1eecf41b | 1178 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1179 | { |
1180 | int r = 0; | |
0e60a699 | 1181 | |
0e60a699 | 1182 | switch (ipa1) { |
863f6f52 FB |
1183 | case PRIV_B9_CLP: |
1184 | r = kvm_clp_service_call(cpu, run); | |
1185 | break; | |
1186 | case PRIV_B9_PCISTG: | |
1187 | r = kvm_pcistg_service_call(cpu, run); | |
1188 | break; | |
1189 | case PRIV_B9_PCILG: | |
1190 | r = kvm_pcilg_service_call(cpu, run); | |
1191 | break; | |
1192 | case PRIV_B9_RPCIT: | |
1193 | r = kvm_rpcit_service_call(cpu, run); | |
1194 | break; | |
1eecf41b FB |
1195 | case PRIV_B9_EQBS: |
1196 | /* just inject exception */ | |
1197 | r = -1; | |
1198 | break; | |
1199 | default: | |
1200 | r = -1; | |
1201 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1202 | break; | |
1203 | } | |
1204 | ||
1205 | return r; | |
1206 | } | |
1207 | ||
80765f07 | 1208 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1209 | { |
1210 | int r = 0; | |
1211 | ||
80765f07 | 1212 | switch (ipbl) { |
863f6f52 FB |
1213 | case PRIV_EB_PCISTB: |
1214 | r = kvm_pcistb_service_call(cpu, run); | |
1215 | break; | |
1216 | case PRIV_EB_SIC: | |
1217 | r = kvm_sic_service_call(cpu, run); | |
1218 | break; | |
1eecf41b FB |
1219 | case PRIV_EB_SQBS: |
1220 | /* just inject exception */ | |
1221 | r = -1; | |
1222 | break; | |
1223 | default: | |
1224 | r = -1; | |
80765f07 | 1225 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1226 | break; |
0e60a699 AG |
1227 | } |
1228 | ||
1229 | return r; | |
1230 | } | |
1231 | ||
863f6f52 FB |
1232 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1233 | { | |
1234 | int r = 0; | |
1235 | ||
1236 | switch (ipbl) { | |
1237 | case PRIV_E3_MPCIFC: | |
1238 | r = kvm_mpcifc_service_call(cpu, run); | |
1239 | break; | |
1240 | case PRIV_E3_STPCIFC: | |
1241 | r = kvm_stpcifc_service_call(cpu, run); | |
1242 | break; | |
1243 | default: | |
1244 | r = -1; | |
1245 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1246 | break; | |
1247 | } | |
1248 | ||
1249 | return r; | |
1250 | } | |
1251 | ||
4fd6dd06 | 1252 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1253 | { |
4fd6dd06 | 1254 | CPUS390XState *env = &cpu->env; |
77319f22 | 1255 | int ret; |
3474b679 | 1256 | |
44c68de0 | 1257 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1258 | ret = s390_virtio_hypercall(env); |
1259 | if (ret == -EINVAL) { | |
1260 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1261 | return 0; | |
1262 | } | |
0e60a699 | 1263 | |
77319f22 | 1264 | return ret; |
0e60a699 AG |
1265 | } |
1266 | ||
8fc639af XW |
1267 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1268 | { | |
1269 | uint64_t r1, r3; | |
1270 | int rc; | |
1271 | ||
1272 | cpu_synchronize_state(CPU(cpu)); | |
1273 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1274 | r3 = run->s390_sieic.ipa & 0x000f; | |
1275 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1276 | if (rc) { | |
1277 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1278 | } | |
1279 | } | |
1280 | ||
268846ba ED |
1281 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1282 | { | |
1283 | uint64_t r1, r3; | |
1284 | ||
1285 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1286 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1287 | r3 = run->s390_sieic.ipa & 0x000f; |
1288 | handle_diag_308(&cpu->env, r1, r3); | |
1289 | } | |
1290 | ||
b30f4dfb DH |
1291 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1292 | { | |
1293 | CPUS390XState *env = &cpu->env; | |
1294 | unsigned long pc; | |
1295 | ||
1296 | cpu_synchronize_state(CPU(cpu)); | |
1297 | ||
1298 | pc = env->psw.addr - 4; | |
1299 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1300 | env->psw.addr = pc; | |
1301 | return EXCP_DEBUG; | |
1302 | } | |
1303 | ||
1304 | return -ENOENT; | |
1305 | } | |
1306 | ||
638129ff CH |
1307 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1308 | ||
1309 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1310 | { |
1311 | int r = 0; | |
638129ff CH |
1312 | uint16_t func_code; |
1313 | ||
1314 | /* | |
1315 | * For any diagnose call we support, bits 48-63 of the resulting | |
1316 | * address specify the function code; the remainder is ignored. | |
1317 | */ | |
6cb1e49d | 1318 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1319 | switch (func_code) { |
8fc639af XW |
1320 | case DIAG_TIMEREVENT: |
1321 | kvm_handle_diag_288(cpu, run); | |
1322 | break; | |
268846ba ED |
1323 | case DIAG_IPL: |
1324 | kvm_handle_diag_308(cpu, run); | |
1325 | break; | |
39fbc5c6 CB |
1326 | case DIAG_KVM_HYPERCALL: |
1327 | r = handle_hypercall(cpu, run); | |
1328 | break; | |
1329 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1330 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1331 | break; |
1332 | default: | |
638129ff | 1333 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1334 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1335 | break; |
0e60a699 AG |
1336 | } |
1337 | ||
1338 | return r; | |
1339 | } | |
1340 | ||
6eb8f212 DH |
1341 | typedef struct SigpInfo { |
1342 | S390CPU *cpu; | |
22740e3f | 1343 | uint64_t param; |
6eb8f212 DH |
1344 | int cc; |
1345 | uint64_t *status_reg; | |
1346 | } SigpInfo; | |
1347 | ||
36b5c845 | 1348 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1349 | { |
36b5c845 DH |
1350 | *si->status_reg &= 0xffffffff00000000ULL; |
1351 | *si->status_reg |= status; | |
1352 | si->cc = SIGP_CC_STATUS_STORED; | |
1353 | } | |
6e6ad8db | 1354 | |
6eb8f212 | 1355 | static void sigp_start(void *arg) |
b20a461f | 1356 | { |
6eb8f212 | 1357 | SigpInfo *si = arg; |
6e6ad8db | 1358 | |
4f2b55d1 DH |
1359 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1360 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1361 | return; | |
1362 | } | |
1363 | ||
6eb8f212 DH |
1364 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1365 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1366 | } |
1367 | ||
18ff9494 | 1368 | static void sigp_stop(void *arg) |
0e60a699 | 1369 | { |
18ff9494 DH |
1370 | SigpInfo *si = arg; |
1371 | struct kvm_s390_irq irq = { | |
1372 | .type = KVM_S390_SIGP_STOP, | |
1373 | }; | |
1374 | ||
1375 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1376 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1377 | return; | |
1378 | } | |
1379 | ||
1380 | /* disabled wait - sleeping in user space */ | |
1381 | if (CPU(si->cpu)->halted) { | |
1382 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1383 | } else { | |
1384 | /* execute the stop function */ | |
1385 | si->cpu->env.sigp_order = SIGP_STOP; | |
1386 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1387 | } | |
1388 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1389 | } | |
1390 | ||
abec5356 EF |
1391 | #define ADTL_SAVE_AREA_SIZE 1024 |
1392 | static int kvm_s390_store_adtl_status(S390CPU *cpu, hwaddr addr) | |
1393 | { | |
1394 | void *mem; | |
1395 | hwaddr len = ADTL_SAVE_AREA_SIZE; | |
1396 | ||
1397 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1398 | if (!mem) { | |
1399 | return -EFAULT; | |
1400 | } | |
1401 | if (len != ADTL_SAVE_AREA_SIZE) { | |
1402 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1403 | return -EFAULT; | |
1404 | } | |
1405 | ||
1406 | memcpy(mem, &cpu->env.vregs, 512); | |
1407 | ||
1408 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1409 | ||
1410 | return 0; | |
1411 | } | |
1412 | ||
18ff9494 DH |
1413 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1414 | #define SAVE_AREA_SIZE 512 | |
1415 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1416 | { | |
1417 | static const uint8_t ar_id = 1; | |
1418 | uint64_t ckc = cpu->env.ckc >> 8; | |
1419 | void *mem; | |
c498d8e3 | 1420 | int i; |
18ff9494 DH |
1421 | hwaddr len = SAVE_AREA_SIZE; |
1422 | ||
1423 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1424 | if (!mem) { | |
1425 | return -EFAULT; | |
1426 | } | |
1427 | if (len != SAVE_AREA_SIZE) { | |
1428 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1429 | return -EFAULT; | |
1430 | } | |
1431 | ||
1432 | if (store_arch) { | |
1433 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1434 | } | |
c498d8e3 | 1435 | for (i = 0; i < 16; ++i) { |
182f42fd | 1436 | *((uint64_t *)mem + i) = get_freg(&cpu->env, i)->ll; |
c498d8e3 | 1437 | } |
18ff9494 DH |
1438 | memcpy(mem + 128, &cpu->env.regs, 128); |
1439 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1440 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1441 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1442 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1443 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1444 | memcpy(mem + 304, &ckc, 8); | |
1445 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1446 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1447 | ||
1448 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1449 | ||
1450 | return 0; | |
1451 | } | |
1452 | ||
1453 | static void sigp_stop_and_store_status(void *arg) | |
1454 | { | |
1455 | SigpInfo *si = arg; | |
1456 | struct kvm_s390_irq irq = { | |
1457 | .type = KVM_S390_SIGP_STOP, | |
1458 | }; | |
1459 | ||
1460 | /* disabled wait - sleeping in user space */ | |
1461 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1462 | CPU(si->cpu)->halted) { | |
1463 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1464 | } | |
1465 | ||
1466 | switch (s390_cpu_get_state(si->cpu)) { | |
1467 | case CPU_STATE_OPERATING: | |
1468 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1469 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1470 | /* store will be performed when handling the stop intercept */ | |
1471 | break; | |
1472 | case CPU_STATE_STOPPED: | |
1473 | /* already stopped, just store the status */ | |
1474 | cpu_synchronize_state(CPU(si->cpu)); | |
1475 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1476 | break; | |
1477 | } | |
1478 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1479 | } | |
1480 | ||
1481 | static void sigp_store_status_at_address(void *arg) | |
1482 | { | |
1483 | SigpInfo *si = arg; | |
1484 | uint32_t address = si->param & 0x7ffffe00u; | |
1485 | ||
1486 | /* cpu has to be stopped */ | |
1487 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1488 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1489 | return; | |
1490 | } | |
1491 | ||
1492 | cpu_synchronize_state(CPU(si->cpu)); | |
1493 | ||
1494 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1495 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1496 | return; | |
1497 | } | |
1498 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1499 | } | |
1500 | ||
abec5356 EF |
1501 | static void sigp_store_adtl_status(void *arg) |
1502 | { | |
1503 | SigpInfo *si = arg; | |
1504 | ||
1505 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { | |
1506 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); | |
1507 | return; | |
1508 | } | |
1509 | ||
1510 | /* cpu has to be stopped */ | |
1511 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1512 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1513 | return; | |
1514 | } | |
1515 | ||
1516 | /* parameter must be aligned to 1024-byte boundary */ | |
1517 | if (si->param & 0x3ff) { | |
1518 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1519 | return; | |
1520 | } | |
1521 | ||
1522 | cpu_synchronize_state(CPU(si->cpu)); | |
1523 | ||
1524 | if (kvm_s390_store_adtl_status(si->cpu, si->param)) { | |
1525 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1526 | return; | |
1527 | } | |
1528 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1529 | } | |
1530 | ||
6eb8f212 | 1531 | static void sigp_restart(void *arg) |
0e60a699 | 1532 | { |
6eb8f212 | 1533 | SigpInfo *si = arg; |
de13d216 CH |
1534 | struct kvm_s390_irq irq = { |
1535 | .type = KVM_S390_RESTART, | |
1536 | }; | |
1537 | ||
e3b7b578 DH |
1538 | switch (s390_cpu_get_state(si->cpu)) { |
1539 | case CPU_STATE_STOPPED: | |
1540 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1541 | cpu_synchronize_state(CPU(si->cpu)); | |
1542 | do_restart_interrupt(&si->cpu->env); | |
1543 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1544 | break; | |
1545 | case CPU_STATE_OPERATING: | |
1546 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1547 | break; | |
1548 | } | |
6eb8f212 | 1549 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1550 | } |
1551 | ||
1552 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1553 | { | |
6eb8f212 DH |
1554 | SigpInfo si = { |
1555 | .cpu = cpu, | |
1556 | }; | |
1557 | ||
1558 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1559 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1560 | return 0; |
1561 | } | |
1562 | ||
f7d3e466 | 1563 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1564 | { |
6eb8f212 DH |
1565 | SigpInfo *si = arg; |
1566 | CPUState *cs = CPU(si->cpu); | |
1567 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
d5900813 | 1568 | |
6eb8f212 DH |
1569 | cpu_synchronize_state(cs); |
1570 | scc->initial_cpu_reset(cs); | |
1571 | cpu_synchronize_post_reset(cs); | |
1572 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1573 | } |
1574 | ||
04c2b516 TH |
1575 | static void sigp_cpu_reset(void *arg) |
1576 | { | |
6eb8f212 DH |
1577 | SigpInfo *si = arg; |
1578 | CPUState *cs = CPU(si->cpu); | |
1579 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
04c2b516 | 1580 | |
6eb8f212 DH |
1581 | cpu_synchronize_state(cs); |
1582 | scc->cpu_reset(cs); | |
1583 | cpu_synchronize_post_reset(cs); | |
1584 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1585 | } |
1586 | ||
18ff9494 | 1587 | static void sigp_set_prefix(void *arg) |
0e60a699 | 1588 | { |
18ff9494 DH |
1589 | SigpInfo *si = arg; |
1590 | uint32_t addr = si->param & 0x7fffe000u; | |
0e60a699 | 1591 | |
18ff9494 | 1592 | cpu_synchronize_state(CPU(si->cpu)); |
0e60a699 | 1593 | |
18ff9494 DH |
1594 | if (!address_space_access_valid(&address_space_memory, addr, |
1595 | sizeof(struct LowCore), false)) { | |
1596 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1597 | return; | |
1598 | } | |
0e60a699 | 1599 | |
18ff9494 DH |
1600 | /* cpu has to be stopped */ |
1601 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1602 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1603 | return; | |
0e60a699 AG |
1604 | } |
1605 | ||
18ff9494 DH |
1606 | si->cpu->env.psa = addr; |
1607 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1608 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1609 | } | |
1610 | ||
6eb8f212 | 1611 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1612 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1613 | { |
1614 | SigpInfo si = { | |
1615 | .cpu = dst_cpu, | |
22740e3f | 1616 | .param = param, |
6eb8f212 DH |
1617 | .status_reg = status_reg, |
1618 | }; | |
1619 | ||
1620 | /* cpu available? */ | |
1621 | if (dst_cpu == NULL) { | |
1622 | return SIGP_CC_NOT_OPERATIONAL; | |
1623 | } | |
1624 | ||
18ff9494 DH |
1625 | /* only resets can break pending orders */ |
1626 | if (dst_cpu->env.sigp_order != 0 && | |
1627 | order != SIGP_CPU_RESET && | |
1628 | order != SIGP_INITIAL_CPU_RESET) { | |
1629 | return SIGP_CC_BUSY; | |
1630 | } | |
1631 | ||
6eb8f212 | 1632 | switch (order) { |
b20a461f | 1633 | case SIGP_START: |
6eb8f212 DH |
1634 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); |
1635 | break; | |
18ff9494 DH |
1636 | case SIGP_STOP: |
1637 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
b20a461f | 1638 | break; |
0b9972a2 | 1639 | case SIGP_RESTART: |
6eb8f212 | 1640 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); |
0b9972a2 | 1641 | break; |
18ff9494 DH |
1642 | case SIGP_STOP_STORE_STATUS: |
1643 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1644 | break; | |
1645 | case SIGP_STORE_STATUS_ADDR: | |
1646 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1647 | break; | |
abec5356 EF |
1648 | case SIGP_STORE_ADTL_STATUS: |
1649 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, &si); | |
1650 | break; | |
18ff9494 DH |
1651 | case SIGP_SET_PREFIX: |
1652 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
0788082a | 1653 | break; |
0b9972a2 | 1654 | case SIGP_INITIAL_CPU_RESET: |
6eb8f212 | 1655 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); |
0b9972a2 | 1656 | break; |
04c2b516 | 1657 | case SIGP_CPU_RESET: |
6eb8f212 | 1658 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); |
04c2b516 | 1659 | break; |
0b9972a2 | 1660 | default: |
6eb8f212 | 1661 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1662 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1663 | } |
04c2b516 | 1664 | |
6eb8f212 | 1665 | return si.cc; |
04c2b516 TH |
1666 | } |
1667 | ||
18ff9494 DH |
1668 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1669 | uint64_t *status_reg) | |
1670 | { | |
1671 | CPUState *cur_cs; | |
1672 | S390CPU *cur_cpu; | |
1673 | ||
1674 | /* due to the BQL, we are the only active cpu */ | |
1675 | CPU_FOREACH(cur_cs) { | |
1676 | cur_cpu = S390_CPU(cur_cs); | |
1677 | if (cur_cpu->env.sigp_order != 0) { | |
1678 | return SIGP_CC_BUSY; | |
1679 | } | |
1680 | cpu_synchronize_state(cur_cs); | |
1681 | /* all but the current one have to be stopped */ | |
1682 | if (cur_cpu != cpu && | |
1683 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1684 | *status_reg &= 0xffffffff00000000ULL; | |
1685 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1686 | return SIGP_CC_STATUS_STORED; | |
1687 | } | |
1688 | } | |
1689 | ||
1690 | switch (param & 0xff) { | |
1691 | case SIGP_MODE_ESA_S390: | |
1692 | /* not supported */ | |
1693 | return SIGP_CC_NOT_OPERATIONAL; | |
1694 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1695 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1696 | CPU_FOREACH(cur_cs) { | |
1697 | cur_cpu = S390_CPU(cur_cs); | |
1698 | cur_cpu->env.pfault_token = -1UL; | |
1699 | } | |
0b9972a2 | 1700 | break; |
18ff9494 DH |
1701 | default: |
1702 | *status_reg &= 0xffffffff00000000ULL; | |
1703 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1704 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1705 | } |
1706 | ||
18ff9494 DH |
1707 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1708 | } | |
1709 | ||
b8031adb TH |
1710 | #define SIGP_ORDER_MASK 0x000000ff |
1711 | ||
f7575c96 | 1712 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1713 | { |
f7575c96 | 1714 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1715 | const uint8_t r1 = ipa1 >> 4; |
1716 | const uint8_t r3 = ipa1 & 0x0f; | |
1717 | int ret; | |
1718 | uint8_t order; | |
1719 | uint64_t *status_reg; | |
22740e3f | 1720 | uint64_t param; |
6eb8f212 | 1721 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1722 | |
cb446eca | 1723 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1724 | |
1725 | /* get order code */ | |
6cb1e49d AY |
1726 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1727 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1728 | status_reg = &env->regs[r1]; |
22740e3f | 1729 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1730 | |
6eb8f212 | 1731 | switch (order) { |
0b9972a2 | 1732 | case SIGP_SET_ARCH: |
18ff9494 | 1733 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1734 | break; |
0b9972a2 | 1735 | default: |
6eb8f212 DH |
1736 | /* all other sigp orders target a single vcpu */ |
1737 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1738 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1739 | } |
1740 | ||
56dba22b DH |
1741 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1742 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1743 | ||
6eb8f212 DH |
1744 | if (ret >= 0) { |
1745 | setcc(cpu, ret); | |
1746 | return 0; | |
1747 | } | |
1748 | ||
1749 | return ret; | |
0e60a699 AG |
1750 | } |
1751 | ||
b30f4dfb | 1752 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1753 | { |
1754 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1755 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1756 | int r = -1; |
0e60a699 | 1757 | |
e67137c6 PM |
1758 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1759 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1760 | switch (ipa0) { |
09b99878 | 1761 | case IPA0_B2: |
1eecf41b FB |
1762 | r = handle_b2(cpu, run, ipa1); |
1763 | break; | |
09b99878 | 1764 | case IPA0_B9: |
1eecf41b FB |
1765 | r = handle_b9(cpu, run, ipa1); |
1766 | break; | |
09b99878 | 1767 | case IPA0_EB: |
80765f07 | 1768 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1769 | break; |
863f6f52 FB |
1770 | case IPA0_E3: |
1771 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1772 | break; | |
09b99878 | 1773 | case IPA0_DIAG: |
638129ff | 1774 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1775 | break; |
1776 | case IPA0_SIGP: | |
1777 | r = handle_sigp(cpu, run, ipa1); | |
1778 | break; | |
0e60a699 AG |
1779 | } |
1780 | ||
1781 | if (r < 0) { | |
b30f4dfb | 1782 | r = 0; |
1bc22652 | 1783 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1784 | } |
b30f4dfb DH |
1785 | |
1786 | return r; | |
0e60a699 AG |
1787 | } |
1788 | ||
f7575c96 | 1789 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1790 | { |
1791 | /* signal quiesce */ | |
f7575c96 | 1792 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1793 | } |
1794 | ||
a2689242 TH |
1795 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) |
1796 | { | |
1797 | CPUState *cs = CPU(cpu); | |
1798 | ||
1799 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1800 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1801 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1802 | s390_cpu_halt(cpu); |
5f5b5942 | 1803 | qemu_system_guest_panicked(); |
a2689242 TH |
1804 | } |
1805 | ||
1bc22652 | 1806 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1807 | { |
f7575c96 AF |
1808 | CPUState *cs = CPU(cpu); |
1809 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1810 | int icpt_code = run->s390_sieic.icptcode; |
1811 | int r = 0; | |
1812 | ||
e67137c6 | 1813 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1814 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1815 | switch (icpt_code) { |
1816 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1817 | r = handle_instruction(cpu, run); |
0e60a699 | 1818 | break; |
6449a41a TH |
1819 | case ICPT_PROGRAM: |
1820 | unmanageable_intercept(cpu, "program interrupt", | |
1821 | offsetof(LowCore, program_new_psw)); | |
1822 | r = EXCP_HALTED; | |
1823 | break; | |
a2689242 TH |
1824 | case ICPT_EXT_INT: |
1825 | unmanageable_intercept(cpu, "external interrupt", | |
1826 | offsetof(LowCore, external_new_psw)); | |
1827 | r = EXCP_HALTED; | |
1828 | break; | |
0e60a699 | 1829 | case ICPT_WAITPSW: |
08eb8c85 | 1830 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1831 | cpu_synchronize_state(cs); |
1832 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1833 | if (is_special_wait_psw(cs)) { |
1834 | qemu_system_shutdown_request(); | |
1835 | } else { | |
5f5b5942 | 1836 | qemu_system_guest_panicked(); |
08eb8c85 | 1837 | } |
eca3ed03 CB |
1838 | } |
1839 | r = EXCP_HALTED; | |
1840 | break; | |
854e42f3 | 1841 | case ICPT_CPU_STOP: |
eb24f7c6 | 1842 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1843 | qemu_system_shutdown_request(); |
1844 | } | |
18ff9494 DH |
1845 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1846 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1847 | true); | |
1848 | } | |
1849 | cpu->env.sigp_order = 0; | |
854e42f3 | 1850 | r = EXCP_HALTED; |
0e60a699 AG |
1851 | break; |
1852 | case ICPT_SOFT_INTERCEPT: | |
1853 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1854 | exit(1); | |
1855 | break; | |
0e60a699 AG |
1856 | case ICPT_IO: |
1857 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1858 | exit(1); | |
1859 | break; | |
1860 | default: | |
1861 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1862 | exit(1); | |
1863 | break; | |
1864 | } | |
1865 | ||
1866 | return r; | |
1867 | } | |
1868 | ||
09b99878 CH |
1869 | static int handle_tsch(S390CPU *cpu) |
1870 | { | |
09b99878 CH |
1871 | CPUState *cs = CPU(cpu); |
1872 | struct kvm_run *run = cs->kvm_run; | |
1873 | int ret; | |
1874 | ||
44c68de0 | 1875 | cpu_synchronize_state(cs); |
3474b679 | 1876 | |
653b0809 TH |
1877 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1878 | if (ret < 0) { | |
09b99878 CH |
1879 | /* |
1880 | * Failure. | |
1881 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1882 | */ | |
1883 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1884 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1885 | run->s390_tsch.subchannel_nr, | |
1886 | run->s390_tsch.io_int_parm, | |
1887 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1888 | } |
1889 | ret = 0; | |
1890 | } | |
1891 | return ret; | |
1892 | } | |
1893 | ||
6cb1e49d | 1894 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
1895 | { |
1896 | struct sysib_322 sysib; | |
1897 | int del; | |
1898 | ||
6cb1e49d | 1899 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
1900 | return; |
1901 | } | |
1902 | /* Shift the stack of Extended Names to prepare for our own data */ | |
1903 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
1904 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
1905 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
1906 | * assumed it's not capable of managing Extended Names for lower levels. | |
1907 | */ | |
1908 | for (del = 1; del < sysib.count; del++) { | |
1909 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
1910 | break; | |
1911 | } | |
1912 | } | |
1913 | if (del < sysib.count) { | |
1914 | memset(sysib.ext_names[del], 0, | |
1915 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
1916 | } | |
1917 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
1918 | if (qemu_name) { | |
1919 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
1920 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
1921 | strlen(qemu_name))); | |
1922 | } | |
1923 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
1924 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
1925 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
1926 | * considered by s390 as not capable of providing any Extended Name. | |
1927 | * Therefore if no name was specified on qemu invocation, we go with the | |
1928 | * same "KVMguest" default, which KVM has filled into short name field. | |
1929 | */ | |
1930 | if (qemu_name) { | |
1931 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
1932 | sizeof(sysib.ext_names[0])); | |
1933 | } else { | |
1934 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
1935 | } | |
1936 | /* Insert UUID */ | |
1937 | memcpy(sysib.vm[0].uuid, qemu_uuid, sizeof(sysib.vm[0].uuid)); | |
1938 | ||
6cb1e49d | 1939 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
1940 | } |
1941 | ||
1942 | static int handle_stsi(S390CPU *cpu) | |
1943 | { | |
1944 | CPUState *cs = CPU(cpu); | |
1945 | struct kvm_run *run = cs->kvm_run; | |
1946 | ||
1947 | switch (run->s390_stsi.fc) { | |
1948 | case 3: | |
1949 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
1950 | return 0; | |
1951 | } | |
1952 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 1953 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
1954 | return 0; |
1955 | default: | |
1956 | return 0; | |
1957 | } | |
1958 | } | |
1959 | ||
8c012449 DH |
1960 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1961 | { | |
770a6379 DH |
1962 | CPUState *cs = CPU(cpu); |
1963 | struct kvm_run *run = cs->kvm_run; | |
1964 | ||
1965 | int ret = 0; | |
1966 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1967 | ||
1968 | switch (arch_info->type) { | |
1969 | case KVM_HW_WP_WRITE: | |
1970 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1971 | cs->watchpoint_hit = &hw_watchpoint; | |
1972 | hw_watchpoint.vaddr = arch_info->addr; | |
1973 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1974 | ret = EXCP_DEBUG; | |
1975 | } | |
1976 | break; | |
1977 | case KVM_HW_BP: | |
1978 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1979 | ret = EXCP_DEBUG; | |
1980 | } | |
1981 | break; | |
1982 | case KVM_SINGLESTEP: | |
1983 | if (cs->singlestep_enabled) { | |
1984 | ret = EXCP_DEBUG; | |
1985 | } | |
1986 | break; | |
1987 | default: | |
1988 | ret = -ENOSYS; | |
1989 | } | |
1990 | ||
1991 | return ret; | |
8c012449 DH |
1992 | } |
1993 | ||
20d695a9 | 1994 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 1995 | { |
20d695a9 | 1996 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
1997 | int ret = 0; |
1998 | ||
4b8523ee JK |
1999 | qemu_mutex_lock_iothread(); |
2000 | ||
0e60a699 AG |
2001 | switch (run->exit_reason) { |
2002 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2003 | ret = handle_intercept(cpu); |
0e60a699 AG |
2004 | break; |
2005 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2006 | s390_reipl_request(); |
0e60a699 | 2007 | break; |
09b99878 CH |
2008 | case KVM_EXIT_S390_TSCH: |
2009 | ret = handle_tsch(cpu); | |
2010 | break; | |
f07177a5 ET |
2011 | case KVM_EXIT_S390_STSI: |
2012 | ret = handle_stsi(cpu); | |
2013 | break; | |
8c012449 DH |
2014 | case KVM_EXIT_DEBUG: |
2015 | ret = kvm_arch_handle_debug_exit(cpu); | |
2016 | break; | |
0e60a699 AG |
2017 | default: |
2018 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2019 | break; | |
2020 | } | |
4b8523ee | 2021 | qemu_mutex_unlock_iothread(); |
0e60a699 | 2022 | |
bb4ea393 JK |
2023 | if (ret == 0) { |
2024 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2025 | } |
0e60a699 AG |
2026 | return ret; |
2027 | } | |
4513d923 | 2028 | |
20d695a9 | 2029 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2030 | { |
2031 | return true; | |
2032 | } | |
a1b87fe0 | 2033 | |
20d695a9 | 2034 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
2035 | { |
2036 | return 1; | |
2037 | } | |
2038 | ||
2039 | int kvm_arch_on_sigbus(int code, void *addr) | |
2040 | { | |
2041 | return 1; | |
2042 | } | |
09b99878 | 2043 | |
de13d216 | 2044 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2045 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2046 | uint32_t io_int_word) | |
2047 | { | |
de13d216 CH |
2048 | struct kvm_s390_irq irq = { |
2049 | .u.io.subchannel_id = subchannel_id, | |
2050 | .u.io.subchannel_nr = subchannel_nr, | |
2051 | .u.io.io_int_parm = io_int_parm, | |
2052 | .u.io.io_int_word = io_int_word, | |
2053 | }; | |
09b99878 | 2054 | |
7e749462 | 2055 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2056 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2057 | } else { |
de13d216 | 2058 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
2059 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
2060 | } | |
de13d216 | 2061 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2062 | } |
2063 | ||
b080364a CH |
2064 | static uint64_t build_channel_report_mcic(void) |
2065 | { | |
2066 | uint64_t mcic; | |
2067 | ||
2068 | /* subclass: indicate channel report pending */ | |
2069 | mcic = MCIC_SC_CP | | |
2070 | /* subclass modifiers: none */ | |
2071 | /* storage errors: none */ | |
2072 | /* validity bits: no damage */ | |
2073 | MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | | |
2074 | MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | | |
2075 | MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; | |
2076 | if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { | |
2077 | mcic |= MCIC_VB_VR; | |
2078 | } | |
2079 | return mcic; | |
2080 | } | |
2081 | ||
de13d216 | 2082 | void kvm_s390_crw_mchk(void) |
09b99878 | 2083 | { |
de13d216 CH |
2084 | struct kvm_s390_irq irq = { |
2085 | .type = KVM_S390_MCHK, | |
2086 | .u.mchk.cr14 = 1 << 28, | |
b080364a | 2087 | .u.mchk.mcic = build_channel_report_mcic(), |
de13d216 CH |
2088 | }; |
2089 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2090 | } |
2091 | ||
2092 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2093 | { | |
09b99878 CH |
2094 | int r; |
2095 | ||
2096 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2097 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2098 | assert(r == 0); |
2099 | } | |
48475e14 AK |
2100 | |
2101 | void kvm_arch_init_irq_routing(KVMState *s) | |
2102 | { | |
d426d9fb CH |
2103 | /* |
2104 | * Note that while irqchip capabilities generally imply that cpustates | |
2105 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2106 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2107 | */ | |
2108 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2109 | kvm_gsi_routing_allowed = true; |
2110 | kvm_halt_in_kernel_allowed = false; | |
2111 | } | |
48475e14 | 2112 | } |
b4436a0b | 2113 | |
cc3ac9c4 CH |
2114 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2115 | int vq, bool assign) | |
b4436a0b CH |
2116 | { |
2117 | struct kvm_ioeventfd kick = { | |
2118 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2119 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2120 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2121 | .datamatch = vq, |
2122 | .addr = sch, | |
2123 | .len = 8, | |
2124 | }; | |
2125 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2126 | return -ENOSYS; | |
2127 | } | |
2128 | if (!assign) { | |
2129 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2130 | } | |
2131 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2132 | } | |
1def6656 MR |
2133 | |
2134 | int kvm_s390_get_memslot_count(KVMState *s) | |
2135 | { | |
2136 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
2137 | } | |
c9e659c9 DH |
2138 | |
2139 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) | |
2140 | { | |
2141 | struct kvm_mp_state mp_state = {}; | |
2142 | int ret; | |
2143 | ||
2144 | /* the kvm part might not have been initialized yet */ | |
2145 | if (CPU(cpu)->kvm_state == NULL) { | |
2146 | return 0; | |
2147 | } | |
2148 | ||
2149 | switch (cpu_state) { | |
2150 | case CPU_STATE_STOPPED: | |
2151 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2152 | break; | |
2153 | case CPU_STATE_CHECK_STOP: | |
2154 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2155 | break; | |
2156 | case CPU_STATE_OPERATING: | |
2157 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2158 | break; | |
2159 | case CPU_STATE_LOAD: | |
2160 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2161 | break; | |
2162 | default: | |
2163 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2164 | cpu_state); | |
2165 | exit(1); | |
2166 | } | |
2167 | ||
2168 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2169 | if (ret) { | |
2170 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2171 | strerror(-ret)); | |
2172 | } | |
2173 | ||
2174 | return ret; | |
2175 | } | |
9e03a040 | 2176 | |
3cda44f7 JF |
2177 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2178 | { | |
2179 | struct kvm_s390_irq_state irq_state; | |
2180 | CPUState *cs = CPU(cpu); | |
2181 | int32_t bytes; | |
2182 | ||
2183 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2184 | return; | |
2185 | } | |
2186 | ||
2187 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2188 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2189 | ||
2190 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2191 | if (bytes < 0) { | |
2192 | cpu->irqstate_saved_size = 0; | |
2193 | error_report("Migration of interrupt state failed"); | |
2194 | return; | |
2195 | } | |
2196 | ||
2197 | cpu->irqstate_saved_size = bytes; | |
2198 | } | |
2199 | ||
2200 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2201 | { | |
2202 | CPUState *cs = CPU(cpu); | |
2203 | struct kvm_s390_irq_state irq_state; | |
2204 | int r; | |
2205 | ||
b853d4cb SS |
2206 | if (cpu->irqstate_saved_size == 0) { |
2207 | return 0; | |
2208 | } | |
2209 | ||
3cda44f7 JF |
2210 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2211 | return -ENOSYS; | |
2212 | } | |
2213 | ||
3cda44f7 JF |
2214 | irq_state.buf = (uint64_t) cpu->irqstate; |
2215 | irq_state.len = cpu->irqstate_saved_size; | |
2216 | ||
2217 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2218 | if (r) { | |
2219 | error_report("Setting interrupt state failed %d", r); | |
2220 | } | |
2221 | return r; | |
2222 | } | |
2223 | ||
9e03a040 | 2224 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 2225 | uint64_t address, uint32_t data, PCIDevice *dev) |
9e03a040 FB |
2226 | { |
2227 | S390PCIBusDevice *pbdev; | |
2228 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
2229 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
2230 | ||
2231 | pbdev = s390_pci_find_dev_by_fid(fid); | |
2232 | if (!pbdev) { | |
2233 | DPRINTF("add_msi_route no dev\n"); | |
2234 | return -ENODEV; | |
2235 | } | |
2236 | ||
2237 | pbdev->routes.adapter.ind_offset = vec; | |
2238 | ||
2239 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2240 | route->flags = 0; | |
2241 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2242 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2243 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2244 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2245 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2246 | return 0; | |
2247 | } | |
1850b6b7 EA |
2248 | |
2249 | int kvm_arch_msi_data_to_gsi(uint32_t data) | |
2250 | { | |
2251 | abort(); | |
2252 | } |