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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
24 | #include <sys/types.h> | |
25 | #include <sys/ioctl.h> | |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
1de7afc9 | 32 | #include "qemu/timer.h" |
9c17d615 PB |
33 | #include "sysemu/sysemu.h" |
34 | #include "sysemu/kvm.h" | |
4cb88c3c | 35 | #include "hw/hw.h" |
0e60a699 | 36 | #include "cpu.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 CB |
38 | #include "qapi/qmp/qjson.h" |
39 | #include "monitor/monitor.h" | |
770a6379 | 40 | #include "exec/gdbstub.h" |
18ff9494 | 41 | #include "exec/address-spaces.h" |
860643bc | 42 | #include "trace.h" |
3a449690 | 43 | #include "qapi-event.h" |
863f6f52 | 44 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 45 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 46 | #include "hw/s390x/ipl.h" |
f07177a5 | 47 | #include "hw/s390x/ebcdic.h" |
0e60a699 AG |
48 | |
49 | /* #define DEBUG_KVM */ | |
50 | ||
51 | #ifdef DEBUG_KVM | |
e67137c6 | 52 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
53 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
54 | #else | |
e67137c6 | 55 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
56 | do { } while (0) |
57 | #endif | |
58 | ||
2b147555 DD |
59 | #define kvm_vm_check_mem_attr(s, attr) \ |
60 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
61 | ||
0e60a699 AG |
62 | #define IPA0_DIAG 0x8300 |
63 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
64 | #define IPA0_B2 0xb200 |
65 | #define IPA0_B9 0xb900 | |
66 | #define IPA0_EB 0xeb00 | |
863f6f52 | 67 | #define IPA0_E3 0xe300 |
0e60a699 | 68 | |
1eecf41b FB |
69 | #define PRIV_B2_SCLP_CALL 0x20 |
70 | #define PRIV_B2_CSCH 0x30 | |
71 | #define PRIV_B2_HSCH 0x31 | |
72 | #define PRIV_B2_MSCH 0x32 | |
73 | #define PRIV_B2_SSCH 0x33 | |
74 | #define PRIV_B2_STSCH 0x34 | |
75 | #define PRIV_B2_TSCH 0x35 | |
76 | #define PRIV_B2_TPI 0x36 | |
77 | #define PRIV_B2_SAL 0x37 | |
78 | #define PRIV_B2_RSCH 0x38 | |
79 | #define PRIV_B2_STCRW 0x39 | |
80 | #define PRIV_B2_STCPS 0x3a | |
81 | #define PRIV_B2_RCHP 0x3b | |
82 | #define PRIV_B2_SCHM 0x3c | |
83 | #define PRIV_B2_CHSC 0x5f | |
84 | #define PRIV_B2_SIGA 0x74 | |
85 | #define PRIV_B2_XSCH 0x76 | |
86 | ||
87 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
88 | #define PRIV_EB_PCISTB 0xd0 |
89 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
90 | |
91 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
92 | #define PRIV_B9_CLP 0xa0 |
93 | #define PRIV_B9_PCISTG 0xd0 | |
94 | #define PRIV_B9_PCILG 0xd2 | |
95 | #define PRIV_B9_RPCIT 0xd3 | |
96 | ||
97 | #define PRIV_E3_MPCIFC 0xd0 | |
98 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 99 | |
268846ba | 100 | #define DIAG_IPL 0x308 |
0e60a699 AG |
101 | #define DIAG_KVM_HYPERCALL 0x500 |
102 | #define DIAG_KVM_BREAKPOINT 0x501 | |
103 | ||
0e60a699 | 104 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 105 | #define ICPT_PROGRAM 0x08 |
a2689242 | 106 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
107 | #define ICPT_WAITPSW 0x1c |
108 | #define ICPT_SOFT_INTERCEPT 0x24 | |
109 | #define ICPT_CPU_STOP 0x28 | |
110 | #define ICPT_IO 0x40 | |
111 | ||
770a6379 DH |
112 | static CPUWatchpoint hw_watchpoint; |
113 | /* | |
114 | * We don't use a list because this structure is also used to transmit the | |
115 | * hardware breakpoints to the kernel. | |
116 | */ | |
117 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
118 | static int nb_hw_breakpoints; | |
119 | ||
94a8d39a JK |
120 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
121 | KVM_CAP_LAST_INFO | |
122 | }; | |
123 | ||
5b08b344 | 124 | static int cap_sync_regs; |
819bd309 | 125 | static int cap_async_pf; |
a9bcd1b8 | 126 | static int cap_mem_op; |
5b08b344 | 127 | |
dc622deb | 128 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 129 | |
a310b283 DD |
130 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
131 | { | |
132 | struct kvm_device_attr attr = { | |
133 | .group = KVM_S390_VM_MEM_CTRL, | |
134 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
135 | .addr = (uint64_t) memory_limit, | |
136 | }; | |
137 | ||
138 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
139 | } | |
140 | ||
141 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
142 | { | |
143 | int rc; | |
144 | ||
145 | struct kvm_device_attr attr = { | |
146 | .group = KVM_S390_VM_MEM_CTRL, | |
147 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
148 | .addr = (uint64_t) &new_limit, | |
149 | }; | |
150 | ||
2b147555 | 151 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
152 | return 0; |
153 | } | |
154 | ||
155 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
156 | if (rc) { | |
157 | return rc; | |
158 | } else if (*hw_limit < new_limit) { | |
159 | return -E2BIG; | |
160 | } | |
161 | ||
162 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
163 | } | |
164 | ||
4cb88c3c DD |
165 | void kvm_s390_clear_cmma_callback(void *opaque) |
166 | { | |
167 | int rc; | |
168 | KVMState *s = opaque; | |
169 | struct kvm_device_attr attr = { | |
170 | .group = KVM_S390_VM_MEM_CTRL, | |
171 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
172 | }; | |
173 | ||
174 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
175 | trace_kvm_clear_cmma(rc); | |
176 | } | |
177 | ||
178 | static void kvm_s390_enable_cmma(KVMState *s) | |
179 | { | |
180 | int rc; | |
181 | struct kvm_device_attr attr = { | |
182 | .group = KVM_S390_VM_MEM_CTRL, | |
183 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
184 | }; | |
185 | ||
2b147555 DD |
186 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_ENABLE_CMMA) || |
187 | !kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_CLR_CMMA)) { | |
4cb88c3c DD |
188 | return; |
189 | } | |
190 | ||
191 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
192 | if (!rc) { | |
193 | qemu_register_reset(kvm_s390_clear_cmma_callback, s); | |
194 | } | |
195 | trace_kvm_enable_cmma(rc); | |
196 | } | |
197 | ||
2eb1cd07 TK |
198 | static void kvm_s390_set_attr(uint64_t attr) |
199 | { | |
200 | struct kvm_device_attr attribute = { | |
201 | .group = KVM_S390_VM_CRYPTO, | |
202 | .attr = attr, | |
203 | }; | |
204 | ||
205 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
206 | ||
207 | if (ret) { | |
208 | error_report("Failed to set crypto device attribute %lu: %s", | |
209 | attr, strerror(-ret)); | |
210 | } | |
211 | } | |
212 | ||
213 | static void kvm_s390_init_aes_kw(void) | |
214 | { | |
215 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
216 | ||
217 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
218 | NULL)) { | |
219 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
220 | } | |
221 | ||
222 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
223 | kvm_s390_set_attr(attr); | |
224 | } | |
225 | } | |
226 | ||
227 | static void kvm_s390_init_dea_kw(void) | |
228 | { | |
229 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
230 | ||
231 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
232 | NULL)) { | |
233 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
234 | } | |
235 | ||
236 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
237 | kvm_s390_set_attr(attr); | |
238 | } | |
239 | } | |
240 | ||
241 | static void kvm_s390_init_crypto(void) | |
242 | { | |
243 | kvm_s390_init_aes_kw(); | |
244 | kvm_s390_init_dea_kw(); | |
245 | } | |
246 | ||
b16565b3 | 247 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 248 | { |
5b08b344 | 249 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 250 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 251 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
4cb88c3c | 252 | |
2b147555 | 253 | kvm_s390_enable_cmma(s); |
4cb88c3c | 254 | |
91138037 MA |
255 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
256 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
257 | phys_mem_set_alloc(legacy_s390_alloc); | |
258 | } | |
f16d3f58 DH |
259 | |
260 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
f07177a5 | 261 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
f16d3f58 | 262 | |
0e60a699 AG |
263 | return 0; |
264 | } | |
265 | ||
b164e48e EH |
266 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
267 | { | |
268 | return cpu->cpu_index; | |
269 | } | |
270 | ||
c9e659c9 | 271 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 272 | { |
c9e659c9 DH |
273 | S390CPU *cpu = S390_CPU(cs); |
274 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
1c9d2a1d | 275 | return 0; |
0e60a699 AG |
276 | } |
277 | ||
50a2c6e5 | 278 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 279 | { |
50a2c6e5 PB |
280 | CPUState *cs = CPU(cpu); |
281 | ||
419831d7 AG |
282 | /* The initial reset call is needed here to reset in-kernel |
283 | * vcpu data that we can't access directly from QEMU | |
284 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
285 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
286 | * code (kvm-all) */ | |
50a2c6e5 | 287 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 288 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 289 | } |
2eb1cd07 TK |
290 | |
291 | kvm_s390_init_crypto(); | |
0e60a699 AG |
292 | } |
293 | ||
fdb78ec0 DH |
294 | static int can_sync_regs(CPUState *cs, int regs) |
295 | { | |
296 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
297 | } | |
298 | ||
20d695a9 | 299 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 300 | { |
20d695a9 AF |
301 | S390CPU *cpu = S390_CPU(cs); |
302 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 303 | struct kvm_sregs sregs; |
0e60a699 | 304 | struct kvm_regs regs; |
e6eef7c2 | 305 | struct kvm_fpu fpu = {}; |
860643bc | 306 | int r; |
0e60a699 AG |
307 | int i; |
308 | ||
5b08b344 | 309 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
310 | cs->kvm_run->psw_addr = env->psw.addr; |
311 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 312 | |
fdb78ec0 | 313 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 314 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
315 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
316 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
317 | } |
318 | } else { | |
319 | for (i = 0; i < 16; i++) { | |
320 | regs.gprs[i] = env->regs[i]; | |
321 | } | |
860643bc CB |
322 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
323 | if (r < 0) { | |
324 | return r; | |
5b08b344 | 325 | } |
0e60a699 AG |
326 | } |
327 | ||
85ad6230 JH |
328 | /* Floating point */ |
329 | for (i = 0; i < 16; i++) { | |
330 | fpu.fprs[i] = env->fregs[i].ll; | |
331 | } | |
332 | fpu.fpc = env->fpc; | |
333 | ||
334 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); | |
335 | if (r < 0) { | |
336 | return r; | |
337 | } | |
338 | ||
44c68de0 DD |
339 | /* Do we need to save more than that? */ |
340 | if (level == KVM_PUT_RUNTIME_STATE) { | |
341 | return 0; | |
342 | } | |
420840e5 | 343 | |
59ac1532 DH |
344 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
345 | cs->kvm_run->s.regs.cputm = env->cputm; | |
346 | cs->kvm_run->s.regs.ckc = env->ckc; | |
347 | cs->kvm_run->s.regs.todpr = env->todpr; | |
348 | cs->kvm_run->s.regs.gbea = env->gbea; | |
349 | cs->kvm_run->s.regs.pp = env->pp; | |
350 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
351 | } else { | |
352 | /* | |
353 | * These ONE_REGS are not protected by a capability. As they are only | |
354 | * necessary for migration we just trace a possible error, but don't | |
355 | * return with an error return code. | |
356 | */ | |
357 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
358 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
359 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
360 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
361 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
362 | } | |
363 | ||
364 | /* pfault parameters */ | |
365 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
366 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
367 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
368 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
369 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
370 | } else if (cap_async_pf) { | |
860643bc CB |
371 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
372 | if (r < 0) { | |
373 | return r; | |
819bd309 | 374 | } |
860643bc CB |
375 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
376 | if (r < 0) { | |
377 | return r; | |
819bd309 | 378 | } |
860643bc CB |
379 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
380 | if (r < 0) { | |
381 | return r; | |
819bd309 DD |
382 | } |
383 | } | |
384 | ||
fdb78ec0 DH |
385 | /* access registers and control registers*/ |
386 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 387 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
388 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
389 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 390 | } |
f7575c96 AF |
391 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
392 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
393 | } else { |
394 | for (i = 0; i < 16; i++) { | |
395 | sregs.acrs[i] = env->aregs[i]; | |
396 | sregs.crs[i] = env->cregs[i]; | |
397 | } | |
860643bc CB |
398 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
399 | if (r < 0) { | |
400 | return r; | |
5b08b344 CB |
401 | } |
402 | } | |
0e60a699 | 403 | |
5b08b344 | 404 | /* Finally the prefix */ |
fdb78ec0 | 405 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
406 | cs->kvm_run->s.regs.prefix = env->psa; |
407 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
408 | } else { |
409 | /* prefix is only supported via sync regs */ | |
410 | } | |
411 | return 0; | |
0e60a699 AG |
412 | } |
413 | ||
20d695a9 | 414 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
415 | { |
416 | S390CPU *cpu = S390_CPU(cs); | |
417 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 418 | struct kvm_sregs sregs; |
0e60a699 | 419 | struct kvm_regs regs; |
85ad6230 | 420 | struct kvm_fpu fpu; |
44c68de0 | 421 | int i, r; |
420840e5 | 422 | |
5b08b344 | 423 | /* get the PSW */ |
f7575c96 AF |
424 | env->psw.addr = cs->kvm_run->psw_addr; |
425 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
426 | |
427 | /* the GPRS */ | |
fdb78ec0 | 428 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 429 | for (i = 0; i < 16; i++) { |
f7575c96 | 430 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
431 | } |
432 | } else { | |
44c68de0 DD |
433 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
434 | if (r < 0) { | |
435 | return r; | |
5b08b344 CB |
436 | } |
437 | for (i = 0; i < 16; i++) { | |
438 | env->regs[i] = regs.gprs[i]; | |
439 | } | |
0e60a699 AG |
440 | } |
441 | ||
5b08b344 | 442 | /* The ACRS and CRS */ |
fdb78ec0 | 443 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 444 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
445 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
446 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
447 | } |
448 | } else { | |
44c68de0 DD |
449 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
450 | if (r < 0) { | |
451 | return r; | |
5b08b344 CB |
452 | } |
453 | for (i = 0; i < 16; i++) { | |
454 | env->aregs[i] = sregs.acrs[i]; | |
455 | env->cregs[i] = sregs.crs[i]; | |
456 | } | |
0e60a699 AG |
457 | } |
458 | ||
85ad6230 JH |
459 | /* Floating point */ |
460 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
461 | if (r < 0) { | |
462 | return r; | |
463 | } | |
464 | for (i = 0; i < 16; i++) { | |
465 | env->fregs[i].ll = fpu.fprs[i]; | |
466 | } | |
467 | env->fpc = fpu.fpc; | |
468 | ||
44c68de0 | 469 | /* The prefix */ |
fdb78ec0 | 470 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 471 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 472 | } |
0e60a699 | 473 | |
59ac1532 DH |
474 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
475 | env->cputm = cs->kvm_run->s.regs.cputm; | |
476 | env->ckc = cs->kvm_run->s.regs.ckc; | |
477 | env->todpr = cs->kvm_run->s.regs.todpr; | |
478 | env->gbea = cs->kvm_run->s.regs.gbea; | |
479 | env->pp = cs->kvm_run->s.regs.pp; | |
480 | } else { | |
481 | /* | |
482 | * These ONE_REGS are not protected by a capability. As they are only | |
483 | * necessary for migration we just trace a possible error, but don't | |
484 | * return with an error return code. | |
485 | */ | |
486 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
487 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
488 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
489 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
490 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
491 | } | |
492 | ||
493 | /* pfault parameters */ | |
494 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
495 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
496 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
497 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
498 | } else if (cap_async_pf) { | |
860643bc | 499 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
500 | if (r < 0) { |
501 | return r; | |
502 | } | |
860643bc | 503 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
504 | if (r < 0) { |
505 | return r; | |
506 | } | |
860643bc | 507 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
508 | if (r < 0) { |
509 | return r; | |
510 | } | |
511 | } | |
512 | ||
0e60a699 AG |
513 | return 0; |
514 | } | |
515 | ||
3f9e59bb JH |
516 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
517 | { | |
518 | int r; | |
519 | struct kvm_device_attr attr = { | |
520 | .group = KVM_S390_VM_TOD, | |
521 | .attr = KVM_S390_VM_TOD_LOW, | |
522 | .addr = (uint64_t)tod_low, | |
523 | }; | |
524 | ||
525 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
526 | if (r) { | |
527 | return r; | |
528 | } | |
529 | ||
530 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
531 | attr.addr = (uint64_t)tod_high; | |
532 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
533 | } | |
534 | ||
535 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
536 | { | |
537 | int r; | |
538 | ||
539 | struct kvm_device_attr attr = { | |
540 | .group = KVM_S390_VM_TOD, | |
541 | .attr = KVM_S390_VM_TOD_LOW, | |
542 | .addr = (uint64_t)tod_low, | |
543 | }; | |
544 | ||
545 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
546 | if (r) { | |
547 | return r; | |
548 | } | |
549 | ||
550 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
551 | attr.addr = (uint64_t)tod_high; | |
552 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
553 | } | |
554 | ||
a9bcd1b8 TH |
555 | /** |
556 | * kvm_s390_mem_op: | |
557 | * @addr: the logical start address in guest memory | |
558 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying | |
559 | * @len: length that should be transfered | |
560 | * @is_write: true = write, false = read | |
561 | * Returns: 0 on success, non-zero if an exception or error occured | |
562 | * | |
563 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
564 | * is injected into the vCPU in case of translation errors. | |
565 | */ | |
566 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, void *hostbuf, int len, | |
567 | bool is_write) | |
568 | { | |
569 | struct kvm_s390_mem_op mem_op = { | |
570 | .gaddr = addr, | |
571 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
572 | .size = len, | |
573 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
574 | : KVM_S390_MEMOP_LOGICAL_READ, | |
575 | .buf = (uint64_t)hostbuf, | |
576 | }; | |
577 | int ret; | |
578 | ||
579 | if (!cap_mem_op) { | |
580 | return -ENOSYS; | |
581 | } | |
582 | if (!hostbuf) { | |
583 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
584 | } | |
585 | ||
586 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
587 | if (ret < 0) { | |
588 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
589 | } | |
590 | return ret; | |
591 | } | |
592 | ||
fdec9918 CB |
593 | /* |
594 | * Legacy layout for s390: | |
595 | * Older S390 KVM requires the topmost vma of the RAM to be | |
596 | * smaller than an system defined value, which is at least 256GB. | |
597 | * Larger systems have larger values. We put the guest between | |
598 | * the end of data segment (system break) and this value. We | |
599 | * use 32GB as a base to have enough room for the system break | |
600 | * to grow. We also have to use MAP parameters that avoid | |
601 | * read-only mapping of guest pages. | |
602 | */ | |
dc622deb | 603 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
604 | { |
605 | void *mem; | |
606 | ||
607 | mem = mmap((void *) 0x800000000ULL, size, | |
608 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
609 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 610 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
611 | } |
612 | ||
8e4e86af DH |
613 | /* DIAG 501 is used for sw breakpoints */ |
614 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
615 | ||
20d695a9 | 616 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 617 | { |
0e60a699 | 618 | |
8e4e86af DH |
619 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
620 | sizeof(diag_501), 0) || | |
621 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
622 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
623 | return -EINVAL; |
624 | } | |
625 | return 0; | |
626 | } | |
627 | ||
20d695a9 | 628 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 629 | { |
8e4e86af | 630 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 631 | |
8e4e86af | 632 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 633 | return -EINVAL; |
8e4e86af | 634 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 635 | return -EINVAL; |
8e4e86af DH |
636 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
637 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
638 | return -EINVAL; |
639 | } | |
640 | ||
641 | return 0; | |
642 | } | |
643 | ||
770a6379 DH |
644 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
645 | int len, int type) | |
646 | { | |
647 | int n; | |
648 | ||
649 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
650 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
651 | (hw_breakpoints[n].len == len || len == -1)) { | |
652 | return &hw_breakpoints[n]; | |
653 | } | |
654 | } | |
655 | ||
656 | return NULL; | |
657 | } | |
658 | ||
659 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
660 | { | |
661 | int size; | |
662 | ||
663 | if (find_hw_breakpoint(addr, len, type)) { | |
664 | return -EEXIST; | |
665 | } | |
666 | ||
667 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
668 | ||
669 | if (!hw_breakpoints) { | |
670 | nb_hw_breakpoints = 0; | |
671 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
672 | } else { | |
673 | hw_breakpoints = | |
674 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
675 | } | |
676 | ||
677 | if (!hw_breakpoints) { | |
678 | nb_hw_breakpoints = 0; | |
679 | return -ENOMEM; | |
680 | } | |
681 | ||
682 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
683 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
684 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
685 | ||
686 | nb_hw_breakpoints++; | |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
8c012449 DH |
691 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
692 | target_ulong len, int type) | |
693 | { | |
770a6379 DH |
694 | switch (type) { |
695 | case GDB_BREAKPOINT_HW: | |
696 | type = KVM_HW_BP; | |
697 | break; | |
698 | case GDB_WATCHPOINT_WRITE: | |
699 | if (len < 1) { | |
700 | return -EINVAL; | |
701 | } | |
702 | type = KVM_HW_WP_WRITE; | |
703 | break; | |
704 | default: | |
705 | return -ENOSYS; | |
706 | } | |
707 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
708 | } |
709 | ||
710 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
711 | target_ulong len, int type) | |
712 | { | |
770a6379 DH |
713 | int size; |
714 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
715 | ||
716 | if (bp == NULL) { | |
717 | return -ENOENT; | |
718 | } | |
719 | ||
720 | nb_hw_breakpoints--; | |
721 | if (nb_hw_breakpoints > 0) { | |
722 | /* | |
723 | * In order to trim the array, move the last element to the position to | |
724 | * be removed - if necessary. | |
725 | */ | |
726 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
727 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
728 | } | |
729 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
730 | hw_breakpoints = | |
731 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
732 | } else { | |
733 | g_free(hw_breakpoints); | |
734 | hw_breakpoints = NULL; | |
735 | } | |
736 | ||
737 | return 0; | |
8c012449 DH |
738 | } |
739 | ||
740 | void kvm_arch_remove_all_hw_breakpoints(void) | |
741 | { | |
770a6379 DH |
742 | nb_hw_breakpoints = 0; |
743 | g_free(hw_breakpoints); | |
744 | hw_breakpoints = NULL; | |
8c012449 DH |
745 | } |
746 | ||
747 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
748 | { | |
770a6379 DH |
749 | int i; |
750 | ||
751 | if (nb_hw_breakpoints > 0) { | |
752 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
753 | dbg->arch.hw_bp = hw_breakpoints; | |
754 | ||
755 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
756 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
757 | hw_breakpoints[i].addr); | |
758 | } | |
759 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
760 | } else { | |
761 | dbg->arch.nr_hw_bp = 0; | |
762 | dbg->arch.hw_bp = NULL; | |
763 | } | |
8c012449 DH |
764 | } |
765 | ||
20d695a9 | 766 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 767 | { |
0e60a699 AG |
768 | } |
769 | ||
20d695a9 | 770 | void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 771 | { |
0e60a699 AG |
772 | } |
773 | ||
20d695a9 | 774 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 775 | { |
225dc991 | 776 | return cs->halted; |
0af691d7 MT |
777 | } |
778 | ||
66ad0893 CH |
779 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
780 | struct kvm_s390_interrupt *interrupt) | |
781 | { | |
782 | int r = 0; | |
783 | ||
784 | interrupt->type = irq->type; | |
785 | switch (irq->type) { | |
786 | case KVM_S390_INT_VIRTIO: | |
787 | interrupt->parm = irq->u.ext.ext_params; | |
788 | /* fall through */ | |
789 | case KVM_S390_INT_PFAULT_INIT: | |
790 | case KVM_S390_INT_PFAULT_DONE: | |
791 | interrupt->parm64 = irq->u.ext.ext_params2; | |
792 | break; | |
793 | case KVM_S390_PROGRAM_INT: | |
794 | interrupt->parm = irq->u.pgm.code; | |
795 | break; | |
796 | case KVM_S390_SIGP_SET_PREFIX: | |
797 | interrupt->parm = irq->u.prefix.address; | |
798 | break; | |
799 | case KVM_S390_INT_SERVICE: | |
800 | interrupt->parm = irq->u.ext.ext_params; | |
801 | break; | |
802 | case KVM_S390_MCHK: | |
803 | interrupt->parm = irq->u.mchk.cr14; | |
804 | interrupt->parm64 = irq->u.mchk.mcic; | |
805 | break; | |
806 | case KVM_S390_INT_EXTERNAL_CALL: | |
807 | interrupt->parm = irq->u.extcall.code; | |
808 | break; | |
809 | case KVM_S390_INT_EMERGENCY: | |
810 | interrupt->parm = irq->u.emerg.code; | |
811 | break; | |
812 | case KVM_S390_SIGP_STOP: | |
813 | case KVM_S390_RESTART: | |
814 | break; /* These types have no parameters */ | |
815 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
816 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
817 | interrupt->parm |= irq->u.io.subchannel_nr; | |
818 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
819 | interrupt->parm64 |= irq->u.io.io_int_word; | |
820 | break; | |
821 | default: | |
822 | r = -EINVAL; | |
823 | break; | |
824 | } | |
825 | return r; | |
826 | } | |
827 | ||
828 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) | |
829 | { | |
830 | struct kvm_s390_interrupt kvmint = {}; | |
831 | CPUState *cs = CPU(cpu); | |
832 | int r; | |
833 | ||
834 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
835 | if (r < 0) { | |
836 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
837 | exit(1); | |
838 | } | |
839 | ||
840 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
841 | if (r < 0) { | |
842 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
843 | exit(1); | |
844 | } | |
845 | } | |
846 | ||
bbd8bb8e | 847 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
848 | { |
849 | struct kvm_s390_interrupt kvmint = {}; | |
850 | int r; | |
851 | ||
852 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
853 | if (r < 0) { | |
854 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
855 | exit(1); | |
856 | } | |
857 | ||
858 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
859 | if (r < 0) { | |
860 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
861 | exit(1); | |
862 | } | |
863 | } | |
864 | ||
bbd8bb8e CH |
865 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
866 | { | |
867 | static bool use_flic = true; | |
868 | int r; | |
869 | ||
870 | if (use_flic) { | |
871 | r = kvm_s390_inject_flic(irq); | |
872 | if (r == -ENOSYS) { | |
873 | use_flic = false; | |
874 | } | |
875 | if (!r) { | |
876 | return; | |
877 | } | |
878 | } | |
879 | __kvm_s390_floating_interrupt(irq); | |
880 | } | |
881 | ||
de13d216 | 882 | void kvm_s390_virtio_irq(int config_change, uint64_t token) |
0e60a699 | 883 | { |
de13d216 CH |
884 | struct kvm_s390_irq irq = { |
885 | .type = KVM_S390_INT_VIRTIO, | |
886 | .u.ext.ext_params = config_change, | |
887 | .u.ext.ext_params2 = token, | |
888 | }; | |
0e60a699 | 889 | |
de13d216 | 890 | kvm_s390_floating_interrupt(&irq); |
0e60a699 AG |
891 | } |
892 | ||
de13d216 | 893 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 894 | { |
de13d216 CH |
895 | struct kvm_s390_irq irq = { |
896 | .type = KVM_S390_INT_SERVICE, | |
897 | .u.ext.ext_params = parm, | |
898 | }; | |
0e60a699 | 899 | |
de13d216 | 900 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
901 | } |
902 | ||
1bc22652 | 903 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 904 | { |
de13d216 CH |
905 | struct kvm_s390_irq irq = { |
906 | .type = KVM_S390_PROGRAM_INT, | |
907 | .u.pgm.code = code, | |
908 | }; | |
909 | ||
910 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
911 | } |
912 | ||
801cdd35 TH |
913 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
914 | { | |
915 | struct kvm_s390_irq irq = { | |
916 | .type = KVM_S390_PROGRAM_INT, | |
917 | .u.pgm.code = code, | |
918 | .u.pgm.trans_exc_code = te_code, | |
919 | .u.pgm.exc_access_id = te_code & 3, | |
920 | }; | |
921 | ||
922 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
923 | } | |
924 | ||
1bc22652 | 925 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 926 | uint16_t ipbh0) |
0e60a699 | 927 | { |
1bc22652 | 928 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
929 | uint64_t sccb; |
930 | uint32_t code; | |
0e60a699 AG |
931 | int r = 0; |
932 | ||
cb446eca | 933 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
934 | sccb = env->regs[ipbh0 & 0xf]; |
935 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
936 | ||
6e252802 | 937 | r = sclp_service_call(env, sccb, code); |
9abf567d | 938 | if (r < 0) { |
1bc22652 | 939 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
940 | } else { |
941 | setcc(cpu, r); | |
0e60a699 | 942 | } |
81f7c56c | 943 | |
0e60a699 AG |
944 | return 0; |
945 | } | |
946 | ||
1eecf41b | 947 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 948 | { |
09b99878 | 949 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
950 | int rc = 0; |
951 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 952 | |
44c68de0 | 953 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 954 | |
09b99878 | 955 | switch (ipa1) { |
1eecf41b | 956 | case PRIV_B2_XSCH: |
5d9bf1c0 | 957 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 958 | break; |
1eecf41b | 959 | case PRIV_B2_CSCH: |
5d9bf1c0 | 960 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 961 | break; |
1eecf41b | 962 | case PRIV_B2_HSCH: |
5d9bf1c0 | 963 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 964 | break; |
1eecf41b | 965 | case PRIV_B2_MSCH: |
5d9bf1c0 | 966 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 967 | break; |
1eecf41b | 968 | case PRIV_B2_SSCH: |
5d9bf1c0 | 969 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 970 | break; |
1eecf41b | 971 | case PRIV_B2_STCRW: |
5d9bf1c0 | 972 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 973 | break; |
1eecf41b | 974 | case PRIV_B2_STSCH: |
5d9bf1c0 | 975 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 976 | break; |
1eecf41b | 977 | case PRIV_B2_TSCH: |
09b99878 CH |
978 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
979 | fprintf(stderr, "Spurious tsch intercept\n"); | |
980 | break; | |
1eecf41b | 981 | case PRIV_B2_CHSC: |
5d9bf1c0 | 982 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 983 | break; |
1eecf41b | 984 | case PRIV_B2_TPI: |
09b99878 CH |
985 | /* This should have been handled by kvm already. */ |
986 | fprintf(stderr, "Spurious tpi intercept\n"); | |
987 | break; | |
1eecf41b | 988 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
989 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
990 | run->s390_sieic.ipb); | |
09b99878 | 991 | break; |
1eecf41b | 992 | case PRIV_B2_RSCH: |
5d9bf1c0 | 993 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 994 | break; |
1eecf41b | 995 | case PRIV_B2_RCHP: |
5d9bf1c0 | 996 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 997 | break; |
1eecf41b | 998 | case PRIV_B2_STCPS: |
09b99878 | 999 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1000 | break; |
1eecf41b | 1001 | case PRIV_B2_SAL: |
5d9bf1c0 | 1002 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1003 | break; |
1eecf41b | 1004 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1005 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1006 | setcc(cpu, 3); |
09b99878 | 1007 | break; |
1eecf41b FB |
1008 | case PRIV_B2_SCLP_CALL: |
1009 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1010 | break; | |
c1e8dfb5 | 1011 | default: |
1eecf41b FB |
1012 | rc = -1; |
1013 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1014 | break; | |
09b99878 CH |
1015 | } |
1016 | ||
1eecf41b | 1017 | return rc; |
09b99878 CH |
1018 | } |
1019 | ||
863f6f52 FB |
1020 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run) |
1021 | { | |
1022 | CPUS390XState *env = &cpu->env; | |
1023 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1024 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1025 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1026 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1027 | ||
1028 | if (disp2 & 0x80000) { | |
1029 | disp2 += 0xfff00000; | |
1030 | } | |
1031 | ||
1032 | return (base2 ? env->regs[base2] : 0) + | |
1033 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1034 | } | |
1035 | ||
1036 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run) | |
1037 | { | |
1038 | CPUS390XState *env = &cpu->env; | |
1039 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1040 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1041 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1042 | ||
1043 | if (disp2 & 0x80000) { | |
1044 | disp2 += 0xfff00000; | |
1045 | } | |
1046 | ||
1047 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1048 | } | |
1049 | ||
1050 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1051 | { | |
1052 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1053 | ||
1054 | return clp_service_call(cpu, r2); | |
1055 | } | |
1056 | ||
1057 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1058 | { | |
1059 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1060 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1061 | ||
1062 | return pcilg_service_call(cpu, r1, r2); | |
1063 | } | |
1064 | ||
1065 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1066 | { | |
1067 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1068 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1069 | ||
1070 | return pcistg_service_call(cpu, r1, r2); | |
1071 | } | |
1072 | ||
1073 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1074 | { | |
1075 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1076 | uint64_t fiba; | |
1077 | ||
1078 | cpu_synchronize_state(CPU(cpu)); | |
1079 | fiba = get_base_disp_rxy(cpu, run); | |
1080 | ||
1081 | return stpcifc_service_call(cpu, r1, fiba); | |
1082 | } | |
1083 | ||
1084 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1085 | { | |
1086 | /* NOOP */ | |
1087 | return 0; | |
1088 | } | |
1089 | ||
1090 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1091 | { | |
1092 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1093 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1094 | ||
1095 | return rpcit_service_call(cpu, r1, r2); | |
1096 | } | |
1097 | ||
1098 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1099 | { | |
1100 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1101 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1102 | uint64_t gaddr; | |
1103 | ||
1104 | cpu_synchronize_state(CPU(cpu)); | |
1105 | gaddr = get_base_disp_rsy(cpu, run); | |
1106 | ||
1107 | return pcistb_service_call(cpu, r1, r3, gaddr); | |
1108 | } | |
1109 | ||
1110 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1111 | { | |
1112 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1113 | uint64_t fiba; | |
1114 | ||
1115 | cpu_synchronize_state(CPU(cpu)); | |
1116 | fiba = get_base_disp_rxy(cpu, run); | |
1117 | ||
1118 | return mpcifc_service_call(cpu, r1, fiba); | |
1119 | } | |
1120 | ||
1eecf41b | 1121 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1122 | { |
1123 | int r = 0; | |
0e60a699 | 1124 | |
0e60a699 | 1125 | switch (ipa1) { |
863f6f52 FB |
1126 | case PRIV_B9_CLP: |
1127 | r = kvm_clp_service_call(cpu, run); | |
1128 | break; | |
1129 | case PRIV_B9_PCISTG: | |
1130 | r = kvm_pcistg_service_call(cpu, run); | |
1131 | break; | |
1132 | case PRIV_B9_PCILG: | |
1133 | r = kvm_pcilg_service_call(cpu, run); | |
1134 | break; | |
1135 | case PRIV_B9_RPCIT: | |
1136 | r = kvm_rpcit_service_call(cpu, run); | |
1137 | break; | |
1eecf41b FB |
1138 | case PRIV_B9_EQBS: |
1139 | /* just inject exception */ | |
1140 | r = -1; | |
1141 | break; | |
1142 | default: | |
1143 | r = -1; | |
1144 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1145 | break; | |
1146 | } | |
1147 | ||
1148 | return r; | |
1149 | } | |
1150 | ||
80765f07 | 1151 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1152 | { |
1153 | int r = 0; | |
1154 | ||
80765f07 | 1155 | switch (ipbl) { |
863f6f52 FB |
1156 | case PRIV_EB_PCISTB: |
1157 | r = kvm_pcistb_service_call(cpu, run); | |
1158 | break; | |
1159 | case PRIV_EB_SIC: | |
1160 | r = kvm_sic_service_call(cpu, run); | |
1161 | break; | |
1eecf41b FB |
1162 | case PRIV_EB_SQBS: |
1163 | /* just inject exception */ | |
1164 | r = -1; | |
1165 | break; | |
1166 | default: | |
1167 | r = -1; | |
80765f07 | 1168 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1169 | break; |
0e60a699 AG |
1170 | } |
1171 | ||
1172 | return r; | |
1173 | } | |
1174 | ||
863f6f52 FB |
1175 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1176 | { | |
1177 | int r = 0; | |
1178 | ||
1179 | switch (ipbl) { | |
1180 | case PRIV_E3_MPCIFC: | |
1181 | r = kvm_mpcifc_service_call(cpu, run); | |
1182 | break; | |
1183 | case PRIV_E3_STPCIFC: | |
1184 | r = kvm_stpcifc_service_call(cpu, run); | |
1185 | break; | |
1186 | default: | |
1187 | r = -1; | |
1188 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1189 | break; | |
1190 | } | |
1191 | ||
1192 | return r; | |
1193 | } | |
1194 | ||
4fd6dd06 | 1195 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1196 | { |
4fd6dd06 | 1197 | CPUS390XState *env = &cpu->env; |
77319f22 | 1198 | int ret; |
3474b679 | 1199 | |
44c68de0 | 1200 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1201 | ret = s390_virtio_hypercall(env); |
1202 | if (ret == -EINVAL) { | |
1203 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1204 | return 0; | |
1205 | } | |
0e60a699 | 1206 | |
77319f22 | 1207 | return ret; |
0e60a699 AG |
1208 | } |
1209 | ||
268846ba ED |
1210 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1211 | { | |
1212 | uint64_t r1, r3; | |
1213 | ||
1214 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1215 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1216 | r3 = run->s390_sieic.ipa & 0x000f; |
1217 | handle_diag_308(&cpu->env, r1, r3); | |
1218 | } | |
1219 | ||
b30f4dfb DH |
1220 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1221 | { | |
1222 | CPUS390XState *env = &cpu->env; | |
1223 | unsigned long pc; | |
1224 | ||
1225 | cpu_synchronize_state(CPU(cpu)); | |
1226 | ||
1227 | pc = env->psw.addr - 4; | |
1228 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1229 | env->psw.addr = pc; | |
1230 | return EXCP_DEBUG; | |
1231 | } | |
1232 | ||
1233 | return -ENOENT; | |
1234 | } | |
1235 | ||
638129ff CH |
1236 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1237 | ||
1238 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1239 | { |
1240 | int r = 0; | |
638129ff CH |
1241 | uint16_t func_code; |
1242 | ||
1243 | /* | |
1244 | * For any diagnose call we support, bits 48-63 of the resulting | |
1245 | * address specify the function code; the remainder is ignored. | |
1246 | */ | |
1247 | func_code = decode_basedisp_rs(&cpu->env, ipb) & DIAG_KVM_CODE_MASK; | |
1248 | switch (func_code) { | |
268846ba ED |
1249 | case DIAG_IPL: |
1250 | kvm_handle_diag_308(cpu, run); | |
1251 | break; | |
39fbc5c6 CB |
1252 | case DIAG_KVM_HYPERCALL: |
1253 | r = handle_hypercall(cpu, run); | |
1254 | break; | |
1255 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1256 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1257 | break; |
1258 | default: | |
638129ff | 1259 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1260 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1261 | break; |
0e60a699 AG |
1262 | } |
1263 | ||
1264 | return r; | |
1265 | } | |
1266 | ||
6eb8f212 DH |
1267 | typedef struct SigpInfo { |
1268 | S390CPU *cpu; | |
22740e3f | 1269 | uint64_t param; |
6eb8f212 DH |
1270 | int cc; |
1271 | uint64_t *status_reg; | |
1272 | } SigpInfo; | |
1273 | ||
36b5c845 | 1274 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1275 | { |
36b5c845 DH |
1276 | *si->status_reg &= 0xffffffff00000000ULL; |
1277 | *si->status_reg |= status; | |
1278 | si->cc = SIGP_CC_STATUS_STORED; | |
1279 | } | |
6e6ad8db | 1280 | |
6eb8f212 | 1281 | static void sigp_start(void *arg) |
b20a461f | 1282 | { |
6eb8f212 | 1283 | SigpInfo *si = arg; |
6e6ad8db | 1284 | |
4f2b55d1 DH |
1285 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1286 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1287 | return; | |
1288 | } | |
1289 | ||
6eb8f212 DH |
1290 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1291 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1292 | } |
1293 | ||
18ff9494 | 1294 | static void sigp_stop(void *arg) |
0e60a699 | 1295 | { |
18ff9494 DH |
1296 | SigpInfo *si = arg; |
1297 | struct kvm_s390_irq irq = { | |
1298 | .type = KVM_S390_SIGP_STOP, | |
1299 | }; | |
1300 | ||
1301 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1302 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1303 | return; | |
1304 | } | |
1305 | ||
1306 | /* disabled wait - sleeping in user space */ | |
1307 | if (CPU(si->cpu)->halted) { | |
1308 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1309 | } else { | |
1310 | /* execute the stop function */ | |
1311 | si->cpu->env.sigp_order = SIGP_STOP; | |
1312 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1313 | } | |
1314 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1315 | } | |
1316 | ||
1317 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) | |
1318 | #define SAVE_AREA_SIZE 512 | |
1319 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1320 | { | |
1321 | static const uint8_t ar_id = 1; | |
1322 | uint64_t ckc = cpu->env.ckc >> 8; | |
1323 | void *mem; | |
1324 | hwaddr len = SAVE_AREA_SIZE; | |
1325 | ||
1326 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1327 | if (!mem) { | |
1328 | return -EFAULT; | |
1329 | } | |
1330 | if (len != SAVE_AREA_SIZE) { | |
1331 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1332 | return -EFAULT; | |
1333 | } | |
1334 | ||
1335 | if (store_arch) { | |
1336 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1337 | } | |
1338 | memcpy(mem, &cpu->env.fregs, 128); | |
1339 | memcpy(mem + 128, &cpu->env.regs, 128); | |
1340 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1341 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1342 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1343 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1344 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1345 | memcpy(mem + 304, &ckc, 8); | |
1346 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1347 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1348 | ||
1349 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1350 | ||
1351 | return 0; | |
1352 | } | |
1353 | ||
1354 | static void sigp_stop_and_store_status(void *arg) | |
1355 | { | |
1356 | SigpInfo *si = arg; | |
1357 | struct kvm_s390_irq irq = { | |
1358 | .type = KVM_S390_SIGP_STOP, | |
1359 | }; | |
1360 | ||
1361 | /* disabled wait - sleeping in user space */ | |
1362 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1363 | CPU(si->cpu)->halted) { | |
1364 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1365 | } | |
1366 | ||
1367 | switch (s390_cpu_get_state(si->cpu)) { | |
1368 | case CPU_STATE_OPERATING: | |
1369 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1370 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1371 | /* store will be performed when handling the stop intercept */ | |
1372 | break; | |
1373 | case CPU_STATE_STOPPED: | |
1374 | /* already stopped, just store the status */ | |
1375 | cpu_synchronize_state(CPU(si->cpu)); | |
1376 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1377 | break; | |
1378 | } | |
1379 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1380 | } | |
1381 | ||
1382 | static void sigp_store_status_at_address(void *arg) | |
1383 | { | |
1384 | SigpInfo *si = arg; | |
1385 | uint32_t address = si->param & 0x7ffffe00u; | |
1386 | ||
1387 | /* cpu has to be stopped */ | |
1388 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1389 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1390 | return; | |
1391 | } | |
1392 | ||
1393 | cpu_synchronize_state(CPU(si->cpu)); | |
1394 | ||
1395 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1396 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1397 | return; | |
1398 | } | |
1399 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1400 | } | |
1401 | ||
6eb8f212 | 1402 | static void sigp_restart(void *arg) |
0e60a699 | 1403 | { |
6eb8f212 | 1404 | SigpInfo *si = arg; |
de13d216 CH |
1405 | struct kvm_s390_irq irq = { |
1406 | .type = KVM_S390_RESTART, | |
1407 | }; | |
1408 | ||
e3b7b578 DH |
1409 | switch (s390_cpu_get_state(si->cpu)) { |
1410 | case CPU_STATE_STOPPED: | |
1411 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1412 | cpu_synchronize_state(CPU(si->cpu)); | |
1413 | do_restart_interrupt(&si->cpu->env); | |
1414 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1415 | break; | |
1416 | case CPU_STATE_OPERATING: | |
1417 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1418 | break; | |
1419 | } | |
6eb8f212 | 1420 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1421 | } |
1422 | ||
1423 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1424 | { | |
6eb8f212 DH |
1425 | SigpInfo si = { |
1426 | .cpu = cpu, | |
1427 | }; | |
1428 | ||
1429 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1430 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1431 | return 0; |
1432 | } | |
1433 | ||
f7d3e466 | 1434 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1435 | { |
6eb8f212 DH |
1436 | SigpInfo *si = arg; |
1437 | CPUState *cs = CPU(si->cpu); | |
1438 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
d5900813 | 1439 | |
6eb8f212 DH |
1440 | cpu_synchronize_state(cs); |
1441 | scc->initial_cpu_reset(cs); | |
1442 | cpu_synchronize_post_reset(cs); | |
1443 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1444 | } |
1445 | ||
04c2b516 TH |
1446 | static void sigp_cpu_reset(void *arg) |
1447 | { | |
6eb8f212 DH |
1448 | SigpInfo *si = arg; |
1449 | CPUState *cs = CPU(si->cpu); | |
1450 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
04c2b516 | 1451 | |
6eb8f212 DH |
1452 | cpu_synchronize_state(cs); |
1453 | scc->cpu_reset(cs); | |
1454 | cpu_synchronize_post_reset(cs); | |
1455 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1456 | } |
1457 | ||
18ff9494 | 1458 | static void sigp_set_prefix(void *arg) |
0e60a699 | 1459 | { |
18ff9494 DH |
1460 | SigpInfo *si = arg; |
1461 | uint32_t addr = si->param & 0x7fffe000u; | |
0e60a699 | 1462 | |
18ff9494 | 1463 | cpu_synchronize_state(CPU(si->cpu)); |
0e60a699 | 1464 | |
18ff9494 DH |
1465 | if (!address_space_access_valid(&address_space_memory, addr, |
1466 | sizeof(struct LowCore), false)) { | |
1467 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1468 | return; | |
1469 | } | |
0e60a699 | 1470 | |
18ff9494 DH |
1471 | /* cpu has to be stopped */ |
1472 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1473 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1474 | return; | |
0e60a699 AG |
1475 | } |
1476 | ||
18ff9494 DH |
1477 | si->cpu->env.psa = addr; |
1478 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1479 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1480 | } | |
1481 | ||
6eb8f212 | 1482 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1483 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1484 | { |
1485 | SigpInfo si = { | |
1486 | .cpu = dst_cpu, | |
22740e3f | 1487 | .param = param, |
6eb8f212 DH |
1488 | .status_reg = status_reg, |
1489 | }; | |
1490 | ||
1491 | /* cpu available? */ | |
1492 | if (dst_cpu == NULL) { | |
1493 | return SIGP_CC_NOT_OPERATIONAL; | |
1494 | } | |
1495 | ||
18ff9494 DH |
1496 | /* only resets can break pending orders */ |
1497 | if (dst_cpu->env.sigp_order != 0 && | |
1498 | order != SIGP_CPU_RESET && | |
1499 | order != SIGP_INITIAL_CPU_RESET) { | |
1500 | return SIGP_CC_BUSY; | |
1501 | } | |
1502 | ||
6eb8f212 | 1503 | switch (order) { |
b20a461f | 1504 | case SIGP_START: |
6eb8f212 DH |
1505 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); |
1506 | break; | |
18ff9494 DH |
1507 | case SIGP_STOP: |
1508 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
b20a461f | 1509 | break; |
0b9972a2 | 1510 | case SIGP_RESTART: |
6eb8f212 | 1511 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); |
0b9972a2 | 1512 | break; |
18ff9494 DH |
1513 | case SIGP_STOP_STORE_STATUS: |
1514 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1515 | break; | |
1516 | case SIGP_STORE_STATUS_ADDR: | |
1517 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1518 | break; | |
1519 | case SIGP_SET_PREFIX: | |
1520 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
0788082a | 1521 | break; |
0b9972a2 | 1522 | case SIGP_INITIAL_CPU_RESET: |
6eb8f212 | 1523 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); |
0b9972a2 | 1524 | break; |
04c2b516 | 1525 | case SIGP_CPU_RESET: |
6eb8f212 | 1526 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); |
04c2b516 | 1527 | break; |
0b9972a2 | 1528 | default: |
6eb8f212 | 1529 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1530 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1531 | } |
04c2b516 | 1532 | |
6eb8f212 | 1533 | return si.cc; |
04c2b516 TH |
1534 | } |
1535 | ||
18ff9494 DH |
1536 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1537 | uint64_t *status_reg) | |
1538 | { | |
1539 | CPUState *cur_cs; | |
1540 | S390CPU *cur_cpu; | |
1541 | ||
1542 | /* due to the BQL, we are the only active cpu */ | |
1543 | CPU_FOREACH(cur_cs) { | |
1544 | cur_cpu = S390_CPU(cur_cs); | |
1545 | if (cur_cpu->env.sigp_order != 0) { | |
1546 | return SIGP_CC_BUSY; | |
1547 | } | |
1548 | cpu_synchronize_state(cur_cs); | |
1549 | /* all but the current one have to be stopped */ | |
1550 | if (cur_cpu != cpu && | |
1551 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1552 | *status_reg &= 0xffffffff00000000ULL; | |
1553 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1554 | return SIGP_CC_STATUS_STORED; | |
1555 | } | |
1556 | } | |
1557 | ||
1558 | switch (param & 0xff) { | |
1559 | case SIGP_MODE_ESA_S390: | |
1560 | /* not supported */ | |
1561 | return SIGP_CC_NOT_OPERATIONAL; | |
1562 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1563 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1564 | CPU_FOREACH(cur_cs) { | |
1565 | cur_cpu = S390_CPU(cur_cs); | |
1566 | cur_cpu->env.pfault_token = -1UL; | |
1567 | } | |
0b9972a2 | 1568 | break; |
18ff9494 DH |
1569 | default: |
1570 | *status_reg &= 0xffffffff00000000ULL; | |
1571 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1572 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1573 | } |
1574 | ||
18ff9494 DH |
1575 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1576 | } | |
1577 | ||
b8031adb TH |
1578 | #define SIGP_ORDER_MASK 0x000000ff |
1579 | ||
f7575c96 | 1580 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1581 | { |
f7575c96 | 1582 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1583 | const uint8_t r1 = ipa1 >> 4; |
1584 | const uint8_t r3 = ipa1 & 0x0f; | |
1585 | int ret; | |
1586 | uint8_t order; | |
1587 | uint64_t *status_reg; | |
22740e3f | 1588 | uint64_t param; |
6eb8f212 | 1589 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1590 | |
cb446eca | 1591 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1592 | |
1593 | /* get order code */ | |
6eb8f212 DH |
1594 | order = decode_basedisp_rs(env, run->s390_sieic.ipb) & SIGP_ORDER_MASK; |
1595 | status_reg = &env->regs[r1]; | |
22740e3f | 1596 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1597 | |
6eb8f212 | 1598 | switch (order) { |
0b9972a2 | 1599 | case SIGP_SET_ARCH: |
18ff9494 | 1600 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1601 | break; |
0b9972a2 | 1602 | default: |
6eb8f212 DH |
1603 | /* all other sigp orders target a single vcpu */ |
1604 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1605 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1606 | } |
1607 | ||
56dba22b DH |
1608 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1609 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1610 | ||
6eb8f212 DH |
1611 | if (ret >= 0) { |
1612 | setcc(cpu, ret); | |
1613 | return 0; | |
1614 | } | |
1615 | ||
1616 | return ret; | |
0e60a699 AG |
1617 | } |
1618 | ||
b30f4dfb | 1619 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1620 | { |
1621 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1622 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1623 | int r = -1; |
0e60a699 | 1624 | |
e67137c6 PM |
1625 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1626 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1627 | switch (ipa0) { |
09b99878 | 1628 | case IPA0_B2: |
1eecf41b FB |
1629 | r = handle_b2(cpu, run, ipa1); |
1630 | break; | |
09b99878 | 1631 | case IPA0_B9: |
1eecf41b FB |
1632 | r = handle_b9(cpu, run, ipa1); |
1633 | break; | |
09b99878 | 1634 | case IPA0_EB: |
80765f07 | 1635 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1636 | break; |
863f6f52 FB |
1637 | case IPA0_E3: |
1638 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1639 | break; | |
09b99878 | 1640 | case IPA0_DIAG: |
638129ff | 1641 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1642 | break; |
1643 | case IPA0_SIGP: | |
1644 | r = handle_sigp(cpu, run, ipa1); | |
1645 | break; | |
0e60a699 AG |
1646 | } |
1647 | ||
1648 | if (r < 0) { | |
b30f4dfb | 1649 | r = 0; |
1bc22652 | 1650 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1651 | } |
b30f4dfb DH |
1652 | |
1653 | return r; | |
0e60a699 AG |
1654 | } |
1655 | ||
f7575c96 | 1656 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1657 | { |
1658 | /* signal quiesce */ | |
f7575c96 | 1659 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1660 | } |
1661 | ||
a2689242 TH |
1662 | static void guest_panicked(void) |
1663 | { | |
3a449690 WX |
1664 | qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, |
1665 | &error_abort); | |
a2689242 TH |
1666 | vm_stop(RUN_STATE_GUEST_PANICKED); |
1667 | } | |
1668 | ||
1669 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) | |
1670 | { | |
1671 | CPUState *cs = CPU(cpu); | |
1672 | ||
1673 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1674 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1675 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1676 | s390_cpu_halt(cpu); |
a2689242 TH |
1677 | guest_panicked(); |
1678 | } | |
1679 | ||
1bc22652 | 1680 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1681 | { |
f7575c96 AF |
1682 | CPUState *cs = CPU(cpu); |
1683 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1684 | int icpt_code = run->s390_sieic.icptcode; |
1685 | int r = 0; | |
1686 | ||
e67137c6 | 1687 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1688 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1689 | switch (icpt_code) { |
1690 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1691 | r = handle_instruction(cpu, run); |
0e60a699 | 1692 | break; |
6449a41a TH |
1693 | case ICPT_PROGRAM: |
1694 | unmanageable_intercept(cpu, "program interrupt", | |
1695 | offsetof(LowCore, program_new_psw)); | |
1696 | r = EXCP_HALTED; | |
1697 | break; | |
a2689242 TH |
1698 | case ICPT_EXT_INT: |
1699 | unmanageable_intercept(cpu, "external interrupt", | |
1700 | offsetof(LowCore, external_new_psw)); | |
1701 | r = EXCP_HALTED; | |
1702 | break; | |
0e60a699 | 1703 | case ICPT_WAITPSW: |
08eb8c85 | 1704 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1705 | cpu_synchronize_state(cs); |
1706 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1707 | if (is_special_wait_psw(cs)) { |
1708 | qemu_system_shutdown_request(); | |
1709 | } else { | |
a2689242 | 1710 | guest_panicked(); |
08eb8c85 | 1711 | } |
eca3ed03 CB |
1712 | } |
1713 | r = EXCP_HALTED; | |
1714 | break; | |
854e42f3 | 1715 | case ICPT_CPU_STOP: |
eb24f7c6 | 1716 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1717 | qemu_system_shutdown_request(); |
1718 | } | |
18ff9494 DH |
1719 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1720 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1721 | true); | |
1722 | } | |
1723 | cpu->env.sigp_order = 0; | |
854e42f3 | 1724 | r = EXCP_HALTED; |
0e60a699 AG |
1725 | break; |
1726 | case ICPT_SOFT_INTERCEPT: | |
1727 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1728 | exit(1); | |
1729 | break; | |
0e60a699 AG |
1730 | case ICPT_IO: |
1731 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1732 | exit(1); | |
1733 | break; | |
1734 | default: | |
1735 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1736 | exit(1); | |
1737 | break; | |
1738 | } | |
1739 | ||
1740 | return r; | |
1741 | } | |
1742 | ||
09b99878 CH |
1743 | static int handle_tsch(S390CPU *cpu) |
1744 | { | |
09b99878 CH |
1745 | CPUState *cs = CPU(cpu); |
1746 | struct kvm_run *run = cs->kvm_run; | |
1747 | int ret; | |
1748 | ||
44c68de0 | 1749 | cpu_synchronize_state(cs); |
3474b679 | 1750 | |
653b0809 TH |
1751 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1752 | if (ret < 0) { | |
09b99878 CH |
1753 | /* |
1754 | * Failure. | |
1755 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1756 | */ | |
1757 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1758 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1759 | run->s390_tsch.subchannel_nr, | |
1760 | run->s390_tsch.io_int_parm, | |
1761 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1762 | } |
1763 | ret = 0; | |
1764 | } | |
1765 | return ret; | |
1766 | } | |
1767 | ||
f07177a5 ET |
1768 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr) |
1769 | { | |
1770 | struct sysib_322 sysib; | |
1771 | int del; | |
1772 | ||
1773 | if (s390_cpu_virt_mem_read(cpu, addr, &sysib, sizeof(sysib))) { | |
1774 | return; | |
1775 | } | |
1776 | /* Shift the stack of Extended Names to prepare for our own data */ | |
1777 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
1778 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
1779 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
1780 | * assumed it's not capable of managing Extended Names for lower levels. | |
1781 | */ | |
1782 | for (del = 1; del < sysib.count; del++) { | |
1783 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
1784 | break; | |
1785 | } | |
1786 | } | |
1787 | if (del < sysib.count) { | |
1788 | memset(sysib.ext_names[del], 0, | |
1789 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
1790 | } | |
1791 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
1792 | if (qemu_name) { | |
1793 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
1794 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
1795 | strlen(qemu_name))); | |
1796 | } | |
1797 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
1798 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
1799 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
1800 | * considered by s390 as not capable of providing any Extended Name. | |
1801 | * Therefore if no name was specified on qemu invocation, we go with the | |
1802 | * same "KVMguest" default, which KVM has filled into short name field. | |
1803 | */ | |
1804 | if (qemu_name) { | |
1805 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
1806 | sizeof(sysib.ext_names[0])); | |
1807 | } else { | |
1808 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
1809 | } | |
1810 | /* Insert UUID */ | |
1811 | memcpy(sysib.vm[0].uuid, qemu_uuid, sizeof(sysib.vm[0].uuid)); | |
1812 | ||
1813 | s390_cpu_virt_mem_write(cpu, addr, &sysib, sizeof(sysib)); | |
1814 | } | |
1815 | ||
1816 | static int handle_stsi(S390CPU *cpu) | |
1817 | { | |
1818 | CPUState *cs = CPU(cpu); | |
1819 | struct kvm_run *run = cs->kvm_run; | |
1820 | ||
1821 | switch (run->s390_stsi.fc) { | |
1822 | case 3: | |
1823 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
1824 | return 0; | |
1825 | } | |
1826 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
1827 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr); | |
1828 | return 0; | |
1829 | default: | |
1830 | return 0; | |
1831 | } | |
1832 | } | |
1833 | ||
8c012449 DH |
1834 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1835 | { | |
770a6379 DH |
1836 | CPUState *cs = CPU(cpu); |
1837 | struct kvm_run *run = cs->kvm_run; | |
1838 | ||
1839 | int ret = 0; | |
1840 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1841 | ||
1842 | switch (arch_info->type) { | |
1843 | case KVM_HW_WP_WRITE: | |
1844 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1845 | cs->watchpoint_hit = &hw_watchpoint; | |
1846 | hw_watchpoint.vaddr = arch_info->addr; | |
1847 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1848 | ret = EXCP_DEBUG; | |
1849 | } | |
1850 | break; | |
1851 | case KVM_HW_BP: | |
1852 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1853 | ret = EXCP_DEBUG; | |
1854 | } | |
1855 | break; | |
1856 | case KVM_SINGLESTEP: | |
1857 | if (cs->singlestep_enabled) { | |
1858 | ret = EXCP_DEBUG; | |
1859 | } | |
1860 | break; | |
1861 | default: | |
1862 | ret = -ENOSYS; | |
1863 | } | |
1864 | ||
1865 | return ret; | |
8c012449 DH |
1866 | } |
1867 | ||
20d695a9 | 1868 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 1869 | { |
20d695a9 | 1870 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
1871 | int ret = 0; |
1872 | ||
1873 | switch (run->exit_reason) { | |
1874 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 1875 | ret = handle_intercept(cpu); |
0e60a699 AG |
1876 | break; |
1877 | case KVM_EXIT_S390_RESET: | |
e91e972c | 1878 | s390_reipl_request(); |
0e60a699 | 1879 | break; |
09b99878 CH |
1880 | case KVM_EXIT_S390_TSCH: |
1881 | ret = handle_tsch(cpu); | |
1882 | break; | |
f07177a5 ET |
1883 | case KVM_EXIT_S390_STSI: |
1884 | ret = handle_stsi(cpu); | |
1885 | break; | |
8c012449 DH |
1886 | case KVM_EXIT_DEBUG: |
1887 | ret = kvm_arch_handle_debug_exit(cpu); | |
1888 | break; | |
0e60a699 AG |
1889 | default: |
1890 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
1891 | break; | |
1892 | } | |
1893 | ||
bb4ea393 JK |
1894 | if (ret == 0) { |
1895 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 1896 | } |
0e60a699 AG |
1897 | return ret; |
1898 | } | |
4513d923 | 1899 | |
20d695a9 | 1900 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
1901 | { |
1902 | return true; | |
1903 | } | |
a1b87fe0 | 1904 | |
20d695a9 | 1905 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
1906 | { |
1907 | return 1; | |
1908 | } | |
1909 | ||
1910 | int kvm_arch_on_sigbus(int code, void *addr) | |
1911 | { | |
1912 | return 1; | |
1913 | } | |
09b99878 | 1914 | |
de13d216 | 1915 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
1916 | uint16_t subchannel_nr, uint32_t io_int_parm, |
1917 | uint32_t io_int_word) | |
1918 | { | |
de13d216 CH |
1919 | struct kvm_s390_irq irq = { |
1920 | .u.io.subchannel_id = subchannel_id, | |
1921 | .u.io.subchannel_nr = subchannel_nr, | |
1922 | .u.io.io_int_parm = io_int_parm, | |
1923 | .u.io.io_int_word = io_int_word, | |
1924 | }; | |
09b99878 | 1925 | |
7e749462 | 1926 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 1927 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 1928 | } else { |
de13d216 | 1929 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
1930 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
1931 | } | |
de13d216 | 1932 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
1933 | } |
1934 | ||
de13d216 | 1935 | void kvm_s390_crw_mchk(void) |
09b99878 | 1936 | { |
de13d216 CH |
1937 | struct kvm_s390_irq irq = { |
1938 | .type = KVM_S390_MCHK, | |
1939 | .u.mchk.cr14 = 1 << 28, | |
f0d4dc18 | 1940 | .u.mchk.mcic = 0x00400f1d40330000ULL, |
de13d216 CH |
1941 | }; |
1942 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
1943 | } |
1944 | ||
1945 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
1946 | { | |
09b99878 CH |
1947 | int r; |
1948 | ||
1949 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 1950 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
1951 | assert(r == 0); |
1952 | } | |
48475e14 AK |
1953 | |
1954 | void kvm_arch_init_irq_routing(KVMState *s) | |
1955 | { | |
d426d9fb CH |
1956 | /* |
1957 | * Note that while irqchip capabilities generally imply that cpustates | |
1958 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
1959 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
1960 | */ | |
1961 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
1962 | kvm_gsi_routing_allowed = true; |
1963 | kvm_halt_in_kernel_allowed = false; | |
1964 | } | |
48475e14 | 1965 | } |
b4436a0b | 1966 | |
cc3ac9c4 CH |
1967 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
1968 | int vq, bool assign) | |
b4436a0b CH |
1969 | { |
1970 | struct kvm_ioeventfd kick = { | |
1971 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
1972 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 1973 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
1974 | .datamatch = vq, |
1975 | .addr = sch, | |
1976 | .len = 8, | |
1977 | }; | |
1978 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
1979 | return -ENOSYS; | |
1980 | } | |
1981 | if (!assign) { | |
1982 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
1983 | } | |
1984 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
1985 | } | |
1def6656 MR |
1986 | |
1987 | int kvm_s390_get_memslot_count(KVMState *s) | |
1988 | { | |
1989 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
1990 | } | |
c9e659c9 DH |
1991 | |
1992 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) | |
1993 | { | |
1994 | struct kvm_mp_state mp_state = {}; | |
1995 | int ret; | |
1996 | ||
1997 | /* the kvm part might not have been initialized yet */ | |
1998 | if (CPU(cpu)->kvm_state == NULL) { | |
1999 | return 0; | |
2000 | } | |
2001 | ||
2002 | switch (cpu_state) { | |
2003 | case CPU_STATE_STOPPED: | |
2004 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2005 | break; | |
2006 | case CPU_STATE_CHECK_STOP: | |
2007 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2008 | break; | |
2009 | case CPU_STATE_OPERATING: | |
2010 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2011 | break; | |
2012 | case CPU_STATE_LOAD: | |
2013 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2014 | break; | |
2015 | default: | |
2016 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2017 | cpu_state); | |
2018 | exit(1); | |
2019 | } | |
2020 | ||
2021 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2022 | if (ret) { | |
2023 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2024 | strerror(-ret)); | |
2025 | } | |
2026 | ||
2027 | return ret; | |
2028 | } | |
9e03a040 FB |
2029 | |
2030 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, | |
2031 | uint64_t address, uint32_t data) | |
2032 | { | |
2033 | S390PCIBusDevice *pbdev; | |
2034 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
2035 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
2036 | ||
2037 | pbdev = s390_pci_find_dev_by_fid(fid); | |
2038 | if (!pbdev) { | |
2039 | DPRINTF("add_msi_route no dev\n"); | |
2040 | return -ENODEV; | |
2041 | } | |
2042 | ||
2043 | pbdev->routes.adapter.ind_offset = vec; | |
2044 | ||
2045 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2046 | route->flags = 0; | |
2047 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2048 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2049 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2050 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2051 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2052 | return 0; | |
2053 | } |