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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
24 | #include <sys/types.h> | |
25 | #include <sys/ioctl.h> | |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
d49b6836 | 32 | #include "qemu/error-report.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 PB |
34 | #include "sysemu/sysemu.h" |
35 | #include "sysemu/kvm.h" | |
4cb88c3c | 36 | #include "hw/hw.h" |
0e60a699 | 37 | #include "cpu.h" |
9c17d615 | 38 | #include "sysemu/device_tree.h" |
08eb8c85 CB |
39 | #include "qapi/qmp/qjson.h" |
40 | #include "monitor/monitor.h" | |
770a6379 | 41 | #include "exec/gdbstub.h" |
18ff9494 | 42 | #include "exec/address-spaces.h" |
860643bc | 43 | #include "trace.h" |
3a449690 | 44 | #include "qapi-event.h" |
863f6f52 | 45 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 46 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 47 | #include "hw/s390x/ipl.h" |
f07177a5 | 48 | #include "hw/s390x/ebcdic.h" |
4c663752 | 49 | #include "exec/memattrs.h" |
0e60a699 AG |
50 | |
51 | /* #define DEBUG_KVM */ | |
52 | ||
53 | #ifdef DEBUG_KVM | |
e67137c6 | 54 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
55 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
56 | #else | |
e67137c6 | 57 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
58 | do { } while (0) |
59 | #endif | |
60 | ||
2b147555 DD |
61 | #define kvm_vm_check_mem_attr(s, attr) \ |
62 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
63 | ||
0e60a699 AG |
64 | #define IPA0_DIAG 0x8300 |
65 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
66 | #define IPA0_B2 0xb200 |
67 | #define IPA0_B9 0xb900 | |
68 | #define IPA0_EB 0xeb00 | |
863f6f52 | 69 | #define IPA0_E3 0xe300 |
0e60a699 | 70 | |
1eecf41b FB |
71 | #define PRIV_B2_SCLP_CALL 0x20 |
72 | #define PRIV_B2_CSCH 0x30 | |
73 | #define PRIV_B2_HSCH 0x31 | |
74 | #define PRIV_B2_MSCH 0x32 | |
75 | #define PRIV_B2_SSCH 0x33 | |
76 | #define PRIV_B2_STSCH 0x34 | |
77 | #define PRIV_B2_TSCH 0x35 | |
78 | #define PRIV_B2_TPI 0x36 | |
79 | #define PRIV_B2_SAL 0x37 | |
80 | #define PRIV_B2_RSCH 0x38 | |
81 | #define PRIV_B2_STCRW 0x39 | |
82 | #define PRIV_B2_STCPS 0x3a | |
83 | #define PRIV_B2_RCHP 0x3b | |
84 | #define PRIV_B2_SCHM 0x3c | |
85 | #define PRIV_B2_CHSC 0x5f | |
86 | #define PRIV_B2_SIGA 0x74 | |
87 | #define PRIV_B2_XSCH 0x76 | |
88 | ||
89 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
90 | #define PRIV_EB_PCISTB 0xd0 |
91 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
92 | |
93 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
94 | #define PRIV_B9_CLP 0xa0 |
95 | #define PRIV_B9_PCISTG 0xd0 | |
96 | #define PRIV_B9_PCILG 0xd2 | |
97 | #define PRIV_B9_RPCIT 0xd3 | |
98 | ||
99 | #define PRIV_E3_MPCIFC 0xd0 | |
100 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 101 | |
8fc639af | 102 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 103 | #define DIAG_IPL 0x308 |
0e60a699 AG |
104 | #define DIAG_KVM_HYPERCALL 0x500 |
105 | #define DIAG_KVM_BREAKPOINT 0x501 | |
106 | ||
0e60a699 | 107 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 108 | #define ICPT_PROGRAM 0x08 |
a2689242 | 109 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
110 | #define ICPT_WAITPSW 0x1c |
111 | #define ICPT_SOFT_INTERCEPT 0x24 | |
112 | #define ICPT_CPU_STOP 0x28 | |
113 | #define ICPT_IO 0x40 | |
114 | ||
3cda44f7 JF |
115 | #define NR_LOCAL_IRQS 32 |
116 | /* | |
117 | * Needs to be big enough to contain max_cpus emergency signals | |
118 | * and in addition NR_LOCAL_IRQS interrupts | |
119 | */ | |
120 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
121 | (max_cpus + NR_LOCAL_IRQS)) | |
122 | ||
770a6379 DH |
123 | static CPUWatchpoint hw_watchpoint; |
124 | /* | |
125 | * We don't use a list because this structure is also used to transmit the | |
126 | * hardware breakpoints to the kernel. | |
127 | */ | |
128 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
129 | static int nb_hw_breakpoints; | |
130 | ||
94a8d39a JK |
131 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
132 | KVM_CAP_LAST_INFO | |
133 | }; | |
134 | ||
5b08b344 | 135 | static int cap_sync_regs; |
819bd309 | 136 | static int cap_async_pf; |
a9bcd1b8 | 137 | static int cap_mem_op; |
1191c949 | 138 | static int cap_s390_irq; |
5b08b344 | 139 | |
dc622deb | 140 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 141 | |
a310b283 DD |
142 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
143 | { | |
144 | struct kvm_device_attr attr = { | |
145 | .group = KVM_S390_VM_MEM_CTRL, | |
146 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
147 | .addr = (uint64_t) memory_limit, | |
148 | }; | |
149 | ||
150 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
151 | } | |
152 | ||
153 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
154 | { | |
155 | int rc; | |
156 | ||
157 | struct kvm_device_attr attr = { | |
158 | .group = KVM_S390_VM_MEM_CTRL, | |
159 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
160 | .addr = (uint64_t) &new_limit, | |
161 | }; | |
162 | ||
2b147555 | 163 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
164 | return 0; |
165 | } | |
166 | ||
167 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
168 | if (rc) { | |
169 | return rc; | |
170 | } else if (*hw_limit < new_limit) { | |
171 | return -E2BIG; | |
172 | } | |
173 | ||
174 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
175 | } | |
176 | ||
4cb88c3c DD |
177 | void kvm_s390_clear_cmma_callback(void *opaque) |
178 | { | |
179 | int rc; | |
180 | KVMState *s = opaque; | |
181 | struct kvm_device_attr attr = { | |
182 | .group = KVM_S390_VM_MEM_CTRL, | |
183 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
184 | }; | |
185 | ||
186 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
187 | trace_kvm_clear_cmma(rc); | |
188 | } | |
189 | ||
190 | static void kvm_s390_enable_cmma(KVMState *s) | |
191 | { | |
192 | int rc; | |
193 | struct kvm_device_attr attr = { | |
194 | .group = KVM_S390_VM_MEM_CTRL, | |
195 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
196 | }; | |
197 | ||
2b147555 DD |
198 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_ENABLE_CMMA) || |
199 | !kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_CLR_CMMA)) { | |
4cb88c3c DD |
200 | return; |
201 | } | |
202 | ||
203 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
204 | if (!rc) { | |
205 | qemu_register_reset(kvm_s390_clear_cmma_callback, s); | |
206 | } | |
207 | trace_kvm_enable_cmma(rc); | |
208 | } | |
209 | ||
2eb1cd07 TK |
210 | static void kvm_s390_set_attr(uint64_t attr) |
211 | { | |
212 | struct kvm_device_attr attribute = { | |
213 | .group = KVM_S390_VM_CRYPTO, | |
214 | .attr = attr, | |
215 | }; | |
216 | ||
217 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
218 | ||
219 | if (ret) { | |
220 | error_report("Failed to set crypto device attribute %lu: %s", | |
221 | attr, strerror(-ret)); | |
222 | } | |
223 | } | |
224 | ||
225 | static void kvm_s390_init_aes_kw(void) | |
226 | { | |
227 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
228 | ||
229 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
230 | NULL)) { | |
231 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
232 | } | |
233 | ||
234 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
235 | kvm_s390_set_attr(attr); | |
236 | } | |
237 | } | |
238 | ||
239 | static void kvm_s390_init_dea_kw(void) | |
240 | { | |
241 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
242 | ||
243 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
244 | NULL)) { | |
245 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
246 | } | |
247 | ||
248 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
249 | kvm_s390_set_attr(attr); | |
250 | } | |
251 | } | |
252 | ||
253 | static void kvm_s390_init_crypto(void) | |
254 | { | |
255 | kvm_s390_init_aes_kw(); | |
256 | kvm_s390_init_dea_kw(); | |
257 | } | |
258 | ||
b16565b3 | 259 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 260 | { |
5b08b344 | 261 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 262 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 263 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 264 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 265 | |
2b147555 | 266 | kvm_s390_enable_cmma(s); |
4cb88c3c | 267 | |
91138037 MA |
268 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
269 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
270 | phys_mem_set_alloc(legacy_s390_alloc); | |
271 | } | |
f16d3f58 DH |
272 | |
273 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 274 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 275 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
f16d3f58 | 276 | |
0e60a699 AG |
277 | return 0; |
278 | } | |
279 | ||
b164e48e EH |
280 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
281 | { | |
282 | return cpu->cpu_index; | |
283 | } | |
284 | ||
c9e659c9 | 285 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 286 | { |
c9e659c9 DH |
287 | S390CPU *cpu = S390_CPU(cs); |
288 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 289 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 290 | return 0; |
0e60a699 AG |
291 | } |
292 | ||
50a2c6e5 | 293 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 294 | { |
50a2c6e5 PB |
295 | CPUState *cs = CPU(cpu); |
296 | ||
419831d7 AG |
297 | /* The initial reset call is needed here to reset in-kernel |
298 | * vcpu data that we can't access directly from QEMU | |
299 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
300 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
301 | * code (kvm-all) */ | |
50a2c6e5 | 302 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 303 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 304 | } |
2eb1cd07 TK |
305 | |
306 | kvm_s390_init_crypto(); | |
0e60a699 AG |
307 | } |
308 | ||
fdb78ec0 DH |
309 | static int can_sync_regs(CPUState *cs, int regs) |
310 | { | |
311 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
312 | } | |
313 | ||
20d695a9 | 314 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 315 | { |
20d695a9 AF |
316 | S390CPU *cpu = S390_CPU(cs); |
317 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 318 | struct kvm_sregs sregs; |
0e60a699 | 319 | struct kvm_regs regs; |
e6eef7c2 | 320 | struct kvm_fpu fpu = {}; |
860643bc | 321 | int r; |
0e60a699 AG |
322 | int i; |
323 | ||
5b08b344 | 324 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
325 | cs->kvm_run->psw_addr = env->psw.addr; |
326 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 327 | |
fdb78ec0 | 328 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 329 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
330 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
331 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
332 | } |
333 | } else { | |
334 | for (i = 0; i < 16; i++) { | |
335 | regs.gprs[i] = env->regs[i]; | |
336 | } | |
860643bc CB |
337 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
338 | if (r < 0) { | |
339 | return r; | |
5b08b344 | 340 | } |
0e60a699 AG |
341 | } |
342 | ||
fcb79802 EF |
343 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
344 | for (i = 0; i < 32; i++) { | |
345 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
346 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
347 | } | |
348 | cs->kvm_run->s.regs.fpc = env->fpc; | |
349 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
350 | } else { | |
351 | /* Floating point */ | |
352 | for (i = 0; i < 16; i++) { | |
353 | fpu.fprs[i] = get_freg(env, i)->ll; | |
354 | } | |
355 | fpu.fpc = env->fpc; | |
85ad6230 | 356 | |
fcb79802 EF |
357 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
358 | if (r < 0) { | |
359 | return r; | |
360 | } | |
85ad6230 JH |
361 | } |
362 | ||
44c68de0 DD |
363 | /* Do we need to save more than that? */ |
364 | if (level == KVM_PUT_RUNTIME_STATE) { | |
365 | return 0; | |
366 | } | |
420840e5 | 367 | |
59ac1532 DH |
368 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
369 | cs->kvm_run->s.regs.cputm = env->cputm; | |
370 | cs->kvm_run->s.regs.ckc = env->ckc; | |
371 | cs->kvm_run->s.regs.todpr = env->todpr; | |
372 | cs->kvm_run->s.regs.gbea = env->gbea; | |
373 | cs->kvm_run->s.regs.pp = env->pp; | |
374 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
375 | } else { | |
376 | /* | |
377 | * These ONE_REGS are not protected by a capability. As they are only | |
378 | * necessary for migration we just trace a possible error, but don't | |
379 | * return with an error return code. | |
380 | */ | |
381 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
382 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
383 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
384 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
385 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
386 | } | |
387 | ||
388 | /* pfault parameters */ | |
389 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
390 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
391 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
392 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
393 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
394 | } else if (cap_async_pf) { | |
860643bc CB |
395 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
396 | if (r < 0) { | |
397 | return r; | |
819bd309 | 398 | } |
860643bc CB |
399 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
400 | if (r < 0) { | |
401 | return r; | |
819bd309 | 402 | } |
860643bc CB |
403 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
404 | if (r < 0) { | |
405 | return r; | |
819bd309 DD |
406 | } |
407 | } | |
408 | ||
fdb78ec0 DH |
409 | /* access registers and control registers*/ |
410 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 411 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
412 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
413 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 414 | } |
f7575c96 AF |
415 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
416 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
417 | } else { |
418 | for (i = 0; i < 16; i++) { | |
419 | sregs.acrs[i] = env->aregs[i]; | |
420 | sregs.crs[i] = env->cregs[i]; | |
421 | } | |
860643bc CB |
422 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
423 | if (r < 0) { | |
424 | return r; | |
5b08b344 CB |
425 | } |
426 | } | |
0e60a699 | 427 | |
5b08b344 | 428 | /* Finally the prefix */ |
fdb78ec0 | 429 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
430 | cs->kvm_run->s.regs.prefix = env->psa; |
431 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
432 | } else { |
433 | /* prefix is only supported via sync regs */ | |
434 | } | |
435 | return 0; | |
0e60a699 AG |
436 | } |
437 | ||
20d695a9 | 438 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
439 | { |
440 | S390CPU *cpu = S390_CPU(cs); | |
441 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 442 | struct kvm_sregs sregs; |
0e60a699 | 443 | struct kvm_regs regs; |
85ad6230 | 444 | struct kvm_fpu fpu; |
44c68de0 | 445 | int i, r; |
420840e5 | 446 | |
5b08b344 | 447 | /* get the PSW */ |
f7575c96 AF |
448 | env->psw.addr = cs->kvm_run->psw_addr; |
449 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
450 | |
451 | /* the GPRS */ | |
fdb78ec0 | 452 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 453 | for (i = 0; i < 16; i++) { |
f7575c96 | 454 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
455 | } |
456 | } else { | |
44c68de0 DD |
457 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
458 | if (r < 0) { | |
459 | return r; | |
5b08b344 CB |
460 | } |
461 | for (i = 0; i < 16; i++) { | |
462 | env->regs[i] = regs.gprs[i]; | |
463 | } | |
0e60a699 AG |
464 | } |
465 | ||
5b08b344 | 466 | /* The ACRS and CRS */ |
fdb78ec0 | 467 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 468 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
469 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
470 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
471 | } |
472 | } else { | |
44c68de0 DD |
473 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
474 | if (r < 0) { | |
475 | return r; | |
5b08b344 CB |
476 | } |
477 | for (i = 0; i < 16; i++) { | |
478 | env->aregs[i] = sregs.acrs[i]; | |
479 | env->cregs[i] = sregs.crs[i]; | |
480 | } | |
0e60a699 AG |
481 | } |
482 | ||
fcb79802 EF |
483 | /* Floating point and vector registers */ |
484 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
485 | for (i = 0; i < 32; i++) { | |
486 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
487 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
488 | } | |
489 | env->fpc = cs->kvm_run->s.regs.fpc; | |
490 | } else { | |
491 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
492 | if (r < 0) { | |
493 | return r; | |
494 | } | |
495 | for (i = 0; i < 16; i++) { | |
496 | get_freg(env, i)->ll = fpu.fprs[i]; | |
497 | } | |
498 | env->fpc = fpu.fpc; | |
85ad6230 | 499 | } |
85ad6230 | 500 | |
44c68de0 | 501 | /* The prefix */ |
fdb78ec0 | 502 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 503 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 504 | } |
0e60a699 | 505 | |
59ac1532 DH |
506 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
507 | env->cputm = cs->kvm_run->s.regs.cputm; | |
508 | env->ckc = cs->kvm_run->s.regs.ckc; | |
509 | env->todpr = cs->kvm_run->s.regs.todpr; | |
510 | env->gbea = cs->kvm_run->s.regs.gbea; | |
511 | env->pp = cs->kvm_run->s.regs.pp; | |
512 | } else { | |
513 | /* | |
514 | * These ONE_REGS are not protected by a capability. As they are only | |
515 | * necessary for migration we just trace a possible error, but don't | |
516 | * return with an error return code. | |
517 | */ | |
518 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
519 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
520 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
521 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
522 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
523 | } | |
524 | ||
525 | /* pfault parameters */ | |
526 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
527 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
528 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
529 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
530 | } else if (cap_async_pf) { | |
860643bc | 531 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
532 | if (r < 0) { |
533 | return r; | |
534 | } | |
860643bc | 535 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
536 | if (r < 0) { |
537 | return r; | |
538 | } | |
860643bc | 539 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
540 | if (r < 0) { |
541 | return r; | |
542 | } | |
543 | } | |
544 | ||
0e60a699 AG |
545 | return 0; |
546 | } | |
547 | ||
3f9e59bb JH |
548 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
549 | { | |
550 | int r; | |
551 | struct kvm_device_attr attr = { | |
552 | .group = KVM_S390_VM_TOD, | |
553 | .attr = KVM_S390_VM_TOD_LOW, | |
554 | .addr = (uint64_t)tod_low, | |
555 | }; | |
556 | ||
557 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
558 | if (r) { | |
559 | return r; | |
560 | } | |
561 | ||
562 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
563 | attr.addr = (uint64_t)tod_high; | |
564 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
565 | } | |
566 | ||
567 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
568 | { | |
569 | int r; | |
570 | ||
571 | struct kvm_device_attr attr = { | |
572 | .group = KVM_S390_VM_TOD, | |
573 | .attr = KVM_S390_VM_TOD_LOW, | |
574 | .addr = (uint64_t)tod_low, | |
575 | }; | |
576 | ||
577 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
578 | if (r) { | |
579 | return r; | |
580 | } | |
581 | ||
582 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
583 | attr.addr = (uint64_t)tod_high; | |
584 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
585 | } | |
586 | ||
a9bcd1b8 TH |
587 | /** |
588 | * kvm_s390_mem_op: | |
589 | * @addr: the logical start address in guest memory | |
6cb1e49d | 590 | * @ar: the access register number |
a9bcd1b8 TH |
591 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
592 | * @len: length that should be transfered | |
593 | * @is_write: true = write, false = read | |
594 | * Returns: 0 on success, non-zero if an exception or error occured | |
595 | * | |
596 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
597 | * is injected into the vCPU in case of translation errors. | |
598 | */ | |
6cb1e49d AY |
599 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
600 | int len, bool is_write) | |
a9bcd1b8 TH |
601 | { |
602 | struct kvm_s390_mem_op mem_op = { | |
603 | .gaddr = addr, | |
604 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
605 | .size = len, | |
606 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
607 | : KVM_S390_MEMOP_LOGICAL_READ, | |
608 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 609 | .ar = ar, |
a9bcd1b8 TH |
610 | }; |
611 | int ret; | |
612 | ||
613 | if (!cap_mem_op) { | |
614 | return -ENOSYS; | |
615 | } | |
616 | if (!hostbuf) { | |
617 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
618 | } | |
619 | ||
620 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
621 | if (ret < 0) { | |
622 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
623 | } | |
624 | return ret; | |
625 | } | |
626 | ||
fdec9918 CB |
627 | /* |
628 | * Legacy layout for s390: | |
629 | * Older S390 KVM requires the topmost vma of the RAM to be | |
630 | * smaller than an system defined value, which is at least 256GB. | |
631 | * Larger systems have larger values. We put the guest between | |
632 | * the end of data segment (system break) and this value. We | |
633 | * use 32GB as a base to have enough room for the system break | |
634 | * to grow. We also have to use MAP parameters that avoid | |
635 | * read-only mapping of guest pages. | |
636 | */ | |
dc622deb | 637 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
638 | { |
639 | void *mem; | |
640 | ||
641 | mem = mmap((void *) 0x800000000ULL, size, | |
642 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
643 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 644 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
645 | } |
646 | ||
8e4e86af DH |
647 | /* DIAG 501 is used for sw breakpoints */ |
648 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
649 | ||
20d695a9 | 650 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 651 | { |
0e60a699 | 652 | |
8e4e86af DH |
653 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
654 | sizeof(diag_501), 0) || | |
655 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
656 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
657 | return -EINVAL; |
658 | } | |
659 | return 0; | |
660 | } | |
661 | ||
20d695a9 | 662 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 663 | { |
8e4e86af | 664 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 665 | |
8e4e86af | 666 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 667 | return -EINVAL; |
8e4e86af | 668 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 669 | return -EINVAL; |
8e4e86af DH |
670 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
671 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
672 | return -EINVAL; |
673 | } | |
674 | ||
675 | return 0; | |
676 | } | |
677 | ||
770a6379 DH |
678 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
679 | int len, int type) | |
680 | { | |
681 | int n; | |
682 | ||
683 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
684 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
685 | (hw_breakpoints[n].len == len || len == -1)) { | |
686 | return &hw_breakpoints[n]; | |
687 | } | |
688 | } | |
689 | ||
690 | return NULL; | |
691 | } | |
692 | ||
693 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
694 | { | |
695 | int size; | |
696 | ||
697 | if (find_hw_breakpoint(addr, len, type)) { | |
698 | return -EEXIST; | |
699 | } | |
700 | ||
701 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
702 | ||
703 | if (!hw_breakpoints) { | |
704 | nb_hw_breakpoints = 0; | |
705 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
706 | } else { | |
707 | hw_breakpoints = | |
708 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
709 | } | |
710 | ||
711 | if (!hw_breakpoints) { | |
712 | nb_hw_breakpoints = 0; | |
713 | return -ENOMEM; | |
714 | } | |
715 | ||
716 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
717 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
718 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
719 | ||
720 | nb_hw_breakpoints++; | |
721 | ||
722 | return 0; | |
723 | } | |
724 | ||
8c012449 DH |
725 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
726 | target_ulong len, int type) | |
727 | { | |
770a6379 DH |
728 | switch (type) { |
729 | case GDB_BREAKPOINT_HW: | |
730 | type = KVM_HW_BP; | |
731 | break; | |
732 | case GDB_WATCHPOINT_WRITE: | |
733 | if (len < 1) { | |
734 | return -EINVAL; | |
735 | } | |
736 | type = KVM_HW_WP_WRITE; | |
737 | break; | |
738 | default: | |
739 | return -ENOSYS; | |
740 | } | |
741 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
742 | } |
743 | ||
744 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
745 | target_ulong len, int type) | |
746 | { | |
770a6379 DH |
747 | int size; |
748 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
749 | ||
750 | if (bp == NULL) { | |
751 | return -ENOENT; | |
752 | } | |
753 | ||
754 | nb_hw_breakpoints--; | |
755 | if (nb_hw_breakpoints > 0) { | |
756 | /* | |
757 | * In order to trim the array, move the last element to the position to | |
758 | * be removed - if necessary. | |
759 | */ | |
760 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
761 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
762 | } | |
763 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
764 | hw_breakpoints = | |
765 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
766 | } else { | |
767 | g_free(hw_breakpoints); | |
768 | hw_breakpoints = NULL; | |
769 | } | |
770 | ||
771 | return 0; | |
8c012449 DH |
772 | } |
773 | ||
774 | void kvm_arch_remove_all_hw_breakpoints(void) | |
775 | { | |
770a6379 DH |
776 | nb_hw_breakpoints = 0; |
777 | g_free(hw_breakpoints); | |
778 | hw_breakpoints = NULL; | |
8c012449 DH |
779 | } |
780 | ||
781 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
782 | { | |
770a6379 DH |
783 | int i; |
784 | ||
785 | if (nb_hw_breakpoints > 0) { | |
786 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
787 | dbg->arch.hw_bp = hw_breakpoints; | |
788 | ||
789 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
790 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
791 | hw_breakpoints[i].addr); | |
792 | } | |
793 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
794 | } else { | |
795 | dbg->arch.nr_hw_bp = 0; | |
796 | dbg->arch.hw_bp = NULL; | |
797 | } | |
8c012449 DH |
798 | } |
799 | ||
20d695a9 | 800 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 801 | { |
0e60a699 AG |
802 | } |
803 | ||
4c663752 | 804 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 805 | { |
4c663752 | 806 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
807 | } |
808 | ||
20d695a9 | 809 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 810 | { |
225dc991 | 811 | return cs->halted; |
0af691d7 MT |
812 | } |
813 | ||
66ad0893 CH |
814 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
815 | struct kvm_s390_interrupt *interrupt) | |
816 | { | |
817 | int r = 0; | |
818 | ||
819 | interrupt->type = irq->type; | |
820 | switch (irq->type) { | |
821 | case KVM_S390_INT_VIRTIO: | |
822 | interrupt->parm = irq->u.ext.ext_params; | |
823 | /* fall through */ | |
824 | case KVM_S390_INT_PFAULT_INIT: | |
825 | case KVM_S390_INT_PFAULT_DONE: | |
826 | interrupt->parm64 = irq->u.ext.ext_params2; | |
827 | break; | |
828 | case KVM_S390_PROGRAM_INT: | |
829 | interrupt->parm = irq->u.pgm.code; | |
830 | break; | |
831 | case KVM_S390_SIGP_SET_PREFIX: | |
832 | interrupt->parm = irq->u.prefix.address; | |
833 | break; | |
834 | case KVM_S390_INT_SERVICE: | |
835 | interrupt->parm = irq->u.ext.ext_params; | |
836 | break; | |
837 | case KVM_S390_MCHK: | |
838 | interrupt->parm = irq->u.mchk.cr14; | |
839 | interrupt->parm64 = irq->u.mchk.mcic; | |
840 | break; | |
841 | case KVM_S390_INT_EXTERNAL_CALL: | |
842 | interrupt->parm = irq->u.extcall.code; | |
843 | break; | |
844 | case KVM_S390_INT_EMERGENCY: | |
845 | interrupt->parm = irq->u.emerg.code; | |
846 | break; | |
847 | case KVM_S390_SIGP_STOP: | |
848 | case KVM_S390_RESTART: | |
849 | break; /* These types have no parameters */ | |
850 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
851 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
852 | interrupt->parm |= irq->u.io.subchannel_nr; | |
853 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
854 | interrupt->parm64 |= irq->u.io.io_int_word; | |
855 | break; | |
856 | default: | |
857 | r = -EINVAL; | |
858 | break; | |
859 | } | |
860 | return r; | |
861 | } | |
862 | ||
1191c949 | 863 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
864 | { |
865 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
866 | int r; |
867 | ||
868 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
869 | if (r < 0) { | |
870 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
871 | exit(1); | |
872 | } | |
873 | ||
874 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
875 | if (r < 0) { | |
876 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
877 | exit(1); | |
878 | } | |
879 | } | |
880 | ||
1191c949 JF |
881 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
882 | { | |
883 | CPUState *cs = CPU(cpu); | |
884 | int r; | |
885 | ||
886 | if (cap_s390_irq) { | |
887 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
888 | if (!r) { | |
889 | return; | |
890 | } | |
891 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
892 | exit(1); | |
893 | } | |
894 | ||
895 | inject_vcpu_irq_legacy(cs, irq); | |
896 | } | |
897 | ||
bbd8bb8e | 898 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
899 | { |
900 | struct kvm_s390_interrupt kvmint = {}; | |
901 | int r; | |
902 | ||
903 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
904 | if (r < 0) { | |
905 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
906 | exit(1); | |
907 | } | |
908 | ||
909 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
910 | if (r < 0) { | |
911 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
912 | exit(1); | |
913 | } | |
914 | } | |
915 | ||
bbd8bb8e CH |
916 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
917 | { | |
918 | static bool use_flic = true; | |
919 | int r; | |
920 | ||
921 | if (use_flic) { | |
922 | r = kvm_s390_inject_flic(irq); | |
923 | if (r == -ENOSYS) { | |
924 | use_flic = false; | |
925 | } | |
926 | if (!r) { | |
927 | return; | |
928 | } | |
929 | } | |
930 | __kvm_s390_floating_interrupt(irq); | |
931 | } | |
932 | ||
de13d216 | 933 | void kvm_s390_virtio_irq(int config_change, uint64_t token) |
0e60a699 | 934 | { |
de13d216 CH |
935 | struct kvm_s390_irq irq = { |
936 | .type = KVM_S390_INT_VIRTIO, | |
937 | .u.ext.ext_params = config_change, | |
938 | .u.ext.ext_params2 = token, | |
939 | }; | |
0e60a699 | 940 | |
de13d216 | 941 | kvm_s390_floating_interrupt(&irq); |
0e60a699 AG |
942 | } |
943 | ||
de13d216 | 944 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 945 | { |
de13d216 CH |
946 | struct kvm_s390_irq irq = { |
947 | .type = KVM_S390_INT_SERVICE, | |
948 | .u.ext.ext_params = parm, | |
949 | }; | |
0e60a699 | 950 | |
de13d216 | 951 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
952 | } |
953 | ||
1bc22652 | 954 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 955 | { |
de13d216 CH |
956 | struct kvm_s390_irq irq = { |
957 | .type = KVM_S390_PROGRAM_INT, | |
958 | .u.pgm.code = code, | |
959 | }; | |
960 | ||
961 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
962 | } |
963 | ||
801cdd35 TH |
964 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
965 | { | |
966 | struct kvm_s390_irq irq = { | |
967 | .type = KVM_S390_PROGRAM_INT, | |
968 | .u.pgm.code = code, | |
969 | .u.pgm.trans_exc_code = te_code, | |
970 | .u.pgm.exc_access_id = te_code & 3, | |
971 | }; | |
972 | ||
973 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
974 | } | |
975 | ||
1bc22652 | 976 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 977 | uint16_t ipbh0) |
0e60a699 | 978 | { |
1bc22652 | 979 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
980 | uint64_t sccb; |
981 | uint32_t code; | |
0e60a699 AG |
982 | int r = 0; |
983 | ||
cb446eca | 984 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
985 | sccb = env->regs[ipbh0 & 0xf]; |
986 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
987 | ||
6e252802 | 988 | r = sclp_service_call(env, sccb, code); |
9abf567d | 989 | if (r < 0) { |
1bc22652 | 990 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
991 | } else { |
992 | setcc(cpu, r); | |
0e60a699 | 993 | } |
81f7c56c | 994 | |
0e60a699 AG |
995 | return 0; |
996 | } | |
997 | ||
1eecf41b | 998 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 999 | { |
09b99878 | 1000 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
1001 | int rc = 0; |
1002 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 1003 | |
44c68de0 | 1004 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1005 | |
09b99878 | 1006 | switch (ipa1) { |
1eecf41b | 1007 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1008 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1009 | break; |
1eecf41b | 1010 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1011 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1012 | break; |
1eecf41b | 1013 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1014 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1015 | break; |
1eecf41b | 1016 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1017 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1018 | break; |
1eecf41b | 1019 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1020 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1021 | break; |
1eecf41b | 1022 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1023 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1024 | break; |
1eecf41b | 1025 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1026 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1027 | break; |
1eecf41b | 1028 | case PRIV_B2_TSCH: |
09b99878 CH |
1029 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1030 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1031 | break; | |
1eecf41b | 1032 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1033 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1034 | break; |
1eecf41b | 1035 | case PRIV_B2_TPI: |
09b99878 CH |
1036 | /* This should have been handled by kvm already. */ |
1037 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1038 | break; | |
1eecf41b | 1039 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1040 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1041 | run->s390_sieic.ipb); | |
09b99878 | 1042 | break; |
1eecf41b | 1043 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1044 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1045 | break; |
1eecf41b | 1046 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1047 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1048 | break; |
1eecf41b | 1049 | case PRIV_B2_STCPS: |
09b99878 | 1050 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1051 | break; |
1eecf41b | 1052 | case PRIV_B2_SAL: |
5d9bf1c0 | 1053 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1054 | break; |
1eecf41b | 1055 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1056 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1057 | setcc(cpu, 3); |
09b99878 | 1058 | break; |
1eecf41b FB |
1059 | case PRIV_B2_SCLP_CALL: |
1060 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1061 | break; | |
c1e8dfb5 | 1062 | default: |
1eecf41b FB |
1063 | rc = -1; |
1064 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1065 | break; | |
09b99878 CH |
1066 | } |
1067 | ||
1eecf41b | 1068 | return rc; |
09b99878 CH |
1069 | } |
1070 | ||
6cb1e49d AY |
1071 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1072 | uint8_t *ar) | |
863f6f52 FB |
1073 | { |
1074 | CPUS390XState *env = &cpu->env; | |
1075 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1076 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1077 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1078 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1079 | ||
1080 | if (disp2 & 0x80000) { | |
1081 | disp2 += 0xfff00000; | |
1082 | } | |
6cb1e49d AY |
1083 | if (ar) { |
1084 | *ar = base2; | |
1085 | } | |
863f6f52 FB |
1086 | |
1087 | return (base2 ? env->regs[base2] : 0) + | |
1088 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1089 | } | |
1090 | ||
6cb1e49d AY |
1091 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1092 | uint8_t *ar) | |
863f6f52 FB |
1093 | { |
1094 | CPUS390XState *env = &cpu->env; | |
1095 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1096 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1097 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1098 | ||
1099 | if (disp2 & 0x80000) { | |
1100 | disp2 += 0xfff00000; | |
1101 | } | |
6cb1e49d AY |
1102 | if (ar) { |
1103 | *ar = base2; | |
1104 | } | |
863f6f52 FB |
1105 | |
1106 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1107 | } | |
1108 | ||
1109 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1110 | { | |
1111 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1112 | ||
1113 | return clp_service_call(cpu, r2); | |
1114 | } | |
1115 | ||
1116 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1117 | { | |
1118 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1119 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1120 | ||
1121 | return pcilg_service_call(cpu, r1, r2); | |
1122 | } | |
1123 | ||
1124 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1125 | { | |
1126 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1127 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1128 | ||
1129 | return pcistg_service_call(cpu, r1, r2); | |
1130 | } | |
1131 | ||
1132 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1133 | { | |
1134 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1135 | uint64_t fiba; | |
6cb1e49d | 1136 | uint8_t ar; |
863f6f52 FB |
1137 | |
1138 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1139 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1140 | |
6cb1e49d | 1141 | return stpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1142 | } |
1143 | ||
1144 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1145 | { | |
1146 | /* NOOP */ | |
1147 | return 0; | |
1148 | } | |
1149 | ||
1150 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1151 | { | |
1152 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1153 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1154 | ||
1155 | return rpcit_service_call(cpu, r1, r2); | |
1156 | } | |
1157 | ||
1158 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1159 | { | |
1160 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1161 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1162 | uint64_t gaddr; | |
6cb1e49d | 1163 | uint8_t ar; |
863f6f52 FB |
1164 | |
1165 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1166 | gaddr = get_base_disp_rsy(cpu, run, &ar); |
863f6f52 | 1167 | |
6cb1e49d | 1168 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
863f6f52 FB |
1169 | } |
1170 | ||
1171 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1172 | { | |
1173 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1174 | uint64_t fiba; | |
6cb1e49d | 1175 | uint8_t ar; |
863f6f52 FB |
1176 | |
1177 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1178 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1179 | |
6cb1e49d | 1180 | return mpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1181 | } |
1182 | ||
1eecf41b | 1183 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1184 | { |
1185 | int r = 0; | |
0e60a699 | 1186 | |
0e60a699 | 1187 | switch (ipa1) { |
863f6f52 FB |
1188 | case PRIV_B9_CLP: |
1189 | r = kvm_clp_service_call(cpu, run); | |
1190 | break; | |
1191 | case PRIV_B9_PCISTG: | |
1192 | r = kvm_pcistg_service_call(cpu, run); | |
1193 | break; | |
1194 | case PRIV_B9_PCILG: | |
1195 | r = kvm_pcilg_service_call(cpu, run); | |
1196 | break; | |
1197 | case PRIV_B9_RPCIT: | |
1198 | r = kvm_rpcit_service_call(cpu, run); | |
1199 | break; | |
1eecf41b FB |
1200 | case PRIV_B9_EQBS: |
1201 | /* just inject exception */ | |
1202 | r = -1; | |
1203 | break; | |
1204 | default: | |
1205 | r = -1; | |
1206 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1207 | break; | |
1208 | } | |
1209 | ||
1210 | return r; | |
1211 | } | |
1212 | ||
80765f07 | 1213 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1214 | { |
1215 | int r = 0; | |
1216 | ||
80765f07 | 1217 | switch (ipbl) { |
863f6f52 FB |
1218 | case PRIV_EB_PCISTB: |
1219 | r = kvm_pcistb_service_call(cpu, run); | |
1220 | break; | |
1221 | case PRIV_EB_SIC: | |
1222 | r = kvm_sic_service_call(cpu, run); | |
1223 | break; | |
1eecf41b FB |
1224 | case PRIV_EB_SQBS: |
1225 | /* just inject exception */ | |
1226 | r = -1; | |
1227 | break; | |
1228 | default: | |
1229 | r = -1; | |
80765f07 | 1230 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1231 | break; |
0e60a699 AG |
1232 | } |
1233 | ||
1234 | return r; | |
1235 | } | |
1236 | ||
863f6f52 FB |
1237 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1238 | { | |
1239 | int r = 0; | |
1240 | ||
1241 | switch (ipbl) { | |
1242 | case PRIV_E3_MPCIFC: | |
1243 | r = kvm_mpcifc_service_call(cpu, run); | |
1244 | break; | |
1245 | case PRIV_E3_STPCIFC: | |
1246 | r = kvm_stpcifc_service_call(cpu, run); | |
1247 | break; | |
1248 | default: | |
1249 | r = -1; | |
1250 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1251 | break; | |
1252 | } | |
1253 | ||
1254 | return r; | |
1255 | } | |
1256 | ||
4fd6dd06 | 1257 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1258 | { |
4fd6dd06 | 1259 | CPUS390XState *env = &cpu->env; |
77319f22 | 1260 | int ret; |
3474b679 | 1261 | |
44c68de0 | 1262 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1263 | ret = s390_virtio_hypercall(env); |
1264 | if (ret == -EINVAL) { | |
1265 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1266 | return 0; | |
1267 | } | |
0e60a699 | 1268 | |
77319f22 | 1269 | return ret; |
0e60a699 AG |
1270 | } |
1271 | ||
8fc639af XW |
1272 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1273 | { | |
1274 | uint64_t r1, r3; | |
1275 | int rc; | |
1276 | ||
1277 | cpu_synchronize_state(CPU(cpu)); | |
1278 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1279 | r3 = run->s390_sieic.ipa & 0x000f; | |
1280 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1281 | if (rc) { | |
1282 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1283 | } | |
1284 | } | |
1285 | ||
268846ba ED |
1286 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1287 | { | |
1288 | uint64_t r1, r3; | |
1289 | ||
1290 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1291 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1292 | r3 = run->s390_sieic.ipa & 0x000f; |
1293 | handle_diag_308(&cpu->env, r1, r3); | |
1294 | } | |
1295 | ||
b30f4dfb DH |
1296 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1297 | { | |
1298 | CPUS390XState *env = &cpu->env; | |
1299 | unsigned long pc; | |
1300 | ||
1301 | cpu_synchronize_state(CPU(cpu)); | |
1302 | ||
1303 | pc = env->psw.addr - 4; | |
1304 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1305 | env->psw.addr = pc; | |
1306 | return EXCP_DEBUG; | |
1307 | } | |
1308 | ||
1309 | return -ENOENT; | |
1310 | } | |
1311 | ||
638129ff CH |
1312 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1313 | ||
1314 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1315 | { |
1316 | int r = 0; | |
638129ff CH |
1317 | uint16_t func_code; |
1318 | ||
1319 | /* | |
1320 | * For any diagnose call we support, bits 48-63 of the resulting | |
1321 | * address specify the function code; the remainder is ignored. | |
1322 | */ | |
6cb1e49d | 1323 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1324 | switch (func_code) { |
8fc639af XW |
1325 | case DIAG_TIMEREVENT: |
1326 | kvm_handle_diag_288(cpu, run); | |
1327 | break; | |
268846ba ED |
1328 | case DIAG_IPL: |
1329 | kvm_handle_diag_308(cpu, run); | |
1330 | break; | |
39fbc5c6 CB |
1331 | case DIAG_KVM_HYPERCALL: |
1332 | r = handle_hypercall(cpu, run); | |
1333 | break; | |
1334 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1335 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1336 | break; |
1337 | default: | |
638129ff | 1338 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1339 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1340 | break; |
0e60a699 AG |
1341 | } |
1342 | ||
1343 | return r; | |
1344 | } | |
1345 | ||
6eb8f212 DH |
1346 | typedef struct SigpInfo { |
1347 | S390CPU *cpu; | |
22740e3f | 1348 | uint64_t param; |
6eb8f212 DH |
1349 | int cc; |
1350 | uint64_t *status_reg; | |
1351 | } SigpInfo; | |
1352 | ||
36b5c845 | 1353 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1354 | { |
36b5c845 DH |
1355 | *si->status_reg &= 0xffffffff00000000ULL; |
1356 | *si->status_reg |= status; | |
1357 | si->cc = SIGP_CC_STATUS_STORED; | |
1358 | } | |
6e6ad8db | 1359 | |
6eb8f212 | 1360 | static void sigp_start(void *arg) |
b20a461f | 1361 | { |
6eb8f212 | 1362 | SigpInfo *si = arg; |
6e6ad8db | 1363 | |
4f2b55d1 DH |
1364 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1365 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1366 | return; | |
1367 | } | |
1368 | ||
6eb8f212 DH |
1369 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1370 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1371 | } |
1372 | ||
18ff9494 | 1373 | static void sigp_stop(void *arg) |
0e60a699 | 1374 | { |
18ff9494 DH |
1375 | SigpInfo *si = arg; |
1376 | struct kvm_s390_irq irq = { | |
1377 | .type = KVM_S390_SIGP_STOP, | |
1378 | }; | |
1379 | ||
1380 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1381 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1382 | return; | |
1383 | } | |
1384 | ||
1385 | /* disabled wait - sleeping in user space */ | |
1386 | if (CPU(si->cpu)->halted) { | |
1387 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1388 | } else { | |
1389 | /* execute the stop function */ | |
1390 | si->cpu->env.sigp_order = SIGP_STOP; | |
1391 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1392 | } | |
1393 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1394 | } | |
1395 | ||
abec5356 EF |
1396 | #define ADTL_SAVE_AREA_SIZE 1024 |
1397 | static int kvm_s390_store_adtl_status(S390CPU *cpu, hwaddr addr) | |
1398 | { | |
1399 | void *mem; | |
1400 | hwaddr len = ADTL_SAVE_AREA_SIZE; | |
1401 | ||
1402 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1403 | if (!mem) { | |
1404 | return -EFAULT; | |
1405 | } | |
1406 | if (len != ADTL_SAVE_AREA_SIZE) { | |
1407 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1408 | return -EFAULT; | |
1409 | } | |
1410 | ||
1411 | memcpy(mem, &cpu->env.vregs, 512); | |
1412 | ||
1413 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1414 | ||
1415 | return 0; | |
1416 | } | |
1417 | ||
18ff9494 DH |
1418 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1419 | #define SAVE_AREA_SIZE 512 | |
1420 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1421 | { | |
1422 | static const uint8_t ar_id = 1; | |
1423 | uint64_t ckc = cpu->env.ckc >> 8; | |
1424 | void *mem; | |
c498d8e3 | 1425 | int i; |
18ff9494 DH |
1426 | hwaddr len = SAVE_AREA_SIZE; |
1427 | ||
1428 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1429 | if (!mem) { | |
1430 | return -EFAULT; | |
1431 | } | |
1432 | if (len != SAVE_AREA_SIZE) { | |
1433 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1434 | return -EFAULT; | |
1435 | } | |
1436 | ||
1437 | if (store_arch) { | |
1438 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1439 | } | |
c498d8e3 EF |
1440 | for (i = 0; i < 16; ++i) { |
1441 | *((uint64 *)mem + i) = get_freg(&cpu->env, i)->ll; | |
1442 | } | |
18ff9494 DH |
1443 | memcpy(mem + 128, &cpu->env.regs, 128); |
1444 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1445 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1446 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1447 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1448 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1449 | memcpy(mem + 304, &ckc, 8); | |
1450 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1451 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1452 | ||
1453 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1454 | ||
1455 | return 0; | |
1456 | } | |
1457 | ||
1458 | static void sigp_stop_and_store_status(void *arg) | |
1459 | { | |
1460 | SigpInfo *si = arg; | |
1461 | struct kvm_s390_irq irq = { | |
1462 | .type = KVM_S390_SIGP_STOP, | |
1463 | }; | |
1464 | ||
1465 | /* disabled wait - sleeping in user space */ | |
1466 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1467 | CPU(si->cpu)->halted) { | |
1468 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1469 | } | |
1470 | ||
1471 | switch (s390_cpu_get_state(si->cpu)) { | |
1472 | case CPU_STATE_OPERATING: | |
1473 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1474 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1475 | /* store will be performed when handling the stop intercept */ | |
1476 | break; | |
1477 | case CPU_STATE_STOPPED: | |
1478 | /* already stopped, just store the status */ | |
1479 | cpu_synchronize_state(CPU(si->cpu)); | |
1480 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1481 | break; | |
1482 | } | |
1483 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1484 | } | |
1485 | ||
1486 | static void sigp_store_status_at_address(void *arg) | |
1487 | { | |
1488 | SigpInfo *si = arg; | |
1489 | uint32_t address = si->param & 0x7ffffe00u; | |
1490 | ||
1491 | /* cpu has to be stopped */ | |
1492 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1493 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1494 | return; | |
1495 | } | |
1496 | ||
1497 | cpu_synchronize_state(CPU(si->cpu)); | |
1498 | ||
1499 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1500 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1501 | return; | |
1502 | } | |
1503 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1504 | } | |
1505 | ||
abec5356 EF |
1506 | static void sigp_store_adtl_status(void *arg) |
1507 | { | |
1508 | SigpInfo *si = arg; | |
1509 | ||
1510 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { | |
1511 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); | |
1512 | return; | |
1513 | } | |
1514 | ||
1515 | /* cpu has to be stopped */ | |
1516 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1517 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1518 | return; | |
1519 | } | |
1520 | ||
1521 | /* parameter must be aligned to 1024-byte boundary */ | |
1522 | if (si->param & 0x3ff) { | |
1523 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1524 | return; | |
1525 | } | |
1526 | ||
1527 | cpu_synchronize_state(CPU(si->cpu)); | |
1528 | ||
1529 | if (kvm_s390_store_adtl_status(si->cpu, si->param)) { | |
1530 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1531 | return; | |
1532 | } | |
1533 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1534 | } | |
1535 | ||
6eb8f212 | 1536 | static void sigp_restart(void *arg) |
0e60a699 | 1537 | { |
6eb8f212 | 1538 | SigpInfo *si = arg; |
de13d216 CH |
1539 | struct kvm_s390_irq irq = { |
1540 | .type = KVM_S390_RESTART, | |
1541 | }; | |
1542 | ||
e3b7b578 DH |
1543 | switch (s390_cpu_get_state(si->cpu)) { |
1544 | case CPU_STATE_STOPPED: | |
1545 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1546 | cpu_synchronize_state(CPU(si->cpu)); | |
1547 | do_restart_interrupt(&si->cpu->env); | |
1548 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1549 | break; | |
1550 | case CPU_STATE_OPERATING: | |
1551 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1552 | break; | |
1553 | } | |
6eb8f212 | 1554 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1555 | } |
1556 | ||
1557 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1558 | { | |
6eb8f212 DH |
1559 | SigpInfo si = { |
1560 | .cpu = cpu, | |
1561 | }; | |
1562 | ||
1563 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1564 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1565 | return 0; |
1566 | } | |
1567 | ||
f7d3e466 | 1568 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1569 | { |
6eb8f212 DH |
1570 | SigpInfo *si = arg; |
1571 | CPUState *cs = CPU(si->cpu); | |
1572 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
d5900813 | 1573 | |
6eb8f212 DH |
1574 | cpu_synchronize_state(cs); |
1575 | scc->initial_cpu_reset(cs); | |
1576 | cpu_synchronize_post_reset(cs); | |
1577 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1578 | } |
1579 | ||
04c2b516 TH |
1580 | static void sigp_cpu_reset(void *arg) |
1581 | { | |
6eb8f212 DH |
1582 | SigpInfo *si = arg; |
1583 | CPUState *cs = CPU(si->cpu); | |
1584 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
04c2b516 | 1585 | |
6eb8f212 DH |
1586 | cpu_synchronize_state(cs); |
1587 | scc->cpu_reset(cs); | |
1588 | cpu_synchronize_post_reset(cs); | |
1589 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1590 | } |
1591 | ||
18ff9494 | 1592 | static void sigp_set_prefix(void *arg) |
0e60a699 | 1593 | { |
18ff9494 DH |
1594 | SigpInfo *si = arg; |
1595 | uint32_t addr = si->param & 0x7fffe000u; | |
0e60a699 | 1596 | |
18ff9494 | 1597 | cpu_synchronize_state(CPU(si->cpu)); |
0e60a699 | 1598 | |
18ff9494 DH |
1599 | if (!address_space_access_valid(&address_space_memory, addr, |
1600 | sizeof(struct LowCore), false)) { | |
1601 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1602 | return; | |
1603 | } | |
0e60a699 | 1604 | |
18ff9494 DH |
1605 | /* cpu has to be stopped */ |
1606 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1607 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1608 | return; | |
0e60a699 AG |
1609 | } |
1610 | ||
18ff9494 DH |
1611 | si->cpu->env.psa = addr; |
1612 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1613 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1614 | } | |
1615 | ||
6eb8f212 | 1616 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1617 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1618 | { |
1619 | SigpInfo si = { | |
1620 | .cpu = dst_cpu, | |
22740e3f | 1621 | .param = param, |
6eb8f212 DH |
1622 | .status_reg = status_reg, |
1623 | }; | |
1624 | ||
1625 | /* cpu available? */ | |
1626 | if (dst_cpu == NULL) { | |
1627 | return SIGP_CC_NOT_OPERATIONAL; | |
1628 | } | |
1629 | ||
18ff9494 DH |
1630 | /* only resets can break pending orders */ |
1631 | if (dst_cpu->env.sigp_order != 0 && | |
1632 | order != SIGP_CPU_RESET && | |
1633 | order != SIGP_INITIAL_CPU_RESET) { | |
1634 | return SIGP_CC_BUSY; | |
1635 | } | |
1636 | ||
6eb8f212 | 1637 | switch (order) { |
b20a461f | 1638 | case SIGP_START: |
6eb8f212 DH |
1639 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); |
1640 | break; | |
18ff9494 DH |
1641 | case SIGP_STOP: |
1642 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
b20a461f | 1643 | break; |
0b9972a2 | 1644 | case SIGP_RESTART: |
6eb8f212 | 1645 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); |
0b9972a2 | 1646 | break; |
18ff9494 DH |
1647 | case SIGP_STOP_STORE_STATUS: |
1648 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1649 | break; | |
1650 | case SIGP_STORE_STATUS_ADDR: | |
1651 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1652 | break; | |
abec5356 EF |
1653 | case SIGP_STORE_ADTL_STATUS: |
1654 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, &si); | |
1655 | break; | |
18ff9494 DH |
1656 | case SIGP_SET_PREFIX: |
1657 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
0788082a | 1658 | break; |
0b9972a2 | 1659 | case SIGP_INITIAL_CPU_RESET: |
6eb8f212 | 1660 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); |
0b9972a2 | 1661 | break; |
04c2b516 | 1662 | case SIGP_CPU_RESET: |
6eb8f212 | 1663 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); |
04c2b516 | 1664 | break; |
0b9972a2 | 1665 | default: |
6eb8f212 | 1666 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1667 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1668 | } |
04c2b516 | 1669 | |
6eb8f212 | 1670 | return si.cc; |
04c2b516 TH |
1671 | } |
1672 | ||
18ff9494 DH |
1673 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1674 | uint64_t *status_reg) | |
1675 | { | |
1676 | CPUState *cur_cs; | |
1677 | S390CPU *cur_cpu; | |
1678 | ||
1679 | /* due to the BQL, we are the only active cpu */ | |
1680 | CPU_FOREACH(cur_cs) { | |
1681 | cur_cpu = S390_CPU(cur_cs); | |
1682 | if (cur_cpu->env.sigp_order != 0) { | |
1683 | return SIGP_CC_BUSY; | |
1684 | } | |
1685 | cpu_synchronize_state(cur_cs); | |
1686 | /* all but the current one have to be stopped */ | |
1687 | if (cur_cpu != cpu && | |
1688 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1689 | *status_reg &= 0xffffffff00000000ULL; | |
1690 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1691 | return SIGP_CC_STATUS_STORED; | |
1692 | } | |
1693 | } | |
1694 | ||
1695 | switch (param & 0xff) { | |
1696 | case SIGP_MODE_ESA_S390: | |
1697 | /* not supported */ | |
1698 | return SIGP_CC_NOT_OPERATIONAL; | |
1699 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1700 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1701 | CPU_FOREACH(cur_cs) { | |
1702 | cur_cpu = S390_CPU(cur_cs); | |
1703 | cur_cpu->env.pfault_token = -1UL; | |
1704 | } | |
0b9972a2 | 1705 | break; |
18ff9494 DH |
1706 | default: |
1707 | *status_reg &= 0xffffffff00000000ULL; | |
1708 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1709 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1710 | } |
1711 | ||
18ff9494 DH |
1712 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1713 | } | |
1714 | ||
b8031adb TH |
1715 | #define SIGP_ORDER_MASK 0x000000ff |
1716 | ||
f7575c96 | 1717 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1718 | { |
f7575c96 | 1719 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1720 | const uint8_t r1 = ipa1 >> 4; |
1721 | const uint8_t r3 = ipa1 & 0x0f; | |
1722 | int ret; | |
1723 | uint8_t order; | |
1724 | uint64_t *status_reg; | |
22740e3f | 1725 | uint64_t param; |
6eb8f212 | 1726 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1727 | |
cb446eca | 1728 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1729 | |
1730 | /* get order code */ | |
6cb1e49d AY |
1731 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1732 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1733 | status_reg = &env->regs[r1]; |
22740e3f | 1734 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1735 | |
6eb8f212 | 1736 | switch (order) { |
0b9972a2 | 1737 | case SIGP_SET_ARCH: |
18ff9494 | 1738 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1739 | break; |
0b9972a2 | 1740 | default: |
6eb8f212 DH |
1741 | /* all other sigp orders target a single vcpu */ |
1742 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1743 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1744 | } |
1745 | ||
56dba22b DH |
1746 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1747 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1748 | ||
6eb8f212 DH |
1749 | if (ret >= 0) { |
1750 | setcc(cpu, ret); | |
1751 | return 0; | |
1752 | } | |
1753 | ||
1754 | return ret; | |
0e60a699 AG |
1755 | } |
1756 | ||
b30f4dfb | 1757 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1758 | { |
1759 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1760 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1761 | int r = -1; |
0e60a699 | 1762 | |
e67137c6 PM |
1763 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1764 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1765 | switch (ipa0) { |
09b99878 | 1766 | case IPA0_B2: |
1eecf41b FB |
1767 | r = handle_b2(cpu, run, ipa1); |
1768 | break; | |
09b99878 | 1769 | case IPA0_B9: |
1eecf41b FB |
1770 | r = handle_b9(cpu, run, ipa1); |
1771 | break; | |
09b99878 | 1772 | case IPA0_EB: |
80765f07 | 1773 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1774 | break; |
863f6f52 FB |
1775 | case IPA0_E3: |
1776 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1777 | break; | |
09b99878 | 1778 | case IPA0_DIAG: |
638129ff | 1779 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1780 | break; |
1781 | case IPA0_SIGP: | |
1782 | r = handle_sigp(cpu, run, ipa1); | |
1783 | break; | |
0e60a699 AG |
1784 | } |
1785 | ||
1786 | if (r < 0) { | |
b30f4dfb | 1787 | r = 0; |
1bc22652 | 1788 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1789 | } |
b30f4dfb DH |
1790 | |
1791 | return r; | |
0e60a699 AG |
1792 | } |
1793 | ||
f7575c96 | 1794 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1795 | { |
1796 | /* signal quiesce */ | |
f7575c96 | 1797 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1798 | } |
1799 | ||
a2689242 TH |
1800 | static void guest_panicked(void) |
1801 | { | |
3a449690 WX |
1802 | qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, |
1803 | &error_abort); | |
a2689242 TH |
1804 | vm_stop(RUN_STATE_GUEST_PANICKED); |
1805 | } | |
1806 | ||
1807 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) | |
1808 | { | |
1809 | CPUState *cs = CPU(cpu); | |
1810 | ||
1811 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1812 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1813 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1814 | s390_cpu_halt(cpu); |
a2689242 TH |
1815 | guest_panicked(); |
1816 | } | |
1817 | ||
1bc22652 | 1818 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1819 | { |
f7575c96 AF |
1820 | CPUState *cs = CPU(cpu); |
1821 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1822 | int icpt_code = run->s390_sieic.icptcode; |
1823 | int r = 0; | |
1824 | ||
e67137c6 | 1825 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1826 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1827 | switch (icpt_code) { |
1828 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1829 | r = handle_instruction(cpu, run); |
0e60a699 | 1830 | break; |
6449a41a TH |
1831 | case ICPT_PROGRAM: |
1832 | unmanageable_intercept(cpu, "program interrupt", | |
1833 | offsetof(LowCore, program_new_psw)); | |
1834 | r = EXCP_HALTED; | |
1835 | break; | |
a2689242 TH |
1836 | case ICPT_EXT_INT: |
1837 | unmanageable_intercept(cpu, "external interrupt", | |
1838 | offsetof(LowCore, external_new_psw)); | |
1839 | r = EXCP_HALTED; | |
1840 | break; | |
0e60a699 | 1841 | case ICPT_WAITPSW: |
08eb8c85 | 1842 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1843 | cpu_synchronize_state(cs); |
1844 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1845 | if (is_special_wait_psw(cs)) { |
1846 | qemu_system_shutdown_request(); | |
1847 | } else { | |
a2689242 | 1848 | guest_panicked(); |
08eb8c85 | 1849 | } |
eca3ed03 CB |
1850 | } |
1851 | r = EXCP_HALTED; | |
1852 | break; | |
854e42f3 | 1853 | case ICPT_CPU_STOP: |
eb24f7c6 | 1854 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1855 | qemu_system_shutdown_request(); |
1856 | } | |
18ff9494 DH |
1857 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1858 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1859 | true); | |
1860 | } | |
1861 | cpu->env.sigp_order = 0; | |
854e42f3 | 1862 | r = EXCP_HALTED; |
0e60a699 AG |
1863 | break; |
1864 | case ICPT_SOFT_INTERCEPT: | |
1865 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1866 | exit(1); | |
1867 | break; | |
0e60a699 AG |
1868 | case ICPT_IO: |
1869 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1870 | exit(1); | |
1871 | break; | |
1872 | default: | |
1873 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1874 | exit(1); | |
1875 | break; | |
1876 | } | |
1877 | ||
1878 | return r; | |
1879 | } | |
1880 | ||
09b99878 CH |
1881 | static int handle_tsch(S390CPU *cpu) |
1882 | { | |
09b99878 CH |
1883 | CPUState *cs = CPU(cpu); |
1884 | struct kvm_run *run = cs->kvm_run; | |
1885 | int ret; | |
1886 | ||
44c68de0 | 1887 | cpu_synchronize_state(cs); |
3474b679 | 1888 | |
653b0809 TH |
1889 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1890 | if (ret < 0) { | |
09b99878 CH |
1891 | /* |
1892 | * Failure. | |
1893 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1894 | */ | |
1895 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1896 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1897 | run->s390_tsch.subchannel_nr, | |
1898 | run->s390_tsch.io_int_parm, | |
1899 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1900 | } |
1901 | ret = 0; | |
1902 | } | |
1903 | return ret; | |
1904 | } | |
1905 | ||
6cb1e49d | 1906 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
1907 | { |
1908 | struct sysib_322 sysib; | |
1909 | int del; | |
1910 | ||
6cb1e49d | 1911 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
1912 | return; |
1913 | } | |
1914 | /* Shift the stack of Extended Names to prepare for our own data */ | |
1915 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
1916 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
1917 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
1918 | * assumed it's not capable of managing Extended Names for lower levels. | |
1919 | */ | |
1920 | for (del = 1; del < sysib.count; del++) { | |
1921 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
1922 | break; | |
1923 | } | |
1924 | } | |
1925 | if (del < sysib.count) { | |
1926 | memset(sysib.ext_names[del], 0, | |
1927 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
1928 | } | |
1929 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
1930 | if (qemu_name) { | |
1931 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
1932 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
1933 | strlen(qemu_name))); | |
1934 | } | |
1935 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
1936 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
1937 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
1938 | * considered by s390 as not capable of providing any Extended Name. | |
1939 | * Therefore if no name was specified on qemu invocation, we go with the | |
1940 | * same "KVMguest" default, which KVM has filled into short name field. | |
1941 | */ | |
1942 | if (qemu_name) { | |
1943 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
1944 | sizeof(sysib.ext_names[0])); | |
1945 | } else { | |
1946 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
1947 | } | |
1948 | /* Insert UUID */ | |
1949 | memcpy(sysib.vm[0].uuid, qemu_uuid, sizeof(sysib.vm[0].uuid)); | |
1950 | ||
6cb1e49d | 1951 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
1952 | } |
1953 | ||
1954 | static int handle_stsi(S390CPU *cpu) | |
1955 | { | |
1956 | CPUState *cs = CPU(cpu); | |
1957 | struct kvm_run *run = cs->kvm_run; | |
1958 | ||
1959 | switch (run->s390_stsi.fc) { | |
1960 | case 3: | |
1961 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
1962 | return 0; | |
1963 | } | |
1964 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 1965 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
1966 | return 0; |
1967 | default: | |
1968 | return 0; | |
1969 | } | |
1970 | } | |
1971 | ||
8c012449 DH |
1972 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1973 | { | |
770a6379 DH |
1974 | CPUState *cs = CPU(cpu); |
1975 | struct kvm_run *run = cs->kvm_run; | |
1976 | ||
1977 | int ret = 0; | |
1978 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1979 | ||
1980 | switch (arch_info->type) { | |
1981 | case KVM_HW_WP_WRITE: | |
1982 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1983 | cs->watchpoint_hit = &hw_watchpoint; | |
1984 | hw_watchpoint.vaddr = arch_info->addr; | |
1985 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1986 | ret = EXCP_DEBUG; | |
1987 | } | |
1988 | break; | |
1989 | case KVM_HW_BP: | |
1990 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1991 | ret = EXCP_DEBUG; | |
1992 | } | |
1993 | break; | |
1994 | case KVM_SINGLESTEP: | |
1995 | if (cs->singlestep_enabled) { | |
1996 | ret = EXCP_DEBUG; | |
1997 | } | |
1998 | break; | |
1999 | default: | |
2000 | ret = -ENOSYS; | |
2001 | } | |
2002 | ||
2003 | return ret; | |
8c012449 DH |
2004 | } |
2005 | ||
20d695a9 | 2006 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 2007 | { |
20d695a9 | 2008 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
2009 | int ret = 0; |
2010 | ||
2011 | switch (run->exit_reason) { | |
2012 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2013 | ret = handle_intercept(cpu); |
0e60a699 AG |
2014 | break; |
2015 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2016 | s390_reipl_request(); |
0e60a699 | 2017 | break; |
09b99878 CH |
2018 | case KVM_EXIT_S390_TSCH: |
2019 | ret = handle_tsch(cpu); | |
2020 | break; | |
f07177a5 ET |
2021 | case KVM_EXIT_S390_STSI: |
2022 | ret = handle_stsi(cpu); | |
2023 | break; | |
8c012449 DH |
2024 | case KVM_EXIT_DEBUG: |
2025 | ret = kvm_arch_handle_debug_exit(cpu); | |
2026 | break; | |
0e60a699 AG |
2027 | default: |
2028 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2029 | break; | |
2030 | } | |
2031 | ||
bb4ea393 JK |
2032 | if (ret == 0) { |
2033 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2034 | } |
0e60a699 AG |
2035 | return ret; |
2036 | } | |
4513d923 | 2037 | |
20d695a9 | 2038 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2039 | { |
2040 | return true; | |
2041 | } | |
a1b87fe0 | 2042 | |
20d695a9 | 2043 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
2044 | { |
2045 | return 1; | |
2046 | } | |
2047 | ||
2048 | int kvm_arch_on_sigbus(int code, void *addr) | |
2049 | { | |
2050 | return 1; | |
2051 | } | |
09b99878 | 2052 | |
de13d216 | 2053 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2054 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2055 | uint32_t io_int_word) | |
2056 | { | |
de13d216 CH |
2057 | struct kvm_s390_irq irq = { |
2058 | .u.io.subchannel_id = subchannel_id, | |
2059 | .u.io.subchannel_nr = subchannel_nr, | |
2060 | .u.io.io_int_parm = io_int_parm, | |
2061 | .u.io.io_int_word = io_int_word, | |
2062 | }; | |
09b99878 | 2063 | |
7e749462 | 2064 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2065 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2066 | } else { |
de13d216 | 2067 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
2068 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
2069 | } | |
de13d216 | 2070 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2071 | } |
2072 | ||
de13d216 | 2073 | void kvm_s390_crw_mchk(void) |
09b99878 | 2074 | { |
de13d216 CH |
2075 | struct kvm_s390_irq irq = { |
2076 | .type = KVM_S390_MCHK, | |
2077 | .u.mchk.cr14 = 1 << 28, | |
f0d4dc18 | 2078 | .u.mchk.mcic = 0x00400f1d40330000ULL, |
de13d216 CH |
2079 | }; |
2080 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2081 | } |
2082 | ||
2083 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2084 | { | |
09b99878 CH |
2085 | int r; |
2086 | ||
2087 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2088 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2089 | assert(r == 0); |
2090 | } | |
48475e14 AK |
2091 | |
2092 | void kvm_arch_init_irq_routing(KVMState *s) | |
2093 | { | |
d426d9fb CH |
2094 | /* |
2095 | * Note that while irqchip capabilities generally imply that cpustates | |
2096 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2097 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2098 | */ | |
2099 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2100 | kvm_gsi_routing_allowed = true; |
2101 | kvm_halt_in_kernel_allowed = false; | |
2102 | } | |
48475e14 | 2103 | } |
b4436a0b | 2104 | |
cc3ac9c4 CH |
2105 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2106 | int vq, bool assign) | |
b4436a0b CH |
2107 | { |
2108 | struct kvm_ioeventfd kick = { | |
2109 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2110 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2111 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2112 | .datamatch = vq, |
2113 | .addr = sch, | |
2114 | .len = 8, | |
2115 | }; | |
2116 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2117 | return -ENOSYS; | |
2118 | } | |
2119 | if (!assign) { | |
2120 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2121 | } | |
2122 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2123 | } | |
1def6656 MR |
2124 | |
2125 | int kvm_s390_get_memslot_count(KVMState *s) | |
2126 | { | |
2127 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
2128 | } | |
c9e659c9 DH |
2129 | |
2130 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) | |
2131 | { | |
2132 | struct kvm_mp_state mp_state = {}; | |
2133 | int ret; | |
2134 | ||
2135 | /* the kvm part might not have been initialized yet */ | |
2136 | if (CPU(cpu)->kvm_state == NULL) { | |
2137 | return 0; | |
2138 | } | |
2139 | ||
2140 | switch (cpu_state) { | |
2141 | case CPU_STATE_STOPPED: | |
2142 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2143 | break; | |
2144 | case CPU_STATE_CHECK_STOP: | |
2145 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2146 | break; | |
2147 | case CPU_STATE_OPERATING: | |
2148 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2149 | break; | |
2150 | case CPU_STATE_LOAD: | |
2151 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2152 | break; | |
2153 | default: | |
2154 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2155 | cpu_state); | |
2156 | exit(1); | |
2157 | } | |
2158 | ||
2159 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2160 | if (ret) { | |
2161 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2162 | strerror(-ret)); | |
2163 | } | |
2164 | ||
2165 | return ret; | |
2166 | } | |
9e03a040 | 2167 | |
3cda44f7 JF |
2168 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2169 | { | |
2170 | struct kvm_s390_irq_state irq_state; | |
2171 | CPUState *cs = CPU(cpu); | |
2172 | int32_t bytes; | |
2173 | ||
2174 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2175 | return; | |
2176 | } | |
2177 | ||
2178 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2179 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2180 | ||
2181 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2182 | if (bytes < 0) { | |
2183 | cpu->irqstate_saved_size = 0; | |
2184 | error_report("Migration of interrupt state failed"); | |
2185 | return; | |
2186 | } | |
2187 | ||
2188 | cpu->irqstate_saved_size = bytes; | |
2189 | } | |
2190 | ||
2191 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2192 | { | |
2193 | CPUState *cs = CPU(cpu); | |
2194 | struct kvm_s390_irq_state irq_state; | |
2195 | int r; | |
2196 | ||
b853d4cb SS |
2197 | if (cpu->irqstate_saved_size == 0) { |
2198 | return 0; | |
2199 | } | |
2200 | ||
3cda44f7 JF |
2201 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2202 | return -ENOSYS; | |
2203 | } | |
2204 | ||
3cda44f7 JF |
2205 | irq_state.buf = (uint64_t) cpu->irqstate; |
2206 | irq_state.len = cpu->irqstate_saved_size; | |
2207 | ||
2208 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2209 | if (r) { | |
2210 | error_report("Setting interrupt state failed %d", r); | |
2211 | } | |
2212 | return r; | |
2213 | } | |
2214 | ||
9e03a040 FB |
2215 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
2216 | uint64_t address, uint32_t data) | |
2217 | { | |
2218 | S390PCIBusDevice *pbdev; | |
2219 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
2220 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
2221 | ||
2222 | pbdev = s390_pci_find_dev_by_fid(fid); | |
2223 | if (!pbdev) { | |
2224 | DPRINTF("add_msi_route no dev\n"); | |
2225 | return -ENODEV; | |
2226 | } | |
2227 | ||
2228 | pbdev->routes.adapter.ind_offset = vec; | |
2229 | ||
2230 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2231 | route->flags = 0; | |
2232 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2233 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2234 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2235 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2236 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2237 | return 0; | |
2238 | } | |
1850b6b7 EA |
2239 | |
2240 | int kvm_arch_msi_data_to_gsi(uint32_t data) | |
2241 | { | |
2242 | abort(); | |
2243 | } |