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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
9615495a | 24 | #include "qemu/osdep.h" |
0e60a699 AG |
25 | #include <sys/ioctl.h> |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
33c11879 | 32 | #include "cpu.h" |
d49b6836 | 33 | #include "qemu/error-report.h" |
1de7afc9 | 34 | #include "qemu/timer.h" |
9c17d615 PB |
35 | #include "sysemu/sysemu.h" |
36 | #include "sysemu/kvm.h" | |
4cb88c3c | 37 | #include "hw/hw.h" |
9c17d615 | 38 | #include "sysemu/device_tree.h" |
08eb8c85 | 39 | #include "qapi/qmp/qjson.h" |
770a6379 | 40 | #include "exec/gdbstub.h" |
18ff9494 | 41 | #include "exec/address-spaces.h" |
860643bc | 42 | #include "trace.h" |
3a449690 | 43 | #include "qapi-event.h" |
863f6f52 | 44 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 45 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 46 | #include "hw/s390x/ipl.h" |
f07177a5 | 47 | #include "hw/s390x/ebcdic.h" |
4c663752 | 48 | #include "exec/memattrs.h" |
9700230b | 49 | #include "hw/s390x/s390-virtio-ccw.h" |
0e60a699 AG |
50 | |
51 | /* #define DEBUG_KVM */ | |
52 | ||
53 | #ifdef DEBUG_KVM | |
e67137c6 | 54 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
55 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
56 | #else | |
e67137c6 | 57 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
58 | do { } while (0) |
59 | #endif | |
60 | ||
2b147555 DD |
61 | #define kvm_vm_check_mem_attr(s, attr) \ |
62 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
63 | ||
0e60a699 AG |
64 | #define IPA0_DIAG 0x8300 |
65 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
66 | #define IPA0_B2 0xb200 |
67 | #define IPA0_B9 0xb900 | |
68 | #define IPA0_EB 0xeb00 | |
863f6f52 | 69 | #define IPA0_E3 0xe300 |
0e60a699 | 70 | |
1eecf41b FB |
71 | #define PRIV_B2_SCLP_CALL 0x20 |
72 | #define PRIV_B2_CSCH 0x30 | |
73 | #define PRIV_B2_HSCH 0x31 | |
74 | #define PRIV_B2_MSCH 0x32 | |
75 | #define PRIV_B2_SSCH 0x33 | |
76 | #define PRIV_B2_STSCH 0x34 | |
77 | #define PRIV_B2_TSCH 0x35 | |
78 | #define PRIV_B2_TPI 0x36 | |
79 | #define PRIV_B2_SAL 0x37 | |
80 | #define PRIV_B2_RSCH 0x38 | |
81 | #define PRIV_B2_STCRW 0x39 | |
82 | #define PRIV_B2_STCPS 0x3a | |
83 | #define PRIV_B2_RCHP 0x3b | |
84 | #define PRIV_B2_SCHM 0x3c | |
85 | #define PRIV_B2_CHSC 0x5f | |
86 | #define PRIV_B2_SIGA 0x74 | |
87 | #define PRIV_B2_XSCH 0x76 | |
88 | ||
89 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
90 | #define PRIV_EB_PCISTB 0xd0 |
91 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
92 | |
93 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
94 | #define PRIV_B9_CLP 0xa0 |
95 | #define PRIV_B9_PCISTG 0xd0 | |
96 | #define PRIV_B9_PCILG 0xd2 | |
97 | #define PRIV_B9_RPCIT 0xd3 | |
98 | ||
99 | #define PRIV_E3_MPCIFC 0xd0 | |
100 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 101 | |
8fc639af | 102 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 103 | #define DIAG_IPL 0x308 |
0e60a699 AG |
104 | #define DIAG_KVM_HYPERCALL 0x500 |
105 | #define DIAG_KVM_BREAKPOINT 0x501 | |
106 | ||
0e60a699 | 107 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 108 | #define ICPT_PROGRAM 0x08 |
a2689242 | 109 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
110 | #define ICPT_WAITPSW 0x1c |
111 | #define ICPT_SOFT_INTERCEPT 0x24 | |
112 | #define ICPT_CPU_STOP 0x28 | |
113 | #define ICPT_IO 0x40 | |
114 | ||
3cda44f7 JF |
115 | #define NR_LOCAL_IRQS 32 |
116 | /* | |
117 | * Needs to be big enough to contain max_cpus emergency signals | |
118 | * and in addition NR_LOCAL_IRQS interrupts | |
119 | */ | |
120 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
121 | (max_cpus + NR_LOCAL_IRQS)) | |
122 | ||
770a6379 DH |
123 | static CPUWatchpoint hw_watchpoint; |
124 | /* | |
125 | * We don't use a list because this structure is also used to transmit the | |
126 | * hardware breakpoints to the kernel. | |
127 | */ | |
128 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
129 | static int nb_hw_breakpoints; | |
130 | ||
94a8d39a JK |
131 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
132 | KVM_CAP_LAST_INFO | |
133 | }; | |
134 | ||
5b08b344 | 135 | static int cap_sync_regs; |
819bd309 | 136 | static int cap_async_pf; |
a9bcd1b8 | 137 | static int cap_mem_op; |
1191c949 | 138 | static int cap_s390_irq; |
9700230b | 139 | static int cap_ri; |
5b08b344 | 140 | |
dc622deb | 141 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 142 | |
a310b283 DD |
143 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
144 | { | |
145 | struct kvm_device_attr attr = { | |
146 | .group = KVM_S390_VM_MEM_CTRL, | |
147 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
148 | .addr = (uint64_t) memory_limit, | |
149 | }; | |
150 | ||
151 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
152 | } | |
153 | ||
154 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
155 | { | |
156 | int rc; | |
157 | ||
158 | struct kvm_device_attr attr = { | |
159 | .group = KVM_S390_VM_MEM_CTRL, | |
160 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
161 | .addr = (uint64_t) &new_limit, | |
162 | }; | |
163 | ||
2b147555 | 164 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
165 | return 0; |
166 | } | |
167 | ||
168 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
169 | if (rc) { | |
170 | return rc; | |
171 | } else if (*hw_limit < new_limit) { | |
172 | return -E2BIG; | |
173 | } | |
174 | ||
175 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
176 | } | |
177 | ||
1cd4e0f6 | 178 | void kvm_s390_cmma_reset(void) |
4cb88c3c DD |
179 | { |
180 | int rc; | |
4cb88c3c DD |
181 | struct kvm_device_attr attr = { |
182 | .group = KVM_S390_VM_MEM_CTRL, | |
183 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
184 | }; | |
185 | ||
1cd4e0f6 | 186 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
187 | trace_kvm_clear_cmma(rc); |
188 | } | |
189 | ||
190 | static void kvm_s390_enable_cmma(KVMState *s) | |
191 | { | |
192 | int rc; | |
193 | struct kvm_device_attr attr = { | |
194 | .group = KVM_S390_VM_MEM_CTRL, | |
195 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
196 | }; | |
197 | ||
2b147555 DD |
198 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_ENABLE_CMMA) || |
199 | !kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_CLR_CMMA)) { | |
4cb88c3c DD |
200 | return; |
201 | } | |
202 | ||
203 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
4cb88c3c DD |
204 | trace_kvm_enable_cmma(rc); |
205 | } | |
206 | ||
2eb1cd07 TK |
207 | static void kvm_s390_set_attr(uint64_t attr) |
208 | { | |
209 | struct kvm_device_attr attribute = { | |
210 | .group = KVM_S390_VM_CRYPTO, | |
211 | .attr = attr, | |
212 | }; | |
213 | ||
214 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
215 | ||
216 | if (ret) { | |
217 | error_report("Failed to set crypto device attribute %lu: %s", | |
218 | attr, strerror(-ret)); | |
219 | } | |
220 | } | |
221 | ||
222 | static void kvm_s390_init_aes_kw(void) | |
223 | { | |
224 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
225 | ||
226 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
227 | NULL)) { | |
228 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
229 | } | |
230 | ||
231 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
232 | kvm_s390_set_attr(attr); | |
233 | } | |
234 | } | |
235 | ||
236 | static void kvm_s390_init_dea_kw(void) | |
237 | { | |
238 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
239 | ||
240 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
241 | NULL)) { | |
242 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
243 | } | |
244 | ||
245 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
246 | kvm_s390_set_attr(attr); | |
247 | } | |
248 | } | |
249 | ||
4ab72920 | 250 | void kvm_s390_crypto_reset(void) |
2eb1cd07 TK |
251 | { |
252 | kvm_s390_init_aes_kw(); | |
253 | kvm_s390_init_dea_kw(); | |
254 | } | |
255 | ||
b16565b3 | 256 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 257 | { |
5b08b344 | 258 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 259 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 260 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 261 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 262 | |
4c292a00 DD |
263 | if (!mem_path) { |
264 | kvm_s390_enable_cmma(s); | |
265 | } | |
4cb88c3c | 266 | |
91138037 MA |
267 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
268 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
269 | phys_mem_set_alloc(legacy_s390_alloc); | |
270 | } | |
f16d3f58 DH |
271 | |
272 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 273 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 274 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
9700230b FZ |
275 | if (ri_allowed()) { |
276 | if (kvm_vm_enable_cap(s, KVM_CAP_S390_RI, 0) == 0) { | |
277 | cap_ri = 1; | |
278 | } | |
279 | } | |
f16d3f58 | 280 | |
0e60a699 AG |
281 | return 0; |
282 | } | |
283 | ||
b164e48e EH |
284 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
285 | { | |
286 | return cpu->cpu_index; | |
287 | } | |
288 | ||
c9e659c9 | 289 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 290 | { |
c9e659c9 DH |
291 | S390CPU *cpu = S390_CPU(cs); |
292 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 293 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 294 | return 0; |
0e60a699 AG |
295 | } |
296 | ||
50a2c6e5 | 297 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 298 | { |
50a2c6e5 PB |
299 | CPUState *cs = CPU(cpu); |
300 | ||
419831d7 AG |
301 | /* The initial reset call is needed here to reset in-kernel |
302 | * vcpu data that we can't access directly from QEMU | |
303 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
304 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
305 | * code (kvm-all) */ | |
50a2c6e5 | 306 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 307 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 308 | } |
0e60a699 AG |
309 | } |
310 | ||
fdb78ec0 DH |
311 | static int can_sync_regs(CPUState *cs, int regs) |
312 | { | |
313 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
314 | } | |
315 | ||
20d695a9 | 316 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 317 | { |
20d695a9 AF |
318 | S390CPU *cpu = S390_CPU(cs); |
319 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 320 | struct kvm_sregs sregs; |
0e60a699 | 321 | struct kvm_regs regs; |
e6eef7c2 | 322 | struct kvm_fpu fpu = {}; |
860643bc | 323 | int r; |
0e60a699 AG |
324 | int i; |
325 | ||
5b08b344 | 326 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
327 | cs->kvm_run->psw_addr = env->psw.addr; |
328 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 329 | |
fdb78ec0 | 330 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 331 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
332 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
333 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
334 | } |
335 | } else { | |
336 | for (i = 0; i < 16; i++) { | |
337 | regs.gprs[i] = env->regs[i]; | |
338 | } | |
860643bc CB |
339 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
340 | if (r < 0) { | |
341 | return r; | |
5b08b344 | 342 | } |
0e60a699 AG |
343 | } |
344 | ||
fcb79802 EF |
345 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
346 | for (i = 0; i < 32; i++) { | |
347 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
348 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
349 | } | |
350 | cs->kvm_run->s.regs.fpc = env->fpc; | |
351 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
5ab0e547 DH |
352 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
353 | for (i = 0; i < 16; i++) { | |
354 | cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll; | |
355 | } | |
356 | cs->kvm_run->s.regs.fpc = env->fpc; | |
357 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS; | |
fcb79802 EF |
358 | } else { |
359 | /* Floating point */ | |
360 | for (i = 0; i < 16; i++) { | |
361 | fpu.fprs[i] = get_freg(env, i)->ll; | |
362 | } | |
363 | fpu.fpc = env->fpc; | |
85ad6230 | 364 | |
fcb79802 EF |
365 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
366 | if (r < 0) { | |
367 | return r; | |
368 | } | |
85ad6230 JH |
369 | } |
370 | ||
44c68de0 DD |
371 | /* Do we need to save more than that? */ |
372 | if (level == KVM_PUT_RUNTIME_STATE) { | |
373 | return 0; | |
374 | } | |
420840e5 | 375 | |
59ac1532 DH |
376 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
377 | cs->kvm_run->s.regs.cputm = env->cputm; | |
378 | cs->kvm_run->s.regs.ckc = env->ckc; | |
379 | cs->kvm_run->s.regs.todpr = env->todpr; | |
380 | cs->kvm_run->s.regs.gbea = env->gbea; | |
381 | cs->kvm_run->s.regs.pp = env->pp; | |
382 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
383 | } else { | |
384 | /* | |
385 | * These ONE_REGS are not protected by a capability. As they are only | |
386 | * necessary for migration we just trace a possible error, but don't | |
387 | * return with an error return code. | |
388 | */ | |
389 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
390 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
391 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
392 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
393 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
394 | } | |
395 | ||
9700230b FZ |
396 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
397 | memcpy(cs->kvm_run->s.regs.riccb, env->riccb, 64); | |
398 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_RICCB; | |
399 | } | |
400 | ||
59ac1532 DH |
401 | /* pfault parameters */ |
402 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
403 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
404 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
405 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
406 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
407 | } else if (cap_async_pf) { | |
860643bc CB |
408 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
409 | if (r < 0) { | |
410 | return r; | |
819bd309 | 411 | } |
860643bc CB |
412 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
413 | if (r < 0) { | |
414 | return r; | |
819bd309 | 415 | } |
860643bc CB |
416 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
417 | if (r < 0) { | |
418 | return r; | |
819bd309 DD |
419 | } |
420 | } | |
421 | ||
fdb78ec0 DH |
422 | /* access registers and control registers*/ |
423 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 424 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
425 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
426 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 427 | } |
f7575c96 AF |
428 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
429 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
430 | } else { |
431 | for (i = 0; i < 16; i++) { | |
432 | sregs.acrs[i] = env->aregs[i]; | |
433 | sregs.crs[i] = env->cregs[i]; | |
434 | } | |
860643bc CB |
435 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
436 | if (r < 0) { | |
437 | return r; | |
5b08b344 CB |
438 | } |
439 | } | |
0e60a699 | 440 | |
5b08b344 | 441 | /* Finally the prefix */ |
fdb78ec0 | 442 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
443 | cs->kvm_run->s.regs.prefix = env->psa; |
444 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
445 | } else { |
446 | /* prefix is only supported via sync regs */ | |
447 | } | |
448 | return 0; | |
0e60a699 AG |
449 | } |
450 | ||
20d695a9 | 451 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
452 | { |
453 | S390CPU *cpu = S390_CPU(cs); | |
454 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 455 | struct kvm_sregs sregs; |
0e60a699 | 456 | struct kvm_regs regs; |
85ad6230 | 457 | struct kvm_fpu fpu; |
44c68de0 | 458 | int i, r; |
420840e5 | 459 | |
5b08b344 | 460 | /* get the PSW */ |
f7575c96 AF |
461 | env->psw.addr = cs->kvm_run->psw_addr; |
462 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
463 | |
464 | /* the GPRS */ | |
fdb78ec0 | 465 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 466 | for (i = 0; i < 16; i++) { |
f7575c96 | 467 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
468 | } |
469 | } else { | |
44c68de0 DD |
470 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
471 | if (r < 0) { | |
472 | return r; | |
5b08b344 CB |
473 | } |
474 | for (i = 0; i < 16; i++) { | |
475 | env->regs[i] = regs.gprs[i]; | |
476 | } | |
0e60a699 AG |
477 | } |
478 | ||
5b08b344 | 479 | /* The ACRS and CRS */ |
fdb78ec0 | 480 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 481 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
482 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
483 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
484 | } |
485 | } else { | |
44c68de0 DD |
486 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
487 | if (r < 0) { | |
488 | return r; | |
5b08b344 CB |
489 | } |
490 | for (i = 0; i < 16; i++) { | |
491 | env->aregs[i] = sregs.acrs[i]; | |
492 | env->cregs[i] = sregs.crs[i]; | |
493 | } | |
0e60a699 AG |
494 | } |
495 | ||
fcb79802 EF |
496 | /* Floating point and vector registers */ |
497 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
498 | for (i = 0; i < 32; i++) { | |
499 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
500 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
501 | } | |
502 | env->fpc = cs->kvm_run->s.regs.fpc; | |
5ab0e547 DH |
503 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
504 | for (i = 0; i < 16; i++) { | |
505 | get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i]; | |
506 | } | |
507 | env->fpc = cs->kvm_run->s.regs.fpc; | |
fcb79802 EF |
508 | } else { |
509 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
510 | if (r < 0) { | |
511 | return r; | |
512 | } | |
513 | for (i = 0; i < 16; i++) { | |
514 | get_freg(env, i)->ll = fpu.fprs[i]; | |
515 | } | |
516 | env->fpc = fpu.fpc; | |
85ad6230 | 517 | } |
85ad6230 | 518 | |
44c68de0 | 519 | /* The prefix */ |
fdb78ec0 | 520 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 521 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 522 | } |
0e60a699 | 523 | |
59ac1532 DH |
524 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
525 | env->cputm = cs->kvm_run->s.regs.cputm; | |
526 | env->ckc = cs->kvm_run->s.regs.ckc; | |
527 | env->todpr = cs->kvm_run->s.regs.todpr; | |
528 | env->gbea = cs->kvm_run->s.regs.gbea; | |
529 | env->pp = cs->kvm_run->s.regs.pp; | |
530 | } else { | |
531 | /* | |
532 | * These ONE_REGS are not protected by a capability. As they are only | |
533 | * necessary for migration we just trace a possible error, but don't | |
534 | * return with an error return code. | |
535 | */ | |
536 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
537 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
538 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
539 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
540 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
541 | } | |
542 | ||
9700230b FZ |
543 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
544 | memcpy(env->riccb, cs->kvm_run->s.regs.riccb, 64); | |
545 | } | |
546 | ||
59ac1532 DH |
547 | /* pfault parameters */ |
548 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
549 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
550 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
551 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
552 | } else if (cap_async_pf) { | |
860643bc | 553 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
554 | if (r < 0) { |
555 | return r; | |
556 | } | |
860643bc | 557 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
558 | if (r < 0) { |
559 | return r; | |
560 | } | |
860643bc | 561 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
562 | if (r < 0) { |
563 | return r; | |
564 | } | |
565 | } | |
566 | ||
0e60a699 AG |
567 | return 0; |
568 | } | |
569 | ||
3f9e59bb JH |
570 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
571 | { | |
572 | int r; | |
573 | struct kvm_device_attr attr = { | |
574 | .group = KVM_S390_VM_TOD, | |
575 | .attr = KVM_S390_VM_TOD_LOW, | |
576 | .addr = (uint64_t)tod_low, | |
577 | }; | |
578 | ||
579 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
580 | if (r) { | |
581 | return r; | |
582 | } | |
583 | ||
584 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
585 | attr.addr = (uint64_t)tod_high; | |
586 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
587 | } | |
588 | ||
589 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
590 | { | |
591 | int r; | |
592 | ||
593 | struct kvm_device_attr attr = { | |
594 | .group = KVM_S390_VM_TOD, | |
595 | .attr = KVM_S390_VM_TOD_LOW, | |
596 | .addr = (uint64_t)tod_low, | |
597 | }; | |
598 | ||
599 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
600 | if (r) { | |
601 | return r; | |
602 | } | |
603 | ||
604 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
605 | attr.addr = (uint64_t)tod_high; | |
606 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
607 | } | |
608 | ||
a9bcd1b8 TH |
609 | /** |
610 | * kvm_s390_mem_op: | |
611 | * @addr: the logical start address in guest memory | |
6cb1e49d | 612 | * @ar: the access register number |
a9bcd1b8 | 613 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
67cc32eb | 614 | * @len: length that should be transferred |
a9bcd1b8 | 615 | * @is_write: true = write, false = read |
67cc32eb | 616 | * Returns: 0 on success, non-zero if an exception or error occurred |
a9bcd1b8 TH |
617 | * |
618 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
619 | * is injected into the vCPU in case of translation errors. | |
620 | */ | |
6cb1e49d AY |
621 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
622 | int len, bool is_write) | |
a9bcd1b8 TH |
623 | { |
624 | struct kvm_s390_mem_op mem_op = { | |
625 | .gaddr = addr, | |
626 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
627 | .size = len, | |
628 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
629 | : KVM_S390_MEMOP_LOGICAL_READ, | |
630 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 631 | .ar = ar, |
a9bcd1b8 TH |
632 | }; |
633 | int ret; | |
634 | ||
635 | if (!cap_mem_op) { | |
636 | return -ENOSYS; | |
637 | } | |
638 | if (!hostbuf) { | |
639 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
640 | } | |
641 | ||
642 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
643 | if (ret < 0) { | |
644 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
645 | } | |
646 | return ret; | |
647 | } | |
648 | ||
fdec9918 CB |
649 | /* |
650 | * Legacy layout for s390: | |
651 | * Older S390 KVM requires the topmost vma of the RAM to be | |
652 | * smaller than an system defined value, which is at least 256GB. | |
653 | * Larger systems have larger values. We put the guest between | |
654 | * the end of data segment (system break) and this value. We | |
655 | * use 32GB as a base to have enough room for the system break | |
656 | * to grow. We also have to use MAP parameters that avoid | |
657 | * read-only mapping of guest pages. | |
658 | */ | |
dc622deb | 659 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
660 | { |
661 | void *mem; | |
662 | ||
663 | mem = mmap((void *) 0x800000000ULL, size, | |
664 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
665 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 666 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
667 | } |
668 | ||
8e4e86af DH |
669 | /* DIAG 501 is used for sw breakpoints */ |
670 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
671 | ||
20d695a9 | 672 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 673 | { |
0e60a699 | 674 | |
8e4e86af DH |
675 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
676 | sizeof(diag_501), 0) || | |
677 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
678 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
679 | return -EINVAL; |
680 | } | |
681 | return 0; | |
682 | } | |
683 | ||
20d695a9 | 684 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 685 | { |
8e4e86af | 686 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 687 | |
8e4e86af | 688 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 689 | return -EINVAL; |
8e4e86af | 690 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 691 | return -EINVAL; |
8e4e86af DH |
692 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
693 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
694 | return -EINVAL; |
695 | } | |
696 | ||
697 | return 0; | |
698 | } | |
699 | ||
770a6379 DH |
700 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
701 | int len, int type) | |
702 | { | |
703 | int n; | |
704 | ||
705 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
706 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
707 | (hw_breakpoints[n].len == len || len == -1)) { | |
708 | return &hw_breakpoints[n]; | |
709 | } | |
710 | } | |
711 | ||
712 | return NULL; | |
713 | } | |
714 | ||
715 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
716 | { | |
717 | int size; | |
718 | ||
719 | if (find_hw_breakpoint(addr, len, type)) { | |
720 | return -EEXIST; | |
721 | } | |
722 | ||
723 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
724 | ||
725 | if (!hw_breakpoints) { | |
726 | nb_hw_breakpoints = 0; | |
727 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
728 | } else { | |
729 | hw_breakpoints = | |
730 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
731 | } | |
732 | ||
733 | if (!hw_breakpoints) { | |
734 | nb_hw_breakpoints = 0; | |
735 | return -ENOMEM; | |
736 | } | |
737 | ||
738 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
739 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
740 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
741 | ||
742 | nb_hw_breakpoints++; | |
743 | ||
744 | return 0; | |
745 | } | |
746 | ||
8c012449 DH |
747 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
748 | target_ulong len, int type) | |
749 | { | |
770a6379 DH |
750 | switch (type) { |
751 | case GDB_BREAKPOINT_HW: | |
752 | type = KVM_HW_BP; | |
753 | break; | |
754 | case GDB_WATCHPOINT_WRITE: | |
755 | if (len < 1) { | |
756 | return -EINVAL; | |
757 | } | |
758 | type = KVM_HW_WP_WRITE; | |
759 | break; | |
760 | default: | |
761 | return -ENOSYS; | |
762 | } | |
763 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
764 | } |
765 | ||
766 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
767 | target_ulong len, int type) | |
768 | { | |
770a6379 DH |
769 | int size; |
770 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
771 | ||
772 | if (bp == NULL) { | |
773 | return -ENOENT; | |
774 | } | |
775 | ||
776 | nb_hw_breakpoints--; | |
777 | if (nb_hw_breakpoints > 0) { | |
778 | /* | |
779 | * In order to trim the array, move the last element to the position to | |
780 | * be removed - if necessary. | |
781 | */ | |
782 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
783 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
784 | } | |
785 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
786 | hw_breakpoints = | |
787 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
788 | } else { | |
789 | g_free(hw_breakpoints); | |
790 | hw_breakpoints = NULL; | |
791 | } | |
792 | ||
793 | return 0; | |
8c012449 DH |
794 | } |
795 | ||
796 | void kvm_arch_remove_all_hw_breakpoints(void) | |
797 | { | |
770a6379 DH |
798 | nb_hw_breakpoints = 0; |
799 | g_free(hw_breakpoints); | |
800 | hw_breakpoints = NULL; | |
8c012449 DH |
801 | } |
802 | ||
803 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
804 | { | |
770a6379 DH |
805 | int i; |
806 | ||
807 | if (nb_hw_breakpoints > 0) { | |
808 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
809 | dbg->arch.hw_bp = hw_breakpoints; | |
810 | ||
811 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
812 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
813 | hw_breakpoints[i].addr); | |
814 | } | |
815 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
816 | } else { | |
817 | dbg->arch.nr_hw_bp = 0; | |
818 | dbg->arch.hw_bp = NULL; | |
819 | } | |
8c012449 DH |
820 | } |
821 | ||
20d695a9 | 822 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 823 | { |
0e60a699 AG |
824 | } |
825 | ||
4c663752 | 826 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 827 | { |
4c663752 | 828 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
829 | } |
830 | ||
20d695a9 | 831 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 832 | { |
225dc991 | 833 | return cs->halted; |
0af691d7 MT |
834 | } |
835 | ||
66ad0893 CH |
836 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
837 | struct kvm_s390_interrupt *interrupt) | |
838 | { | |
839 | int r = 0; | |
840 | ||
841 | interrupt->type = irq->type; | |
842 | switch (irq->type) { | |
843 | case KVM_S390_INT_VIRTIO: | |
844 | interrupt->parm = irq->u.ext.ext_params; | |
845 | /* fall through */ | |
846 | case KVM_S390_INT_PFAULT_INIT: | |
847 | case KVM_S390_INT_PFAULT_DONE: | |
848 | interrupt->parm64 = irq->u.ext.ext_params2; | |
849 | break; | |
850 | case KVM_S390_PROGRAM_INT: | |
851 | interrupt->parm = irq->u.pgm.code; | |
852 | break; | |
853 | case KVM_S390_SIGP_SET_PREFIX: | |
854 | interrupt->parm = irq->u.prefix.address; | |
855 | break; | |
856 | case KVM_S390_INT_SERVICE: | |
857 | interrupt->parm = irq->u.ext.ext_params; | |
858 | break; | |
859 | case KVM_S390_MCHK: | |
860 | interrupt->parm = irq->u.mchk.cr14; | |
861 | interrupt->parm64 = irq->u.mchk.mcic; | |
862 | break; | |
863 | case KVM_S390_INT_EXTERNAL_CALL: | |
864 | interrupt->parm = irq->u.extcall.code; | |
865 | break; | |
866 | case KVM_S390_INT_EMERGENCY: | |
867 | interrupt->parm = irq->u.emerg.code; | |
868 | break; | |
869 | case KVM_S390_SIGP_STOP: | |
870 | case KVM_S390_RESTART: | |
871 | break; /* These types have no parameters */ | |
872 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
873 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
874 | interrupt->parm |= irq->u.io.subchannel_nr; | |
875 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
876 | interrupt->parm64 |= irq->u.io.io_int_word; | |
877 | break; | |
878 | default: | |
879 | r = -EINVAL; | |
880 | break; | |
881 | } | |
882 | return r; | |
883 | } | |
884 | ||
1191c949 | 885 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
886 | { |
887 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
888 | int r; |
889 | ||
890 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
891 | if (r < 0) { | |
892 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
893 | exit(1); | |
894 | } | |
895 | ||
896 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
897 | if (r < 0) { | |
898 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
899 | exit(1); | |
900 | } | |
901 | } | |
902 | ||
1191c949 JF |
903 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
904 | { | |
905 | CPUState *cs = CPU(cpu); | |
906 | int r; | |
907 | ||
908 | if (cap_s390_irq) { | |
909 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
910 | if (!r) { | |
911 | return; | |
912 | } | |
913 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
914 | exit(1); | |
915 | } | |
916 | ||
917 | inject_vcpu_irq_legacy(cs, irq); | |
918 | } | |
919 | ||
bbd8bb8e | 920 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
921 | { |
922 | struct kvm_s390_interrupt kvmint = {}; | |
923 | int r; | |
924 | ||
925 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
926 | if (r < 0) { | |
927 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
928 | exit(1); | |
929 | } | |
930 | ||
931 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
932 | if (r < 0) { | |
933 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
934 | exit(1); | |
935 | } | |
936 | } | |
937 | ||
bbd8bb8e CH |
938 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
939 | { | |
940 | static bool use_flic = true; | |
941 | int r; | |
942 | ||
943 | if (use_flic) { | |
944 | r = kvm_s390_inject_flic(irq); | |
945 | if (r == -ENOSYS) { | |
946 | use_flic = false; | |
947 | } | |
948 | if (!r) { | |
949 | return; | |
950 | } | |
951 | } | |
952 | __kvm_s390_floating_interrupt(irq); | |
953 | } | |
954 | ||
de13d216 | 955 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 956 | { |
de13d216 CH |
957 | struct kvm_s390_irq irq = { |
958 | .type = KVM_S390_INT_SERVICE, | |
959 | .u.ext.ext_params = parm, | |
960 | }; | |
0e60a699 | 961 | |
de13d216 | 962 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
963 | } |
964 | ||
1bc22652 | 965 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 966 | { |
de13d216 CH |
967 | struct kvm_s390_irq irq = { |
968 | .type = KVM_S390_PROGRAM_INT, | |
969 | .u.pgm.code = code, | |
970 | }; | |
971 | ||
972 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
973 | } |
974 | ||
801cdd35 TH |
975 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
976 | { | |
977 | struct kvm_s390_irq irq = { | |
978 | .type = KVM_S390_PROGRAM_INT, | |
979 | .u.pgm.code = code, | |
980 | .u.pgm.trans_exc_code = te_code, | |
981 | .u.pgm.exc_access_id = te_code & 3, | |
982 | }; | |
983 | ||
984 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
985 | } | |
986 | ||
1bc22652 | 987 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 988 | uint16_t ipbh0) |
0e60a699 | 989 | { |
1bc22652 | 990 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
991 | uint64_t sccb; |
992 | uint32_t code; | |
0e60a699 AG |
993 | int r = 0; |
994 | ||
cb446eca | 995 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
996 | sccb = env->regs[ipbh0 & 0xf]; |
997 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
998 | ||
6e252802 | 999 | r = sclp_service_call(env, sccb, code); |
9abf567d | 1000 | if (r < 0) { |
1bc22652 | 1001 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
1002 | } else { |
1003 | setcc(cpu, r); | |
0e60a699 | 1004 | } |
81f7c56c | 1005 | |
0e60a699 AG |
1006 | return 0; |
1007 | } | |
1008 | ||
1eecf41b | 1009 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 1010 | { |
09b99878 | 1011 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
1012 | int rc = 0; |
1013 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 1014 | |
44c68de0 | 1015 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1016 | |
09b99878 | 1017 | switch (ipa1) { |
1eecf41b | 1018 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1019 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1020 | break; |
1eecf41b | 1021 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1022 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1023 | break; |
1eecf41b | 1024 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1025 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1026 | break; |
1eecf41b | 1027 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1028 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1029 | break; |
1eecf41b | 1030 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1031 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1032 | break; |
1eecf41b | 1033 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1034 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1035 | break; |
1eecf41b | 1036 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1037 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1038 | break; |
1eecf41b | 1039 | case PRIV_B2_TSCH: |
09b99878 CH |
1040 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1041 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1042 | break; | |
1eecf41b | 1043 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1044 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1045 | break; |
1eecf41b | 1046 | case PRIV_B2_TPI: |
09b99878 CH |
1047 | /* This should have been handled by kvm already. */ |
1048 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1049 | break; | |
1eecf41b | 1050 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1051 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1052 | run->s390_sieic.ipb); | |
09b99878 | 1053 | break; |
1eecf41b | 1054 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1055 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1056 | break; |
1eecf41b | 1057 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1058 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1059 | break; |
1eecf41b | 1060 | case PRIV_B2_STCPS: |
09b99878 | 1061 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1062 | break; |
1eecf41b | 1063 | case PRIV_B2_SAL: |
5d9bf1c0 | 1064 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1065 | break; |
1eecf41b | 1066 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1067 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1068 | setcc(cpu, 3); |
09b99878 | 1069 | break; |
1eecf41b FB |
1070 | case PRIV_B2_SCLP_CALL: |
1071 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1072 | break; | |
c1e8dfb5 | 1073 | default: |
1eecf41b FB |
1074 | rc = -1; |
1075 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1076 | break; | |
09b99878 CH |
1077 | } |
1078 | ||
1eecf41b | 1079 | return rc; |
09b99878 CH |
1080 | } |
1081 | ||
6cb1e49d AY |
1082 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1083 | uint8_t *ar) | |
863f6f52 FB |
1084 | { |
1085 | CPUS390XState *env = &cpu->env; | |
1086 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1087 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1088 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1089 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1090 | ||
1091 | if (disp2 & 0x80000) { | |
1092 | disp2 += 0xfff00000; | |
1093 | } | |
6cb1e49d AY |
1094 | if (ar) { |
1095 | *ar = base2; | |
1096 | } | |
863f6f52 FB |
1097 | |
1098 | return (base2 ? env->regs[base2] : 0) + | |
1099 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1100 | } | |
1101 | ||
6cb1e49d AY |
1102 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1103 | uint8_t *ar) | |
863f6f52 FB |
1104 | { |
1105 | CPUS390XState *env = &cpu->env; | |
1106 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1107 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1108 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1109 | ||
1110 | if (disp2 & 0x80000) { | |
1111 | disp2 += 0xfff00000; | |
1112 | } | |
6cb1e49d AY |
1113 | if (ar) { |
1114 | *ar = base2; | |
1115 | } | |
863f6f52 FB |
1116 | |
1117 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1118 | } | |
1119 | ||
1120 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1121 | { | |
1122 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1123 | ||
1124 | return clp_service_call(cpu, r2); | |
1125 | } | |
1126 | ||
1127 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1128 | { | |
1129 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1130 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1131 | ||
1132 | return pcilg_service_call(cpu, r1, r2); | |
1133 | } | |
1134 | ||
1135 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1136 | { | |
1137 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1138 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1139 | ||
1140 | return pcistg_service_call(cpu, r1, r2); | |
1141 | } | |
1142 | ||
1143 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1144 | { | |
1145 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1146 | uint64_t fiba; | |
6cb1e49d | 1147 | uint8_t ar; |
863f6f52 FB |
1148 | |
1149 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1150 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1151 | |
6cb1e49d | 1152 | return stpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1153 | } |
1154 | ||
1155 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1156 | { | |
1157 | /* NOOP */ | |
1158 | return 0; | |
1159 | } | |
1160 | ||
1161 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1162 | { | |
1163 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1164 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1165 | ||
1166 | return rpcit_service_call(cpu, r1, r2); | |
1167 | } | |
1168 | ||
1169 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1170 | { | |
1171 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1172 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1173 | uint64_t gaddr; | |
6cb1e49d | 1174 | uint8_t ar; |
863f6f52 FB |
1175 | |
1176 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1177 | gaddr = get_base_disp_rsy(cpu, run, &ar); |
863f6f52 | 1178 | |
6cb1e49d | 1179 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
863f6f52 FB |
1180 | } |
1181 | ||
1182 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1183 | { | |
1184 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1185 | uint64_t fiba; | |
6cb1e49d | 1186 | uint8_t ar; |
863f6f52 FB |
1187 | |
1188 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1189 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1190 | |
6cb1e49d | 1191 | return mpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1192 | } |
1193 | ||
1eecf41b | 1194 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1195 | { |
1196 | int r = 0; | |
0e60a699 | 1197 | |
0e60a699 | 1198 | switch (ipa1) { |
863f6f52 FB |
1199 | case PRIV_B9_CLP: |
1200 | r = kvm_clp_service_call(cpu, run); | |
1201 | break; | |
1202 | case PRIV_B9_PCISTG: | |
1203 | r = kvm_pcistg_service_call(cpu, run); | |
1204 | break; | |
1205 | case PRIV_B9_PCILG: | |
1206 | r = kvm_pcilg_service_call(cpu, run); | |
1207 | break; | |
1208 | case PRIV_B9_RPCIT: | |
1209 | r = kvm_rpcit_service_call(cpu, run); | |
1210 | break; | |
1eecf41b FB |
1211 | case PRIV_B9_EQBS: |
1212 | /* just inject exception */ | |
1213 | r = -1; | |
1214 | break; | |
1215 | default: | |
1216 | r = -1; | |
1217 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1218 | break; | |
1219 | } | |
1220 | ||
1221 | return r; | |
1222 | } | |
1223 | ||
80765f07 | 1224 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1225 | { |
1226 | int r = 0; | |
1227 | ||
80765f07 | 1228 | switch (ipbl) { |
863f6f52 FB |
1229 | case PRIV_EB_PCISTB: |
1230 | r = kvm_pcistb_service_call(cpu, run); | |
1231 | break; | |
1232 | case PRIV_EB_SIC: | |
1233 | r = kvm_sic_service_call(cpu, run); | |
1234 | break; | |
1eecf41b FB |
1235 | case PRIV_EB_SQBS: |
1236 | /* just inject exception */ | |
1237 | r = -1; | |
1238 | break; | |
1239 | default: | |
1240 | r = -1; | |
80765f07 | 1241 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1242 | break; |
0e60a699 AG |
1243 | } |
1244 | ||
1245 | return r; | |
1246 | } | |
1247 | ||
863f6f52 FB |
1248 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1249 | { | |
1250 | int r = 0; | |
1251 | ||
1252 | switch (ipbl) { | |
1253 | case PRIV_E3_MPCIFC: | |
1254 | r = kvm_mpcifc_service_call(cpu, run); | |
1255 | break; | |
1256 | case PRIV_E3_STPCIFC: | |
1257 | r = kvm_stpcifc_service_call(cpu, run); | |
1258 | break; | |
1259 | default: | |
1260 | r = -1; | |
1261 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1262 | break; | |
1263 | } | |
1264 | ||
1265 | return r; | |
1266 | } | |
1267 | ||
4fd6dd06 | 1268 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1269 | { |
4fd6dd06 | 1270 | CPUS390XState *env = &cpu->env; |
77319f22 | 1271 | int ret; |
3474b679 | 1272 | |
44c68de0 | 1273 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1274 | ret = s390_virtio_hypercall(env); |
1275 | if (ret == -EINVAL) { | |
1276 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1277 | return 0; | |
1278 | } | |
0e60a699 | 1279 | |
77319f22 | 1280 | return ret; |
0e60a699 AG |
1281 | } |
1282 | ||
8fc639af XW |
1283 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1284 | { | |
1285 | uint64_t r1, r3; | |
1286 | int rc; | |
1287 | ||
1288 | cpu_synchronize_state(CPU(cpu)); | |
1289 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1290 | r3 = run->s390_sieic.ipa & 0x000f; | |
1291 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1292 | if (rc) { | |
1293 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1294 | } | |
1295 | } | |
1296 | ||
268846ba ED |
1297 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1298 | { | |
1299 | uint64_t r1, r3; | |
1300 | ||
1301 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1302 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1303 | r3 = run->s390_sieic.ipa & 0x000f; |
1304 | handle_diag_308(&cpu->env, r1, r3); | |
1305 | } | |
1306 | ||
b30f4dfb DH |
1307 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1308 | { | |
1309 | CPUS390XState *env = &cpu->env; | |
1310 | unsigned long pc; | |
1311 | ||
1312 | cpu_synchronize_state(CPU(cpu)); | |
1313 | ||
1314 | pc = env->psw.addr - 4; | |
1315 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1316 | env->psw.addr = pc; | |
1317 | return EXCP_DEBUG; | |
1318 | } | |
1319 | ||
1320 | return -ENOENT; | |
1321 | } | |
1322 | ||
638129ff CH |
1323 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1324 | ||
1325 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1326 | { |
1327 | int r = 0; | |
638129ff CH |
1328 | uint16_t func_code; |
1329 | ||
1330 | /* | |
1331 | * For any diagnose call we support, bits 48-63 of the resulting | |
1332 | * address specify the function code; the remainder is ignored. | |
1333 | */ | |
6cb1e49d | 1334 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1335 | switch (func_code) { |
8fc639af XW |
1336 | case DIAG_TIMEREVENT: |
1337 | kvm_handle_diag_288(cpu, run); | |
1338 | break; | |
268846ba ED |
1339 | case DIAG_IPL: |
1340 | kvm_handle_diag_308(cpu, run); | |
1341 | break; | |
39fbc5c6 CB |
1342 | case DIAG_KVM_HYPERCALL: |
1343 | r = handle_hypercall(cpu, run); | |
1344 | break; | |
1345 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1346 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1347 | break; |
1348 | default: | |
638129ff | 1349 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1350 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1351 | break; |
0e60a699 AG |
1352 | } |
1353 | ||
1354 | return r; | |
1355 | } | |
1356 | ||
6eb8f212 DH |
1357 | typedef struct SigpInfo { |
1358 | S390CPU *cpu; | |
22740e3f | 1359 | uint64_t param; |
6eb8f212 DH |
1360 | int cc; |
1361 | uint64_t *status_reg; | |
1362 | } SigpInfo; | |
1363 | ||
36b5c845 | 1364 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1365 | { |
36b5c845 DH |
1366 | *si->status_reg &= 0xffffffff00000000ULL; |
1367 | *si->status_reg |= status; | |
1368 | si->cc = SIGP_CC_STATUS_STORED; | |
1369 | } | |
6e6ad8db | 1370 | |
6eb8f212 | 1371 | static void sigp_start(void *arg) |
b20a461f | 1372 | { |
6eb8f212 | 1373 | SigpInfo *si = arg; |
6e6ad8db | 1374 | |
4f2b55d1 DH |
1375 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1376 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1377 | return; | |
1378 | } | |
1379 | ||
6eb8f212 DH |
1380 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1381 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1382 | } |
1383 | ||
18ff9494 | 1384 | static void sigp_stop(void *arg) |
0e60a699 | 1385 | { |
18ff9494 DH |
1386 | SigpInfo *si = arg; |
1387 | struct kvm_s390_irq irq = { | |
1388 | .type = KVM_S390_SIGP_STOP, | |
1389 | }; | |
1390 | ||
1391 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1392 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1393 | return; | |
1394 | } | |
1395 | ||
1396 | /* disabled wait - sleeping in user space */ | |
1397 | if (CPU(si->cpu)->halted) { | |
1398 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1399 | } else { | |
1400 | /* execute the stop function */ | |
1401 | si->cpu->env.sigp_order = SIGP_STOP; | |
1402 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1403 | } | |
1404 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1405 | } | |
1406 | ||
abec5356 EF |
1407 | #define ADTL_SAVE_AREA_SIZE 1024 |
1408 | static int kvm_s390_store_adtl_status(S390CPU *cpu, hwaddr addr) | |
1409 | { | |
1410 | void *mem; | |
1411 | hwaddr len = ADTL_SAVE_AREA_SIZE; | |
1412 | ||
1413 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1414 | if (!mem) { | |
1415 | return -EFAULT; | |
1416 | } | |
1417 | if (len != ADTL_SAVE_AREA_SIZE) { | |
1418 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1419 | return -EFAULT; | |
1420 | } | |
1421 | ||
1422 | memcpy(mem, &cpu->env.vregs, 512); | |
1423 | ||
1424 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1425 | ||
1426 | return 0; | |
1427 | } | |
1428 | ||
18ff9494 DH |
1429 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1430 | #define SAVE_AREA_SIZE 512 | |
1431 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1432 | { | |
1433 | static const uint8_t ar_id = 1; | |
1434 | uint64_t ckc = cpu->env.ckc >> 8; | |
1435 | void *mem; | |
c498d8e3 | 1436 | int i; |
18ff9494 DH |
1437 | hwaddr len = SAVE_AREA_SIZE; |
1438 | ||
1439 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1440 | if (!mem) { | |
1441 | return -EFAULT; | |
1442 | } | |
1443 | if (len != SAVE_AREA_SIZE) { | |
1444 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1445 | return -EFAULT; | |
1446 | } | |
1447 | ||
1448 | if (store_arch) { | |
1449 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1450 | } | |
c498d8e3 | 1451 | for (i = 0; i < 16; ++i) { |
182f42fd | 1452 | *((uint64_t *)mem + i) = get_freg(&cpu->env, i)->ll; |
c498d8e3 | 1453 | } |
18ff9494 DH |
1454 | memcpy(mem + 128, &cpu->env.regs, 128); |
1455 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1456 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1457 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1458 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1459 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1460 | memcpy(mem + 304, &ckc, 8); | |
1461 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1462 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1463 | ||
1464 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1465 | ||
1466 | return 0; | |
1467 | } | |
1468 | ||
1469 | static void sigp_stop_and_store_status(void *arg) | |
1470 | { | |
1471 | SigpInfo *si = arg; | |
1472 | struct kvm_s390_irq irq = { | |
1473 | .type = KVM_S390_SIGP_STOP, | |
1474 | }; | |
1475 | ||
1476 | /* disabled wait - sleeping in user space */ | |
1477 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1478 | CPU(si->cpu)->halted) { | |
1479 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1480 | } | |
1481 | ||
1482 | switch (s390_cpu_get_state(si->cpu)) { | |
1483 | case CPU_STATE_OPERATING: | |
1484 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1485 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1486 | /* store will be performed when handling the stop intercept */ | |
1487 | break; | |
1488 | case CPU_STATE_STOPPED: | |
1489 | /* already stopped, just store the status */ | |
1490 | cpu_synchronize_state(CPU(si->cpu)); | |
1491 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1492 | break; | |
1493 | } | |
1494 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1495 | } | |
1496 | ||
1497 | static void sigp_store_status_at_address(void *arg) | |
1498 | { | |
1499 | SigpInfo *si = arg; | |
1500 | uint32_t address = si->param & 0x7ffffe00u; | |
1501 | ||
1502 | /* cpu has to be stopped */ | |
1503 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1504 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1505 | return; | |
1506 | } | |
1507 | ||
1508 | cpu_synchronize_state(CPU(si->cpu)); | |
1509 | ||
1510 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1511 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1512 | return; | |
1513 | } | |
1514 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1515 | } | |
1516 | ||
abec5356 EF |
1517 | static void sigp_store_adtl_status(void *arg) |
1518 | { | |
1519 | SigpInfo *si = arg; | |
1520 | ||
1521 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { | |
1522 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); | |
1523 | return; | |
1524 | } | |
1525 | ||
1526 | /* cpu has to be stopped */ | |
1527 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1528 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1529 | return; | |
1530 | } | |
1531 | ||
1532 | /* parameter must be aligned to 1024-byte boundary */ | |
1533 | if (si->param & 0x3ff) { | |
1534 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1535 | return; | |
1536 | } | |
1537 | ||
1538 | cpu_synchronize_state(CPU(si->cpu)); | |
1539 | ||
1540 | if (kvm_s390_store_adtl_status(si->cpu, si->param)) { | |
1541 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1542 | return; | |
1543 | } | |
1544 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1545 | } | |
1546 | ||
6eb8f212 | 1547 | static void sigp_restart(void *arg) |
0e60a699 | 1548 | { |
6eb8f212 | 1549 | SigpInfo *si = arg; |
de13d216 CH |
1550 | struct kvm_s390_irq irq = { |
1551 | .type = KVM_S390_RESTART, | |
1552 | }; | |
1553 | ||
e3b7b578 DH |
1554 | switch (s390_cpu_get_state(si->cpu)) { |
1555 | case CPU_STATE_STOPPED: | |
1556 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1557 | cpu_synchronize_state(CPU(si->cpu)); | |
1558 | do_restart_interrupt(&si->cpu->env); | |
1559 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1560 | break; | |
1561 | case CPU_STATE_OPERATING: | |
1562 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1563 | break; | |
1564 | } | |
6eb8f212 | 1565 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1566 | } |
1567 | ||
1568 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1569 | { | |
6eb8f212 DH |
1570 | SigpInfo si = { |
1571 | .cpu = cpu, | |
1572 | }; | |
1573 | ||
1574 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1575 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1576 | return 0; |
1577 | } | |
1578 | ||
f7d3e466 | 1579 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1580 | { |
6eb8f212 DH |
1581 | SigpInfo *si = arg; |
1582 | CPUState *cs = CPU(si->cpu); | |
1583 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
d5900813 | 1584 | |
6eb8f212 DH |
1585 | cpu_synchronize_state(cs); |
1586 | scc->initial_cpu_reset(cs); | |
1587 | cpu_synchronize_post_reset(cs); | |
1588 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1589 | } |
1590 | ||
04c2b516 TH |
1591 | static void sigp_cpu_reset(void *arg) |
1592 | { | |
6eb8f212 DH |
1593 | SigpInfo *si = arg; |
1594 | CPUState *cs = CPU(si->cpu); | |
1595 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
04c2b516 | 1596 | |
6eb8f212 DH |
1597 | cpu_synchronize_state(cs); |
1598 | scc->cpu_reset(cs); | |
1599 | cpu_synchronize_post_reset(cs); | |
1600 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1601 | } |
1602 | ||
18ff9494 | 1603 | static void sigp_set_prefix(void *arg) |
0e60a699 | 1604 | { |
18ff9494 DH |
1605 | SigpInfo *si = arg; |
1606 | uint32_t addr = si->param & 0x7fffe000u; | |
0e60a699 | 1607 | |
18ff9494 | 1608 | cpu_synchronize_state(CPU(si->cpu)); |
0e60a699 | 1609 | |
18ff9494 DH |
1610 | if (!address_space_access_valid(&address_space_memory, addr, |
1611 | sizeof(struct LowCore), false)) { | |
1612 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1613 | return; | |
1614 | } | |
0e60a699 | 1615 | |
18ff9494 DH |
1616 | /* cpu has to be stopped */ |
1617 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1618 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1619 | return; | |
0e60a699 AG |
1620 | } |
1621 | ||
18ff9494 DH |
1622 | si->cpu->env.psa = addr; |
1623 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1624 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1625 | } | |
1626 | ||
6eb8f212 | 1627 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1628 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1629 | { |
1630 | SigpInfo si = { | |
1631 | .cpu = dst_cpu, | |
22740e3f | 1632 | .param = param, |
6eb8f212 DH |
1633 | .status_reg = status_reg, |
1634 | }; | |
1635 | ||
1636 | /* cpu available? */ | |
1637 | if (dst_cpu == NULL) { | |
1638 | return SIGP_CC_NOT_OPERATIONAL; | |
1639 | } | |
1640 | ||
18ff9494 DH |
1641 | /* only resets can break pending orders */ |
1642 | if (dst_cpu->env.sigp_order != 0 && | |
1643 | order != SIGP_CPU_RESET && | |
1644 | order != SIGP_INITIAL_CPU_RESET) { | |
1645 | return SIGP_CC_BUSY; | |
1646 | } | |
1647 | ||
6eb8f212 | 1648 | switch (order) { |
b20a461f | 1649 | case SIGP_START: |
6eb8f212 DH |
1650 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); |
1651 | break; | |
18ff9494 DH |
1652 | case SIGP_STOP: |
1653 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
b20a461f | 1654 | break; |
0b9972a2 | 1655 | case SIGP_RESTART: |
6eb8f212 | 1656 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); |
0b9972a2 | 1657 | break; |
18ff9494 DH |
1658 | case SIGP_STOP_STORE_STATUS: |
1659 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1660 | break; | |
1661 | case SIGP_STORE_STATUS_ADDR: | |
1662 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1663 | break; | |
abec5356 EF |
1664 | case SIGP_STORE_ADTL_STATUS: |
1665 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, &si); | |
1666 | break; | |
18ff9494 DH |
1667 | case SIGP_SET_PREFIX: |
1668 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
0788082a | 1669 | break; |
0b9972a2 | 1670 | case SIGP_INITIAL_CPU_RESET: |
6eb8f212 | 1671 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); |
0b9972a2 | 1672 | break; |
04c2b516 | 1673 | case SIGP_CPU_RESET: |
6eb8f212 | 1674 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); |
04c2b516 | 1675 | break; |
0b9972a2 | 1676 | default: |
6eb8f212 | 1677 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1678 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1679 | } |
04c2b516 | 1680 | |
6eb8f212 | 1681 | return si.cc; |
04c2b516 TH |
1682 | } |
1683 | ||
18ff9494 DH |
1684 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1685 | uint64_t *status_reg) | |
1686 | { | |
1687 | CPUState *cur_cs; | |
1688 | S390CPU *cur_cpu; | |
1689 | ||
1690 | /* due to the BQL, we are the only active cpu */ | |
1691 | CPU_FOREACH(cur_cs) { | |
1692 | cur_cpu = S390_CPU(cur_cs); | |
1693 | if (cur_cpu->env.sigp_order != 0) { | |
1694 | return SIGP_CC_BUSY; | |
1695 | } | |
1696 | cpu_synchronize_state(cur_cs); | |
1697 | /* all but the current one have to be stopped */ | |
1698 | if (cur_cpu != cpu && | |
1699 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1700 | *status_reg &= 0xffffffff00000000ULL; | |
1701 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1702 | return SIGP_CC_STATUS_STORED; | |
1703 | } | |
1704 | } | |
1705 | ||
1706 | switch (param & 0xff) { | |
1707 | case SIGP_MODE_ESA_S390: | |
1708 | /* not supported */ | |
1709 | return SIGP_CC_NOT_OPERATIONAL; | |
1710 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1711 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1712 | CPU_FOREACH(cur_cs) { | |
1713 | cur_cpu = S390_CPU(cur_cs); | |
1714 | cur_cpu->env.pfault_token = -1UL; | |
1715 | } | |
0b9972a2 | 1716 | break; |
18ff9494 DH |
1717 | default: |
1718 | *status_reg &= 0xffffffff00000000ULL; | |
1719 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1720 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1721 | } |
1722 | ||
18ff9494 DH |
1723 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1724 | } | |
1725 | ||
b8031adb TH |
1726 | #define SIGP_ORDER_MASK 0x000000ff |
1727 | ||
f7575c96 | 1728 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1729 | { |
f7575c96 | 1730 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1731 | const uint8_t r1 = ipa1 >> 4; |
1732 | const uint8_t r3 = ipa1 & 0x0f; | |
1733 | int ret; | |
1734 | uint8_t order; | |
1735 | uint64_t *status_reg; | |
22740e3f | 1736 | uint64_t param; |
6eb8f212 | 1737 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1738 | |
cb446eca | 1739 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1740 | |
1741 | /* get order code */ | |
6cb1e49d AY |
1742 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1743 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1744 | status_reg = &env->regs[r1]; |
22740e3f | 1745 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1746 | |
6eb8f212 | 1747 | switch (order) { |
0b9972a2 | 1748 | case SIGP_SET_ARCH: |
18ff9494 | 1749 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1750 | break; |
0b9972a2 | 1751 | default: |
6eb8f212 DH |
1752 | /* all other sigp orders target a single vcpu */ |
1753 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1754 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1755 | } |
1756 | ||
56dba22b DH |
1757 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1758 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1759 | ||
6eb8f212 DH |
1760 | if (ret >= 0) { |
1761 | setcc(cpu, ret); | |
1762 | return 0; | |
1763 | } | |
1764 | ||
1765 | return ret; | |
0e60a699 AG |
1766 | } |
1767 | ||
b30f4dfb | 1768 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1769 | { |
1770 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1771 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1772 | int r = -1; |
0e60a699 | 1773 | |
e67137c6 PM |
1774 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1775 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1776 | switch (ipa0) { |
09b99878 | 1777 | case IPA0_B2: |
1eecf41b FB |
1778 | r = handle_b2(cpu, run, ipa1); |
1779 | break; | |
09b99878 | 1780 | case IPA0_B9: |
1eecf41b FB |
1781 | r = handle_b9(cpu, run, ipa1); |
1782 | break; | |
09b99878 | 1783 | case IPA0_EB: |
80765f07 | 1784 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1785 | break; |
863f6f52 FB |
1786 | case IPA0_E3: |
1787 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1788 | break; | |
09b99878 | 1789 | case IPA0_DIAG: |
638129ff | 1790 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1791 | break; |
1792 | case IPA0_SIGP: | |
1793 | r = handle_sigp(cpu, run, ipa1); | |
1794 | break; | |
0e60a699 AG |
1795 | } |
1796 | ||
1797 | if (r < 0) { | |
b30f4dfb | 1798 | r = 0; |
1bc22652 | 1799 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1800 | } |
b30f4dfb DH |
1801 | |
1802 | return r; | |
0e60a699 AG |
1803 | } |
1804 | ||
f7575c96 | 1805 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1806 | { |
1807 | /* signal quiesce */ | |
f7575c96 | 1808 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1809 | } |
1810 | ||
a2689242 TH |
1811 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) |
1812 | { | |
1813 | CPUState *cs = CPU(cpu); | |
1814 | ||
1815 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1816 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1817 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1818 | s390_cpu_halt(cpu); |
5f5b5942 | 1819 | qemu_system_guest_panicked(); |
a2689242 TH |
1820 | } |
1821 | ||
1bc22652 | 1822 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1823 | { |
f7575c96 AF |
1824 | CPUState *cs = CPU(cpu); |
1825 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1826 | int icpt_code = run->s390_sieic.icptcode; |
1827 | int r = 0; | |
1828 | ||
e67137c6 | 1829 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1830 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1831 | switch (icpt_code) { |
1832 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1833 | r = handle_instruction(cpu, run); |
0e60a699 | 1834 | break; |
6449a41a TH |
1835 | case ICPT_PROGRAM: |
1836 | unmanageable_intercept(cpu, "program interrupt", | |
1837 | offsetof(LowCore, program_new_psw)); | |
1838 | r = EXCP_HALTED; | |
1839 | break; | |
a2689242 TH |
1840 | case ICPT_EXT_INT: |
1841 | unmanageable_intercept(cpu, "external interrupt", | |
1842 | offsetof(LowCore, external_new_psw)); | |
1843 | r = EXCP_HALTED; | |
1844 | break; | |
0e60a699 | 1845 | case ICPT_WAITPSW: |
08eb8c85 | 1846 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1847 | cpu_synchronize_state(cs); |
1848 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1849 | if (is_special_wait_psw(cs)) { |
1850 | qemu_system_shutdown_request(); | |
1851 | } else { | |
5f5b5942 | 1852 | qemu_system_guest_panicked(); |
08eb8c85 | 1853 | } |
eca3ed03 CB |
1854 | } |
1855 | r = EXCP_HALTED; | |
1856 | break; | |
854e42f3 | 1857 | case ICPT_CPU_STOP: |
eb24f7c6 | 1858 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1859 | qemu_system_shutdown_request(); |
1860 | } | |
18ff9494 DH |
1861 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1862 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1863 | true); | |
1864 | } | |
1865 | cpu->env.sigp_order = 0; | |
854e42f3 | 1866 | r = EXCP_HALTED; |
0e60a699 AG |
1867 | break; |
1868 | case ICPT_SOFT_INTERCEPT: | |
1869 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1870 | exit(1); | |
1871 | break; | |
0e60a699 AG |
1872 | case ICPT_IO: |
1873 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1874 | exit(1); | |
1875 | break; | |
1876 | default: | |
1877 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1878 | exit(1); | |
1879 | break; | |
1880 | } | |
1881 | ||
1882 | return r; | |
1883 | } | |
1884 | ||
09b99878 CH |
1885 | static int handle_tsch(S390CPU *cpu) |
1886 | { | |
09b99878 CH |
1887 | CPUState *cs = CPU(cpu); |
1888 | struct kvm_run *run = cs->kvm_run; | |
1889 | int ret; | |
1890 | ||
44c68de0 | 1891 | cpu_synchronize_state(cs); |
3474b679 | 1892 | |
653b0809 TH |
1893 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1894 | if (ret < 0) { | |
09b99878 CH |
1895 | /* |
1896 | * Failure. | |
1897 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1898 | */ | |
1899 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1900 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1901 | run->s390_tsch.subchannel_nr, | |
1902 | run->s390_tsch.io_int_parm, | |
1903 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1904 | } |
1905 | ret = 0; | |
1906 | } | |
1907 | return ret; | |
1908 | } | |
1909 | ||
6cb1e49d | 1910 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
1911 | { |
1912 | struct sysib_322 sysib; | |
1913 | int del; | |
1914 | ||
6cb1e49d | 1915 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
1916 | return; |
1917 | } | |
1918 | /* Shift the stack of Extended Names to prepare for our own data */ | |
1919 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
1920 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
1921 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
1922 | * assumed it's not capable of managing Extended Names for lower levels. | |
1923 | */ | |
1924 | for (del = 1; del < sysib.count; del++) { | |
1925 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
1926 | break; | |
1927 | } | |
1928 | } | |
1929 | if (del < sysib.count) { | |
1930 | memset(sysib.ext_names[del], 0, | |
1931 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
1932 | } | |
1933 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
1934 | if (qemu_name) { | |
1935 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
1936 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
1937 | strlen(qemu_name))); | |
1938 | } | |
1939 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
1940 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
1941 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
1942 | * considered by s390 as not capable of providing any Extended Name. | |
1943 | * Therefore if no name was specified on qemu invocation, we go with the | |
1944 | * same "KVMguest" default, which KVM has filled into short name field. | |
1945 | */ | |
1946 | if (qemu_name) { | |
1947 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
1948 | sizeof(sysib.ext_names[0])); | |
1949 | } else { | |
1950 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
1951 | } | |
1952 | /* Insert UUID */ | |
1953 | memcpy(sysib.vm[0].uuid, qemu_uuid, sizeof(sysib.vm[0].uuid)); | |
1954 | ||
6cb1e49d | 1955 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
1956 | } |
1957 | ||
1958 | static int handle_stsi(S390CPU *cpu) | |
1959 | { | |
1960 | CPUState *cs = CPU(cpu); | |
1961 | struct kvm_run *run = cs->kvm_run; | |
1962 | ||
1963 | switch (run->s390_stsi.fc) { | |
1964 | case 3: | |
1965 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
1966 | return 0; | |
1967 | } | |
1968 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 1969 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
1970 | return 0; |
1971 | default: | |
1972 | return 0; | |
1973 | } | |
1974 | } | |
1975 | ||
8c012449 DH |
1976 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1977 | { | |
770a6379 DH |
1978 | CPUState *cs = CPU(cpu); |
1979 | struct kvm_run *run = cs->kvm_run; | |
1980 | ||
1981 | int ret = 0; | |
1982 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1983 | ||
1984 | switch (arch_info->type) { | |
1985 | case KVM_HW_WP_WRITE: | |
1986 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1987 | cs->watchpoint_hit = &hw_watchpoint; | |
1988 | hw_watchpoint.vaddr = arch_info->addr; | |
1989 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1990 | ret = EXCP_DEBUG; | |
1991 | } | |
1992 | break; | |
1993 | case KVM_HW_BP: | |
1994 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1995 | ret = EXCP_DEBUG; | |
1996 | } | |
1997 | break; | |
1998 | case KVM_SINGLESTEP: | |
1999 | if (cs->singlestep_enabled) { | |
2000 | ret = EXCP_DEBUG; | |
2001 | } | |
2002 | break; | |
2003 | default: | |
2004 | ret = -ENOSYS; | |
2005 | } | |
2006 | ||
2007 | return ret; | |
8c012449 DH |
2008 | } |
2009 | ||
20d695a9 | 2010 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 2011 | { |
20d695a9 | 2012 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
2013 | int ret = 0; |
2014 | ||
4b8523ee JK |
2015 | qemu_mutex_lock_iothread(); |
2016 | ||
0e60a699 AG |
2017 | switch (run->exit_reason) { |
2018 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2019 | ret = handle_intercept(cpu); |
0e60a699 AG |
2020 | break; |
2021 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2022 | s390_reipl_request(); |
0e60a699 | 2023 | break; |
09b99878 CH |
2024 | case KVM_EXIT_S390_TSCH: |
2025 | ret = handle_tsch(cpu); | |
2026 | break; | |
f07177a5 ET |
2027 | case KVM_EXIT_S390_STSI: |
2028 | ret = handle_stsi(cpu); | |
2029 | break; | |
8c012449 DH |
2030 | case KVM_EXIT_DEBUG: |
2031 | ret = kvm_arch_handle_debug_exit(cpu); | |
2032 | break; | |
0e60a699 AG |
2033 | default: |
2034 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2035 | break; | |
2036 | } | |
4b8523ee | 2037 | qemu_mutex_unlock_iothread(); |
0e60a699 | 2038 | |
bb4ea393 JK |
2039 | if (ret == 0) { |
2040 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2041 | } |
0e60a699 AG |
2042 | return ret; |
2043 | } | |
4513d923 | 2044 | |
20d695a9 | 2045 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2046 | { |
2047 | return true; | |
2048 | } | |
a1b87fe0 | 2049 | |
20d695a9 | 2050 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
2051 | { |
2052 | return 1; | |
2053 | } | |
2054 | ||
2055 | int kvm_arch_on_sigbus(int code, void *addr) | |
2056 | { | |
2057 | return 1; | |
2058 | } | |
09b99878 | 2059 | |
de13d216 | 2060 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2061 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2062 | uint32_t io_int_word) | |
2063 | { | |
de13d216 CH |
2064 | struct kvm_s390_irq irq = { |
2065 | .u.io.subchannel_id = subchannel_id, | |
2066 | .u.io.subchannel_nr = subchannel_nr, | |
2067 | .u.io.io_int_parm = io_int_parm, | |
2068 | .u.io.io_int_word = io_int_word, | |
2069 | }; | |
09b99878 | 2070 | |
7e749462 | 2071 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2072 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2073 | } else { |
de13d216 | 2074 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
2075 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
2076 | } | |
de13d216 | 2077 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2078 | } |
2079 | ||
b080364a CH |
2080 | static uint64_t build_channel_report_mcic(void) |
2081 | { | |
2082 | uint64_t mcic; | |
2083 | ||
2084 | /* subclass: indicate channel report pending */ | |
2085 | mcic = MCIC_SC_CP | | |
2086 | /* subclass modifiers: none */ | |
2087 | /* storage errors: none */ | |
2088 | /* validity bits: no damage */ | |
2089 | MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | | |
2090 | MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | | |
2091 | MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; | |
2092 | if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { | |
2093 | mcic |= MCIC_VB_VR; | |
2094 | } | |
2095 | return mcic; | |
2096 | } | |
2097 | ||
de13d216 | 2098 | void kvm_s390_crw_mchk(void) |
09b99878 | 2099 | { |
de13d216 CH |
2100 | struct kvm_s390_irq irq = { |
2101 | .type = KVM_S390_MCHK, | |
2102 | .u.mchk.cr14 = 1 << 28, | |
b080364a | 2103 | .u.mchk.mcic = build_channel_report_mcic(), |
de13d216 CH |
2104 | }; |
2105 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2106 | } |
2107 | ||
2108 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2109 | { | |
09b99878 CH |
2110 | int r; |
2111 | ||
2112 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2113 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2114 | assert(r == 0); |
2115 | } | |
48475e14 AK |
2116 | |
2117 | void kvm_arch_init_irq_routing(KVMState *s) | |
2118 | { | |
d426d9fb CH |
2119 | /* |
2120 | * Note that while irqchip capabilities generally imply that cpustates | |
2121 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2122 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2123 | */ | |
2124 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2125 | kvm_gsi_routing_allowed = true; |
2126 | kvm_halt_in_kernel_allowed = false; | |
2127 | } | |
48475e14 | 2128 | } |
b4436a0b | 2129 | |
cc3ac9c4 CH |
2130 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2131 | int vq, bool assign) | |
b4436a0b CH |
2132 | { |
2133 | struct kvm_ioeventfd kick = { | |
2134 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2135 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2136 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2137 | .datamatch = vq, |
2138 | .addr = sch, | |
2139 | .len = 8, | |
2140 | }; | |
2141 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2142 | return -ENOSYS; | |
2143 | } | |
2144 | if (!assign) { | |
2145 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2146 | } | |
2147 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2148 | } | |
1def6656 MR |
2149 | |
2150 | int kvm_s390_get_memslot_count(KVMState *s) | |
2151 | { | |
2152 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
2153 | } | |
c9e659c9 | 2154 | |
9700230b FZ |
2155 | int kvm_s390_get_ri(void) |
2156 | { | |
2157 | return cap_ri; | |
2158 | } | |
2159 | ||
c9e659c9 DH |
2160 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) |
2161 | { | |
2162 | struct kvm_mp_state mp_state = {}; | |
2163 | int ret; | |
2164 | ||
2165 | /* the kvm part might not have been initialized yet */ | |
2166 | if (CPU(cpu)->kvm_state == NULL) { | |
2167 | return 0; | |
2168 | } | |
2169 | ||
2170 | switch (cpu_state) { | |
2171 | case CPU_STATE_STOPPED: | |
2172 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2173 | break; | |
2174 | case CPU_STATE_CHECK_STOP: | |
2175 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2176 | break; | |
2177 | case CPU_STATE_OPERATING: | |
2178 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2179 | break; | |
2180 | case CPU_STATE_LOAD: | |
2181 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2182 | break; | |
2183 | default: | |
2184 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2185 | cpu_state); | |
2186 | exit(1); | |
2187 | } | |
2188 | ||
2189 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2190 | if (ret) { | |
2191 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2192 | strerror(-ret)); | |
2193 | } | |
2194 | ||
2195 | return ret; | |
2196 | } | |
9e03a040 | 2197 | |
3cda44f7 JF |
2198 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2199 | { | |
2200 | struct kvm_s390_irq_state irq_state; | |
2201 | CPUState *cs = CPU(cpu); | |
2202 | int32_t bytes; | |
2203 | ||
2204 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2205 | return; | |
2206 | } | |
2207 | ||
2208 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2209 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2210 | ||
2211 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2212 | if (bytes < 0) { | |
2213 | cpu->irqstate_saved_size = 0; | |
2214 | error_report("Migration of interrupt state failed"); | |
2215 | return; | |
2216 | } | |
2217 | ||
2218 | cpu->irqstate_saved_size = bytes; | |
2219 | } | |
2220 | ||
2221 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2222 | { | |
2223 | CPUState *cs = CPU(cpu); | |
2224 | struct kvm_s390_irq_state irq_state; | |
2225 | int r; | |
2226 | ||
b853d4cb SS |
2227 | if (cpu->irqstate_saved_size == 0) { |
2228 | return 0; | |
2229 | } | |
2230 | ||
3cda44f7 JF |
2231 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2232 | return -ENOSYS; | |
2233 | } | |
2234 | ||
3cda44f7 JF |
2235 | irq_state.buf = (uint64_t) cpu->irqstate; |
2236 | irq_state.len = cpu->irqstate_saved_size; | |
2237 | ||
2238 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2239 | if (r) { | |
2240 | error_report("Setting interrupt state failed %d", r); | |
2241 | } | |
2242 | return r; | |
2243 | } | |
2244 | ||
9e03a040 | 2245 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 2246 | uint64_t address, uint32_t data, PCIDevice *dev) |
9e03a040 FB |
2247 | { |
2248 | S390PCIBusDevice *pbdev; | |
2249 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
2250 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
2251 | ||
2252 | pbdev = s390_pci_find_dev_by_fid(fid); | |
2253 | if (!pbdev) { | |
2254 | DPRINTF("add_msi_route no dev\n"); | |
2255 | return -ENODEV; | |
2256 | } | |
2257 | ||
2258 | pbdev->routes.adapter.ind_offset = vec; | |
2259 | ||
2260 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2261 | route->flags = 0; | |
2262 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2263 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2264 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2265 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2266 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2267 | return 0; | |
2268 | } | |
1850b6b7 EA |
2269 | |
2270 | int kvm_arch_msi_data_to_gsi(uint32_t data) | |
2271 | { | |
2272 | abort(); | |
2273 | } |