]>
Commit | Line | Data |
---|---|---|
0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
24 | #include <sys/types.h> | |
25 | #include <sys/ioctl.h> | |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
1de7afc9 | 32 | #include "qemu/timer.h" |
9c17d615 PB |
33 | #include "sysemu/sysemu.h" |
34 | #include "sysemu/kvm.h" | |
4cb88c3c | 35 | #include "hw/hw.h" |
0e60a699 | 36 | #include "cpu.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 CB |
38 | #include "qapi/qmp/qjson.h" |
39 | #include "monitor/monitor.h" | |
770a6379 | 40 | #include "exec/gdbstub.h" |
18ff9494 | 41 | #include "exec/address-spaces.h" |
860643bc | 42 | #include "trace.h" |
3a449690 | 43 | #include "qapi-event.h" |
863f6f52 | 44 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 45 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 46 | #include "hw/s390x/ipl.h" |
0e60a699 AG |
47 | |
48 | /* #define DEBUG_KVM */ | |
49 | ||
50 | #ifdef DEBUG_KVM | |
e67137c6 | 51 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
52 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
53 | #else | |
e67137c6 | 54 | #define DPRINTF(fmt, ...) \ |
0e60a699 AG |
55 | do { } while (0) |
56 | #endif | |
57 | ||
58 | #define IPA0_DIAG 0x8300 | |
59 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
60 | #define IPA0_B2 0xb200 |
61 | #define IPA0_B9 0xb900 | |
62 | #define IPA0_EB 0xeb00 | |
863f6f52 | 63 | #define IPA0_E3 0xe300 |
0e60a699 | 64 | |
1eecf41b FB |
65 | #define PRIV_B2_SCLP_CALL 0x20 |
66 | #define PRIV_B2_CSCH 0x30 | |
67 | #define PRIV_B2_HSCH 0x31 | |
68 | #define PRIV_B2_MSCH 0x32 | |
69 | #define PRIV_B2_SSCH 0x33 | |
70 | #define PRIV_B2_STSCH 0x34 | |
71 | #define PRIV_B2_TSCH 0x35 | |
72 | #define PRIV_B2_TPI 0x36 | |
73 | #define PRIV_B2_SAL 0x37 | |
74 | #define PRIV_B2_RSCH 0x38 | |
75 | #define PRIV_B2_STCRW 0x39 | |
76 | #define PRIV_B2_STCPS 0x3a | |
77 | #define PRIV_B2_RCHP 0x3b | |
78 | #define PRIV_B2_SCHM 0x3c | |
79 | #define PRIV_B2_CHSC 0x5f | |
80 | #define PRIV_B2_SIGA 0x74 | |
81 | #define PRIV_B2_XSCH 0x76 | |
82 | ||
83 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
84 | #define PRIV_EB_PCISTB 0xd0 |
85 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
86 | |
87 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
88 | #define PRIV_B9_CLP 0xa0 |
89 | #define PRIV_B9_PCISTG 0xd0 | |
90 | #define PRIV_B9_PCILG 0xd2 | |
91 | #define PRIV_B9_RPCIT 0xd3 | |
92 | ||
93 | #define PRIV_E3_MPCIFC 0xd0 | |
94 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 95 | |
268846ba | 96 | #define DIAG_IPL 0x308 |
0e60a699 AG |
97 | #define DIAG_KVM_HYPERCALL 0x500 |
98 | #define DIAG_KVM_BREAKPOINT 0x501 | |
99 | ||
0e60a699 | 100 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 101 | #define ICPT_PROGRAM 0x08 |
a2689242 | 102 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
103 | #define ICPT_WAITPSW 0x1c |
104 | #define ICPT_SOFT_INTERCEPT 0x24 | |
105 | #define ICPT_CPU_STOP 0x28 | |
106 | #define ICPT_IO 0x40 | |
107 | ||
770a6379 DH |
108 | static CPUWatchpoint hw_watchpoint; |
109 | /* | |
110 | * We don't use a list because this structure is also used to transmit the | |
111 | * hardware breakpoints to the kernel. | |
112 | */ | |
113 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
114 | static int nb_hw_breakpoints; | |
115 | ||
94a8d39a JK |
116 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
117 | KVM_CAP_LAST_INFO | |
118 | }; | |
119 | ||
5b08b344 | 120 | static int cap_sync_regs; |
819bd309 | 121 | static int cap_async_pf; |
5b08b344 | 122 | |
dc622deb | 123 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 124 | |
4cb88c3c DD |
125 | static int kvm_s390_check_clear_cmma(KVMState *s) |
126 | { | |
127 | struct kvm_device_attr attr = { | |
128 | .group = KVM_S390_VM_MEM_CTRL, | |
129 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
130 | }; | |
131 | ||
132 | return kvm_vm_ioctl(s, KVM_HAS_DEVICE_ATTR, &attr); | |
133 | } | |
134 | ||
135 | static int kvm_s390_check_enable_cmma(KVMState *s) | |
136 | { | |
137 | struct kvm_device_attr attr = { | |
138 | .group = KVM_S390_VM_MEM_CTRL, | |
139 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
140 | }; | |
141 | ||
142 | return kvm_vm_ioctl(s, KVM_HAS_DEVICE_ATTR, &attr); | |
143 | } | |
144 | ||
145 | void kvm_s390_clear_cmma_callback(void *opaque) | |
146 | { | |
147 | int rc; | |
148 | KVMState *s = opaque; | |
149 | struct kvm_device_attr attr = { | |
150 | .group = KVM_S390_VM_MEM_CTRL, | |
151 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
152 | }; | |
153 | ||
154 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
155 | trace_kvm_clear_cmma(rc); | |
156 | } | |
157 | ||
158 | static void kvm_s390_enable_cmma(KVMState *s) | |
159 | { | |
160 | int rc; | |
161 | struct kvm_device_attr attr = { | |
162 | .group = KVM_S390_VM_MEM_CTRL, | |
163 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
164 | }; | |
165 | ||
166 | if (kvm_s390_check_enable_cmma(s) || kvm_s390_check_clear_cmma(s)) { | |
167 | return; | |
168 | } | |
169 | ||
170 | rc = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
171 | if (!rc) { | |
172 | qemu_register_reset(kvm_s390_clear_cmma_callback, s); | |
173 | } | |
174 | trace_kvm_enable_cmma(rc); | |
175 | } | |
176 | ||
cad1e282 | 177 | int kvm_arch_init(KVMState *s) |
0e60a699 | 178 | { |
5b08b344 | 179 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 180 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
4cb88c3c DD |
181 | |
182 | if (kvm_check_extension(s, KVM_CAP_VM_ATTRIBUTES)) { | |
183 | kvm_s390_enable_cmma(s); | |
184 | } | |
185 | ||
91138037 MA |
186 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
187 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
188 | phys_mem_set_alloc(legacy_s390_alloc); | |
189 | } | |
0e60a699 AG |
190 | return 0; |
191 | } | |
192 | ||
b164e48e EH |
193 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
194 | { | |
195 | return cpu->cpu_index; | |
196 | } | |
197 | ||
c9e659c9 | 198 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 199 | { |
c9e659c9 DH |
200 | S390CPU *cpu = S390_CPU(cs); |
201 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
1c9d2a1d | 202 | return 0; |
0e60a699 AG |
203 | } |
204 | ||
50a2c6e5 | 205 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 206 | { |
50a2c6e5 PB |
207 | CPUState *cs = CPU(cpu); |
208 | ||
419831d7 AG |
209 | /* The initial reset call is needed here to reset in-kernel |
210 | * vcpu data that we can't access directly from QEMU | |
211 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
212 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
213 | * code (kvm-all) */ | |
50a2c6e5 | 214 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
99607144 | 215 | error_report("Initial CPU reset failed on CPU %i\n", cs->cpu_index); |
70bada03 | 216 | } |
0e60a699 AG |
217 | } |
218 | ||
fdb78ec0 DH |
219 | static int can_sync_regs(CPUState *cs, int regs) |
220 | { | |
221 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
222 | } | |
223 | ||
20d695a9 | 224 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 225 | { |
20d695a9 AF |
226 | S390CPU *cpu = S390_CPU(cs); |
227 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 228 | struct kvm_sregs sregs; |
0e60a699 | 229 | struct kvm_regs regs; |
e6eef7c2 | 230 | struct kvm_fpu fpu = {}; |
860643bc | 231 | int r; |
0e60a699 AG |
232 | int i; |
233 | ||
5b08b344 | 234 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
235 | cs->kvm_run->psw_addr = env->psw.addr; |
236 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 237 | |
fdb78ec0 | 238 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 239 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
240 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
241 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
242 | } |
243 | } else { | |
244 | for (i = 0; i < 16; i++) { | |
245 | regs.gprs[i] = env->regs[i]; | |
246 | } | |
860643bc CB |
247 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
248 | if (r < 0) { | |
249 | return r; | |
5b08b344 | 250 | } |
0e60a699 AG |
251 | } |
252 | ||
85ad6230 JH |
253 | /* Floating point */ |
254 | for (i = 0; i < 16; i++) { | |
255 | fpu.fprs[i] = env->fregs[i].ll; | |
256 | } | |
257 | fpu.fpc = env->fpc; | |
258 | ||
259 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); | |
260 | if (r < 0) { | |
261 | return r; | |
262 | } | |
263 | ||
44c68de0 DD |
264 | /* Do we need to save more than that? */ |
265 | if (level == KVM_PUT_RUNTIME_STATE) { | |
266 | return 0; | |
267 | } | |
420840e5 | 268 | |
59ac1532 DH |
269 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
270 | cs->kvm_run->s.regs.cputm = env->cputm; | |
271 | cs->kvm_run->s.regs.ckc = env->ckc; | |
272 | cs->kvm_run->s.regs.todpr = env->todpr; | |
273 | cs->kvm_run->s.regs.gbea = env->gbea; | |
274 | cs->kvm_run->s.regs.pp = env->pp; | |
275 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
276 | } else { | |
277 | /* | |
278 | * These ONE_REGS are not protected by a capability. As they are only | |
279 | * necessary for migration we just trace a possible error, but don't | |
280 | * return with an error return code. | |
281 | */ | |
282 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
283 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
284 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
285 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
286 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
287 | } | |
288 | ||
289 | /* pfault parameters */ | |
290 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
291 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
292 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
293 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
294 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
295 | } else if (cap_async_pf) { | |
860643bc CB |
296 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
297 | if (r < 0) { | |
298 | return r; | |
819bd309 | 299 | } |
860643bc CB |
300 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
301 | if (r < 0) { | |
302 | return r; | |
819bd309 | 303 | } |
860643bc CB |
304 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
305 | if (r < 0) { | |
306 | return r; | |
819bd309 DD |
307 | } |
308 | } | |
309 | ||
fdb78ec0 DH |
310 | /* access registers and control registers*/ |
311 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 312 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
313 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
314 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 315 | } |
f7575c96 AF |
316 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
317 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
318 | } else { |
319 | for (i = 0; i < 16; i++) { | |
320 | sregs.acrs[i] = env->aregs[i]; | |
321 | sregs.crs[i] = env->cregs[i]; | |
322 | } | |
860643bc CB |
323 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
324 | if (r < 0) { | |
325 | return r; | |
5b08b344 CB |
326 | } |
327 | } | |
0e60a699 | 328 | |
5b08b344 | 329 | /* Finally the prefix */ |
fdb78ec0 | 330 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
331 | cs->kvm_run->s.regs.prefix = env->psa; |
332 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
333 | } else { |
334 | /* prefix is only supported via sync regs */ | |
335 | } | |
336 | return 0; | |
0e60a699 AG |
337 | } |
338 | ||
20d695a9 | 339 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
340 | { |
341 | S390CPU *cpu = S390_CPU(cs); | |
342 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 343 | struct kvm_sregs sregs; |
0e60a699 | 344 | struct kvm_regs regs; |
85ad6230 | 345 | struct kvm_fpu fpu; |
44c68de0 | 346 | int i, r; |
420840e5 | 347 | |
5b08b344 | 348 | /* get the PSW */ |
f7575c96 AF |
349 | env->psw.addr = cs->kvm_run->psw_addr; |
350 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
351 | |
352 | /* the GPRS */ | |
fdb78ec0 | 353 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 354 | for (i = 0; i < 16; i++) { |
f7575c96 | 355 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
356 | } |
357 | } else { | |
44c68de0 DD |
358 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
359 | if (r < 0) { | |
360 | return r; | |
5b08b344 CB |
361 | } |
362 | for (i = 0; i < 16; i++) { | |
363 | env->regs[i] = regs.gprs[i]; | |
364 | } | |
0e60a699 AG |
365 | } |
366 | ||
5b08b344 | 367 | /* The ACRS and CRS */ |
fdb78ec0 | 368 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 369 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
370 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
371 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
372 | } |
373 | } else { | |
44c68de0 DD |
374 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
375 | if (r < 0) { | |
376 | return r; | |
5b08b344 CB |
377 | } |
378 | for (i = 0; i < 16; i++) { | |
379 | env->aregs[i] = sregs.acrs[i]; | |
380 | env->cregs[i] = sregs.crs[i]; | |
381 | } | |
0e60a699 AG |
382 | } |
383 | ||
85ad6230 JH |
384 | /* Floating point */ |
385 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
386 | if (r < 0) { | |
387 | return r; | |
388 | } | |
389 | for (i = 0; i < 16; i++) { | |
390 | env->fregs[i].ll = fpu.fprs[i]; | |
391 | } | |
392 | env->fpc = fpu.fpc; | |
393 | ||
44c68de0 | 394 | /* The prefix */ |
fdb78ec0 | 395 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 396 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 397 | } |
0e60a699 | 398 | |
59ac1532 DH |
399 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
400 | env->cputm = cs->kvm_run->s.regs.cputm; | |
401 | env->ckc = cs->kvm_run->s.regs.ckc; | |
402 | env->todpr = cs->kvm_run->s.regs.todpr; | |
403 | env->gbea = cs->kvm_run->s.regs.gbea; | |
404 | env->pp = cs->kvm_run->s.regs.pp; | |
405 | } else { | |
406 | /* | |
407 | * These ONE_REGS are not protected by a capability. As they are only | |
408 | * necessary for migration we just trace a possible error, but don't | |
409 | * return with an error return code. | |
410 | */ | |
411 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
412 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
413 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
414 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
415 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
416 | } | |
417 | ||
418 | /* pfault parameters */ | |
419 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
420 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
421 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
422 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
423 | } else if (cap_async_pf) { | |
860643bc | 424 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
425 | if (r < 0) { |
426 | return r; | |
427 | } | |
860643bc | 428 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
429 | if (r < 0) { |
430 | return r; | |
431 | } | |
860643bc | 432 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
433 | if (r < 0) { |
434 | return r; | |
435 | } | |
436 | } | |
437 | ||
0e60a699 AG |
438 | return 0; |
439 | } | |
440 | ||
fdec9918 CB |
441 | /* |
442 | * Legacy layout for s390: | |
443 | * Older S390 KVM requires the topmost vma of the RAM to be | |
444 | * smaller than an system defined value, which is at least 256GB. | |
445 | * Larger systems have larger values. We put the guest between | |
446 | * the end of data segment (system break) and this value. We | |
447 | * use 32GB as a base to have enough room for the system break | |
448 | * to grow. We also have to use MAP parameters that avoid | |
449 | * read-only mapping of guest pages. | |
450 | */ | |
dc622deb | 451 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
452 | { |
453 | void *mem; | |
454 | ||
455 | mem = mmap((void *) 0x800000000ULL, size, | |
456 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
457 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 458 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
459 | } |
460 | ||
8e4e86af DH |
461 | /* DIAG 501 is used for sw breakpoints */ |
462 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
463 | ||
20d695a9 | 464 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 465 | { |
0e60a699 | 466 | |
8e4e86af DH |
467 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
468 | sizeof(diag_501), 0) || | |
469 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)diag_501, | |
470 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
471 | return -EINVAL; |
472 | } | |
473 | return 0; | |
474 | } | |
475 | ||
20d695a9 | 476 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 477 | { |
8e4e86af | 478 | uint8_t t[sizeof(diag_501)]; |
0e60a699 | 479 | |
8e4e86af | 480 | if (cpu_memory_rw_debug(cs, bp->pc, t, sizeof(diag_501), 0)) { |
0e60a699 | 481 | return -EINVAL; |
8e4e86af | 482 | } else if (memcmp(t, diag_501, sizeof(diag_501))) { |
0e60a699 | 483 | return -EINVAL; |
8e4e86af DH |
484 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
485 | sizeof(diag_501), 1)) { | |
0e60a699 AG |
486 | return -EINVAL; |
487 | } | |
488 | ||
489 | return 0; | |
490 | } | |
491 | ||
770a6379 DH |
492 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
493 | int len, int type) | |
494 | { | |
495 | int n; | |
496 | ||
497 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
498 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
499 | (hw_breakpoints[n].len == len || len == -1)) { | |
500 | return &hw_breakpoints[n]; | |
501 | } | |
502 | } | |
503 | ||
504 | return NULL; | |
505 | } | |
506 | ||
507 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
508 | { | |
509 | int size; | |
510 | ||
511 | if (find_hw_breakpoint(addr, len, type)) { | |
512 | return -EEXIST; | |
513 | } | |
514 | ||
515 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
516 | ||
517 | if (!hw_breakpoints) { | |
518 | nb_hw_breakpoints = 0; | |
519 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
520 | } else { | |
521 | hw_breakpoints = | |
522 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
523 | } | |
524 | ||
525 | if (!hw_breakpoints) { | |
526 | nb_hw_breakpoints = 0; | |
527 | return -ENOMEM; | |
528 | } | |
529 | ||
530 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
531 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
532 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
533 | ||
534 | nb_hw_breakpoints++; | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
8c012449 DH |
539 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
540 | target_ulong len, int type) | |
541 | { | |
770a6379 DH |
542 | switch (type) { |
543 | case GDB_BREAKPOINT_HW: | |
544 | type = KVM_HW_BP; | |
545 | break; | |
546 | case GDB_WATCHPOINT_WRITE: | |
547 | if (len < 1) { | |
548 | return -EINVAL; | |
549 | } | |
550 | type = KVM_HW_WP_WRITE; | |
551 | break; | |
552 | default: | |
553 | return -ENOSYS; | |
554 | } | |
555 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
556 | } |
557 | ||
558 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
559 | target_ulong len, int type) | |
560 | { | |
770a6379 DH |
561 | int size; |
562 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
563 | ||
564 | if (bp == NULL) { | |
565 | return -ENOENT; | |
566 | } | |
567 | ||
568 | nb_hw_breakpoints--; | |
569 | if (nb_hw_breakpoints > 0) { | |
570 | /* | |
571 | * In order to trim the array, move the last element to the position to | |
572 | * be removed - if necessary. | |
573 | */ | |
574 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
575 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
576 | } | |
577 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
578 | hw_breakpoints = | |
579 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
580 | } else { | |
581 | g_free(hw_breakpoints); | |
582 | hw_breakpoints = NULL; | |
583 | } | |
584 | ||
585 | return 0; | |
8c012449 DH |
586 | } |
587 | ||
588 | void kvm_arch_remove_all_hw_breakpoints(void) | |
589 | { | |
770a6379 DH |
590 | nb_hw_breakpoints = 0; |
591 | g_free(hw_breakpoints); | |
592 | hw_breakpoints = NULL; | |
8c012449 DH |
593 | } |
594 | ||
595 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
596 | { | |
770a6379 DH |
597 | int i; |
598 | ||
599 | if (nb_hw_breakpoints > 0) { | |
600 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
601 | dbg->arch.hw_bp = hw_breakpoints; | |
602 | ||
603 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
604 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
605 | hw_breakpoints[i].addr); | |
606 | } | |
607 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
608 | } else { | |
609 | dbg->arch.nr_hw_bp = 0; | |
610 | dbg->arch.hw_bp = NULL; | |
611 | } | |
8c012449 DH |
612 | } |
613 | ||
20d695a9 | 614 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 615 | { |
0e60a699 AG |
616 | } |
617 | ||
20d695a9 | 618 | void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 619 | { |
0e60a699 AG |
620 | } |
621 | ||
20d695a9 | 622 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 623 | { |
225dc991 | 624 | return cs->halted; |
0af691d7 MT |
625 | } |
626 | ||
66ad0893 CH |
627 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
628 | struct kvm_s390_interrupt *interrupt) | |
629 | { | |
630 | int r = 0; | |
631 | ||
632 | interrupt->type = irq->type; | |
633 | switch (irq->type) { | |
634 | case KVM_S390_INT_VIRTIO: | |
635 | interrupt->parm = irq->u.ext.ext_params; | |
636 | /* fall through */ | |
637 | case KVM_S390_INT_PFAULT_INIT: | |
638 | case KVM_S390_INT_PFAULT_DONE: | |
639 | interrupt->parm64 = irq->u.ext.ext_params2; | |
640 | break; | |
641 | case KVM_S390_PROGRAM_INT: | |
642 | interrupt->parm = irq->u.pgm.code; | |
643 | break; | |
644 | case KVM_S390_SIGP_SET_PREFIX: | |
645 | interrupt->parm = irq->u.prefix.address; | |
646 | break; | |
647 | case KVM_S390_INT_SERVICE: | |
648 | interrupt->parm = irq->u.ext.ext_params; | |
649 | break; | |
650 | case KVM_S390_MCHK: | |
651 | interrupt->parm = irq->u.mchk.cr14; | |
652 | interrupt->parm64 = irq->u.mchk.mcic; | |
653 | break; | |
654 | case KVM_S390_INT_EXTERNAL_CALL: | |
655 | interrupt->parm = irq->u.extcall.code; | |
656 | break; | |
657 | case KVM_S390_INT_EMERGENCY: | |
658 | interrupt->parm = irq->u.emerg.code; | |
659 | break; | |
660 | case KVM_S390_SIGP_STOP: | |
661 | case KVM_S390_RESTART: | |
662 | break; /* These types have no parameters */ | |
663 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
664 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
665 | interrupt->parm |= irq->u.io.subchannel_nr; | |
666 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
667 | interrupt->parm64 |= irq->u.io.io_int_word; | |
668 | break; | |
669 | default: | |
670 | r = -EINVAL; | |
671 | break; | |
672 | } | |
673 | return r; | |
674 | } | |
675 | ||
676 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) | |
677 | { | |
678 | struct kvm_s390_interrupt kvmint = {}; | |
679 | CPUState *cs = CPU(cpu); | |
680 | int r; | |
681 | ||
682 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
683 | if (r < 0) { | |
684 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
685 | exit(1); | |
686 | } | |
687 | ||
688 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
689 | if (r < 0) { | |
690 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
691 | exit(1); | |
692 | } | |
693 | } | |
694 | ||
bbd8bb8e | 695 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
696 | { |
697 | struct kvm_s390_interrupt kvmint = {}; | |
698 | int r; | |
699 | ||
700 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
701 | if (r < 0) { | |
702 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
703 | exit(1); | |
704 | } | |
705 | ||
706 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
707 | if (r < 0) { | |
708 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
709 | exit(1); | |
710 | } | |
711 | } | |
712 | ||
bbd8bb8e CH |
713 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
714 | { | |
715 | static bool use_flic = true; | |
716 | int r; | |
717 | ||
718 | if (use_flic) { | |
719 | r = kvm_s390_inject_flic(irq); | |
720 | if (r == -ENOSYS) { | |
721 | use_flic = false; | |
722 | } | |
723 | if (!r) { | |
724 | return; | |
725 | } | |
726 | } | |
727 | __kvm_s390_floating_interrupt(irq); | |
728 | } | |
729 | ||
de13d216 | 730 | void kvm_s390_virtio_irq(int config_change, uint64_t token) |
0e60a699 | 731 | { |
de13d216 CH |
732 | struct kvm_s390_irq irq = { |
733 | .type = KVM_S390_INT_VIRTIO, | |
734 | .u.ext.ext_params = config_change, | |
735 | .u.ext.ext_params2 = token, | |
736 | }; | |
0e60a699 | 737 | |
de13d216 | 738 | kvm_s390_floating_interrupt(&irq); |
0e60a699 AG |
739 | } |
740 | ||
de13d216 | 741 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 742 | { |
de13d216 CH |
743 | struct kvm_s390_irq irq = { |
744 | .type = KVM_S390_INT_SERVICE, | |
745 | .u.ext.ext_params = parm, | |
746 | }; | |
0e60a699 | 747 | |
de13d216 | 748 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
749 | } |
750 | ||
1bc22652 | 751 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 752 | { |
de13d216 CH |
753 | struct kvm_s390_irq irq = { |
754 | .type = KVM_S390_PROGRAM_INT, | |
755 | .u.pgm.code = code, | |
756 | }; | |
757 | ||
758 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
759 | } |
760 | ||
801cdd35 TH |
761 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
762 | { | |
763 | struct kvm_s390_irq irq = { | |
764 | .type = KVM_S390_PROGRAM_INT, | |
765 | .u.pgm.code = code, | |
766 | .u.pgm.trans_exc_code = te_code, | |
767 | .u.pgm.exc_access_id = te_code & 3, | |
768 | }; | |
769 | ||
770 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
771 | } | |
772 | ||
1bc22652 | 773 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 774 | uint16_t ipbh0) |
0e60a699 | 775 | { |
1bc22652 | 776 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
777 | uint64_t sccb; |
778 | uint32_t code; | |
0e60a699 AG |
779 | int r = 0; |
780 | ||
cb446eca | 781 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
782 | sccb = env->regs[ipbh0 & 0xf]; |
783 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
784 | ||
6e252802 | 785 | r = sclp_service_call(env, sccb, code); |
9abf567d | 786 | if (r < 0) { |
1bc22652 | 787 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
788 | } else { |
789 | setcc(cpu, r); | |
0e60a699 | 790 | } |
81f7c56c | 791 | |
0e60a699 AG |
792 | return 0; |
793 | } | |
794 | ||
1eecf41b | 795 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 796 | { |
09b99878 | 797 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
798 | int rc = 0; |
799 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 800 | |
44c68de0 | 801 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 802 | |
09b99878 | 803 | switch (ipa1) { |
1eecf41b | 804 | case PRIV_B2_XSCH: |
5d9bf1c0 | 805 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 806 | break; |
1eecf41b | 807 | case PRIV_B2_CSCH: |
5d9bf1c0 | 808 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 809 | break; |
1eecf41b | 810 | case PRIV_B2_HSCH: |
5d9bf1c0 | 811 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 812 | break; |
1eecf41b | 813 | case PRIV_B2_MSCH: |
5d9bf1c0 | 814 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 815 | break; |
1eecf41b | 816 | case PRIV_B2_SSCH: |
5d9bf1c0 | 817 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 818 | break; |
1eecf41b | 819 | case PRIV_B2_STCRW: |
5d9bf1c0 | 820 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 821 | break; |
1eecf41b | 822 | case PRIV_B2_STSCH: |
5d9bf1c0 | 823 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 824 | break; |
1eecf41b | 825 | case PRIV_B2_TSCH: |
09b99878 CH |
826 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
827 | fprintf(stderr, "Spurious tsch intercept\n"); | |
828 | break; | |
1eecf41b | 829 | case PRIV_B2_CHSC: |
5d9bf1c0 | 830 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 831 | break; |
1eecf41b | 832 | case PRIV_B2_TPI: |
09b99878 CH |
833 | /* This should have been handled by kvm already. */ |
834 | fprintf(stderr, "Spurious tpi intercept\n"); | |
835 | break; | |
1eecf41b | 836 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
837 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
838 | run->s390_sieic.ipb); | |
09b99878 | 839 | break; |
1eecf41b | 840 | case PRIV_B2_RSCH: |
5d9bf1c0 | 841 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 842 | break; |
1eecf41b | 843 | case PRIV_B2_RCHP: |
5d9bf1c0 | 844 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 845 | break; |
1eecf41b | 846 | case PRIV_B2_STCPS: |
09b99878 | 847 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 848 | break; |
1eecf41b | 849 | case PRIV_B2_SAL: |
5d9bf1c0 | 850 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 851 | break; |
1eecf41b | 852 | case PRIV_B2_SIGA: |
c1e8dfb5 | 853 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 854 | setcc(cpu, 3); |
09b99878 | 855 | break; |
1eecf41b FB |
856 | case PRIV_B2_SCLP_CALL: |
857 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
858 | break; | |
c1e8dfb5 | 859 | default: |
1eecf41b FB |
860 | rc = -1; |
861 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
862 | break; | |
09b99878 CH |
863 | } |
864 | ||
1eecf41b | 865 | return rc; |
09b99878 CH |
866 | } |
867 | ||
863f6f52 FB |
868 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run) |
869 | { | |
870 | CPUS390XState *env = &cpu->env; | |
871 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
872 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
873 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
874 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
875 | ||
876 | if (disp2 & 0x80000) { | |
877 | disp2 += 0xfff00000; | |
878 | } | |
879 | ||
880 | return (base2 ? env->regs[base2] : 0) + | |
881 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
882 | } | |
883 | ||
884 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run) | |
885 | { | |
886 | CPUS390XState *env = &cpu->env; | |
887 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
888 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
889 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
890 | ||
891 | if (disp2 & 0x80000) { | |
892 | disp2 += 0xfff00000; | |
893 | } | |
894 | ||
895 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
896 | } | |
897 | ||
898 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
899 | { | |
900 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
901 | ||
902 | return clp_service_call(cpu, r2); | |
903 | } | |
904 | ||
905 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
906 | { | |
907 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
908 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
909 | ||
910 | return pcilg_service_call(cpu, r1, r2); | |
911 | } | |
912 | ||
913 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
914 | { | |
915 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
916 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
917 | ||
918 | return pcistg_service_call(cpu, r1, r2); | |
919 | } | |
920 | ||
921 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
922 | { | |
923 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
924 | uint64_t fiba; | |
925 | ||
926 | cpu_synchronize_state(CPU(cpu)); | |
927 | fiba = get_base_disp_rxy(cpu, run); | |
928 | ||
929 | return stpcifc_service_call(cpu, r1, fiba); | |
930 | } | |
931 | ||
932 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
933 | { | |
934 | /* NOOP */ | |
935 | return 0; | |
936 | } | |
937 | ||
938 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
939 | { | |
940 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
941 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
942 | ||
943 | return rpcit_service_call(cpu, r1, r2); | |
944 | } | |
945 | ||
946 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
947 | { | |
948 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
949 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
950 | uint64_t gaddr; | |
951 | ||
952 | cpu_synchronize_state(CPU(cpu)); | |
953 | gaddr = get_base_disp_rsy(cpu, run); | |
954 | ||
955 | return pcistb_service_call(cpu, r1, r3, gaddr); | |
956 | } | |
957 | ||
958 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
959 | { | |
960 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
961 | uint64_t fiba; | |
962 | ||
963 | cpu_synchronize_state(CPU(cpu)); | |
964 | fiba = get_base_disp_rxy(cpu, run); | |
965 | ||
966 | return mpcifc_service_call(cpu, r1, fiba); | |
967 | } | |
968 | ||
1eecf41b | 969 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
970 | { |
971 | int r = 0; | |
0e60a699 | 972 | |
0e60a699 | 973 | switch (ipa1) { |
863f6f52 FB |
974 | case PRIV_B9_CLP: |
975 | r = kvm_clp_service_call(cpu, run); | |
976 | break; | |
977 | case PRIV_B9_PCISTG: | |
978 | r = kvm_pcistg_service_call(cpu, run); | |
979 | break; | |
980 | case PRIV_B9_PCILG: | |
981 | r = kvm_pcilg_service_call(cpu, run); | |
982 | break; | |
983 | case PRIV_B9_RPCIT: | |
984 | r = kvm_rpcit_service_call(cpu, run); | |
985 | break; | |
1eecf41b FB |
986 | case PRIV_B9_EQBS: |
987 | /* just inject exception */ | |
988 | r = -1; | |
989 | break; | |
990 | default: | |
991 | r = -1; | |
992 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
993 | break; | |
994 | } | |
995 | ||
996 | return r; | |
997 | } | |
998 | ||
80765f07 | 999 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1000 | { |
1001 | int r = 0; | |
1002 | ||
80765f07 | 1003 | switch (ipbl) { |
863f6f52 FB |
1004 | case PRIV_EB_PCISTB: |
1005 | r = kvm_pcistb_service_call(cpu, run); | |
1006 | break; | |
1007 | case PRIV_EB_SIC: | |
1008 | r = kvm_sic_service_call(cpu, run); | |
1009 | break; | |
1eecf41b FB |
1010 | case PRIV_EB_SQBS: |
1011 | /* just inject exception */ | |
1012 | r = -1; | |
1013 | break; | |
1014 | default: | |
1015 | r = -1; | |
80765f07 | 1016 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1017 | break; |
0e60a699 AG |
1018 | } |
1019 | ||
1020 | return r; | |
1021 | } | |
1022 | ||
863f6f52 FB |
1023 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1024 | { | |
1025 | int r = 0; | |
1026 | ||
1027 | switch (ipbl) { | |
1028 | case PRIV_E3_MPCIFC: | |
1029 | r = kvm_mpcifc_service_call(cpu, run); | |
1030 | break; | |
1031 | case PRIV_E3_STPCIFC: | |
1032 | r = kvm_stpcifc_service_call(cpu, run); | |
1033 | break; | |
1034 | default: | |
1035 | r = -1; | |
1036 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1037 | break; | |
1038 | } | |
1039 | ||
1040 | return r; | |
1041 | } | |
1042 | ||
4fd6dd06 | 1043 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1044 | { |
4fd6dd06 | 1045 | CPUS390XState *env = &cpu->env; |
77319f22 | 1046 | int ret; |
3474b679 | 1047 | |
44c68de0 | 1048 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1049 | ret = s390_virtio_hypercall(env); |
1050 | if (ret == -EINVAL) { | |
1051 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1052 | return 0; | |
1053 | } | |
0e60a699 | 1054 | |
77319f22 | 1055 | return ret; |
0e60a699 AG |
1056 | } |
1057 | ||
268846ba ED |
1058 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1059 | { | |
1060 | uint64_t r1, r3; | |
1061 | ||
1062 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1063 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1064 | r3 = run->s390_sieic.ipa & 0x000f; |
1065 | handle_diag_308(&cpu->env, r1, r3); | |
1066 | } | |
1067 | ||
b30f4dfb DH |
1068 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1069 | { | |
1070 | CPUS390XState *env = &cpu->env; | |
1071 | unsigned long pc; | |
1072 | ||
1073 | cpu_synchronize_state(CPU(cpu)); | |
1074 | ||
1075 | pc = env->psw.addr - 4; | |
1076 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { | |
1077 | env->psw.addr = pc; | |
1078 | return EXCP_DEBUG; | |
1079 | } | |
1080 | ||
1081 | return -ENOENT; | |
1082 | } | |
1083 | ||
638129ff CH |
1084 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1085 | ||
1086 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1087 | { |
1088 | int r = 0; | |
638129ff CH |
1089 | uint16_t func_code; |
1090 | ||
1091 | /* | |
1092 | * For any diagnose call we support, bits 48-63 of the resulting | |
1093 | * address specify the function code; the remainder is ignored. | |
1094 | */ | |
1095 | func_code = decode_basedisp_rs(&cpu->env, ipb) & DIAG_KVM_CODE_MASK; | |
1096 | switch (func_code) { | |
268846ba ED |
1097 | case DIAG_IPL: |
1098 | kvm_handle_diag_308(cpu, run); | |
1099 | break; | |
39fbc5c6 CB |
1100 | case DIAG_KVM_HYPERCALL: |
1101 | r = handle_hypercall(cpu, run); | |
1102 | break; | |
1103 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1104 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1105 | break; |
1106 | default: | |
638129ff | 1107 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1108 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1109 | break; |
0e60a699 AG |
1110 | } |
1111 | ||
1112 | return r; | |
1113 | } | |
1114 | ||
6eb8f212 DH |
1115 | typedef struct SigpInfo { |
1116 | S390CPU *cpu; | |
22740e3f | 1117 | uint64_t param; |
6eb8f212 DH |
1118 | int cc; |
1119 | uint64_t *status_reg; | |
1120 | } SigpInfo; | |
1121 | ||
36b5c845 DH |
1122 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
1123 | { | |
1124 | *si->status_reg &= 0xffffffff00000000ULL; | |
1125 | *si->status_reg |= status; | |
1126 | si->cc = SIGP_CC_STATUS_STORED; | |
1127 | } | |
1128 | ||
6eb8f212 | 1129 | static void sigp_start(void *arg) |
b20a461f | 1130 | { |
6eb8f212 | 1131 | SigpInfo *si = arg; |
6e6ad8db | 1132 | |
4f2b55d1 DH |
1133 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { |
1134 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1135 | return; | |
1136 | } | |
1137 | ||
6eb8f212 DH |
1138 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); |
1139 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
b20a461f TH |
1140 | } |
1141 | ||
18ff9494 DH |
1142 | static void sigp_stop(void *arg) |
1143 | { | |
1144 | SigpInfo *si = arg; | |
1145 | struct kvm_s390_irq irq = { | |
1146 | .type = KVM_S390_SIGP_STOP, | |
1147 | }; | |
1148 | ||
1149 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_OPERATING) { | |
1150 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1151 | return; | |
1152 | } | |
1153 | ||
1154 | /* disabled wait - sleeping in user space */ | |
1155 | if (CPU(si->cpu)->halted) { | |
1156 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1157 | } else { | |
1158 | /* execute the stop function */ | |
1159 | si->cpu->env.sigp_order = SIGP_STOP; | |
1160 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1161 | } | |
1162 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1163 | } | |
1164 | ||
1165 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) | |
1166 | #define SAVE_AREA_SIZE 512 | |
1167 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1168 | { | |
1169 | static const uint8_t ar_id = 1; | |
1170 | uint64_t ckc = cpu->env.ckc >> 8; | |
1171 | void *mem; | |
1172 | hwaddr len = SAVE_AREA_SIZE; | |
1173 | ||
1174 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1175 | if (!mem) { | |
1176 | return -EFAULT; | |
1177 | } | |
1178 | if (len != SAVE_AREA_SIZE) { | |
1179 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1180 | return -EFAULT; | |
1181 | } | |
1182 | ||
1183 | if (store_arch) { | |
1184 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1185 | } | |
1186 | memcpy(mem, &cpu->env.fregs, 128); | |
1187 | memcpy(mem + 128, &cpu->env.regs, 128); | |
1188 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1189 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1190 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1191 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1192 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1193 | memcpy(mem + 304, &ckc, 8); | |
1194 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1195 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1196 | ||
1197 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1198 | ||
1199 | return 0; | |
1200 | } | |
1201 | ||
1202 | static void sigp_stop_and_store_status(void *arg) | |
1203 | { | |
1204 | SigpInfo *si = arg; | |
1205 | struct kvm_s390_irq irq = { | |
1206 | .type = KVM_S390_SIGP_STOP, | |
1207 | }; | |
1208 | ||
1209 | /* disabled wait - sleeping in user space */ | |
1210 | if (s390_cpu_get_state(si->cpu) == CPU_STATE_OPERATING && | |
1211 | CPU(si->cpu)->halted) { | |
1212 | s390_cpu_set_state(CPU_STATE_STOPPED, si->cpu); | |
1213 | } | |
1214 | ||
1215 | switch (s390_cpu_get_state(si->cpu)) { | |
1216 | case CPU_STATE_OPERATING: | |
1217 | si->cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; | |
1218 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1219 | /* store will be performed when handling the stop intercept */ | |
1220 | break; | |
1221 | case CPU_STATE_STOPPED: | |
1222 | /* already stopped, just store the status */ | |
1223 | cpu_synchronize_state(CPU(si->cpu)); | |
1224 | kvm_s390_store_status(si->cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
1225 | break; | |
1226 | } | |
1227 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1228 | } | |
1229 | ||
1230 | static void sigp_store_status_at_address(void *arg) | |
1231 | { | |
1232 | SigpInfo *si = arg; | |
1233 | uint32_t address = si->param & 0x7ffffe00u; | |
1234 | ||
1235 | /* cpu has to be stopped */ | |
1236 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1237 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1238 | return; | |
1239 | } | |
1240 | ||
1241 | cpu_synchronize_state(CPU(si->cpu)); | |
1242 | ||
1243 | if (kvm_s390_store_status(si->cpu, address, false)) { | |
1244 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1245 | return; | |
1246 | } | |
1247 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1248 | } | |
1249 | ||
6eb8f212 | 1250 | static void sigp_restart(void *arg) |
0e60a699 | 1251 | { |
6eb8f212 | 1252 | SigpInfo *si = arg; |
de13d216 CH |
1253 | struct kvm_s390_irq irq = { |
1254 | .type = KVM_S390_RESTART, | |
1255 | }; | |
1256 | ||
e3b7b578 DH |
1257 | switch (s390_cpu_get_state(si->cpu)) { |
1258 | case CPU_STATE_STOPPED: | |
1259 | /* the restart irq has to be delivered prior to any other pending irq */ | |
1260 | cpu_synchronize_state(CPU(si->cpu)); | |
1261 | do_restart_interrupt(&si->cpu->env); | |
1262 | s390_cpu_set_state(CPU_STATE_OPERATING, si->cpu); | |
1263 | break; | |
1264 | case CPU_STATE_OPERATING: | |
1265 | kvm_s390_vcpu_interrupt(si->cpu, &irq); | |
1266 | break; | |
1267 | } | |
6eb8f212 | 1268 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1269 | } |
1270 | ||
1271 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1272 | { | |
6eb8f212 DH |
1273 | SigpInfo si = { |
1274 | .cpu = cpu, | |
1275 | }; | |
1276 | ||
1277 | run_on_cpu(CPU(cpu), sigp_restart, &si); | |
7f7f9752 | 1278 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1279 | return 0; |
1280 | } | |
1281 | ||
f7d3e466 | 1282 | static void sigp_initial_cpu_reset(void *arg) |
0e60a699 | 1283 | { |
6eb8f212 DH |
1284 | SigpInfo *si = arg; |
1285 | CPUState *cs = CPU(si->cpu); | |
1286 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
1287 | ||
1288 | cpu_synchronize_state(cs); | |
1289 | scc->initial_cpu_reset(cs); | |
1290 | cpu_synchronize_post_reset(cs); | |
1291 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1292 | } |
1293 | ||
04c2b516 TH |
1294 | static void sigp_cpu_reset(void *arg) |
1295 | { | |
6eb8f212 DH |
1296 | SigpInfo *si = arg; |
1297 | CPUState *cs = CPU(si->cpu); | |
1298 | S390CPUClass *scc = S390_CPU_GET_CLASS(si->cpu); | |
1299 | ||
1300 | cpu_synchronize_state(cs); | |
1301 | scc->cpu_reset(cs); | |
1302 | cpu_synchronize_post_reset(cs); | |
1303 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1304 | } | |
1305 | ||
18ff9494 DH |
1306 | static void sigp_set_prefix(void *arg) |
1307 | { | |
1308 | SigpInfo *si = arg; | |
1309 | uint32_t addr = si->param & 0x7fffe000u; | |
1310 | ||
1311 | cpu_synchronize_state(CPU(si->cpu)); | |
1312 | ||
1313 | if (!address_space_access_valid(&address_space_memory, addr, | |
1314 | sizeof(struct LowCore), false)) { | |
1315 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1316 | return; | |
1317 | } | |
1318 | ||
1319 | /* cpu has to be stopped */ | |
1320 | if (s390_cpu_get_state(si->cpu) != CPU_STATE_STOPPED) { | |
1321 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); | |
1322 | return; | |
1323 | } | |
1324 | ||
1325 | si->cpu->env.psa = addr; | |
1326 | cpu_synchronize_post_init(CPU(si->cpu)); | |
1327 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1328 | } | |
1329 | ||
6eb8f212 | 1330 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1331 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1332 | { |
1333 | SigpInfo si = { | |
1334 | .cpu = dst_cpu, | |
22740e3f | 1335 | .param = param, |
6eb8f212 DH |
1336 | .status_reg = status_reg, |
1337 | }; | |
1338 | ||
1339 | /* cpu available? */ | |
1340 | if (dst_cpu == NULL) { | |
1341 | return SIGP_CC_NOT_OPERATIONAL; | |
1342 | } | |
1343 | ||
18ff9494 DH |
1344 | /* only resets can break pending orders */ |
1345 | if (dst_cpu->env.sigp_order != 0 && | |
1346 | order != SIGP_CPU_RESET && | |
1347 | order != SIGP_INITIAL_CPU_RESET) { | |
1348 | return SIGP_CC_BUSY; | |
1349 | } | |
1350 | ||
6eb8f212 DH |
1351 | switch (order) { |
1352 | case SIGP_START: | |
1353 | run_on_cpu(CPU(dst_cpu), sigp_start, &si); | |
1354 | break; | |
18ff9494 DH |
1355 | case SIGP_STOP: |
1356 | run_on_cpu(CPU(dst_cpu), sigp_stop, &si); | |
1357 | break; | |
6eb8f212 DH |
1358 | case SIGP_RESTART: |
1359 | run_on_cpu(CPU(dst_cpu), sigp_restart, &si); | |
18ff9494 DH |
1360 | break; |
1361 | case SIGP_STOP_STORE_STATUS: | |
1362 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, &si); | |
1363 | break; | |
1364 | case SIGP_STORE_STATUS_ADDR: | |
1365 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, &si); | |
1366 | break; | |
1367 | case SIGP_SET_PREFIX: | |
1368 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, &si); | |
1369 | break; | |
6eb8f212 DH |
1370 | case SIGP_INITIAL_CPU_RESET: |
1371 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, &si); | |
1372 | break; | |
1373 | case SIGP_CPU_RESET: | |
1374 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, &si); | |
1375 | break; | |
1376 | default: | |
1377 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); | |
36b5c845 | 1378 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1379 | } |
04c2b516 | 1380 | |
6eb8f212 | 1381 | return si.cc; |
04c2b516 TH |
1382 | } |
1383 | ||
18ff9494 DH |
1384 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1385 | uint64_t *status_reg) | |
1386 | { | |
1387 | CPUState *cur_cs; | |
1388 | S390CPU *cur_cpu; | |
1389 | ||
1390 | /* due to the BQL, we are the only active cpu */ | |
1391 | CPU_FOREACH(cur_cs) { | |
1392 | cur_cpu = S390_CPU(cur_cs); | |
1393 | if (cur_cpu->env.sigp_order != 0) { | |
1394 | return SIGP_CC_BUSY; | |
1395 | } | |
1396 | cpu_synchronize_state(cur_cs); | |
1397 | /* all but the current one have to be stopped */ | |
1398 | if (cur_cpu != cpu && | |
1399 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1400 | *status_reg &= 0xffffffff00000000ULL; | |
1401 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1402 | return SIGP_CC_STATUS_STORED; | |
1403 | } | |
1404 | } | |
1405 | ||
1406 | switch (param & 0xff) { | |
1407 | case SIGP_MODE_ESA_S390: | |
1408 | /* not supported */ | |
1409 | return SIGP_CC_NOT_OPERATIONAL; | |
1410 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1411 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1412 | CPU_FOREACH(cur_cs) { | |
1413 | cur_cpu = S390_CPU(cur_cs); | |
1414 | cur_cpu->env.pfault_token = -1UL; | |
1415 | } | |
1416 | break; | |
1417 | default: | |
1418 | *status_reg &= 0xffffffff00000000ULL; | |
1419 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1420 | return SIGP_CC_STATUS_STORED; | |
1421 | } | |
1422 | ||
1423 | return SIGP_CC_ORDER_CODE_ACCEPTED; | |
1424 | } | |
1425 | ||
b8031adb TH |
1426 | #define SIGP_ORDER_MASK 0x000000ff |
1427 | ||
f7575c96 | 1428 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1429 | { |
f7575c96 | 1430 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1431 | const uint8_t r1 = ipa1 >> 4; |
1432 | const uint8_t r3 = ipa1 & 0x0f; | |
1433 | int ret; | |
1434 | uint8_t order; | |
1435 | uint64_t *status_reg; | |
22740e3f | 1436 | uint64_t param; |
6eb8f212 | 1437 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1438 | |
cb446eca | 1439 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1440 | |
1441 | /* get order code */ | |
6eb8f212 DH |
1442 | order = decode_basedisp_rs(env, run->s390_sieic.ipb) & SIGP_ORDER_MASK; |
1443 | status_reg = &env->regs[r1]; | |
22740e3f | 1444 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1445 | |
6eb8f212 | 1446 | switch (order) { |
0b9972a2 | 1447 | case SIGP_SET_ARCH: |
18ff9494 | 1448 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1449 | break; |
0b9972a2 | 1450 | default: |
6eb8f212 DH |
1451 | /* all other sigp orders target a single vcpu */ |
1452 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1453 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 AG |
1454 | } |
1455 | ||
56dba22b DH |
1456 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1457 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1458 | ||
6eb8f212 DH |
1459 | if (ret >= 0) { |
1460 | setcc(cpu, ret); | |
1461 | return 0; | |
1462 | } | |
1463 | ||
1464 | return ret; | |
0e60a699 AG |
1465 | } |
1466 | ||
b30f4dfb | 1467 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1468 | { |
1469 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1470 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1471 | int r = -1; |
0e60a699 | 1472 | |
e67137c6 PM |
1473 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1474 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1475 | switch (ipa0) { |
09b99878 | 1476 | case IPA0_B2: |
1eecf41b FB |
1477 | r = handle_b2(cpu, run, ipa1); |
1478 | break; | |
09b99878 | 1479 | case IPA0_B9: |
1eecf41b FB |
1480 | r = handle_b9(cpu, run, ipa1); |
1481 | break; | |
09b99878 | 1482 | case IPA0_EB: |
80765f07 | 1483 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1484 | break; |
863f6f52 FB |
1485 | case IPA0_E3: |
1486 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1487 | break; | |
09b99878 | 1488 | case IPA0_DIAG: |
638129ff | 1489 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1490 | break; |
1491 | case IPA0_SIGP: | |
1492 | r = handle_sigp(cpu, run, ipa1); | |
1493 | break; | |
0e60a699 AG |
1494 | } |
1495 | ||
1496 | if (r < 0) { | |
b30f4dfb | 1497 | r = 0; |
1bc22652 | 1498 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1499 | } |
b30f4dfb DH |
1500 | |
1501 | return r; | |
0e60a699 AG |
1502 | } |
1503 | ||
f7575c96 | 1504 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1505 | { |
1506 | /* signal quiesce */ | |
f7575c96 | 1507 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1508 | } |
1509 | ||
a2689242 TH |
1510 | static void guest_panicked(void) |
1511 | { | |
3a449690 WX |
1512 | qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, |
1513 | &error_abort); | |
a2689242 TH |
1514 | vm_stop(RUN_STATE_GUEST_PANICKED); |
1515 | } | |
1516 | ||
1517 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) | |
1518 | { | |
1519 | CPUState *cs = CPU(cpu); | |
1520 | ||
1521 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1522 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1523 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1524 | s390_cpu_halt(cpu); |
a2689242 TH |
1525 | guest_panicked(); |
1526 | } | |
1527 | ||
1bc22652 | 1528 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1529 | { |
f7575c96 AF |
1530 | CPUState *cs = CPU(cpu); |
1531 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1532 | int icpt_code = run->s390_sieic.icptcode; |
1533 | int r = 0; | |
1534 | ||
e67137c6 | 1535 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1536 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1537 | switch (icpt_code) { |
1538 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1539 | r = handle_instruction(cpu, run); |
0e60a699 | 1540 | break; |
6449a41a TH |
1541 | case ICPT_PROGRAM: |
1542 | unmanageable_intercept(cpu, "program interrupt", | |
1543 | offsetof(LowCore, program_new_psw)); | |
1544 | r = EXCP_HALTED; | |
1545 | break; | |
a2689242 TH |
1546 | case ICPT_EXT_INT: |
1547 | unmanageable_intercept(cpu, "external interrupt", | |
1548 | offsetof(LowCore, external_new_psw)); | |
1549 | r = EXCP_HALTED; | |
1550 | break; | |
0e60a699 | 1551 | case ICPT_WAITPSW: |
08eb8c85 | 1552 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1553 | cpu_synchronize_state(cs); |
1554 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 CB |
1555 | if (is_special_wait_psw(cs)) { |
1556 | qemu_system_shutdown_request(); | |
1557 | } else { | |
a2689242 | 1558 | guest_panicked(); |
08eb8c85 | 1559 | } |
eca3ed03 CB |
1560 | } |
1561 | r = EXCP_HALTED; | |
1562 | break; | |
854e42f3 | 1563 | case ICPT_CPU_STOP: |
eb24f7c6 | 1564 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
854e42f3 CB |
1565 | qemu_system_shutdown_request(); |
1566 | } | |
18ff9494 DH |
1567 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1568 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1569 | true); | |
1570 | } | |
1571 | cpu->env.sigp_order = 0; | |
854e42f3 | 1572 | r = EXCP_HALTED; |
0e60a699 AG |
1573 | break; |
1574 | case ICPT_SOFT_INTERCEPT: | |
1575 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1576 | exit(1); | |
1577 | break; | |
0e60a699 AG |
1578 | case ICPT_IO: |
1579 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1580 | exit(1); | |
1581 | break; | |
1582 | default: | |
1583 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1584 | exit(1); | |
1585 | break; | |
1586 | } | |
1587 | ||
1588 | return r; | |
1589 | } | |
1590 | ||
09b99878 CH |
1591 | static int handle_tsch(S390CPU *cpu) |
1592 | { | |
09b99878 CH |
1593 | CPUState *cs = CPU(cpu); |
1594 | struct kvm_run *run = cs->kvm_run; | |
1595 | int ret; | |
1596 | ||
44c68de0 | 1597 | cpu_synchronize_state(cs); |
3474b679 | 1598 | |
653b0809 TH |
1599 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1600 | if (ret < 0) { | |
09b99878 CH |
1601 | /* |
1602 | * Failure. | |
1603 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1604 | */ | |
1605 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1606 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1607 | run->s390_tsch.subchannel_nr, | |
1608 | run->s390_tsch.io_int_parm, | |
1609 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1610 | } |
1611 | ret = 0; | |
1612 | } | |
1613 | return ret; | |
1614 | } | |
1615 | ||
8c012449 DH |
1616 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
1617 | { | |
770a6379 DH |
1618 | CPUState *cs = CPU(cpu); |
1619 | struct kvm_run *run = cs->kvm_run; | |
1620 | ||
1621 | int ret = 0; | |
1622 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
1623 | ||
1624 | switch (arch_info->type) { | |
1625 | case KVM_HW_WP_WRITE: | |
1626 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1627 | cs->watchpoint_hit = &hw_watchpoint; | |
1628 | hw_watchpoint.vaddr = arch_info->addr; | |
1629 | hw_watchpoint.flags = BP_MEM_WRITE; | |
1630 | ret = EXCP_DEBUG; | |
1631 | } | |
1632 | break; | |
1633 | case KVM_HW_BP: | |
1634 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
1635 | ret = EXCP_DEBUG; | |
1636 | } | |
1637 | break; | |
1638 | case KVM_SINGLESTEP: | |
1639 | if (cs->singlestep_enabled) { | |
1640 | ret = EXCP_DEBUG; | |
1641 | } | |
1642 | break; | |
1643 | default: | |
1644 | ret = -ENOSYS; | |
1645 | } | |
1646 | ||
1647 | return ret; | |
8c012449 DH |
1648 | } |
1649 | ||
20d695a9 | 1650 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 1651 | { |
20d695a9 | 1652 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
1653 | int ret = 0; |
1654 | ||
1655 | switch (run->exit_reason) { | |
1656 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 1657 | ret = handle_intercept(cpu); |
0e60a699 AG |
1658 | break; |
1659 | case KVM_EXIT_S390_RESET: | |
e91e972c | 1660 | s390_reipl_request(); |
0e60a699 | 1661 | break; |
09b99878 CH |
1662 | case KVM_EXIT_S390_TSCH: |
1663 | ret = handle_tsch(cpu); | |
1664 | break; | |
8c012449 DH |
1665 | case KVM_EXIT_DEBUG: |
1666 | ret = kvm_arch_handle_debug_exit(cpu); | |
1667 | break; | |
0e60a699 AG |
1668 | default: |
1669 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
1670 | break; | |
1671 | } | |
1672 | ||
bb4ea393 JK |
1673 | if (ret == 0) { |
1674 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 1675 | } |
0e60a699 AG |
1676 | return ret; |
1677 | } | |
4513d923 | 1678 | |
20d695a9 | 1679 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
1680 | { |
1681 | return true; | |
1682 | } | |
a1b87fe0 | 1683 | |
20d695a9 | 1684 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
1685 | { |
1686 | return 1; | |
1687 | } | |
1688 | ||
1689 | int kvm_arch_on_sigbus(int code, void *addr) | |
1690 | { | |
1691 | return 1; | |
1692 | } | |
09b99878 | 1693 | |
de13d216 | 1694 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
1695 | uint16_t subchannel_nr, uint32_t io_int_parm, |
1696 | uint32_t io_int_word) | |
1697 | { | |
de13d216 CH |
1698 | struct kvm_s390_irq irq = { |
1699 | .u.io.subchannel_id = subchannel_id, | |
1700 | .u.io.subchannel_nr = subchannel_nr, | |
1701 | .u.io.io_int_parm = io_int_parm, | |
1702 | .u.io.io_int_word = io_int_word, | |
1703 | }; | |
09b99878 | 1704 | |
7e749462 | 1705 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 1706 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 1707 | } else { |
de13d216 | 1708 | irq.type = ((subchannel_id & 0xff00) << 24) | |
7e749462 CH |
1709 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); |
1710 | } | |
de13d216 | 1711 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
1712 | } |
1713 | ||
de13d216 | 1714 | void kvm_s390_crw_mchk(void) |
09b99878 | 1715 | { |
de13d216 CH |
1716 | struct kvm_s390_irq irq = { |
1717 | .type = KVM_S390_MCHK, | |
1718 | .u.mchk.cr14 = 1 << 28, | |
f0d4dc18 | 1719 | .u.mchk.mcic = 0x00400f1d40330000ULL, |
de13d216 CH |
1720 | }; |
1721 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
1722 | } |
1723 | ||
1724 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
1725 | { | |
09b99878 CH |
1726 | int r; |
1727 | ||
1728 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 1729 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
1730 | assert(r == 0); |
1731 | } | |
48475e14 AK |
1732 | |
1733 | void kvm_arch_init_irq_routing(KVMState *s) | |
1734 | { | |
d426d9fb CH |
1735 | /* |
1736 | * Note that while irqchip capabilities generally imply that cpustates | |
1737 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
1738 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
1739 | */ | |
1740 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
1741 | kvm_gsi_routing_allowed = true; |
1742 | kvm_halt_in_kernel_allowed = false; | |
1743 | } | |
48475e14 | 1744 | } |
b4436a0b | 1745 | |
cc3ac9c4 CH |
1746 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
1747 | int vq, bool assign) | |
b4436a0b CH |
1748 | { |
1749 | struct kvm_ioeventfd kick = { | |
1750 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
1751 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 1752 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
1753 | .datamatch = vq, |
1754 | .addr = sch, | |
1755 | .len = 8, | |
1756 | }; | |
1757 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
1758 | return -ENOSYS; | |
1759 | } | |
1760 | if (!assign) { | |
1761 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
1762 | } | |
1763 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
1764 | } | |
1def6656 MR |
1765 | |
1766 | int kvm_s390_get_memslot_count(KVMState *s) | |
1767 | { | |
1768 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
1769 | } | |
c9e659c9 DH |
1770 | |
1771 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) | |
1772 | { | |
1773 | struct kvm_mp_state mp_state = {}; | |
1774 | int ret; | |
1775 | ||
1776 | /* the kvm part might not have been initialized yet */ | |
1777 | if (CPU(cpu)->kvm_state == NULL) { | |
1778 | return 0; | |
1779 | } | |
1780 | ||
1781 | switch (cpu_state) { | |
1782 | case CPU_STATE_STOPPED: | |
1783 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
1784 | break; | |
1785 | case CPU_STATE_CHECK_STOP: | |
1786 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
1787 | break; | |
1788 | case CPU_STATE_OPERATING: | |
1789 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
1790 | break; | |
1791 | case CPU_STATE_LOAD: | |
1792 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
1793 | break; | |
1794 | default: | |
1795 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
1796 | cpu_state); | |
1797 | exit(1); | |
1798 | } | |
1799 | ||
1800 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
1801 | if (ret) { | |
1802 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
1803 | strerror(-ret)); | |
1804 | } | |
1805 | ||
1806 | return ret; | |
1807 | } | |
9e03a040 FB |
1808 | |
1809 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, | |
1810 | uint64_t address, uint32_t data) | |
1811 | { | |
1812 | S390PCIBusDevice *pbdev; | |
1813 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
1814 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
1815 | ||
1816 | pbdev = s390_pci_find_dev_by_fid(fid); | |
1817 | if (!pbdev) { | |
1818 | DPRINTF("add_msi_route no dev\n"); | |
1819 | return -ENODEV; | |
1820 | } | |
1821 | ||
1822 | pbdev->routes.adapter.ind_offset = vec; | |
1823 | ||
1824 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
1825 | route->flags = 0; | |
1826 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
1827 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
1828 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
1829 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
1830 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
1831 | return 0; | |
1832 | } |