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cpu: move exec-all.h inclusion out of cpu.h
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CommitLineData
fdf9b3e8
FB
1/*
2 * SH4 emulation
5fafdf24 3 *
fdf9b3e8
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4 * Copyright (c) 2005 Samuel Tardieu
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
fdf9b3e8 18 */
9d4c9946 19#include "qemu/osdep.h"
3e457172 20#include "cpu.h"
2ef6175a 21#include "exec/helper-proto.h"
63c91552 22#include "exec/exec-all.h"
f08b6170 23#include "exec/cpu_ldst.h"
fdf9b3e8 24
fdf9b3e8
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25#ifndef CONFIG_USER_ONLY
26
d5a11fef 27void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
20503968 28 uintptr_t retaddr)
fdf9b3e8 29{
fdf9b3e8
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30 int ret;
31
d5a11fef 32 ret = superh_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
fdf9b3e8 33 if (ret) {
21829e9b 34 /* now we have a real cpu fault */
a8a826a3 35 if (retaddr) {
3f38f309 36 cpu_restore_state(cs, retaddr);
a8a826a3 37 }
5638d180 38 cpu_loop_exit(cs);
fdf9b3e8 39 }
fdf9b3e8
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40}
41
42#endif
43
485d0035 44void helper_ldtlb(CPUSH4State *env)
ea2b542a
AJ
45{
46#ifdef CONFIG_USER_ONLY
a47dddd7
AF
47 SuperHCPU *cpu = sh_env_get_cpu(env);
48
ea2b542a 49 /* XXXXX */
a47dddd7 50 cpu_abort(CPU(cpu), "Unhandled ldtlb");
ea2b542a
AJ
51#else
52 cpu_load_tlb(env);
53#endif
54}
55
10127400
AJ
56static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
57 uintptr_t retaddr)
e6afc2f4 58{
27103424
AF
59 CPUState *cs = CPU(sh_env_get_cpu(env));
60
61 cs->exception_index = index;
a8a826a3 62 if (retaddr) {
3f38f309 63 cpu_restore_state(cs, retaddr);
a8a826a3 64 }
5638d180 65 cpu_loop_exit(cs);
e6afc2f4
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66}
67
485d0035 68void helper_raise_illegal_instruction(CPUSH4State *env)
fd4bab10 69{
10127400 70 raise_exception(env, 0x180, 0);
fd4bab10
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71}
72
485d0035 73void helper_raise_slot_illegal_instruction(CPUSH4State *env)
e6afc2f4 74{
10127400 75 raise_exception(env, 0x1a0, 0);
e6afc2f4
AJ
76}
77
485d0035 78void helper_raise_fpu_disable(CPUSH4State *env)
d8299bcc 79{
10127400 80 raise_exception(env, 0x800, 0);
d8299bcc
AJ
81}
82
485d0035 83void helper_raise_slot_fpu_disable(CPUSH4State *env)
d8299bcc 84{
10127400 85 raise_exception(env, 0x820, 0);
d8299bcc
AJ
86}
87
485d0035 88void helper_debug(CPUSH4State *env)
e6afc2f4 89{
10127400 90 raise_exception(env, EXCP_DEBUG, 0);
e6afc2f4
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91}
92
10127400 93void helper_sleep(CPUSH4State *env)
e6afc2f4 94{
259186a7
AF
95 CPUState *cs = CPU(sh_env_get_cpu(env));
96
97 cs->halted = 1;
efac4154 98 env->in_sleep = 1;
10127400 99 raise_exception(env, EXCP_HLT, 0);
e6afc2f4
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100}
101
485d0035 102void helper_trapa(CPUSH4State *env, uint32_t tra)
e6afc2f4
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103{
104 env->tra = tra << 2;
10127400 105 raise_exception(env, 0x160, 0);
e6afc2f4
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106}
107
485d0035 108void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value)
852d481f
EI
109{
110 if (cpu_sh4_is_cached (env, address))
111 {
112 memory_content *r = malloc (sizeof(memory_content));
113 r->address = address;
114 r->value = value;
115 r->next = NULL;
116
117 *(env->movcal_backup_tail) = r;
118 env->movcal_backup_tail = &(r->next);
119 }
120}
121
485d0035 122void helper_discard_movcal_backup(CPUSH4State *env)
852d481f
EI
123{
124 memory_content *current = env->movcal_backup;
125
126 while(current)
127 {
128 memory_content *next = current->next;
129 free (current);
130 env->movcal_backup = current = next;
b9d38e95 131 if (current == NULL)
852d481f
EI
132 env->movcal_backup_tail = &(env->movcal_backup);
133 }
134}
135
485d0035 136void helper_ocbi(CPUSH4State *env, uint32_t address)
852d481f
EI
137{
138 memory_content **current = &(env->movcal_backup);
139 while (*current)
140 {
141 uint32_t a = (*current)->address;
142 if ((a & ~0x1F) == (address & ~0x1F))
143 {
144 memory_content *next = (*current)->next;
485d0035 145 cpu_stl_data(env, a, (*current)->value);
852d481f 146
b9d38e95 147 if (next == NULL)
852d481f
EI
148 {
149 env->movcal_backup_tail = current;
150 }
151
152 free (*current);
153 *current = next;
154 break;
155 }
156 }
157}
158
485d0035 159void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
fdf9b3e8
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160{
161 int64_t res;
162
163 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 164 res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
fdf9b3e8
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165 env->mach = (res >> 32) & 0xffffffff;
166 env->macl = res & 0xffffffff;
5ed9a259 167 if (env->sr & (1u << SR_S)) {
fdf9b3e8
FB
168 if (res < 0)
169 env->mach |= 0xffff0000;
170 else
171 env->mach &= 0x00007fff;
172 }
173}
174
485d0035 175void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
fdf9b3e8
FB
176{
177 int64_t res;
178
179 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 180 res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
fdf9b3e8
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181 env->mach = (res >> 32) & 0xffffffff;
182 env->macl = res & 0xffffffff;
5ed9a259 183 if (env->sr & (1u << SR_S)) {
fdf9b3e8
FB
184 if (res < -0x80000000) {
185 env->mach = 1;
186 env->macl = 0x80000000;
187 } else if (res > 0x000000007fffffff) {
188 env->mach = 1;
189 env->macl = 0x7fffffff;
190 }
191 }
192}
193
485d0035 194void helper_ld_fpscr(CPUSH4State *env, uint32_t val)
390af821 195{
26ac1ea5
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196 env->fpscr = val & FPSCR_MASK;
197 if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
390af821 198 set_float_rounding_mode(float_round_to_zero, &env->fp_status);
26ac1ea5 199 } else {
390af821 200 set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
26ac1ea5 201 }
a0d4ac33 202 set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
390af821 203}
cc4ba6a9 204
485d0035 205static void update_fpscr(CPUSH4State *env, uintptr_t retaddr)
21829e9b
AJ
206{
207 int xcpt, cause, enable;
208
209 xcpt = get_float_exception_flags(&env->fp_status);
210
211 /* Clear the flag entries */
212 env->fpscr &= ~FPSCR_FLAG_MASK;
213
214 if (unlikely(xcpt)) {
215 if (xcpt & float_flag_invalid) {
216 env->fpscr |= FPSCR_FLAG_V;
217 }
218 if (xcpt & float_flag_divbyzero) {
219 env->fpscr |= FPSCR_FLAG_Z;
220 }
221 if (xcpt & float_flag_overflow) {
222 env->fpscr |= FPSCR_FLAG_O;
223 }
224 if (xcpt & float_flag_underflow) {
225 env->fpscr |= FPSCR_FLAG_U;
226 }
227 if (xcpt & float_flag_inexact) {
228 env->fpscr |= FPSCR_FLAG_I;
229 }
230
231 /* Accumulate in cause entries */
232 env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
233 << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
234
235 /* Generate an exception if enabled */
236 cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
237 enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
238 if (cause & enable) {
10127400 239 raise_exception(env, 0x120, retaddr);
21829e9b
AJ
240 }
241 }
242}
243
d6c424c5 244float32 helper_fabs_FT(float32 t0)
cc4ba6a9 245{
d6c424c5 246 return float32_abs(t0);
cc4ba6a9
AJ
247}
248
d6c424c5 249float64 helper_fabs_DT(float64 t0)
cc4ba6a9 250{
d6c424c5 251 return float64_abs(t0);
cc4ba6a9
AJ
252}
253
485d0035 254float32 helper_fadd_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 255{
21829e9b 256 set_float_exception_flags(0, &env->fp_status);
d6c424c5 257 t0 = float32_add(t0, t1, &env->fp_status);
485d0035 258 update_fpscr(env, GETPC());
d6c424c5 259 return t0;
cc4ba6a9
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260}
261
485d0035 262float64 helper_fadd_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 263{
21829e9b 264 set_float_exception_flags(0, &env->fp_status);
d6c424c5 265 t0 = float64_add(t0, t1, &env->fp_status);
485d0035 266 update_fpscr(env, GETPC());
d6c424c5 267 return t0;
cc4ba6a9
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268}
269
485d0035 270void helper_fcmp_eq_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 271{
21829e9b 272 int relation;
9850d1e8 273
21829e9b 274 set_float_exception_flags(0, &env->fp_status);
d6c424c5 275 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b 276 if (unlikely(relation == float_relation_unordered)) {
485d0035 277 update_fpscr(env, GETPC());
21829e9b 278 } else {
34086945 279 env->sr_t = (relation == float_relation_equal);
21829e9b 280 }
cc4ba6a9
AJ
281}
282
485d0035 283void helper_fcmp_eq_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 284{
21829e9b 285 int relation;
9850d1e8 286
21829e9b 287 set_float_exception_flags(0, &env->fp_status);
d6c424c5 288 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b 289 if (unlikely(relation == float_relation_unordered)) {
485d0035 290 update_fpscr(env, GETPC());
21829e9b 291 } else {
34086945 292 env->sr_t = (relation == float_relation_equal);
21829e9b 293 }
cc4ba6a9
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294}
295
485d0035 296void helper_fcmp_gt_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 297{
21829e9b 298 int relation;
9850d1e8 299
21829e9b 300 set_float_exception_flags(0, &env->fp_status);
d6c424c5 301 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b 302 if (unlikely(relation == float_relation_unordered)) {
485d0035 303 update_fpscr(env, GETPC());
21829e9b 304 } else {
34086945 305 env->sr_t = (relation == float_relation_greater);
21829e9b 306 }
cc4ba6a9
AJ
307}
308
485d0035 309void helper_fcmp_gt_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 310{
21829e9b 311 int relation;
9850d1e8 312
21829e9b 313 set_float_exception_flags(0, &env->fp_status);
d6c424c5 314 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b 315 if (unlikely(relation == float_relation_unordered)) {
485d0035 316 update_fpscr(env, GETPC());
21829e9b 317 } else {
34086945 318 env->sr_t = (relation == float_relation_greater);
21829e9b 319 }
cc4ba6a9
AJ
320}
321
485d0035 322float64 helper_fcnvsd_FT_DT(CPUSH4State *env, float32 t0)
cc4ba6a9 323{
d6c424c5 324 float64 ret;
21829e9b 325 set_float_exception_flags(0, &env->fp_status);
d6c424c5 326 ret = float32_to_float64(t0, &env->fp_status);
485d0035 327 update_fpscr(env, GETPC());
d6c424c5 328 return ret;
cc4ba6a9
AJ
329}
330
485d0035 331float32 helper_fcnvds_DT_FT(CPUSH4State *env, float64 t0)
cc4ba6a9 332{
d6c424c5 333 float32 ret;
21829e9b 334 set_float_exception_flags(0, &env->fp_status);
d6c424c5 335 ret = float64_to_float32(t0, &env->fp_status);
485d0035 336 update_fpscr(env, GETPC());
d6c424c5 337 return ret;
cc4ba6a9
AJ
338}
339
485d0035 340float32 helper_fdiv_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 341{
21829e9b 342 set_float_exception_flags(0, &env->fp_status);
d6c424c5 343 t0 = float32_div(t0, t1, &env->fp_status);
485d0035 344 update_fpscr(env, GETPC());
d6c424c5 345 return t0;
cc4ba6a9
AJ
346}
347
485d0035 348float64 helper_fdiv_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 349{
21829e9b 350 set_float_exception_flags(0, &env->fp_status);
d6c424c5 351 t0 = float64_div(t0, t1, &env->fp_status);
485d0035 352 update_fpscr(env, GETPC());
d6c424c5 353 return t0;
cc4ba6a9
AJ
354}
355
485d0035 356float32 helper_float_FT(CPUSH4State *env, uint32_t t0)
cc4ba6a9 357{
d6c424c5 358 float32 ret;
21829e9b 359 set_float_exception_flags(0, &env->fp_status);
d6c424c5 360 ret = int32_to_float32(t0, &env->fp_status);
485d0035 361 update_fpscr(env, GETPC());
d6c424c5 362 return ret;
cc4ba6a9
AJ
363}
364
485d0035 365float64 helper_float_DT(CPUSH4State *env, uint32_t t0)
cc4ba6a9 366{
d6c424c5 367 float64 ret;
21829e9b 368 set_float_exception_flags(0, &env->fp_status);
d6c424c5 369 ret = int32_to_float64(t0, &env->fp_status);
485d0035 370 update_fpscr(env, GETPC());
d6c424c5 371 return ret;
cc4ba6a9
AJ
372}
373
485d0035 374float32 helper_fmac_FT(CPUSH4State *env, float32 t0, float32 t1, float32 t2)
5b7141a1 375{
21829e9b 376 set_float_exception_flags(0, &env->fp_status);
ff2086fe 377 t0 = float32_muladd(t0, t1, t2, 0, &env->fp_status);
485d0035 378 update_fpscr(env, GETPC());
d6c424c5 379 return t0;
5b7141a1
AJ
380}
381
485d0035 382float32 helper_fmul_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 383{
21829e9b 384 set_float_exception_flags(0, &env->fp_status);
d6c424c5 385 t0 = float32_mul(t0, t1, &env->fp_status);
485d0035 386 update_fpscr(env, GETPC());
d6c424c5 387 return t0;
cc4ba6a9
AJ
388}
389
485d0035 390float64 helper_fmul_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 391{
21829e9b 392 set_float_exception_flags(0, &env->fp_status);
d6c424c5 393 t0 = float64_mul(t0, t1, &env->fp_status);
485d0035 394 update_fpscr(env, GETPC());
d6c424c5 395 return t0;
cc4ba6a9
AJ
396}
397
d6c424c5 398float32 helper_fneg_T(float32 t0)
7fdf924f 399{
d6c424c5 400 return float32_chs(t0);
7fdf924f
AJ
401}
402
485d0035 403float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0)
cc4ba6a9 404{
21829e9b 405 set_float_exception_flags(0, &env->fp_status);
d6c424c5 406 t0 = float32_sqrt(t0, &env->fp_status);
485d0035 407 update_fpscr(env, GETPC());
d6c424c5 408 return t0;
cc4ba6a9
AJ
409}
410
485d0035 411float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0)
cc4ba6a9 412{
21829e9b 413 set_float_exception_flags(0, &env->fp_status);
d6c424c5 414 t0 = float64_sqrt(t0, &env->fp_status);
485d0035 415 update_fpscr(env, GETPC());
d6c424c5 416 return t0;
cc4ba6a9
AJ
417}
418
485d0035 419float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 420{
21829e9b 421 set_float_exception_flags(0, &env->fp_status);
d6c424c5 422 t0 = float32_sub(t0, t1, &env->fp_status);
485d0035 423 update_fpscr(env, GETPC());
d6c424c5 424 return t0;
cc4ba6a9
AJ
425}
426
485d0035 427float64 helper_fsub_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 428{
21829e9b 429 set_float_exception_flags(0, &env->fp_status);
d6c424c5 430 t0 = float64_sub(t0, t1, &env->fp_status);
485d0035 431 update_fpscr(env, GETPC());
d6c424c5 432 return t0;
cc4ba6a9
AJ
433}
434
485d0035 435uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0)
cc4ba6a9 436{
21829e9b 437 uint32_t ret;
21829e9b 438 set_float_exception_flags(0, &env->fp_status);
d6c424c5 439 ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
485d0035 440 update_fpscr(env, GETPC());
21829e9b 441 return ret;
cc4ba6a9
AJ
442}
443
485d0035 444uint32_t helper_ftrc_DT(CPUSH4State *env, float64 t0)
cc4ba6a9 445{
21829e9b 446 uint32_t ret;
21829e9b 447 set_float_exception_flags(0, &env->fp_status);
d6c424c5 448 ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
485d0035 449 update_fpscr(env, GETPC());
21829e9b 450 return ret;
cc4ba6a9 451}
af8c2bde 452
485d0035 453void helper_fipr(CPUSH4State *env, uint32_t m, uint32_t n)
af8c2bde
AJ
454{
455 int bank, i;
456 float32 r, p;
457
458 bank = (env->sr & FPSCR_FR) ? 16 : 0;
459 r = float32_zero;
460 set_float_exception_flags(0, &env->fp_status);
461
462 for (i = 0 ; i < 4 ; i++) {
463 p = float32_mul(env->fregs[bank + m + i],
464 env->fregs[bank + n + i],
465 &env->fp_status);
466 r = float32_add(r, p, &env->fp_status);
467 }
485d0035 468 update_fpscr(env, GETPC());
af8c2bde
AJ
469
470 env->fregs[bank + n + 3] = r;
471}
17075f10 472
485d0035 473void helper_ftrv(CPUSH4State *env, uint32_t n)
17075f10
AJ
474{
475 int bank_matrix, bank_vector;
476 int i, j;
477 float32 r[4];
478 float32 p;
479
480 bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
481 bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
482 set_float_exception_flags(0, &env->fp_status);
483 for (i = 0 ; i < 4 ; i++) {
484 r[i] = float32_zero;
485 for (j = 0 ; j < 4 ; j++) {
486 p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
487 env->fregs[bank_vector + j],
488 &env->fp_status);
489 r[i] = float32_add(r[i], p, &env->fp_status);
490 }
491 }
485d0035 492 update_fpscr(env, GETPC());
17075f10
AJ
493
494 for (i = 0 ; i < 4 ; i++) {
495 env->fregs[bank_vector + i] = r[i];
496 }
497}