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Commit | Line | Data |
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fdf9b3e8 FB |
1 | /* |
2 | * SH4 emulation | |
5fafdf24 | 3 | * |
fdf9b3e8 FB |
4 | * Copyright (c) 2005 Samuel Tardieu |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
fdf9b3e8 FB |
18 | */ |
19 | #include <assert.h> | |
852d481f | 20 | #include <stdlib.h> |
3e457172 | 21 | #include "cpu.h" |
a7812ae4 | 22 | #include "helper.h" |
fdf9b3e8 | 23 | |
fdf9b3e8 | 24 | #ifndef CONFIG_USER_ONLY |
022c62cb | 25 | #include "exec/softmmu_exec.h" |
fdf9b3e8 FB |
26 | |
27 | #define MMUSUFFIX _mmu | |
fdf9b3e8 FB |
28 | |
29 | #define SHIFT 0 | |
022c62cb | 30 | #include "exec/softmmu_template.h" |
fdf9b3e8 FB |
31 | |
32 | #define SHIFT 1 | |
022c62cb | 33 | #include "exec/softmmu_template.h" |
fdf9b3e8 FB |
34 | |
35 | #define SHIFT 2 | |
022c62cb | 36 | #include "exec/softmmu_template.h" |
fdf9b3e8 FB |
37 | |
38 | #define SHIFT 3 | |
022c62cb | 39 | #include "exec/softmmu_template.h" |
fdf9b3e8 | 40 | |
d5a11fef | 41 | void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, |
20503968 | 42 | uintptr_t retaddr) |
fdf9b3e8 | 43 | { |
fdf9b3e8 FB |
44 | int ret; |
45 | ||
d5a11fef | 46 | ret = superh_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); |
fdf9b3e8 | 47 | if (ret) { |
21829e9b | 48 | /* now we have a real cpu fault */ |
d5a11fef AF |
49 | SuperHCPU *cpu = SUPERH_CPU(cs); |
50 | CPUSH4State *env = &cpu->env; | |
51 | ||
a8a826a3 BS |
52 | if (retaddr) { |
53 | cpu_restore_state(env, retaddr); | |
54 | } | |
1162c041 | 55 | cpu_loop_exit(env); |
fdf9b3e8 | 56 | } |
fdf9b3e8 FB |
57 | } |
58 | ||
59 | #endif | |
60 | ||
485d0035 | 61 | void helper_ldtlb(CPUSH4State *env) |
ea2b542a AJ |
62 | { |
63 | #ifdef CONFIG_USER_ONLY | |
64 | /* XXXXX */ | |
43dc2a64 | 65 | cpu_abort(env, "Unhandled ldtlb"); |
ea2b542a AJ |
66 | #else |
67 | cpu_load_tlb(env); | |
68 | #endif | |
69 | } | |
70 | ||
10127400 AJ |
71 | static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index, |
72 | uintptr_t retaddr) | |
e6afc2f4 | 73 | { |
27103424 AF |
74 | CPUState *cs = CPU(sh_env_get_cpu(env)); |
75 | ||
76 | cs->exception_index = index; | |
a8a826a3 BS |
77 | if (retaddr) { |
78 | cpu_restore_state(env, retaddr); | |
79 | } | |
1162c041 | 80 | cpu_loop_exit(env); |
e6afc2f4 AJ |
81 | } |
82 | ||
485d0035 | 83 | void helper_raise_illegal_instruction(CPUSH4State *env) |
fd4bab10 | 84 | { |
10127400 | 85 | raise_exception(env, 0x180, 0); |
fd4bab10 AJ |
86 | } |
87 | ||
485d0035 | 88 | void helper_raise_slot_illegal_instruction(CPUSH4State *env) |
e6afc2f4 | 89 | { |
10127400 | 90 | raise_exception(env, 0x1a0, 0); |
e6afc2f4 AJ |
91 | } |
92 | ||
485d0035 | 93 | void helper_raise_fpu_disable(CPUSH4State *env) |
d8299bcc | 94 | { |
10127400 | 95 | raise_exception(env, 0x800, 0); |
d8299bcc AJ |
96 | } |
97 | ||
485d0035 | 98 | void helper_raise_slot_fpu_disable(CPUSH4State *env) |
d8299bcc | 99 | { |
10127400 | 100 | raise_exception(env, 0x820, 0); |
d8299bcc AJ |
101 | } |
102 | ||
485d0035 | 103 | void helper_debug(CPUSH4State *env) |
e6afc2f4 | 104 | { |
10127400 | 105 | raise_exception(env, EXCP_DEBUG, 0); |
e6afc2f4 AJ |
106 | } |
107 | ||
10127400 | 108 | void helper_sleep(CPUSH4State *env) |
e6afc2f4 | 109 | { |
259186a7 AF |
110 | CPUState *cs = CPU(sh_env_get_cpu(env)); |
111 | ||
112 | cs->halted = 1; | |
efac4154 | 113 | env->in_sleep = 1; |
10127400 | 114 | raise_exception(env, EXCP_HLT, 0); |
e6afc2f4 AJ |
115 | } |
116 | ||
485d0035 | 117 | void helper_trapa(CPUSH4State *env, uint32_t tra) |
e6afc2f4 AJ |
118 | { |
119 | env->tra = tra << 2; | |
10127400 | 120 | raise_exception(env, 0x160, 0); |
e6afc2f4 AJ |
121 | } |
122 | ||
485d0035 | 123 | void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value) |
852d481f EI |
124 | { |
125 | if (cpu_sh4_is_cached (env, address)) | |
126 | { | |
127 | memory_content *r = malloc (sizeof(memory_content)); | |
128 | r->address = address; | |
129 | r->value = value; | |
130 | r->next = NULL; | |
131 | ||
132 | *(env->movcal_backup_tail) = r; | |
133 | env->movcal_backup_tail = &(r->next); | |
134 | } | |
135 | } | |
136 | ||
485d0035 | 137 | void helper_discard_movcal_backup(CPUSH4State *env) |
852d481f EI |
138 | { |
139 | memory_content *current = env->movcal_backup; | |
140 | ||
141 | while(current) | |
142 | { | |
143 | memory_content *next = current->next; | |
144 | free (current); | |
145 | env->movcal_backup = current = next; | |
b9d38e95 | 146 | if (current == NULL) |
852d481f EI |
147 | env->movcal_backup_tail = &(env->movcal_backup); |
148 | } | |
149 | } | |
150 | ||
485d0035 | 151 | void helper_ocbi(CPUSH4State *env, uint32_t address) |
852d481f EI |
152 | { |
153 | memory_content **current = &(env->movcal_backup); | |
154 | while (*current) | |
155 | { | |
156 | uint32_t a = (*current)->address; | |
157 | if ((a & ~0x1F) == (address & ~0x1F)) | |
158 | { | |
159 | memory_content *next = (*current)->next; | |
485d0035 | 160 | cpu_stl_data(env, a, (*current)->value); |
852d481f | 161 | |
b9d38e95 | 162 | if (next == NULL) |
852d481f EI |
163 | { |
164 | env->movcal_backup_tail = current; | |
165 | } | |
166 | ||
167 | free (*current); | |
168 | *current = next; | |
169 | break; | |
170 | } | |
171 | } | |
172 | } | |
173 | ||
fdf9b3e8 FB |
174 | #define T (env->sr & SR_T) |
175 | #define Q (env->sr & SR_Q ? 1 : 0) | |
176 | #define M (env->sr & SR_M ? 1 : 0) | |
177 | #define SETT env->sr |= SR_T | |
178 | #define CLRT env->sr &= ~SR_T | |
179 | #define SETQ env->sr |= SR_Q | |
180 | #define CLRQ env->sr &= ~SR_Q | |
181 | #define SETM env->sr |= SR_M | |
182 | #define CLRM env->sr &= ~SR_M | |
183 | ||
485d0035 | 184 | uint32_t helper_div1(CPUSH4State *env, uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
185 | { |
186 | uint32_t tmp0, tmp2; | |
187 | uint8_t old_q, tmp1 = 0xff; | |
188 | ||
69d6275b | 189 | //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T); |
fdf9b3e8 | 190 | old_q = Q; |
69d6275b | 191 | if ((0x80000000 & arg1) != 0) |
fdf9b3e8 FB |
192 | SETQ; |
193 | else | |
194 | CLRQ; | |
69d6275b AJ |
195 | tmp2 = arg0; |
196 | arg1 <<= 1; | |
197 | arg1 |= T; | |
fdf9b3e8 FB |
198 | switch (old_q) { |
199 | case 0: | |
200 | switch (M) { | |
201 | case 0: | |
69d6275b AJ |
202 | tmp0 = arg1; |
203 | arg1 -= tmp2; | |
204 | tmp1 = arg1 > tmp0; | |
fdf9b3e8 FB |
205 | switch (Q) { |
206 | case 0: | |
207 | if (tmp1) | |
208 | SETQ; | |
209 | else | |
210 | CLRQ; | |
211 | break; | |
212 | case 1: | |
213 | if (tmp1 == 0) | |
214 | SETQ; | |
215 | else | |
216 | CLRQ; | |
217 | break; | |
218 | } | |
219 | break; | |
220 | case 1: | |
69d6275b AJ |
221 | tmp0 = arg1; |
222 | arg1 += tmp2; | |
223 | tmp1 = arg1 < tmp0; | |
fdf9b3e8 FB |
224 | switch (Q) { |
225 | case 0: | |
226 | if (tmp1 == 0) | |
227 | SETQ; | |
228 | else | |
229 | CLRQ; | |
230 | break; | |
231 | case 1: | |
232 | if (tmp1) | |
233 | SETQ; | |
234 | else | |
235 | CLRQ; | |
236 | break; | |
237 | } | |
238 | break; | |
239 | } | |
240 | break; | |
241 | case 1: | |
242 | switch (M) { | |
243 | case 0: | |
69d6275b AJ |
244 | tmp0 = arg1; |
245 | arg1 += tmp2; | |
246 | tmp1 = arg1 < tmp0; | |
fdf9b3e8 FB |
247 | switch (Q) { |
248 | case 0: | |
249 | if (tmp1) | |
250 | SETQ; | |
251 | else | |
252 | CLRQ; | |
253 | break; | |
254 | case 1: | |
255 | if (tmp1 == 0) | |
256 | SETQ; | |
257 | else | |
258 | CLRQ; | |
259 | break; | |
260 | } | |
261 | break; | |
262 | case 1: | |
69d6275b AJ |
263 | tmp0 = arg1; |
264 | arg1 -= tmp2; | |
265 | tmp1 = arg1 > tmp0; | |
fdf9b3e8 FB |
266 | switch (Q) { |
267 | case 0: | |
268 | if (tmp1 == 0) | |
269 | SETQ; | |
270 | else | |
271 | CLRQ; | |
272 | break; | |
273 | case 1: | |
274 | if (tmp1) | |
275 | SETQ; | |
276 | else | |
277 | CLRQ; | |
278 | break; | |
279 | } | |
280 | break; | |
281 | } | |
282 | break; | |
283 | } | |
284 | if (Q == M) | |
285 | SETT; | |
286 | else | |
287 | CLRT; | |
69d6275b AJ |
288 | //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T); |
289 | return arg1; | |
fdf9b3e8 FB |
290 | } |
291 | ||
485d0035 | 292 | void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
293 | { |
294 | int64_t res; | |
295 | ||
296 | res = ((uint64_t) env->mach << 32) | env->macl; | |
6f06939b | 297 | res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; |
fdf9b3e8 FB |
298 | env->mach = (res >> 32) & 0xffffffff; |
299 | env->macl = res & 0xffffffff; | |
300 | if (env->sr & SR_S) { | |
301 | if (res < 0) | |
302 | env->mach |= 0xffff0000; | |
303 | else | |
304 | env->mach &= 0x00007fff; | |
305 | } | |
306 | } | |
307 | ||
485d0035 | 308 | void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
309 | { |
310 | int64_t res; | |
311 | ||
312 | res = ((uint64_t) env->mach << 32) | env->macl; | |
6f06939b | 313 | res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; |
fdf9b3e8 FB |
314 | env->mach = (res >> 32) & 0xffffffff; |
315 | env->macl = res & 0xffffffff; | |
316 | if (env->sr & SR_S) { | |
317 | if (res < -0x80000000) { | |
318 | env->mach = 1; | |
319 | env->macl = 0x80000000; | |
320 | } else if (res > 0x000000007fffffff) { | |
321 | env->mach = 1; | |
322 | env->macl = 0x7fffffff; | |
323 | } | |
324 | } | |
325 | } | |
326 | ||
485d0035 | 327 | static inline void set_t(CPUSH4State *env) |
cc4ba6a9 AJ |
328 | { |
329 | env->sr |= SR_T; | |
330 | } | |
331 | ||
485d0035 | 332 | static inline void clr_t(CPUSH4State *env) |
cc4ba6a9 AJ |
333 | { |
334 | env->sr &= ~SR_T; | |
335 | } | |
336 | ||
485d0035 | 337 | void helper_ld_fpscr(CPUSH4State *env, uint32_t val) |
390af821 | 338 | { |
26ac1ea5 AJ |
339 | env->fpscr = val & FPSCR_MASK; |
340 | if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) { | |
390af821 | 341 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
26ac1ea5 | 342 | } else { |
390af821 | 343 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
26ac1ea5 | 344 | } |
a0d4ac33 | 345 | set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status); |
390af821 | 346 | } |
cc4ba6a9 | 347 | |
485d0035 | 348 | static void update_fpscr(CPUSH4State *env, uintptr_t retaddr) |
21829e9b AJ |
349 | { |
350 | int xcpt, cause, enable; | |
351 | ||
352 | xcpt = get_float_exception_flags(&env->fp_status); | |
353 | ||
354 | /* Clear the flag entries */ | |
355 | env->fpscr &= ~FPSCR_FLAG_MASK; | |
356 | ||
357 | if (unlikely(xcpt)) { | |
358 | if (xcpt & float_flag_invalid) { | |
359 | env->fpscr |= FPSCR_FLAG_V; | |
360 | } | |
361 | if (xcpt & float_flag_divbyzero) { | |
362 | env->fpscr |= FPSCR_FLAG_Z; | |
363 | } | |
364 | if (xcpt & float_flag_overflow) { | |
365 | env->fpscr |= FPSCR_FLAG_O; | |
366 | } | |
367 | if (xcpt & float_flag_underflow) { | |
368 | env->fpscr |= FPSCR_FLAG_U; | |
369 | } | |
370 | if (xcpt & float_flag_inexact) { | |
371 | env->fpscr |= FPSCR_FLAG_I; | |
372 | } | |
373 | ||
374 | /* Accumulate in cause entries */ | |
375 | env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK) | |
376 | << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT); | |
377 | ||
378 | /* Generate an exception if enabled */ | |
379 | cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; | |
380 | enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; | |
381 | if (cause & enable) { | |
10127400 | 382 | raise_exception(env, 0x120, retaddr); |
21829e9b AJ |
383 | } |
384 | } | |
385 | } | |
386 | ||
d6c424c5 | 387 | float32 helper_fabs_FT(float32 t0) |
cc4ba6a9 | 388 | { |
d6c424c5 | 389 | return float32_abs(t0); |
cc4ba6a9 AJ |
390 | } |
391 | ||
d6c424c5 | 392 | float64 helper_fabs_DT(float64 t0) |
cc4ba6a9 | 393 | { |
d6c424c5 | 394 | return float64_abs(t0); |
cc4ba6a9 AJ |
395 | } |
396 | ||
485d0035 | 397 | float32 helper_fadd_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 398 | { |
21829e9b | 399 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 400 | t0 = float32_add(t0, t1, &env->fp_status); |
485d0035 | 401 | update_fpscr(env, GETPC()); |
d6c424c5 | 402 | return t0; |
cc4ba6a9 AJ |
403 | } |
404 | ||
485d0035 | 405 | float64 helper_fadd_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 406 | { |
21829e9b | 407 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 408 | t0 = float64_add(t0, t1, &env->fp_status); |
485d0035 | 409 | update_fpscr(env, GETPC()); |
d6c424c5 | 410 | return t0; |
cc4ba6a9 AJ |
411 | } |
412 | ||
485d0035 | 413 | void helper_fcmp_eq_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 414 | { |
21829e9b | 415 | int relation; |
9850d1e8 | 416 | |
21829e9b | 417 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 418 | relation = float32_compare(t0, t1, &env->fp_status); |
21829e9b | 419 | if (unlikely(relation == float_relation_unordered)) { |
485d0035 | 420 | update_fpscr(env, GETPC()); |
21829e9b | 421 | } else if (relation == float_relation_equal) { |
485d0035 | 422 | set_t(env); |
21829e9b | 423 | } else { |
485d0035 | 424 | clr_t(env); |
21829e9b | 425 | } |
cc4ba6a9 AJ |
426 | } |
427 | ||
485d0035 | 428 | void helper_fcmp_eq_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 429 | { |
21829e9b | 430 | int relation; |
9850d1e8 | 431 | |
21829e9b | 432 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 433 | relation = float64_compare(t0, t1, &env->fp_status); |
21829e9b | 434 | if (unlikely(relation == float_relation_unordered)) { |
485d0035 | 435 | update_fpscr(env, GETPC()); |
21829e9b | 436 | } else if (relation == float_relation_equal) { |
485d0035 | 437 | set_t(env); |
21829e9b | 438 | } else { |
485d0035 | 439 | clr_t(env); |
21829e9b | 440 | } |
cc4ba6a9 AJ |
441 | } |
442 | ||
485d0035 | 443 | void helper_fcmp_gt_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 444 | { |
21829e9b | 445 | int relation; |
9850d1e8 | 446 | |
21829e9b | 447 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 448 | relation = float32_compare(t0, t1, &env->fp_status); |
21829e9b | 449 | if (unlikely(relation == float_relation_unordered)) { |
485d0035 | 450 | update_fpscr(env, GETPC()); |
21829e9b | 451 | } else if (relation == float_relation_greater) { |
485d0035 | 452 | set_t(env); |
21829e9b | 453 | } else { |
485d0035 | 454 | clr_t(env); |
21829e9b | 455 | } |
cc4ba6a9 AJ |
456 | } |
457 | ||
485d0035 | 458 | void helper_fcmp_gt_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 459 | { |
21829e9b | 460 | int relation; |
9850d1e8 | 461 | |
21829e9b | 462 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 463 | relation = float64_compare(t0, t1, &env->fp_status); |
21829e9b | 464 | if (unlikely(relation == float_relation_unordered)) { |
485d0035 | 465 | update_fpscr(env, GETPC()); |
21829e9b | 466 | } else if (relation == float_relation_greater) { |
485d0035 | 467 | set_t(env); |
21829e9b | 468 | } else { |
485d0035 | 469 | clr_t(env); |
21829e9b | 470 | } |
cc4ba6a9 AJ |
471 | } |
472 | ||
485d0035 | 473 | float64 helper_fcnvsd_FT_DT(CPUSH4State *env, float32 t0) |
cc4ba6a9 | 474 | { |
d6c424c5 | 475 | float64 ret; |
21829e9b | 476 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 477 | ret = float32_to_float64(t0, &env->fp_status); |
485d0035 | 478 | update_fpscr(env, GETPC()); |
d6c424c5 | 479 | return ret; |
cc4ba6a9 AJ |
480 | } |
481 | ||
485d0035 | 482 | float32 helper_fcnvds_DT_FT(CPUSH4State *env, float64 t0) |
cc4ba6a9 | 483 | { |
d6c424c5 | 484 | float32 ret; |
21829e9b | 485 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 486 | ret = float64_to_float32(t0, &env->fp_status); |
485d0035 | 487 | update_fpscr(env, GETPC()); |
d6c424c5 | 488 | return ret; |
cc4ba6a9 AJ |
489 | } |
490 | ||
485d0035 | 491 | float32 helper_fdiv_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 492 | { |
21829e9b | 493 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 494 | t0 = float32_div(t0, t1, &env->fp_status); |
485d0035 | 495 | update_fpscr(env, GETPC()); |
d6c424c5 | 496 | return t0; |
cc4ba6a9 AJ |
497 | } |
498 | ||
485d0035 | 499 | float64 helper_fdiv_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 500 | { |
21829e9b | 501 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 502 | t0 = float64_div(t0, t1, &env->fp_status); |
485d0035 | 503 | update_fpscr(env, GETPC()); |
d6c424c5 | 504 | return t0; |
cc4ba6a9 AJ |
505 | } |
506 | ||
485d0035 | 507 | float32 helper_float_FT(CPUSH4State *env, uint32_t t0) |
cc4ba6a9 | 508 | { |
d6c424c5 | 509 | float32 ret; |
21829e9b | 510 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 511 | ret = int32_to_float32(t0, &env->fp_status); |
485d0035 | 512 | update_fpscr(env, GETPC()); |
d6c424c5 | 513 | return ret; |
cc4ba6a9 AJ |
514 | } |
515 | ||
485d0035 | 516 | float64 helper_float_DT(CPUSH4State *env, uint32_t t0) |
cc4ba6a9 | 517 | { |
d6c424c5 | 518 | float64 ret; |
21829e9b | 519 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 520 | ret = int32_to_float64(t0, &env->fp_status); |
485d0035 | 521 | update_fpscr(env, GETPC()); |
d6c424c5 | 522 | return ret; |
cc4ba6a9 AJ |
523 | } |
524 | ||
485d0035 | 525 | float32 helper_fmac_FT(CPUSH4State *env, float32 t0, float32 t1, float32 t2) |
5b7141a1 | 526 | { |
21829e9b | 527 | set_float_exception_flags(0, &env->fp_status); |
ff2086fe | 528 | t0 = float32_muladd(t0, t1, t2, 0, &env->fp_status); |
485d0035 | 529 | update_fpscr(env, GETPC()); |
d6c424c5 | 530 | return t0; |
5b7141a1 AJ |
531 | } |
532 | ||
485d0035 | 533 | float32 helper_fmul_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 534 | { |
21829e9b | 535 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 536 | t0 = float32_mul(t0, t1, &env->fp_status); |
485d0035 | 537 | update_fpscr(env, GETPC()); |
d6c424c5 | 538 | return t0; |
cc4ba6a9 AJ |
539 | } |
540 | ||
485d0035 | 541 | float64 helper_fmul_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 542 | { |
21829e9b | 543 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 544 | t0 = float64_mul(t0, t1, &env->fp_status); |
485d0035 | 545 | update_fpscr(env, GETPC()); |
d6c424c5 | 546 | return t0; |
cc4ba6a9 AJ |
547 | } |
548 | ||
d6c424c5 | 549 | float32 helper_fneg_T(float32 t0) |
7fdf924f | 550 | { |
d6c424c5 | 551 | return float32_chs(t0); |
7fdf924f AJ |
552 | } |
553 | ||
485d0035 | 554 | float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0) |
cc4ba6a9 | 555 | { |
21829e9b | 556 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 557 | t0 = float32_sqrt(t0, &env->fp_status); |
485d0035 | 558 | update_fpscr(env, GETPC()); |
d6c424c5 | 559 | return t0; |
cc4ba6a9 AJ |
560 | } |
561 | ||
485d0035 | 562 | float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0) |
cc4ba6a9 | 563 | { |
21829e9b | 564 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 565 | t0 = float64_sqrt(t0, &env->fp_status); |
485d0035 | 566 | update_fpscr(env, GETPC()); |
d6c424c5 | 567 | return t0; |
cc4ba6a9 AJ |
568 | } |
569 | ||
485d0035 | 570 | float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1) |
cc4ba6a9 | 571 | { |
21829e9b | 572 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 573 | t0 = float32_sub(t0, t1, &env->fp_status); |
485d0035 | 574 | update_fpscr(env, GETPC()); |
d6c424c5 | 575 | return t0; |
cc4ba6a9 AJ |
576 | } |
577 | ||
485d0035 | 578 | float64 helper_fsub_DT(CPUSH4State *env, float64 t0, float64 t1) |
cc4ba6a9 | 579 | { |
21829e9b | 580 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 581 | t0 = float64_sub(t0, t1, &env->fp_status); |
485d0035 | 582 | update_fpscr(env, GETPC()); |
d6c424c5 | 583 | return t0; |
cc4ba6a9 AJ |
584 | } |
585 | ||
485d0035 | 586 | uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0) |
cc4ba6a9 | 587 | { |
21829e9b | 588 | uint32_t ret; |
21829e9b | 589 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 590 | ret = float32_to_int32_round_to_zero(t0, &env->fp_status); |
485d0035 | 591 | update_fpscr(env, GETPC()); |
21829e9b | 592 | return ret; |
cc4ba6a9 AJ |
593 | } |
594 | ||
485d0035 | 595 | uint32_t helper_ftrc_DT(CPUSH4State *env, float64 t0) |
cc4ba6a9 | 596 | { |
21829e9b | 597 | uint32_t ret; |
21829e9b | 598 | set_float_exception_flags(0, &env->fp_status); |
d6c424c5 | 599 | ret = float64_to_int32_round_to_zero(t0, &env->fp_status); |
485d0035 | 600 | update_fpscr(env, GETPC()); |
21829e9b | 601 | return ret; |
cc4ba6a9 | 602 | } |
af8c2bde | 603 | |
485d0035 | 604 | void helper_fipr(CPUSH4State *env, uint32_t m, uint32_t n) |
af8c2bde AJ |
605 | { |
606 | int bank, i; | |
607 | float32 r, p; | |
608 | ||
609 | bank = (env->sr & FPSCR_FR) ? 16 : 0; | |
610 | r = float32_zero; | |
611 | set_float_exception_flags(0, &env->fp_status); | |
612 | ||
613 | for (i = 0 ; i < 4 ; i++) { | |
614 | p = float32_mul(env->fregs[bank + m + i], | |
615 | env->fregs[bank + n + i], | |
616 | &env->fp_status); | |
617 | r = float32_add(r, p, &env->fp_status); | |
618 | } | |
485d0035 | 619 | update_fpscr(env, GETPC()); |
af8c2bde AJ |
620 | |
621 | env->fregs[bank + n + 3] = r; | |
622 | } | |
17075f10 | 623 | |
485d0035 | 624 | void helper_ftrv(CPUSH4State *env, uint32_t n) |
17075f10 AJ |
625 | { |
626 | int bank_matrix, bank_vector; | |
627 | int i, j; | |
628 | float32 r[4]; | |
629 | float32 p; | |
630 | ||
631 | bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16; | |
632 | bank_vector = (env->sr & FPSCR_FR) ? 16 : 0; | |
633 | set_float_exception_flags(0, &env->fp_status); | |
634 | for (i = 0 ; i < 4 ; i++) { | |
635 | r[i] = float32_zero; | |
636 | for (j = 0 ; j < 4 ; j++) { | |
637 | p = float32_mul(env->fregs[bank_matrix + 4 * j + i], | |
638 | env->fregs[bank_vector + j], | |
639 | &env->fp_status); | |
640 | r[i] = float32_add(r[i], p, &env->fp_status); | |
641 | } | |
642 | } | |
485d0035 | 643 | update_fpscr(env, GETPC()); |
17075f10 AJ |
644 | |
645 | for (i = 0 ; i < 4 ; i++) { | |
646 | env->fregs[bank_vector + i] = r[i]; | |
647 | } | |
648 | } |