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7a3f1944 FB |
1 | #ifndef EXEC_SPARC_H |
2 | #define EXEC_SPARC_H 1 | |
3475187d | 3 | #include "config.h" |
8294eba1 | 4 | #include "dyngen-exec.h" |
7a3f1944 FB |
5 | |
6 | register struct CPUSPARCState *env asm(AREG0); | |
01d6a890 | 7 | |
af7bf89b FB |
8 | #ifdef TARGET_SPARC64 |
9 | #define T0 (env->t0) | |
af7bf89b | 10 | #define T2 (env->t2) |
3475187d | 11 | #define REGWPTR env->regwptr |
af7bf89b | 12 | #else |
7a3f1944 | 13 | register uint32_t T0 asm(AREG1); |
3475187d FB |
14 | |
15 | #undef REG_REGWPTR // Broken | |
16 | #ifdef REG_REGWPTR | |
01d6a890 TS |
17 | #if defined(__sparc__) |
18 | register uint32_t *REGWPTR asm(AREG4); | |
19 | #else | |
3475187d | 20 | register uint32_t *REGWPTR asm(AREG3); |
01d6a890 | 21 | #endif |
3475187d FB |
22 | #define reg_REGWPTR |
23 | ||
24 | #ifdef AREG4 | |
25 | register uint32_t T2 asm(AREG4); | |
26 | #define reg_T2 | |
27 | #else | |
28 | #define T2 (env->t2) | |
29 | #endif | |
30 | ||
31 | #else | |
32 | #define REGWPTR env->regwptr | |
7a3f1944 | 33 | register uint32_t T2 asm(AREG3); |
01d6a890 | 34 | #endif |
3475187d FB |
35 | #define reg_T2 |
36 | #endif | |
3475187d | 37 | |
e8af50a3 FB |
38 | #define FT0 (env->ft0) |
39 | #define FT1 (env->ft1) | |
e8af50a3 FB |
40 | #define DT0 (env->dt0) |
41 | #define DT1 (env->dt1) | |
1f587329 BS |
42 | #if defined(CONFIG_USER_ONLY) |
43 | #define QT0 (env->qt0) | |
44 | #define QT1 (env->qt1) | |
45 | #endif | |
7a3f1944 FB |
46 | |
47 | #include "cpu.h" | |
48 | #include "exec-all.h" | |
49 | ||
50 | void cpu_lock(void); | |
51 | void cpu_unlock(void); | |
52 | void cpu_loop_exit(void); | |
e8af50a3 | 53 | void set_cwp(int new_cwp); |
878d3096 | 54 | void do_interrupt(int intno); |
af7bf89b | 55 | void memcpy32(target_ulong *dst, const target_ulong *src); |
ee5bbe38 FB |
56 | target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); |
57 | void dump_mmu(CPUState *env); | |
e8af50a3 FB |
58 | |
59 | /* XXX: move that to a generic header */ | |
60 | #if !defined(CONFIG_USER_ONLY) | |
a9049a07 | 61 | #include "softmmu_exec.h" |
e8af50a3 | 62 | #endif /* !defined(CONFIG_USER_ONLY) */ |
0d1a29f9 FB |
63 | |
64 | static inline void env_to_regs(void) | |
65 | { | |
aea3ce4c FB |
66 | #if defined(reg_REGWPTR) |
67 | REGWPTR = env->regbase + (env->cwp * 16); | |
68 | env->regwptr = REGWPTR; | |
69 | #endif | |
0d1a29f9 FB |
70 | } |
71 | ||
72 | static inline void regs_to_env(void) | |
73 | { | |
74 | } | |
75 | ||
9d893301 | 76 | int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, |
6ebbf390 | 77 | int mmu_idx, int is_softmmu); |
9d893301 | 78 | |
bfed01fc TS |
79 | static inline int cpu_halted(CPUState *env) { |
80 | if (!env->halted) | |
81 | return 0; | |
82 | if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) { | |
83 | env->halted = 0; | |
84 | return 0; | |
85 | } | |
86 | return EXCP_HALTED; | |
87 | } | |
88 | ||
7a3f1944 | 89 | #endif |