]> git.proxmox.com Git - mirror_qemu.git/blame - target-sparc/helper.c
hbitmap: Fix shifts of constants by granularity
[mirror_qemu.git] / target-sparc / helper.c
CommitLineData
e8af50a3 1/*
163fa5ca 2 * Misc Sparc helpers
5fafdf24 3 *
83469015 4 * Copyright (c) 2003-2005 Fabrice Bellard
e8af50a3
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
e8af50a3 18 */
ee5bbe38 19
db5ebe5f 20#include "qemu/osdep.h"
ee5bbe38 21#include "cpu.h"
63c91552 22#include "exec/exec-all.h"
1de7afc9 23#include "qemu/host-utils.h"
2ef6175a 24#include "exec/helper-proto.h"
9c17d615 25#include "sysemu/sysemu.h"
e8af50a3 26
2f9d35fc
RH
27void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra)
28{
29 CPUState *cs = CPU(sparc_env_get_cpu(env));
30
31 cs->exception_index = tt;
32 cpu_loop_exit_restore(cs, ra);
33}
34
c5f9864e 35void helper_raise_exception(CPUSPARCState *env, int tt)
bc265319 36{
27103424
AF
37 CPUState *cs = CPU(sparc_env_get_cpu(env));
38
39 cs->exception_index = tt;
5638d180 40 cpu_loop_exit(cs);
bc265319
BS
41}
42
c5f9864e 43void helper_debug(CPUSPARCState *env)
bc265319 44{
27103424
AF
45 CPUState *cs = CPU(sparc_env_get_cpu(env));
46
47 cs->exception_index = EXCP_DEBUG;
5638d180 48 cpu_loop_exit(cs);
bc265319
BS
49}
50
2336c1f1
BS
51#ifdef TARGET_SPARC64
52target_ulong helper_popc(target_ulong val)
53{
54 return ctpop64(val);
55}
56
57void helper_tick_set_count(void *opaque, uint64_t count)
58{
59#if !defined(CONFIG_USER_ONLY)
60 cpu_tick_set_count(opaque, count);
61#endif
62}
63
c9a46442 64uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
2336c1f1
BS
65{
66#if !defined(CONFIG_USER_ONLY)
c9a46442
MCA
67 CPUTimer *timer = opaque;
68
69 if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
2f9d35fc 70 cpu_raise_exception_ra(env, TT_PRIV_INSN, GETPC());
c9a46442
MCA
71 }
72
73 return cpu_tick_get_count(timer);
2336c1f1
BS
74#else
75 return 0;
76#endif
77}
78
79void helper_tick_set_limit(void *opaque, uint64_t limit)
80{
81#if !defined(CONFIG_USER_ONLY)
82 cpu_tick_set_limit(opaque, limit);
83#endif
84}
85#endif
7a5e4488 86
2f9d35fc
RH
87static target_ulong do_udiv(CPUSPARCState *env, target_ulong a,
88 target_ulong b, int cc, uintptr_t ra)
7a5e4488
BS
89{
90 int overflow = 0;
91 uint64_t x0;
92 uint32_t x1;
93
94 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
95 x1 = (b & 0xffffffff);
96
97 if (x1 == 0) {
2f9d35fc 98 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
7a5e4488
BS
99 }
100
101 x0 = x0 / x1;
6a5b69a9
OD
102 if (x0 > UINT32_MAX) {
103 x0 = UINT32_MAX;
7a5e4488
BS
104 overflow = 1;
105 }
106
107 if (cc) {
108 env->cc_dst = x0;
109 env->cc_src2 = overflow;
110 env->cc_op = CC_OP_DIV;
111 }
112 return x0;
113}
114
c5f9864e 115target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 116{
2f9d35fc 117 return do_udiv(env, a, b, 0, GETPC());
7a5e4488
BS
118}
119
c5f9864e 120target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 121{
2f9d35fc 122 return do_udiv(env, a, b, 1, GETPC());
7a5e4488
BS
123}
124
2f9d35fc
RH
125static target_ulong do_sdiv(CPUSPARCState *env, target_ulong a,
126 target_ulong b, int cc, uintptr_t ra)
7a5e4488
BS
127{
128 int overflow = 0;
129 int64_t x0;
130 int32_t x1;
131
132 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
133 x1 = (b & 0xffffffff);
134
135 if (x1 == 0) {
2f9d35fc 136 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
6a5b69a9
OD
137 } else if (x1 == -1 && x0 == INT64_MIN) {
138 x0 = INT32_MAX;
7a5e4488 139 overflow = 1;
6a5b69a9
OD
140 } else {
141 x0 = x0 / x1;
142 if ((int32_t) x0 != x0) {
143 x0 = x0 < 0 ? INT32_MIN : INT32_MAX;
144 overflow = 1;
145 }
7a5e4488
BS
146 }
147
148 if (cc) {
149 env->cc_dst = x0;
150 env->cc_src2 = overflow;
151 env->cc_op = CC_OP_DIV;
152 }
153 return x0;
154}
155
c5f9864e 156target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 157{
2f9d35fc 158 return do_sdiv(env, a, b, 0, GETPC());
7a5e4488
BS
159}
160
c5f9864e 161target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 162{
2f9d35fc 163 return do_sdiv(env, a, b, 1, GETPC());
7a5e4488 164}
c28ae41e
RH
165
166#ifdef TARGET_SPARC64
167int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
168{
169 if (b == 0) {
170 /* Raise divide by zero trap. */
2f9d35fc 171 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
c28ae41e
RH
172 } else if (b == -1) {
173 /* Avoid overflow trap with i386 divide insn. */
174 return -a;
175 } else {
176 return a / b;
177 }
178}
179
180uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
181{
182 if (b == 0) {
183 /* Raise divide by zero trap. */
2f9d35fc 184 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
c28ae41e
RH
185 }
186 return a / b;
187}
188#endif
a2ea4aa9
RH
189
190target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
191 target_ulong src2)
192{
193 target_ulong dst;
194
195 /* Tag overflow occurs if either input has bits 0 or 1 set. */
196 if ((src1 | src2) & 3) {
197 goto tag_overflow;
198 }
199
200 dst = src1 + src2;
201
202 /* Tag overflow occurs if the addition overflows. */
203 if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
204 goto tag_overflow;
205 }
206
207 /* Only modify the CC after any exceptions have been generated. */
208 env->cc_op = CC_OP_TADDTV;
209 env->cc_src = src1;
210 env->cc_src2 = src2;
211 env->cc_dst = dst;
212 return dst;
213
214 tag_overflow:
2f9d35fc 215 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
a2ea4aa9
RH
216}
217
218target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
219 target_ulong src2)
220{
221 target_ulong dst;
222
223 /* Tag overflow occurs if either input has bits 0 or 1 set. */
224 if ((src1 | src2) & 3) {
225 goto tag_overflow;
226 }
227
228 dst = src1 - src2;
229
230 /* Tag overflow occurs if the subtraction overflows. */
231 if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
232 goto tag_overflow;
233 }
234
235 /* Only modify the CC after any exceptions have been generated. */
236 env->cc_op = CC_OP_TSUBTV;
237 env->cc_src = src1;
238 env->cc_src2 = src2;
239 env->cc_dst = dst;
240 return dst;
241
242 tag_overflow:
2f9d35fc 243 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
a2ea4aa9 244}
d1c36ba7
RH
245
246#ifndef TARGET_SPARC64
247void helper_power_down(CPUSPARCState *env)
248{
259186a7
AF
249 CPUState *cs = CPU(sparc_env_get_cpu(env));
250
251 cs->halted = 1;
27103424 252 cs->exception_index = EXCP_HLT;
d1c36ba7
RH
253 env->pc = env->npc;
254 env->npc = env->pc + 4;
5638d180 255 cpu_loop_exit(cs);
d1c36ba7
RH
256}
257#endif