[mirror_qemu.git] / target-xtensa / op_helper.c

/*
 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of the Open Source and Linux Lab nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "cpu.h"
#include "dyngen-exec.h"
#include "helpers.h"
#include "host-utils.h"

static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
        void *retaddr);

#define ALIGNED_ONLY
#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

static void do_restore_state(void *pc_ptr)
{
    TranslationBlock *tb;
    uint32_t pc = (uint32_t)(intptr_t)pc_ptr;

    tb = tb_find_pc(pc);
    if (tb) {
        cpu_restore_state(tb, env, pc);
    }
}

static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
        void *retaddr)
{
    if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
            !xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
        do_restore_state(retaddr);
        HELPER(exception_cause_vaddr)(
                env->pc, LOAD_STORE_ALIGNMENT_CAUSE, addr);
    }
}

void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
{
    tlb_set_page(cpu_single_env,
            addr & ~(TARGET_PAGE_SIZE - 1),
            addr & ~(TARGET_PAGE_SIZE - 1),
            PAGE_READ | PAGE_WRITE | PAGE_EXEC,
            mmu_idx, TARGET_PAGE_SIZE);
}

void HELPER(exception)(uint32_t excp)
{
    env->exception_index = excp;
    cpu_loop_exit(env);
}

void HELPER(exception_cause)(uint32_t pc, uint32_t cause)
{
    uint32_t vector;

    env->pc = pc;
    if (env->sregs[PS] & PS_EXCM) {
        if (env->config->ndepc) {
            env->sregs[DEPC] = pc;
        } else {
            env->sregs[EPC1] = pc;
        }
        vector = EXC_DOUBLE;
    } else {
        env->sregs[EPC1] = pc;
        vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
    }

    env->sregs[EXCCAUSE] = cause;
    env->sregs[PS] |= PS_EXCM;

    HELPER(exception)(vector);
}

void HELPER(exception_cause_vaddr)(uint32_t pc, uint32_t cause, uint32_t vaddr)
{
    env->sregs[EXCVADDR] = vaddr;
    HELPER(exception_cause)(pc, cause);
}

uint32_t HELPER(nsa)(uint32_t v)
{
    if (v & 0x80000000) {
        v = ~v;
    }
    return v ? clz32(v) - 1 : 31;
}

uint32_t HELPER(nsau)(uint32_t v)
{
    return v ? clz32(v) : 32;
}

static void copy_window_from_phys(CPUState *env,
        uint32_t window, uint32_t phys, uint32_t n)
{
    assert(phys < env->config->nareg);
    if (phys + n <= env->config->nareg) {
        memcpy(env->regs + window, env->phys_regs + phys,
                n * sizeof(uint32_t));
    } else {
        uint32_t n1 = env->config->nareg - phys;
        memcpy(env->regs + window, env->phys_regs + phys,
                n1 * sizeof(uint32_t));
        memcpy(env->regs + window + n1, env->phys_regs,
                (n - n1) * sizeof(uint32_t));
    }
}

static void copy_phys_from_window(CPUState *env,
        uint32_t phys, uint32_t window, uint32_t n)
{
    assert(phys < env->config->nareg);
    if (phys + n <= env->config->nareg) {
        memcpy(env->phys_regs + phys, env->regs + window,
                n * sizeof(uint32_t));
    } else {
        uint32_t n1 = env->config->nareg - phys;
        memcpy(env->phys_regs + phys, env->regs + window,
                n1 * sizeof(uint32_t));
        memcpy(env->phys_regs, env->regs + window + n1,
                (n - n1) * sizeof(uint32_t));
    }
}


static inline unsigned windowbase_bound(unsigned a, const CPUState *env)
{
    return a & (env->config->nareg / 4 - 1);
}

static inline unsigned windowstart_bit(unsigned a, const CPUState *env)
{
    return 1 << windowbase_bound(a, env);
}

void xtensa_sync_window_from_phys(CPUState *env)
{
    copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
}

void xtensa_sync_phys_from_window(CPUState *env)
{
    copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
}

static void rotate_window_abs(uint32_t position)
{
    xtensa_sync_phys_from_window(env);
    env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
    xtensa_sync_window_from_phys(env);
}

static void rotate_window(uint32_t delta)
{
    rotate_window_abs(env->sregs[WINDOW_BASE] + delta);
}

void HELPER(wsr_windowbase)(uint32_t v)
{
    rotate_window_abs(v);
}

void HELPER(entry)(uint32_t pc, uint32_t s, uint32_t imm)
{
    int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
    if (s > 3 || ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) {
        qemu_log("Illegal entry instruction(pc = %08x), PS = %08x\n",
                pc, env->sregs[PS]);
        HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
    } else {
        env->regs[(callinc << 2) | (s & 3)] = env->regs[s] - (imm << 3);
        rotate_window(callinc);
        env->sregs[WINDOW_START] |=
            windowstart_bit(env->sregs[WINDOW_BASE], env);
    }
}

void HELPER(window_check)(uint32_t pc, uint32_t w)
{
    uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
    uint32_t windowstart = env->sregs[WINDOW_START];
    uint32_t m, n;

    if ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) {
        return;
    }

    for (n = 1; ; ++n) {
        if (n > w) {
            return;
        }
        if (windowstart & windowstart_bit(windowbase + n, env)) {
            break;
        }
    }

    m = windowbase_bound(windowbase + n, env);
    rotate_window(n);
    env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
        (windowbase << PS_OWB_SHIFT) | PS_EXCM;
    env->sregs[EPC1] = env->pc = pc;

    if (windowstart & windowstart_bit(m + 1, env)) {
        HELPER(exception)(EXC_WINDOW_OVERFLOW4);
    } else if (windowstart & windowstart_bit(m + 2, env)) {
        HELPER(exception)(EXC_WINDOW_OVERFLOW8);
    } else {
        HELPER(exception)(EXC_WINDOW_OVERFLOW12);
    }
}

uint32_t HELPER(retw)(uint32_t pc)
{
    int n = (env->regs[0] >> 30) & 0x3;
    int m = 0;
    uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
    uint32_t windowstart = env->sregs[WINDOW_START];
    uint32_t ret_pc = 0;

    if (windowstart & windowstart_bit(windowbase - 1, env)) {
        m = 1;
    } else if (windowstart & windowstart_bit(windowbase - 2, env)) {
        m = 2;
    } else if (windowstart & windowstart_bit(windowbase - 3, env)) {
        m = 3;
    }

    if (n == 0 || (m != 0 && m != n) ||
            ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) {
        qemu_log("Illegal retw instruction(pc = %08x), "
                "PS = %08x, m = %d, n = %d\n",
                pc, env->sregs[PS], m, n);
        HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
    } else {
        int owb = windowbase;

        ret_pc = (pc & 0xc0000000) | (env->regs[0] & 0x3fffffff);

        rotate_window(-n);
        if (windowstart & windowstart_bit(env->sregs[WINDOW_BASE], env)) {
            env->sregs[WINDOW_START] &= ~windowstart_bit(owb, env);
        } else {
            /* window underflow */
            env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
                (windowbase << PS_OWB_SHIFT) | PS_EXCM;
            env->sregs[EPC1] = env->pc = pc;

            if (n == 1) {
                HELPER(exception)(EXC_WINDOW_UNDERFLOW4);
            } else if (n == 2) {
                HELPER(exception)(EXC_WINDOW_UNDERFLOW8);
            } else if (n == 3) {
                HELPER(exception)(EXC_WINDOW_UNDERFLOW12);
            }
        }
    }
    return ret_pc;
}

void HELPER(rotw)(uint32_t imm4)
{
    rotate_window(imm4);
}

void HELPER(restore_owb)(void)
{
    rotate_window_abs((env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
}

void HELPER(movsp)(uint32_t pc)
{
    if ((env->sregs[WINDOW_START] &
            (windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) |
             windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) |
             windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
        HELPER(exception_cause)(pc, ALLOCA_CAUSE);
    }
}

void HELPER(wsr_lbeg)(uint32_t v)
{
    if (env->sregs[LBEG] != v) {
        tb_invalidate_phys_page_range(
                env->sregs[LEND] - 1, env->sregs[LEND], 0);
        env->sregs[LBEG] = v;
    }
}

void HELPER(wsr_lend)(uint32_t v)
{
    if (env->sregs[LEND] != v) {
        tb_invalidate_phys_page_range(
                env->sregs[LEND] - 1, env->sregs[LEND], 0);
        env->sregs[LEND] = v;
        tb_invalidate_phys_page_range(
                env->sregs[LEND] - 1, env->sregs[LEND], 0);
    }
}

void HELPER(dump_state)(void)
{
    cpu_dump_state(env, stderr, fprintf, 0);
}

void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
{
    env->pc = pc;
    env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
        (intlevel << PS_INTLEVEL_SHIFT);
    check_interrupts(env);
    if (env->pending_irq_level) {
        cpu_loop_exit(env);
        return;
    }

    if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
        int i;
        uint32_t wake_ccount = env->sregs[CCOUNT] - 1;

        for (i = 0; i < env->config->nccompare; ++i) {
            if (env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] <
                    wake_ccount - env->sregs[CCOUNT]) {
                wake_ccount = env->sregs[CCOMPARE + i];
            }
        }
        env->wake_ccount = wake_ccount;
        qemu_mod_timer(env->ccompare_timer, qemu_get_clock_ns(vm_clock) +
                muldiv64(wake_ccount - env->sregs[CCOUNT],
                    1000000, env->config->clock_freq_khz));
    }
    env->halt_clock = qemu_get_clock_ns(vm_clock);
    env->halted = 1;
    HELPER(exception)(EXCP_HLT);
}

void HELPER(timer_irq)(uint32_t id, uint32_t active)
{
    xtensa_timer_irq(env, id, active);
}

void HELPER(advance_ccount)(uint32_t d)
{
    xtensa_advance_ccount(env, d);
}

void HELPER(check_interrupts)(CPUState *env)
{
    check_interrupts(env);
}
Commit	Line	Data
2328826b MF	1	/*
	2	* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
	3	* All rights reserved.
	4	*
	5	* Redistribution and use in source and binary forms, with or without
	6	* modification, are permitted provided that the following conditions are met:
	7	* * Redistributions of source code must retain the above copyright
	8	* notice, this list of conditions and the following disclaimer.
	9	* * Redistributions in binary form must reproduce the above copyright
	10	* notice, this list of conditions and the following disclaimer in the
	11	* documentation and/or other materials provided with the distribution.
	12	* * Neither the name of the Open Source and Linux Lab nor the
	13	* names of its contributors may be used to endorse or promote products
	14	* derived from this software without specific prior written permission.
	15	*
	16	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	17	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	18	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	19	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
	20	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	21	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
	22	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	23	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	24	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	25	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	26	*/
	27
	28	#include "cpu.h"
	29	#include "dyngen-exec.h"
dedc5eae	30	#include "helpers.h"
3580ecad	31	#include "host-utils.h"
2328826b	32
5b4e481b MF	33	static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
	34	void *retaddr);
	35
	36	#define ALIGNED_ONLY
2328826b MF	37	#define MMUSUFFIX _mmu
	38
	39	#define SHIFT 0
	40	#include "softmmu_template.h"
	41
	42	#define SHIFT 1
	43	#include "softmmu_template.h"
	44
	45	#define SHIFT 2
	46	#include "softmmu_template.h"
	47
	48	#define SHIFT 3
	49	#include "softmmu_template.h"
	50
5b4e481b MF	51	static void do_restore_state(void *pc_ptr)
	52	{
	53	TranslationBlock *tb;
	54	uint32_t pc = (uint32_t)(intptr_t)pc_ptr;
	55
	56	tb = tb_find_pc(pc);
	57	if (tb) {
	58	cpu_restore_state(tb, env, pc);
	59	}
	60	}
	61
	62	static void do_unaligned_access(target_ulong addr, int is_write, int is_user,
	63	void *retaddr)
	64	{
	65	if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
	66	!xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
	67	do_restore_state(retaddr);
	68	HELPER(exception_cause_vaddr)(
	69	env->pc, LOAD_STORE_ALIGNMENT_CAUSE, addr);
	70	}
	71	}
	72
2328826b MF	73	void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
	74	{
	75	tlb_set_page(cpu_single_env,
	76	addr & ~(TARGET_PAGE_SIZE - 1),
	77	addr & ~(TARGET_PAGE_SIZE - 1),
	78	PAGE_READ \| PAGE_WRITE \| PAGE_EXEC,
	79	mmu_idx, TARGET_PAGE_SIZE);
	80	}
dedc5eae MF	81
	82	void HELPER(exception)(uint32_t excp)
	83	{
	84	env->exception_index = excp;
	85	cpu_loop_exit(env);
	86	}
3580ecad	87
40643d7c MF	88	void HELPER(exception_cause)(uint32_t pc, uint32_t cause)
	89	{
	90	uint32_t vector;
	91
	92	env->pc = pc;
	93	if (env->sregs[PS] & PS_EXCM) {
	94	if (env->config->ndepc) {
	95	env->sregs[DEPC] = pc;
	96	} else {
	97	env->sregs[EPC1] = pc;
	98	}
	99	vector = EXC_DOUBLE;
	100	} else {
	101	env->sregs[EPC1] = pc;
	102	vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
	103	}
	104
	105	env->sregs[EXCCAUSE] = cause;
	106	env->sregs[PS] \|= PS_EXCM;
	107
	108	HELPER(exception)(vector);
	109	}
	110
	111	void HELPER(exception_cause_vaddr)(uint32_t pc, uint32_t cause, uint32_t vaddr)
	112	{
	113	env->sregs[EXCVADDR] = vaddr;
	114	HELPER(exception_cause)(pc, cause);
	115	}
	116
3580ecad MF	117	uint32_t HELPER(nsa)(uint32_t v)
	118	{
	119	if (v & 0x80000000) {
	120	v = ~v;
	121	}
	122	return v ? clz32(v) - 1 : 31;
	123	}
	124
	125	uint32_t HELPER(nsau)(uint32_t v)
	126	{
	127	return v ? clz32(v) : 32;
	128	}
553e44f9 MF	129
	130	static void copy_window_from_phys(CPUState *env,
	131	uint32_t window, uint32_t phys, uint32_t n)
	132	{
	133	assert(phys < env->config->nareg);
	134	if (phys + n <= env->config->nareg) {
	135	memcpy(env->regs + window, env->phys_regs + phys,
	136	n * sizeof(uint32_t));
	137	} else {
	138	uint32_t n1 = env->config->nareg - phys;
	139	memcpy(env->regs + window, env->phys_regs + phys,
	140	n1 * sizeof(uint32_t));
	141	memcpy(env->regs + window + n1, env->phys_regs,
	142	(n - n1) * sizeof(uint32_t));
	143	}
	144	}
	145
	146	static void copy_phys_from_window(CPUState *env,
	147	uint32_t phys, uint32_t window, uint32_t n)
	148	{
	149	assert(phys < env->config->nareg);
	150	if (phys + n <= env->config->nareg) {
	151	memcpy(env->phys_regs + phys, env->regs + window,
	152	n * sizeof(uint32_t));
	153	} else {
	154	uint32_t n1 = env->config->nareg - phys;
	155	memcpy(env->phys_regs + phys, env->regs + window,
	156	n1 * sizeof(uint32_t));
	157	memcpy(env->phys_regs, env->regs + window + n1,
	158	(n - n1) * sizeof(uint32_t));
	159	}
	160	}
	161
	162
	163	static inline unsigned windowbase_bound(unsigned a, const CPUState *env)
	164	{
	165	return a & (env->config->nareg / 4 - 1);
	166	}
	167
	168	static inline unsigned windowstart_bit(unsigned a, const CPUState *env)
	169	{
	170	return 1 << windowbase_bound(a, env);
	171	}
	172
	173	void xtensa_sync_window_from_phys(CPUState *env)
	174	{
	175	copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
	176	}
	177
	178	void xtensa_sync_phys_from_window(CPUState *env)
	179	{
	180	copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
	181	}
	182
	183	static void rotate_window_abs(uint32_t position)
	184	{
	185	xtensa_sync_phys_from_window(env);
	186	env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
	187	xtensa_sync_window_from_phys(env);
	188	}
	189
	190	static void rotate_window(uint32_t delta)
	191	{
	192	rotate_window_abs(env->sregs[WINDOW_BASE] + delta);
193	}
194
195	void HELPER(wsr_windowbase)(uint32_t v)
196	{
197	rotate_window_abs(v);
198	}
199
200	void HELPER(entry)(uint32_t pc, uint32_t s, uint32_t imm)
201	{
202	int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
203	if (s > 3 \|\| ((env->sregs[PS] & (PS_WOE \| PS_EXCM)) ^ PS_WOE) != 0) {
204	qemu_log("Illegal entry instruction(pc = %08x), PS = %08x\n",
205	pc, env->sregs[PS]);
206	HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
207	} else {
208	env->regs[(callinc << 2) \| (s & 3)] = env->regs[s] - (imm << 3);
209	rotate_window(callinc);
210	env->sregs[WINDOW_START] \|=
211	windowstart_bit(env->sregs[WINDOW_BASE], env);
212	}
213	}
214
215	void HELPER(window_check)(uint32_t pc, uint32_t w)
216	{
217	uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
218	uint32_t windowstart = env->sregs[WINDOW_START];
219	uint32_t m, n;
220
221	if ((env->sregs[PS] & (PS_WOE \| PS_EXCM)) ^ PS_WOE) {
222	return;
223	}
224
225	for (n = 1; ; ++n) {
226	if (n > w) {
227	return;
228	}
229	if (windowstart & windowstart_bit(windowbase + n, env)) {
230	break;
231	}
232	}
233
234	m = windowbase_bound(windowbase + n, env);
235	rotate_window(n);
236	env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) \|
237	(windowbase << PS_OWB_SHIFT) \| PS_EXCM;
238	env->sregs[EPC1] = env->pc = pc;
239
240	if (windowstart & windowstart_bit(m + 1, env)) {
241	HELPER(exception)(EXC_WINDOW_OVERFLOW4);
242	} else if (windowstart & windowstart_bit(m + 2, env)) {
243	HELPER(exception)(EXC_WINDOW_OVERFLOW8);
244	} else {
245	HELPER(exception)(EXC_WINDOW_OVERFLOW12);
246	}
247	}
248
249	uint32_t HELPER(retw)(uint32_t pc)
250	{
251	int n = (env->regs[0] >> 30) & 0x3;
252	int m = 0;
253	uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
254	uint32_t windowstart = env->sregs[WINDOW_START];
255	uint32_t ret_pc = 0;
256
257	if (windowstart & windowstart_bit(windowbase - 1, env)) {
258	m = 1;
259	} else if (windowstart & windowstart_bit(windowbase - 2, env)) {
260	m = 2;
261	} else if (windowstart & windowstart_bit(windowbase - 3, env)) {
262	m = 3;
263	}
264
265	if (n == 0 \|\| (m != 0 && m != n) \|\|
266	((env->sregs[PS] & (PS_WOE \| PS_EXCM)) ^ PS_WOE) != 0) {
267	qemu_log("Illegal retw instruction(pc = %08x), "
268	"PS = %08x, m = %d, n = %d\n",
269	pc, env->sregs[PS], m, n);
270	HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
271	} else {
272	int owb = windowbase;
273
274	ret_pc = (pc & 0xc0000000) \| (env->regs[0] & 0x3fffffff);
275
276	rotate_window(-n);
277	if (windowstart & windowstart_bit(env->sregs[WINDOW_BASE], env)) {
278	env->sregs[WINDOW_START] &= ~windowstart_bit(owb, env);
279	} else {
280	/* window underflow */
281	env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) \|
282	(windowbase << PS_OWB_SHIFT) \| PS_EXCM;
283	env->sregs[EPC1] = env->pc = pc;
284
285	if (n == 1) {
286	HELPER(exception)(EXC_WINDOW_UNDERFLOW4);
287	} else if (n == 2) {
288	HELPER(exception)(EXC_WINDOW_UNDERFLOW8);
289	} else if (n == 3) {
290	HELPER(exception)(EXC_WINDOW_UNDERFLOW12);
291	}
292	}
293	}
294	return ret_pc;
295	}
296
297	void HELPER(rotw)(uint32_t imm4)
298	{
299	rotate_window(imm4);
300	}
301
302	void HELPER(restore_owb)(void)
303	{
304	rotate_window_abs((env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
305	}
306
307	void HELPER(movsp)(uint32_t pc)
308	{
309	if ((env->sregs[WINDOW_START] &
310	(windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) \|
311	windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) \|
312	windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
313	HELPER(exception_cause)(pc, ALLOCA_CAUSE);
314	}
315	}
316
797d780b MF	317	void HELPER(wsr_lbeg)(uint32_t v)
	318	{
	319	if (env->sregs[LBEG] != v) {
	320	tb_invalidate_phys_page_range(
	321	env->sregs[LEND] - 1, env->sregs[LEND], 0);
	322	env->sregs[LBEG] = v;
	323	}
	324	}
	325
	326	void HELPER(wsr_lend)(uint32_t v)
	327	{
	328	if (env->sregs[LEND] != v) {
	329	tb_invalidate_phys_page_range(
	330	env->sregs[LEND] - 1, env->sregs[LEND], 0);
	331	env->sregs[LEND] = v;
	332	tb_invalidate_phys_page_range(
	333	env->sregs[LEND] - 1, env->sregs[LEND], 0);
	334	}
	335	}
	336
553e44f9 MF	337	void HELPER(dump_state)(void)
	338	{
	339	cpu_dump_state(env, stderr, fprintf, 0);
	340	}
b994e91b MF	341
	342	void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
	343	{
	344	env->pc = pc;
	345	env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) \|
	346	(intlevel << PS_INTLEVEL_SHIFT);
	347	check_interrupts(env);
	348	if (env->pending_irq_level) {
	349	cpu_loop_exit(env);
	350	return;
	351	}
	352
	353	if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
	354	int i;
	355	uint32_t wake_ccount = env->sregs[CCOUNT] - 1;
	356
	357	for (i = 0; i < env->config->nccompare; ++i) {
	358	if (env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] <
	359	wake_ccount - env->sregs[CCOUNT]) {
	360	wake_ccount = env->sregs[CCOMPARE + i];
	361	}
	362	}
	363	env->wake_ccount = wake_ccount;
	364	qemu_mod_timer(env->ccompare_timer, qemu_get_clock_ns(vm_clock) +
	365	muldiv64(wake_ccount - env->sregs[CCOUNT],
	366	1000000, env->config->clock_freq_khz));
	367	}
	368	env->halt_clock = qemu_get_clock_ns(vm_clock);
	369	env->halted = 1;
	370	HELPER(exception)(EXCP_HLT);
	371	}
	372
	373	void HELPER(timer_irq)(uint32_t id, uint32_t active)
	374	{
	375	xtensa_timer_irq(env, id, active);
	376	}
	377
	378	void HELPER(advance_ccount)(uint32_t d)
	379	{
	380	xtensa_advance_ccount(env, d);
	381	}
	382
	383	void HELPER(check_interrupts)(CPUState *env)
	384	{
	385	check_interrupts(env);
	386	}