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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = { | |
25 | "%eax", | |
26 | "%ecx", | |
27 | "%edx", | |
28 | "%ebx", | |
29 | "%esp", | |
30 | "%ebp", | |
31 | "%esi", | |
32 | "%edi", | |
33 | }; | |
34 | ||
0954d0d9 | 35 | int tcg_target_reg_alloc_order[] = { |
c896fe29 FB |
36 | TCG_REG_EAX, |
37 | TCG_REG_EDX, | |
38 | TCG_REG_ECX, | |
39 | TCG_REG_EBX, | |
40 | TCG_REG_ESI, | |
41 | TCG_REG_EDI, | |
42 | TCG_REG_EBP, | |
c896fe29 FB |
43 | }; |
44 | ||
45 | const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX }; | |
46 | const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX }; | |
47 | ||
b03cce8e FB |
48 | static uint8_t *tb_ret_addr; |
49 | ||
c896fe29 | 50 | static void patch_reloc(uint8_t *code_ptr, int type, |
f54b3f92 | 51 | tcg_target_long value, tcg_target_long addend) |
c896fe29 | 52 | { |
f54b3f92 | 53 | value += addend; |
c896fe29 FB |
54 | switch(type) { |
55 | case R_386_32: | |
56 | *(uint32_t *)code_ptr = value; | |
57 | break; | |
58 | case R_386_PC32: | |
59 | *(uint32_t *)code_ptr = value - (long)code_ptr; | |
60 | break; | |
61 | default: | |
62 | tcg_abort(); | |
63 | } | |
64 | } | |
65 | ||
66 | /* maximum number of register used for input function arguments */ | |
67 | static inline int tcg_target_get_call_iarg_regs_count(int flags) | |
68 | { | |
69 | flags &= TCG_CALL_TYPE_MASK; | |
70 | switch(flags) { | |
71 | case TCG_CALL_TYPE_STD: | |
72 | return 0; | |
73 | case TCG_CALL_TYPE_REGPARM_1: | |
74 | case TCG_CALL_TYPE_REGPARM_2: | |
75 | case TCG_CALL_TYPE_REGPARM: | |
76 | return flags - TCG_CALL_TYPE_REGPARM_1 + 1; | |
77 | default: | |
78 | tcg_abort(); | |
79 | } | |
80 | } | |
81 | ||
82 | /* parse target specific constraints */ | |
83 | int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) | |
84 | { | |
85 | const char *ct_str; | |
86 | ||
87 | ct_str = *pct_str; | |
88 | switch(ct_str[0]) { | |
89 | case 'a': | |
90 | ct->ct |= TCG_CT_REG; | |
91 | tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX); | |
92 | break; | |
93 | case 'b': | |
94 | ct->ct |= TCG_CT_REG; | |
95 | tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX); | |
96 | break; | |
97 | case 'c': | |
98 | ct->ct |= TCG_CT_REG; | |
99 | tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX); | |
100 | break; | |
101 | case 'd': | |
102 | ct->ct |= TCG_CT_REG; | |
103 | tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX); | |
104 | break; | |
105 | case 'S': | |
106 | ct->ct |= TCG_CT_REG; | |
107 | tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI); | |
108 | break; | |
109 | case 'D': | |
110 | ct->ct |= TCG_CT_REG; | |
111 | tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI); | |
112 | break; | |
113 | case 'q': | |
114 | ct->ct |= TCG_CT_REG; | |
115 | tcg_regset_set32(ct->u.regs, 0, 0xf); | |
116 | break; | |
117 | case 'r': | |
118 | ct->ct |= TCG_CT_REG; | |
119 | tcg_regset_set32(ct->u.regs, 0, 0xff); | |
120 | break; | |
121 | ||
122 | /* qemu_ld/st address constraint */ | |
123 | case 'L': | |
124 | ct->ct |= TCG_CT_REG; | |
125 | tcg_regset_set32(ct->u.regs, 0, 0xff); | |
126 | tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX); | |
127 | tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX); | |
128 | break; | |
129 | default: | |
130 | return -1; | |
131 | } | |
132 | ct_str++; | |
133 | *pct_str = ct_str; | |
134 | return 0; | |
135 | } | |
136 | ||
137 | /* test if a constant matches the constraint */ | |
138 | static inline int tcg_target_const_match(tcg_target_long val, | |
139 | const TCGArgConstraint *arg_ct) | |
140 | { | |
141 | int ct; | |
142 | ct = arg_ct->ct; | |
143 | if (ct & TCG_CT_CONST) | |
144 | return 1; | |
145 | else | |
146 | return 0; | |
147 | } | |
148 | ||
149 | #define ARITH_ADD 0 | |
150 | #define ARITH_OR 1 | |
151 | #define ARITH_ADC 2 | |
152 | #define ARITH_SBB 3 | |
153 | #define ARITH_AND 4 | |
154 | #define ARITH_SUB 5 | |
155 | #define ARITH_XOR 6 | |
156 | #define ARITH_CMP 7 | |
157 | ||
158 | #define SHIFT_SHL 4 | |
159 | #define SHIFT_SHR 5 | |
160 | #define SHIFT_SAR 7 | |
161 | ||
162 | #define JCC_JMP (-1) | |
163 | #define JCC_JO 0x0 | |
164 | #define JCC_JNO 0x1 | |
165 | #define JCC_JB 0x2 | |
166 | #define JCC_JAE 0x3 | |
167 | #define JCC_JE 0x4 | |
168 | #define JCC_JNE 0x5 | |
169 | #define JCC_JBE 0x6 | |
170 | #define JCC_JA 0x7 | |
171 | #define JCC_JS 0x8 | |
172 | #define JCC_JNS 0x9 | |
173 | #define JCC_JP 0xa | |
174 | #define JCC_JNP 0xb | |
175 | #define JCC_JL 0xc | |
176 | #define JCC_JGE 0xd | |
177 | #define JCC_JLE 0xe | |
178 | #define JCC_JG 0xf | |
179 | ||
180 | #define P_EXT 0x100 /* 0x0f opcode prefix */ | |
181 | ||
182 | static const uint8_t tcg_cond_to_jcc[10] = { | |
183 | [TCG_COND_EQ] = JCC_JE, | |
184 | [TCG_COND_NE] = JCC_JNE, | |
185 | [TCG_COND_LT] = JCC_JL, | |
186 | [TCG_COND_GE] = JCC_JGE, | |
187 | [TCG_COND_LE] = JCC_JLE, | |
188 | [TCG_COND_GT] = JCC_JG, | |
189 | [TCG_COND_LTU] = JCC_JB, | |
190 | [TCG_COND_GEU] = JCC_JAE, | |
191 | [TCG_COND_LEU] = JCC_JBE, | |
192 | [TCG_COND_GTU] = JCC_JA, | |
193 | }; | |
194 | ||
195 | static inline void tcg_out_opc(TCGContext *s, int opc) | |
196 | { | |
197 | if (opc & P_EXT) | |
198 | tcg_out8(s, 0x0f); | |
199 | tcg_out8(s, opc); | |
200 | } | |
201 | ||
202 | static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm) | |
203 | { | |
204 | tcg_out_opc(s, opc); | |
205 | tcg_out8(s, 0xc0 | (r << 3) | rm); | |
206 | } | |
207 | ||
208 | /* rm == -1 means no register index */ | |
209 | static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, | |
210 | int32_t offset) | |
211 | { | |
212 | tcg_out_opc(s, opc); | |
213 | if (rm == -1) { | |
214 | tcg_out8(s, 0x05 | (r << 3)); | |
215 | tcg_out32(s, offset); | |
216 | } else if (offset == 0 && rm != TCG_REG_EBP) { | |
217 | if (rm == TCG_REG_ESP) { | |
218 | tcg_out8(s, 0x04 | (r << 3)); | |
219 | tcg_out8(s, 0x24); | |
220 | } else { | |
221 | tcg_out8(s, 0x00 | (r << 3) | rm); | |
222 | } | |
223 | } else if ((int8_t)offset == offset) { | |
224 | if (rm == TCG_REG_ESP) { | |
225 | tcg_out8(s, 0x44 | (r << 3)); | |
226 | tcg_out8(s, 0x24); | |
227 | } else { | |
228 | tcg_out8(s, 0x40 | (r << 3) | rm); | |
229 | } | |
230 | tcg_out8(s, offset); | |
231 | } else { | |
232 | if (rm == TCG_REG_ESP) { | |
233 | tcg_out8(s, 0x84 | (r << 3)); | |
234 | tcg_out8(s, 0x24); | |
235 | } else { | |
236 | tcg_out8(s, 0x80 | (r << 3) | rm); | |
237 | } | |
238 | tcg_out32(s, offset); | |
239 | } | |
240 | } | |
241 | ||
242 | static inline void tcg_out_mov(TCGContext *s, int ret, int arg) | |
243 | { | |
244 | if (arg != ret) | |
245 | tcg_out_modrm(s, 0x8b, ret, arg); | |
246 | } | |
247 | ||
248 | static inline void tcg_out_movi(TCGContext *s, TCGType type, | |
249 | int ret, int32_t arg) | |
250 | { | |
251 | if (arg == 0) { | |
252 | /* xor r0,r0 */ | |
253 | tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret); | |
254 | } else { | |
255 | tcg_out8(s, 0xb8 + ret); | |
256 | tcg_out32(s, arg); | |
257 | } | |
258 | } | |
259 | ||
e4d5434c BS |
260 | static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret, |
261 | int arg1, tcg_target_long arg2) | |
c896fe29 FB |
262 | { |
263 | /* movl */ | |
264 | tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2); | |
265 | } | |
266 | ||
e4d5434c BS |
267 | static inline void tcg_out_st(TCGContext *s, TCGType type, int arg, |
268 | int arg1, tcg_target_long arg2) | |
c896fe29 FB |
269 | { |
270 | /* movl */ | |
271 | tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2); | |
272 | } | |
273 | ||
274 | static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val) | |
275 | { | |
276 | if (val == (int8_t)val) { | |
277 | tcg_out_modrm(s, 0x83, c, r0); | |
278 | tcg_out8(s, val); | |
279 | } else { | |
280 | tcg_out_modrm(s, 0x81, c, r0); | |
281 | tcg_out32(s, val); | |
282 | } | |
283 | } | |
284 | ||
285 | void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) | |
286 | { | |
287 | if (val != 0) | |
288 | tgen_arithi(s, ARITH_ADD, reg, val); | |
289 | } | |
290 | ||
291 | static void tcg_out_jxx(TCGContext *s, int opc, int label_index) | |
292 | { | |
293 | int32_t val, val1; | |
294 | TCGLabel *l = &s->labels[label_index]; | |
295 | ||
296 | if (l->has_value) { | |
297 | val = l->u.value - (tcg_target_long)s->code_ptr; | |
298 | val1 = val - 2; | |
299 | if ((int8_t)val1 == val1) { | |
300 | if (opc == -1) | |
301 | tcg_out8(s, 0xeb); | |
302 | else | |
303 | tcg_out8(s, 0x70 + opc); | |
304 | tcg_out8(s, val1); | |
305 | } else { | |
306 | if (opc == -1) { | |
307 | tcg_out8(s, 0xe9); | |
308 | tcg_out32(s, val - 5); | |
309 | } else { | |
310 | tcg_out8(s, 0x0f); | |
311 | tcg_out8(s, 0x80 + opc); | |
312 | tcg_out32(s, val - 6); | |
313 | } | |
314 | } | |
315 | } else { | |
316 | if (opc == -1) { | |
317 | tcg_out8(s, 0xe9); | |
318 | } else { | |
319 | tcg_out8(s, 0x0f); | |
320 | tcg_out8(s, 0x80 + opc); | |
321 | } | |
322 | tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4); | |
623e265c | 323 | s->code_ptr += 4; |
c896fe29 FB |
324 | } |
325 | } | |
326 | ||
327 | static void tcg_out_brcond(TCGContext *s, int cond, | |
328 | TCGArg arg1, TCGArg arg2, int const_arg2, | |
329 | int label_index) | |
330 | { | |
c896fe29 FB |
331 | if (const_arg2) { |
332 | if (arg2 == 0) { | |
c896fe29 FB |
333 | /* test r, r */ |
334 | tcg_out_modrm(s, 0x85, arg1, arg1); | |
c896fe29 | 335 | } else { |
c896fe29 | 336 | tgen_arithi(s, ARITH_CMP, arg1, arg2); |
c896fe29 FB |
337 | } |
338 | } else { | |
bb210e78 | 339 | tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1); |
c896fe29 | 340 | } |
affa3264 | 341 | tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index); |
c896fe29 FB |
342 | } |
343 | ||
344 | /* XXX: we implement it at the target level to avoid having to | |
345 | handle cross basic blocks temporaries */ | |
346 | static void tcg_out_brcond2(TCGContext *s, | |
347 | const TCGArg *args, const int *const_args) | |
348 | { | |
349 | int label_next; | |
350 | label_next = gen_new_label(); | |
351 | switch(args[4]) { | |
352 | case TCG_COND_EQ: | |
353 | tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next); | |
354 | tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]); | |
355 | break; | |
356 | case TCG_COND_NE: | |
357 | tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]); | |
bb210e78 | 358 | tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]); |
c896fe29 FB |
359 | break; |
360 | case TCG_COND_LT: | |
361 | tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 362 | tcg_out_jxx(s, JCC_JNE, label_next); |
d643ccca | 363 | tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]); |
c896fe29 FB |
364 | break; |
365 | case TCG_COND_LE: | |
366 | tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 367 | tcg_out_jxx(s, JCC_JNE, label_next); |
d643ccca | 368 | tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]); |
c896fe29 FB |
369 | break; |
370 | case TCG_COND_GT: | |
371 | tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 372 | tcg_out_jxx(s, JCC_JNE, label_next); |
d643ccca | 373 | tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]); |
c896fe29 FB |
374 | break; |
375 | case TCG_COND_GE: | |
376 | tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 377 | tcg_out_jxx(s, JCC_JNE, label_next); |
d643ccca | 378 | tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]); |
c896fe29 FB |
379 | break; |
380 | case TCG_COND_LTU: | |
381 | tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 382 | tcg_out_jxx(s, JCC_JNE, label_next); |
c896fe29 FB |
383 | tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]); |
384 | break; | |
385 | case TCG_COND_LEU: | |
386 | tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 387 | tcg_out_jxx(s, JCC_JNE, label_next); |
c896fe29 FB |
388 | tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]); |
389 | break; | |
390 | case TCG_COND_GTU: | |
391 | tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 392 | tcg_out_jxx(s, JCC_JNE, label_next); |
c896fe29 FB |
393 | tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]); |
394 | break; | |
395 | case TCG_COND_GEU: | |
396 | tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]); | |
affa3264 | 397 | tcg_out_jxx(s, JCC_JNE, label_next); |
c896fe29 FB |
398 | tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]); |
399 | break; | |
400 | default: | |
401 | tcg_abort(); | |
402 | } | |
403 | tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr); | |
404 | } | |
405 | ||
406 | #if defined(CONFIG_SOFTMMU) | |
407 | extern void __ldb_mmu(void); | |
408 | extern void __ldw_mmu(void); | |
409 | extern void __ldl_mmu(void); | |
410 | extern void __ldq_mmu(void); | |
411 | ||
412 | extern void __stb_mmu(void); | |
413 | extern void __stw_mmu(void); | |
414 | extern void __stl_mmu(void); | |
415 | extern void __stq_mmu(void); | |
416 | ||
417 | static void *qemu_ld_helpers[4] = { | |
418 | __ldb_mmu, | |
419 | __ldw_mmu, | |
420 | __ldl_mmu, | |
421 | __ldq_mmu, | |
422 | }; | |
423 | ||
424 | static void *qemu_st_helpers[4] = { | |
425 | __stb_mmu, | |
426 | __stw_mmu, | |
427 | __stl_mmu, | |
428 | __stq_mmu, | |
429 | }; | |
430 | #endif | |
431 | ||
432 | /* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and | |
433 | EAX. It will be useful once fixed registers globals are less | |
434 | common. */ | |
435 | static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, | |
436 | int opc) | |
437 | { | |
438 | int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap; | |
439 | #if defined(CONFIG_SOFTMMU) | |
440 | uint8_t *label1_ptr, *label2_ptr; | |
441 | #endif | |
442 | #if TARGET_LONG_BITS == 64 | |
443 | #if defined(CONFIG_SOFTMMU) | |
444 | uint8_t *label3_ptr; | |
445 | #endif | |
446 | int addr_reg2; | |
447 | #endif | |
448 | ||
449 | data_reg = *args++; | |
450 | if (opc == 3) | |
451 | data_reg2 = *args++; | |
452 | else | |
453 | data_reg2 = 0; | |
454 | addr_reg = *args++; | |
455 | #if TARGET_LONG_BITS == 64 | |
456 | addr_reg2 = *args++; | |
457 | #endif | |
458 | mem_index = *args; | |
459 | s_bits = opc & 3; | |
460 | ||
461 | r0 = TCG_REG_EAX; | |
462 | r1 = TCG_REG_EDX; | |
463 | ||
464 | #if defined(CONFIG_SOFTMMU) | |
465 | tcg_out_mov(s, r1, addr_reg); | |
466 | ||
467 | tcg_out_mov(s, r0, addr_reg); | |
468 | ||
469 | tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */ | |
470 | tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); | |
471 | ||
472 | tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */ | |
473 | tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); | |
474 | ||
475 | tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ | |
476 | tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); | |
477 | ||
478 | tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */ | |
479 | tcg_out8(s, 0x80 | (r1 << 3) | 0x04); | |
480 | tcg_out8(s, (5 << 3) | r1); | |
481 | tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read)); | |
482 | ||
483 | /* cmp 0(r1), r0 */ | |
484 | tcg_out_modrm_offset(s, 0x3b, r0, r1, 0); | |
485 | ||
486 | tcg_out_mov(s, r0, addr_reg); | |
487 | ||
488 | #if TARGET_LONG_BITS == 32 | |
489 | /* je label1 */ | |
490 | tcg_out8(s, 0x70 + JCC_JE); | |
491 | label1_ptr = s->code_ptr; | |
492 | s->code_ptr++; | |
493 | #else | |
494 | /* jne label3 */ | |
495 | tcg_out8(s, 0x70 + JCC_JNE); | |
496 | label3_ptr = s->code_ptr; | |
497 | s->code_ptr++; | |
498 | ||
499 | /* cmp 4(r1), addr_reg2 */ | |
500 | tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4); | |
501 | ||
502 | /* je label1 */ | |
503 | tcg_out8(s, 0x70 + JCC_JE); | |
504 | label1_ptr = s->code_ptr; | |
505 | s->code_ptr++; | |
506 | ||
507 | /* label3: */ | |
508 | *label3_ptr = s->code_ptr - label3_ptr - 1; | |
509 | #endif | |
510 | ||
511 | /* XXX: move that code at the end of the TB */ | |
512 | #if TARGET_LONG_BITS == 32 | |
513 | tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index); | |
514 | #else | |
515 | tcg_out_mov(s, TCG_REG_EDX, addr_reg2); | |
516 | tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index); | |
517 | #endif | |
518 | tcg_out8(s, 0xe8); | |
519 | tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - | |
520 | (tcg_target_long)s->code_ptr - 4); | |
521 | ||
522 | switch(opc) { | |
523 | case 0 | 4: | |
524 | /* movsbl */ | |
525 | tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX); | |
526 | break; | |
527 | case 1 | 4: | |
528 | /* movswl */ | |
529 | tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX); | |
530 | break; | |
531 | case 0: | |
532 | case 1: | |
533 | case 2: | |
534 | default: | |
535 | tcg_out_mov(s, data_reg, TCG_REG_EAX); | |
536 | break; | |
537 | case 3: | |
538 | if (data_reg == TCG_REG_EDX) { | |
539 | tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */ | |
540 | tcg_out_mov(s, data_reg2, TCG_REG_EAX); | |
541 | } else { | |
542 | tcg_out_mov(s, data_reg, TCG_REG_EAX); | |
543 | tcg_out_mov(s, data_reg2, TCG_REG_EDX); | |
544 | } | |
545 | break; | |
546 | } | |
547 | ||
548 | /* jmp label2 */ | |
549 | tcg_out8(s, 0xeb); | |
550 | label2_ptr = s->code_ptr; | |
551 | s->code_ptr++; | |
552 | ||
553 | /* label1: */ | |
554 | *label1_ptr = s->code_ptr - label1_ptr - 1; | |
555 | ||
556 | /* add x(r1), r0 */ | |
557 | tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) - | |
558 | offsetof(CPUTLBEntry, addr_read)); | |
559 | #else | |
560 | r0 = addr_reg; | |
561 | #endif | |
562 | ||
563 | #ifdef TARGET_WORDS_BIGENDIAN | |
564 | bswap = 1; | |
565 | #else | |
566 | bswap = 0; | |
567 | #endif | |
568 | switch(opc) { | |
569 | case 0: | |
570 | /* movzbl */ | |
571 | tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0); | |
572 | break; | |
573 | case 0 | 4: | |
574 | /* movsbl */ | |
575 | tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, 0); | |
576 | break; | |
577 | case 1: | |
578 | /* movzwl */ | |
579 | tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0); | |
580 | if (bswap) { | |
581 | /* rolw $8, data_reg */ | |
582 | tcg_out8(s, 0x66); | |
583 | tcg_out_modrm(s, 0xc1, 0, data_reg); | |
584 | tcg_out8(s, 8); | |
585 | } | |
586 | break; | |
587 | case 1 | 4: | |
588 | /* movswl */ | |
589 | tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, 0); | |
590 | if (bswap) { | |
591 | /* rolw $8, data_reg */ | |
592 | tcg_out8(s, 0x66); | |
593 | tcg_out_modrm(s, 0xc1, 0, data_reg); | |
594 | tcg_out8(s, 8); | |
595 | ||
596 | /* movswl data_reg, data_reg */ | |
597 | tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg); | |
598 | } | |
599 | break; | |
600 | case 2: | |
601 | /* movl (r0), data_reg */ | |
602 | tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0); | |
603 | if (bswap) { | |
604 | /* bswap */ | |
605 | tcg_out_opc(s, (0xc8 + data_reg) | P_EXT); | |
606 | } | |
607 | break; | |
608 | case 3: | |
609 | /* XXX: could be nicer */ | |
610 | if (r0 == data_reg) { | |
611 | r1 = TCG_REG_EDX; | |
612 | if (r1 == data_reg) | |
613 | r1 = TCG_REG_EAX; | |
614 | tcg_out_mov(s, r1, r0); | |
615 | r0 = r1; | |
616 | } | |
617 | if (!bswap) { | |
618 | tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0); | |
619 | tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 4); | |
620 | } else { | |
621 | tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 4); | |
622 | tcg_out_opc(s, (0xc8 + data_reg) | P_EXT); | |
623 | ||
624 | tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 0); | |
625 | /* bswap */ | |
626 | tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT); | |
627 | } | |
628 | break; | |
629 | default: | |
630 | tcg_abort(); | |
631 | } | |
632 | ||
633 | #if defined(CONFIG_SOFTMMU) | |
634 | /* label2: */ | |
635 | *label2_ptr = s->code_ptr - label2_ptr - 1; | |
636 | #endif | |
637 | } | |
638 | ||
639 | ||
640 | static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, | |
641 | int opc) | |
642 | { | |
643 | int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap; | |
644 | #if defined(CONFIG_SOFTMMU) | |
645 | uint8_t *label1_ptr, *label2_ptr; | |
646 | #endif | |
647 | #if TARGET_LONG_BITS == 64 | |
648 | #if defined(CONFIG_SOFTMMU) | |
649 | uint8_t *label3_ptr; | |
650 | #endif | |
651 | int addr_reg2; | |
652 | #endif | |
653 | ||
654 | data_reg = *args++; | |
655 | if (opc == 3) | |
656 | data_reg2 = *args++; | |
657 | else | |
658 | data_reg2 = 0; | |
659 | addr_reg = *args++; | |
660 | #if TARGET_LONG_BITS == 64 | |
661 | addr_reg2 = *args++; | |
662 | #endif | |
663 | mem_index = *args; | |
664 | ||
665 | s_bits = opc; | |
666 | ||
667 | r0 = TCG_REG_EAX; | |
668 | r1 = TCG_REG_EDX; | |
669 | ||
670 | #if defined(CONFIG_SOFTMMU) | |
671 | tcg_out_mov(s, r1, addr_reg); | |
672 | ||
673 | tcg_out_mov(s, r0, addr_reg); | |
674 | ||
675 | tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */ | |
676 | tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); | |
677 | ||
678 | tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */ | |
679 | tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); | |
680 | ||
681 | tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ | |
682 | tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); | |
683 | ||
684 | tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */ | |
685 | tcg_out8(s, 0x80 | (r1 << 3) | 0x04); | |
686 | tcg_out8(s, (5 << 3) | r1); | |
687 | tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write)); | |
688 | ||
689 | /* cmp 0(r1), r0 */ | |
690 | tcg_out_modrm_offset(s, 0x3b, r0, r1, 0); | |
691 | ||
692 | tcg_out_mov(s, r0, addr_reg); | |
693 | ||
694 | #if TARGET_LONG_BITS == 32 | |
695 | /* je label1 */ | |
696 | tcg_out8(s, 0x70 + JCC_JE); | |
697 | label1_ptr = s->code_ptr; | |
698 | s->code_ptr++; | |
699 | #else | |
700 | /* jne label3 */ | |
701 | tcg_out8(s, 0x70 + JCC_JNE); | |
702 | label3_ptr = s->code_ptr; | |
703 | s->code_ptr++; | |
704 | ||
705 | /* cmp 4(r1), addr_reg2 */ | |
706 | tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4); | |
707 | ||
708 | /* je label1 */ | |
709 | tcg_out8(s, 0x70 + JCC_JE); | |
710 | label1_ptr = s->code_ptr; | |
711 | s->code_ptr++; | |
712 | ||
713 | /* label3: */ | |
714 | *label3_ptr = s->code_ptr - label3_ptr - 1; | |
715 | #endif | |
716 | ||
717 | /* XXX: move that code at the end of the TB */ | |
718 | #if TARGET_LONG_BITS == 32 | |
719 | if (opc == 3) { | |
720 | tcg_out_mov(s, TCG_REG_EDX, data_reg); | |
721 | tcg_out_mov(s, TCG_REG_ECX, data_reg2); | |
722 | tcg_out8(s, 0x6a); /* push Ib */ | |
723 | tcg_out8(s, mem_index); | |
724 | tcg_out8(s, 0xe8); | |
725 | tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - | |
726 | (tcg_target_long)s->code_ptr - 4); | |
727 | tcg_out_addi(s, TCG_REG_ESP, 4); | |
728 | } else { | |
729 | switch(opc) { | |
730 | case 0: | |
731 | /* movzbl */ | |
732 | tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg); | |
733 | break; | |
734 | case 1: | |
735 | /* movzwl */ | |
736 | tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg); | |
737 | break; | |
738 | case 2: | |
739 | tcg_out_mov(s, TCG_REG_EDX, data_reg); | |
740 | break; | |
741 | } | |
742 | tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index); | |
743 | tcg_out8(s, 0xe8); | |
744 | tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - | |
745 | (tcg_target_long)s->code_ptr - 4); | |
746 | } | |
747 | #else | |
748 | if (opc == 3) { | |
749 | tcg_out_mov(s, TCG_REG_EDX, addr_reg2); | |
750 | tcg_out8(s, 0x6a); /* push Ib */ | |
751 | tcg_out8(s, mem_index); | |
752 | tcg_out_opc(s, 0x50 + data_reg2); /* push */ | |
753 | tcg_out_opc(s, 0x50 + data_reg); /* push */ | |
754 | tcg_out8(s, 0xe8); | |
755 | tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - | |
756 | (tcg_target_long)s->code_ptr - 4); | |
757 | tcg_out_addi(s, TCG_REG_ESP, 12); | |
758 | } else { | |
759 | tcg_out_mov(s, TCG_REG_EDX, addr_reg2); | |
760 | switch(opc) { | |
761 | case 0: | |
762 | /* movzbl */ | |
763 | tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg); | |
764 | break; | |
765 | case 1: | |
766 | /* movzwl */ | |
767 | tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg); | |
768 | break; | |
769 | case 2: | |
770 | tcg_out_mov(s, TCG_REG_ECX, data_reg); | |
771 | break; | |
772 | } | |
773 | tcg_out8(s, 0x6a); /* push Ib */ | |
774 | tcg_out8(s, mem_index); | |
775 | tcg_out8(s, 0xe8); | |
776 | tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - | |
777 | (tcg_target_long)s->code_ptr - 4); | |
778 | tcg_out_addi(s, TCG_REG_ESP, 4); | |
779 | } | |
780 | #endif | |
781 | ||
782 | /* jmp label2 */ | |
783 | tcg_out8(s, 0xeb); | |
784 | label2_ptr = s->code_ptr; | |
785 | s->code_ptr++; | |
786 | ||
787 | /* label1: */ | |
788 | *label1_ptr = s->code_ptr - label1_ptr - 1; | |
789 | ||
790 | /* add x(r1), r0 */ | |
791 | tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) - | |
792 | offsetof(CPUTLBEntry, addr_write)); | |
793 | #else | |
794 | r0 = addr_reg; | |
795 | #endif | |
796 | ||
797 | #ifdef TARGET_WORDS_BIGENDIAN | |
798 | bswap = 1; | |
799 | #else | |
800 | bswap = 0; | |
801 | #endif | |
802 | switch(opc) { | |
803 | case 0: | |
804 | /* movb */ | |
805 | tcg_out_modrm_offset(s, 0x88, data_reg, r0, 0); | |
806 | break; | |
807 | case 1: | |
808 | if (bswap) { | |
809 | tcg_out_mov(s, r1, data_reg); | |
810 | tcg_out8(s, 0x66); /* rolw $8, %ecx */ | |
811 | tcg_out_modrm(s, 0xc1, 0, r1); | |
812 | tcg_out8(s, 8); | |
813 | data_reg = r1; | |
814 | } | |
815 | /* movw */ | |
816 | tcg_out8(s, 0x66); | |
817 | tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0); | |
818 | break; | |
819 | case 2: | |
820 | if (bswap) { | |
821 | tcg_out_mov(s, r1, data_reg); | |
822 | /* bswap data_reg */ | |
823 | tcg_out_opc(s, (0xc8 + r1) | P_EXT); | |
824 | data_reg = r1; | |
825 | } | |
826 | /* movl */ | |
827 | tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0); | |
828 | break; | |
829 | case 3: | |
830 | if (bswap) { | |
831 | tcg_out_mov(s, r1, data_reg2); | |
832 | /* bswap data_reg */ | |
833 | tcg_out_opc(s, (0xc8 + r1) | P_EXT); | |
834 | tcg_out_modrm_offset(s, 0x89, r1, r0, 0); | |
835 | tcg_out_mov(s, r1, data_reg); | |
836 | /* bswap data_reg */ | |
837 | tcg_out_opc(s, (0xc8 + r1) | P_EXT); | |
838 | tcg_out_modrm_offset(s, 0x89, r1, r0, 4); | |
839 | } else { | |
840 | tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0); | |
841 | tcg_out_modrm_offset(s, 0x89, data_reg2, r0, 4); | |
842 | } | |
843 | break; | |
844 | default: | |
845 | tcg_abort(); | |
846 | } | |
847 | ||
848 | #if defined(CONFIG_SOFTMMU) | |
849 | /* label2: */ | |
850 | *label2_ptr = s->code_ptr - label2_ptr - 1; | |
851 | #endif | |
852 | } | |
853 | ||
854 | static inline void tcg_out_op(TCGContext *s, int opc, | |
855 | const TCGArg *args, const int *const_args) | |
856 | { | |
857 | int c; | |
858 | ||
859 | switch(opc) { | |
860 | case INDEX_op_exit_tb: | |
861 | tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]); | |
b03cce8e FB |
862 | tcg_out8(s, 0xe9); /* jmp tb_ret_addr */ |
863 | tcg_out32(s, tb_ret_addr - s->code_ptr - 4); | |
c896fe29 FB |
864 | break; |
865 | case INDEX_op_goto_tb: | |
866 | if (s->tb_jmp_offset) { | |
867 | /* direct jump method */ | |
868 | tcg_out8(s, 0xe9); /* jmp im */ | |
869 | s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf; | |
870 | tcg_out32(s, 0); | |
871 | } else { | |
872 | /* indirect jump method */ | |
873 | /* jmp Ev */ | |
874 | tcg_out_modrm_offset(s, 0xff, 4, -1, | |
875 | (tcg_target_long)(s->tb_next + args[0])); | |
876 | } | |
877 | s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf; | |
878 | break; | |
879 | case INDEX_op_call: | |
880 | if (const_args[0]) { | |
881 | tcg_out8(s, 0xe8); | |
882 | tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4); | |
883 | } else { | |
884 | tcg_out_modrm(s, 0xff, 2, args[0]); | |
885 | } | |
886 | break; | |
887 | case INDEX_op_jmp: | |
888 | if (const_args[0]) { | |
889 | tcg_out8(s, 0xe9); | |
890 | tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4); | |
891 | } else { | |
892 | tcg_out_modrm(s, 0xff, 4, args[0]); | |
893 | } | |
894 | break; | |
895 | case INDEX_op_br: | |
896 | tcg_out_jxx(s, JCC_JMP, args[0]); | |
897 | break; | |
898 | case INDEX_op_movi_i32: | |
899 | tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]); | |
900 | break; | |
901 | case INDEX_op_ld8u_i32: | |
902 | /* movzbl */ | |
903 | tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]); | |
904 | break; | |
905 | case INDEX_op_ld8s_i32: | |
906 | /* movsbl */ | |
907 | tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]); | |
908 | break; | |
909 | case INDEX_op_ld16u_i32: | |
910 | /* movzwl */ | |
911 | tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]); | |
912 | break; | |
913 | case INDEX_op_ld16s_i32: | |
914 | /* movswl */ | |
915 | tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]); | |
916 | break; | |
917 | case INDEX_op_ld_i32: | |
918 | /* movl */ | |
919 | tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]); | |
920 | break; | |
921 | case INDEX_op_st8_i32: | |
922 | /* movb */ | |
923 | tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]); | |
924 | break; | |
925 | case INDEX_op_st16_i32: | |
926 | /* movw */ | |
927 | tcg_out8(s, 0x66); | |
928 | tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]); | |
929 | break; | |
930 | case INDEX_op_st_i32: | |
931 | /* movl */ | |
932 | tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]); | |
933 | break; | |
934 | case INDEX_op_sub_i32: | |
935 | c = ARITH_SUB; | |
936 | goto gen_arith; | |
937 | case INDEX_op_and_i32: | |
938 | c = ARITH_AND; | |
939 | goto gen_arith; | |
940 | case INDEX_op_or_i32: | |
941 | c = ARITH_OR; | |
942 | goto gen_arith; | |
943 | case INDEX_op_xor_i32: | |
944 | c = ARITH_XOR; | |
945 | goto gen_arith; | |
946 | case INDEX_op_add_i32: | |
947 | c = ARITH_ADD; | |
948 | gen_arith: | |
949 | if (const_args[2]) { | |
950 | tgen_arithi(s, c, args[0], args[2]); | |
951 | } else { | |
952 | tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]); | |
953 | } | |
954 | break; | |
955 | case INDEX_op_mul_i32: | |
956 | if (const_args[2]) { | |
957 | int32_t val; | |
958 | val = args[2]; | |
959 | if (val == (int8_t)val) { | |
960 | tcg_out_modrm(s, 0x6b, args[0], args[0]); | |
961 | tcg_out8(s, val); | |
962 | } else { | |
963 | tcg_out_modrm(s, 0x69, args[0], args[0]); | |
964 | tcg_out32(s, val); | |
965 | } | |
966 | } else { | |
967 | tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]); | |
968 | } | |
969 | break; | |
970 | case INDEX_op_mulu2_i32: | |
971 | tcg_out_modrm(s, 0xf7, 4, args[3]); | |
972 | break; | |
973 | case INDEX_op_div2_i32: | |
974 | tcg_out_modrm(s, 0xf7, 7, args[4]); | |
975 | break; | |
976 | case INDEX_op_divu2_i32: | |
977 | tcg_out_modrm(s, 0xf7, 6, args[4]); | |
978 | break; | |
979 | case INDEX_op_shl_i32: | |
980 | c = SHIFT_SHL; | |
981 | gen_shift32: | |
982 | if (const_args[2]) { | |
983 | if (args[2] == 1) { | |
984 | tcg_out_modrm(s, 0xd1, c, args[0]); | |
985 | } else { | |
986 | tcg_out_modrm(s, 0xc1, c, args[0]); | |
987 | tcg_out8(s, args[2]); | |
988 | } | |
989 | } else { | |
990 | tcg_out_modrm(s, 0xd3, c, args[0]); | |
991 | } | |
992 | break; | |
993 | case INDEX_op_shr_i32: | |
994 | c = SHIFT_SHR; | |
995 | goto gen_shift32; | |
996 | case INDEX_op_sar_i32: | |
997 | c = SHIFT_SAR; | |
998 | goto gen_shift32; | |
999 | ||
1000 | case INDEX_op_add2_i32: | |
1001 | if (const_args[4]) | |
1002 | tgen_arithi(s, ARITH_ADD, args[0], args[4]); | |
1003 | else | |
1004 | tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]); | |
1005 | if (const_args[5]) | |
1006 | tgen_arithi(s, ARITH_ADC, args[1], args[5]); | |
1007 | else | |
1008 | tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]); | |
1009 | break; | |
1010 | case INDEX_op_sub2_i32: | |
1011 | if (const_args[4]) | |
1012 | tgen_arithi(s, ARITH_SUB, args[0], args[4]); | |
1013 | else | |
1014 | tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]); | |
1015 | if (const_args[5]) | |
1016 | tgen_arithi(s, ARITH_SBB, args[1], args[5]); | |
1017 | else | |
1018 | tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]); | |
1019 | break; | |
1020 | case INDEX_op_brcond_i32: | |
1021 | tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]); | |
1022 | break; | |
1023 | case INDEX_op_brcond2_i32: | |
1024 | tcg_out_brcond2(s, args, const_args); | |
1025 | break; | |
1026 | ||
1027 | case INDEX_op_qemu_ld8u: | |
1028 | tcg_out_qemu_ld(s, args, 0); | |
1029 | break; | |
1030 | case INDEX_op_qemu_ld8s: | |
1031 | tcg_out_qemu_ld(s, args, 0 | 4); | |
1032 | break; | |
1033 | case INDEX_op_qemu_ld16u: | |
1034 | tcg_out_qemu_ld(s, args, 1); | |
1035 | break; | |
1036 | case INDEX_op_qemu_ld16s: | |
1037 | tcg_out_qemu_ld(s, args, 1 | 4); | |
1038 | break; | |
1039 | case INDEX_op_qemu_ld32u: | |
1040 | tcg_out_qemu_ld(s, args, 2); | |
1041 | break; | |
1042 | case INDEX_op_qemu_ld64: | |
1043 | tcg_out_qemu_ld(s, args, 3); | |
1044 | break; | |
1045 | ||
1046 | case INDEX_op_qemu_st8: | |
1047 | tcg_out_qemu_st(s, args, 0); | |
1048 | break; | |
1049 | case INDEX_op_qemu_st16: | |
1050 | tcg_out_qemu_st(s, args, 1); | |
1051 | break; | |
1052 | case INDEX_op_qemu_st32: | |
1053 | tcg_out_qemu_st(s, args, 2); | |
1054 | break; | |
1055 | case INDEX_op_qemu_st64: | |
1056 | tcg_out_qemu_st(s, args, 3); | |
1057 | break; | |
1058 | ||
1059 | default: | |
1060 | tcg_abort(); | |
1061 | } | |
1062 | } | |
1063 | ||
1064 | static const TCGTargetOpDef x86_op_defs[] = { | |
1065 | { INDEX_op_exit_tb, { } }, | |
1066 | { INDEX_op_goto_tb, { } }, | |
1067 | { INDEX_op_call, { "ri" } }, | |
1068 | { INDEX_op_jmp, { "ri" } }, | |
1069 | { INDEX_op_br, { } }, | |
1070 | { INDEX_op_mov_i32, { "r", "r" } }, | |
1071 | { INDEX_op_movi_i32, { "r" } }, | |
1072 | { INDEX_op_ld8u_i32, { "r", "r" } }, | |
1073 | { INDEX_op_ld8s_i32, { "r", "r" } }, | |
1074 | { INDEX_op_ld16u_i32, { "r", "r" } }, | |
1075 | { INDEX_op_ld16s_i32, { "r", "r" } }, | |
1076 | { INDEX_op_ld_i32, { "r", "r" } }, | |
1077 | { INDEX_op_st8_i32, { "q", "r" } }, | |
1078 | { INDEX_op_st16_i32, { "r", "r" } }, | |
1079 | { INDEX_op_st_i32, { "r", "r" } }, | |
1080 | ||
1081 | { INDEX_op_add_i32, { "r", "0", "ri" } }, | |
1082 | { INDEX_op_sub_i32, { "r", "0", "ri" } }, | |
1083 | { INDEX_op_mul_i32, { "r", "0", "ri" } }, | |
1084 | { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } }, | |
1085 | { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } }, | |
1086 | { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } }, | |
1087 | { INDEX_op_and_i32, { "r", "0", "ri" } }, | |
1088 | { INDEX_op_or_i32, { "r", "0", "ri" } }, | |
1089 | { INDEX_op_xor_i32, { "r", "0", "ri" } }, | |
1090 | ||
1091 | { INDEX_op_shl_i32, { "r", "0", "ci" } }, | |
1092 | { INDEX_op_shr_i32, { "r", "0", "ci" } }, | |
1093 | { INDEX_op_sar_i32, { "r", "0", "ci" } }, | |
1094 | ||
1095 | { INDEX_op_brcond_i32, { "r", "ri" } }, | |
1096 | ||
1097 | { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } }, | |
1098 | { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } }, | |
1099 | { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } }, | |
1100 | ||
1101 | #if TARGET_LONG_BITS == 32 | |
1102 | { INDEX_op_qemu_ld8u, { "r", "L" } }, | |
1103 | { INDEX_op_qemu_ld8s, { "r", "L" } }, | |
1104 | { INDEX_op_qemu_ld16u, { "r", "L" } }, | |
1105 | { INDEX_op_qemu_ld16s, { "r", "L" } }, | |
1106 | { INDEX_op_qemu_ld32u, { "r", "L" } }, | |
1107 | { INDEX_op_qemu_ld64, { "r", "r", "L" } }, | |
1108 | ||
1109 | { INDEX_op_qemu_st8, { "cb", "L" } }, | |
1110 | { INDEX_op_qemu_st16, { "L", "L" } }, | |
1111 | { INDEX_op_qemu_st32, { "L", "L" } }, | |
1112 | { INDEX_op_qemu_st64, { "L", "L", "L" } }, | |
1113 | #else | |
1114 | { INDEX_op_qemu_ld8u, { "r", "L", "L" } }, | |
1115 | { INDEX_op_qemu_ld8s, { "r", "L", "L" } }, | |
1116 | { INDEX_op_qemu_ld16u, { "r", "L", "L" } }, | |
1117 | { INDEX_op_qemu_ld16s, { "r", "L", "L" } }, | |
1118 | { INDEX_op_qemu_ld32u, { "r", "L", "L" } }, | |
1119 | { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } }, | |
1120 | ||
1121 | { INDEX_op_qemu_st8, { "cb", "L", "L" } }, | |
1122 | { INDEX_op_qemu_st16, { "L", "L", "L" } }, | |
1123 | { INDEX_op_qemu_st32, { "L", "L", "L" } }, | |
1124 | { INDEX_op_qemu_st64, { "L", "L", "L", "L" } }, | |
1125 | #endif | |
1126 | { -1 }, | |
1127 | }; | |
1128 | ||
b03cce8e FB |
1129 | static int tcg_target_callee_save_regs[] = { |
1130 | /* TCG_REG_EBP, */ /* currently used for the global env, so no | |
1131 | need to save */ | |
1132 | TCG_REG_EBX, | |
1133 | TCG_REG_ESI, | |
1134 | TCG_REG_EDI, | |
1135 | }; | |
1136 | ||
1137 | static inline void tcg_out_push(TCGContext *s, int reg) | |
1138 | { | |
1139 | tcg_out_opc(s, 0x50 + reg); | |
1140 | } | |
1141 | ||
1142 | static inline void tcg_out_pop(TCGContext *s, int reg) | |
1143 | { | |
1144 | tcg_out_opc(s, 0x58 + reg); | |
1145 | } | |
1146 | ||
1147 | /* Generate global QEMU prologue and epilogue code */ | |
1148 | void tcg_target_qemu_prologue(TCGContext *s) | |
1149 | { | |
1150 | int i, frame_size, push_size, stack_addend; | |
1151 | ||
1152 | /* TB prologue */ | |
1153 | /* save all callee saved registers */ | |
1154 | for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) { | |
1155 | tcg_out_push(s, tcg_target_callee_save_regs[i]); | |
1156 | } | |
1157 | /* reserve some stack space */ | |
1158 | push_size = 4 + ARRAY_SIZE(tcg_target_callee_save_regs) * 4; | |
1159 | frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE; | |
1160 | frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & | |
1161 | ~(TCG_TARGET_STACK_ALIGN - 1); | |
1162 | stack_addend = frame_size - push_size; | |
1163 | tcg_out_addi(s, TCG_REG_ESP, -stack_addend); | |
1164 | ||
1165 | tcg_out_modrm(s, 0xff, 4, TCG_REG_EAX); /* jmp *%eax */ | |
1166 | ||
1167 | /* TB epilogue */ | |
1168 | tb_ret_addr = s->code_ptr; | |
1169 | tcg_out_addi(s, TCG_REG_ESP, stack_addend); | |
1170 | for(i = ARRAY_SIZE(tcg_target_callee_save_regs) - 1; i >= 0; i--) { | |
1171 | tcg_out_pop(s, tcg_target_callee_save_regs[i]); | |
1172 | } | |
1173 | tcg_out8(s, 0xc3); /* ret */ | |
1174 | } | |
1175 | ||
c896fe29 FB |
1176 | void tcg_target_init(TCGContext *s) |
1177 | { | |
1178 | /* fail safe */ | |
1179 | if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry)) | |
1180 | tcg_abort(); | |
1181 | ||
1182 | tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff); | |
1183 | tcg_regset_set32(tcg_target_call_clobber_regs, 0, | |
1184 | (1 << TCG_REG_EAX) | | |
1185 | (1 << TCG_REG_EDX) | | |
1186 | (1 << TCG_REG_ECX)); | |
1187 | ||
1188 | tcg_regset_clear(s->reserved_regs); | |
1189 | tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP); | |
1190 | ||
1191 | tcg_add_target_add_op_defs(x86_op_defs); | |
1192 | } |