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1 | /* |
2 | * Optimizations for Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2010 Samsung Electronics. | |
5 | * Contributed by Kirill Batuzov <batuzovk@ispras.ru> | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
757e725b | 26 | #include "qemu/osdep.h" |
8f2e8c07 | 27 | #include "qemu-common.h" |
00f6da6a | 28 | #include "exec/cpu-common.h" |
8f2e8c07 KB |
29 | #include "tcg-op.h" |
30 | ||
8f2e8c07 KB |
31 | #define CASE_OP_32_64(x) \ |
32 | glue(glue(case INDEX_op_, x), _i32): \ | |
33 | glue(glue(case INDEX_op_, x), _i64) | |
8f2e8c07 | 34 | |
170ba88f RH |
35 | #define CASE_OP_32_64_VEC(x) \ |
36 | glue(glue(case INDEX_op_, x), _i32): \ | |
37 | glue(glue(case INDEX_op_, x), _i64): \ | |
38 | glue(glue(case INDEX_op_, x), _vec) | |
39 | ||
22613af4 | 40 | struct tcg_temp_info { |
b41059dd | 41 | bool is_const; |
6349039d RH |
42 | TCGTemp *prev_copy; |
43 | TCGTemp *next_copy; | |
22613af4 | 44 | tcg_target_ulong val; |
3a9d8b17 | 45 | tcg_target_ulong mask; |
22613af4 KB |
46 | }; |
47 | ||
6349039d | 48 | static inline struct tcg_temp_info *ts_info(TCGTemp *ts) |
d9c769c6 | 49 | { |
6349039d | 50 | return ts->state_ptr; |
d9c769c6 AJ |
51 | } |
52 | ||
6349039d | 53 | static inline struct tcg_temp_info *arg_info(TCGArg arg) |
d9c769c6 | 54 | { |
6349039d RH |
55 | return ts_info(arg_temp(arg)); |
56 | } | |
57 | ||
58 | static inline bool ts_is_const(TCGTemp *ts) | |
59 | { | |
60 | return ts_info(ts)->is_const; | |
61 | } | |
62 | ||
63 | static inline bool arg_is_const(TCGArg arg) | |
64 | { | |
65 | return ts_is_const(arg_temp(arg)); | |
66 | } | |
67 | ||
68 | static inline bool ts_is_copy(TCGTemp *ts) | |
69 | { | |
70 | return ts_info(ts)->next_copy != ts; | |
d9c769c6 AJ |
71 | } |
72 | ||
b41059dd | 73 | /* Reset TEMP's state, possibly removing the temp for the list of copies. */ |
6349039d RH |
74 | static void reset_ts(TCGTemp *ts) |
75 | { | |
76 | struct tcg_temp_info *ti = ts_info(ts); | |
77 | struct tcg_temp_info *pi = ts_info(ti->prev_copy); | |
78 | struct tcg_temp_info *ni = ts_info(ti->next_copy); | |
79 | ||
80 | ni->prev_copy = ti->prev_copy; | |
81 | pi->next_copy = ti->next_copy; | |
82 | ti->next_copy = ts; | |
83 | ti->prev_copy = ts; | |
84 | ti->is_const = false; | |
85 | ti->mask = -1; | |
86 | } | |
87 | ||
88 | static void reset_temp(TCGArg arg) | |
22613af4 | 89 | { |
6349039d | 90 | reset_ts(arg_temp(arg)); |
22613af4 KB |
91 | } |
92 | ||
1208d7dd | 93 | /* Initialize and activate a temporary. */ |
34184b07 EC |
94 | static void init_ts_info(struct tcg_temp_info *infos, |
95 | TCGTempSet *temps_used, TCGTemp *ts) | |
1208d7dd | 96 | { |
6349039d | 97 | size_t idx = temp_idx(ts); |
34184b07 EC |
98 | if (!test_bit(idx, temps_used->l)) { |
99 | struct tcg_temp_info *ti = &infos[idx]; | |
6349039d RH |
100 | |
101 | ts->state_ptr = ti; | |
102 | ti->next_copy = ts; | |
103 | ti->prev_copy = ts; | |
104 | ti->is_const = false; | |
105 | ti->mask = -1; | |
34184b07 | 106 | set_bit(idx, temps_used->l); |
1208d7dd AJ |
107 | } |
108 | } | |
109 | ||
34184b07 EC |
110 | static void init_arg_info(struct tcg_temp_info *infos, |
111 | TCGTempSet *temps_used, TCGArg arg) | |
6349039d | 112 | { |
34184b07 | 113 | init_ts_info(infos, temps_used, arg_temp(arg)); |
6349039d RH |
114 | } |
115 | ||
6349039d | 116 | static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts) |
e590d4e6 | 117 | { |
6349039d | 118 | TCGTemp *i; |
e590d4e6 AJ |
119 | |
120 | /* If this is already a global, we can't do better. */ | |
fa477d25 | 121 | if (ts->temp_global) { |
6349039d | 122 | return ts; |
e590d4e6 AJ |
123 | } |
124 | ||
125 | /* Search for a global first. */ | |
6349039d RH |
126 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
127 | if (i->temp_global) { | |
e590d4e6 AJ |
128 | return i; |
129 | } | |
130 | } | |
131 | ||
132 | /* If it is a temp, search for a temp local. */ | |
fa477d25 | 133 | if (!ts->temp_local) { |
6349039d RH |
134 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
135 | if (ts->temp_local) { | |
e590d4e6 AJ |
136 | return i; |
137 | } | |
138 | } | |
139 | } | |
140 | ||
141 | /* Failure to find a better representation, return the same temp. */ | |
6349039d | 142 | return ts; |
e590d4e6 AJ |
143 | } |
144 | ||
6349039d | 145 | static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2) |
e590d4e6 | 146 | { |
6349039d | 147 | TCGTemp *i; |
e590d4e6 | 148 | |
6349039d | 149 | if (ts1 == ts2) { |
e590d4e6 AJ |
150 | return true; |
151 | } | |
152 | ||
6349039d | 153 | if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) { |
e590d4e6 AJ |
154 | return false; |
155 | } | |
156 | ||
6349039d RH |
157 | for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) { |
158 | if (i == ts2) { | |
e590d4e6 AJ |
159 | return true; |
160 | } | |
161 | } | |
162 | ||
163 | return false; | |
164 | } | |
165 | ||
6349039d RH |
166 | static bool args_are_copies(TCGArg arg1, TCGArg arg2) |
167 | { | |
168 | return ts_are_copies(arg_temp(arg1), arg_temp(arg2)); | |
169 | } | |
170 | ||
acd93701 | 171 | static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val) |
97a79eb7 | 172 | { |
170ba88f RH |
173 | const TCGOpDef *def; |
174 | TCGOpcode new_op; | |
97a79eb7 | 175 | tcg_target_ulong mask; |
6349039d | 176 | struct tcg_temp_info *di = arg_info(dst); |
97a79eb7 | 177 | |
170ba88f RH |
178 | def = &tcg_op_defs[op->opc]; |
179 | if (def->flags & TCG_OPF_VECTOR) { | |
180 | new_op = INDEX_op_dupi_vec; | |
181 | } else if (def->flags & TCG_OPF_64BIT) { | |
182 | new_op = INDEX_op_movi_i64; | |
183 | } else { | |
184 | new_op = INDEX_op_movi_i32; | |
185 | } | |
97a79eb7 | 186 | op->opc = new_op; |
170ba88f RH |
187 | /* TCGOP_VECL and TCGOP_VECE remain unchanged. */ |
188 | op->args[0] = dst; | |
189 | op->args[1] = val; | |
97a79eb7 AJ |
190 | |
191 | reset_temp(dst); | |
6349039d RH |
192 | di->is_const = true; |
193 | di->val = val; | |
97a79eb7 | 194 | mask = val; |
96152126 | 195 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) { |
97a79eb7 AJ |
196 | /* High bits of the destination are now garbage. */ |
197 | mask |= ~0xffffffffull; | |
198 | } | |
6349039d | 199 | di->mask = mask; |
97a79eb7 AJ |
200 | } |
201 | ||
acd93701 | 202 | static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src) |
22613af4 | 203 | { |
6349039d RH |
204 | TCGTemp *dst_ts = arg_temp(dst); |
205 | TCGTemp *src_ts = arg_temp(src); | |
170ba88f | 206 | const TCGOpDef *def; |
6349039d RH |
207 | struct tcg_temp_info *di; |
208 | struct tcg_temp_info *si; | |
209 | tcg_target_ulong mask; | |
210 | TCGOpcode new_op; | |
211 | ||
212 | if (ts_are_copies(dst_ts, src_ts)) { | |
5365718a AJ |
213 | tcg_op_remove(s, op); |
214 | return; | |
215 | } | |
216 | ||
6349039d RH |
217 | reset_ts(dst_ts); |
218 | di = ts_info(dst_ts); | |
219 | si = ts_info(src_ts); | |
170ba88f RH |
220 | def = &tcg_op_defs[op->opc]; |
221 | if (def->flags & TCG_OPF_VECTOR) { | |
222 | new_op = INDEX_op_mov_vec; | |
223 | } else if (def->flags & TCG_OPF_64BIT) { | |
224 | new_op = INDEX_op_mov_i64; | |
225 | } else { | |
226 | new_op = INDEX_op_mov_i32; | |
227 | } | |
c45cb8bb | 228 | op->opc = new_op; |
170ba88f | 229 | /* TCGOP_VECL and TCGOP_VECE remain unchanged. */ |
6349039d RH |
230 | op->args[0] = dst; |
231 | op->args[1] = src; | |
a62f6f56 | 232 | |
6349039d | 233 | mask = si->mask; |
24666baf RH |
234 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { |
235 | /* High bits of the destination are now garbage. */ | |
236 | mask |= ~0xffffffffull; | |
237 | } | |
6349039d | 238 | di->mask = mask; |
e590d4e6 | 239 | |
6349039d RH |
240 | if (src_ts->type == dst_ts->type) { |
241 | struct tcg_temp_info *ni = ts_info(si->next_copy); | |
242 | ||
243 | di->next_copy = si->next_copy; | |
244 | di->prev_copy = src_ts; | |
245 | ni->prev_copy = dst_ts; | |
246 | si->next_copy = dst_ts; | |
247 | di->is_const = si->is_const; | |
248 | di->val = si->val; | |
249 | } | |
22613af4 KB |
250 | } |
251 | ||
fe0de7aa | 252 | static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 | 253 | { |
03271524 RH |
254 | uint64_t l64, h64; |
255 | ||
53108fb5 KB |
256 | switch (op) { |
257 | CASE_OP_32_64(add): | |
258 | return x + y; | |
259 | ||
260 | CASE_OP_32_64(sub): | |
261 | return x - y; | |
262 | ||
263 | CASE_OP_32_64(mul): | |
264 | return x * y; | |
265 | ||
9a81090b KB |
266 | CASE_OP_32_64(and): |
267 | return x & y; | |
268 | ||
269 | CASE_OP_32_64(or): | |
270 | return x | y; | |
271 | ||
272 | CASE_OP_32_64(xor): | |
273 | return x ^ y; | |
274 | ||
55c0975c | 275 | case INDEX_op_shl_i32: |
50c5c4d1 | 276 | return (uint32_t)x << (y & 31); |
55c0975c | 277 | |
55c0975c | 278 | case INDEX_op_shl_i64: |
50c5c4d1 | 279 | return (uint64_t)x << (y & 63); |
55c0975c KB |
280 | |
281 | case INDEX_op_shr_i32: | |
50c5c4d1 | 282 | return (uint32_t)x >> (y & 31); |
55c0975c | 283 | |
55c0975c | 284 | case INDEX_op_shr_i64: |
50c5c4d1 | 285 | return (uint64_t)x >> (y & 63); |
55c0975c KB |
286 | |
287 | case INDEX_op_sar_i32: | |
50c5c4d1 | 288 | return (int32_t)x >> (y & 31); |
55c0975c | 289 | |
55c0975c | 290 | case INDEX_op_sar_i64: |
50c5c4d1 | 291 | return (int64_t)x >> (y & 63); |
55c0975c KB |
292 | |
293 | case INDEX_op_rotr_i32: | |
50c5c4d1 | 294 | return ror32(x, y & 31); |
55c0975c | 295 | |
55c0975c | 296 | case INDEX_op_rotr_i64: |
50c5c4d1 | 297 | return ror64(x, y & 63); |
55c0975c KB |
298 | |
299 | case INDEX_op_rotl_i32: | |
50c5c4d1 | 300 | return rol32(x, y & 31); |
55c0975c | 301 | |
55c0975c | 302 | case INDEX_op_rotl_i64: |
50c5c4d1 | 303 | return rol64(x, y & 63); |
25c4d9cc RH |
304 | |
305 | CASE_OP_32_64(not): | |
a640f031 | 306 | return ~x; |
25c4d9cc | 307 | |
cb25c80a RH |
308 | CASE_OP_32_64(neg): |
309 | return -x; | |
310 | ||
311 | CASE_OP_32_64(andc): | |
312 | return x & ~y; | |
313 | ||
314 | CASE_OP_32_64(orc): | |
315 | return x | ~y; | |
316 | ||
317 | CASE_OP_32_64(eqv): | |
318 | return ~(x ^ y); | |
319 | ||
320 | CASE_OP_32_64(nand): | |
321 | return ~(x & y); | |
322 | ||
323 | CASE_OP_32_64(nor): | |
324 | return ~(x | y); | |
325 | ||
0e28d006 RH |
326 | case INDEX_op_clz_i32: |
327 | return (uint32_t)x ? clz32(x) : y; | |
328 | ||
329 | case INDEX_op_clz_i64: | |
330 | return x ? clz64(x) : y; | |
331 | ||
332 | case INDEX_op_ctz_i32: | |
333 | return (uint32_t)x ? ctz32(x) : y; | |
334 | ||
335 | case INDEX_op_ctz_i64: | |
336 | return x ? ctz64(x) : y; | |
337 | ||
a768e4e9 RH |
338 | case INDEX_op_ctpop_i32: |
339 | return ctpop32(x); | |
340 | ||
341 | case INDEX_op_ctpop_i64: | |
342 | return ctpop64(x); | |
343 | ||
25c4d9cc | 344 | CASE_OP_32_64(ext8s): |
a640f031 | 345 | return (int8_t)x; |
25c4d9cc RH |
346 | |
347 | CASE_OP_32_64(ext16s): | |
a640f031 | 348 | return (int16_t)x; |
25c4d9cc RH |
349 | |
350 | CASE_OP_32_64(ext8u): | |
a640f031 | 351 | return (uint8_t)x; |
25c4d9cc RH |
352 | |
353 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
354 | return (uint16_t)x; |
355 | ||
6498594c RH |
356 | CASE_OP_32_64(bswap16): |
357 | return bswap16(x); | |
358 | ||
359 | CASE_OP_32_64(bswap32): | |
360 | return bswap32(x); | |
361 | ||
362 | case INDEX_op_bswap64_i64: | |
363 | return bswap64(x); | |
364 | ||
8bcb5c8f | 365 | case INDEX_op_ext_i32_i64: |
a640f031 KB |
366 | case INDEX_op_ext32s_i64: |
367 | return (int32_t)x; | |
368 | ||
8bcb5c8f | 369 | case INDEX_op_extu_i32_i64: |
609ad705 | 370 | case INDEX_op_extrl_i64_i32: |
a640f031 KB |
371 | case INDEX_op_ext32u_i64: |
372 | return (uint32_t)x; | |
a640f031 | 373 | |
609ad705 RH |
374 | case INDEX_op_extrh_i64_i32: |
375 | return (uint64_t)x >> 32; | |
376 | ||
03271524 RH |
377 | case INDEX_op_muluh_i32: |
378 | return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32; | |
379 | case INDEX_op_mulsh_i32: | |
380 | return ((int64_t)(int32_t)x * (int32_t)y) >> 32; | |
381 | ||
382 | case INDEX_op_muluh_i64: | |
383 | mulu64(&l64, &h64, x, y); | |
384 | return h64; | |
385 | case INDEX_op_mulsh_i64: | |
386 | muls64(&l64, &h64, x, y); | |
387 | return h64; | |
388 | ||
01547f7f RH |
389 | case INDEX_op_div_i32: |
390 | /* Avoid crashing on divide by zero, otherwise undefined. */ | |
391 | return (int32_t)x / ((int32_t)y ? : 1); | |
392 | case INDEX_op_divu_i32: | |
393 | return (uint32_t)x / ((uint32_t)y ? : 1); | |
394 | case INDEX_op_div_i64: | |
395 | return (int64_t)x / ((int64_t)y ? : 1); | |
396 | case INDEX_op_divu_i64: | |
397 | return (uint64_t)x / ((uint64_t)y ? : 1); | |
398 | ||
399 | case INDEX_op_rem_i32: | |
400 | return (int32_t)x % ((int32_t)y ? : 1); | |
401 | case INDEX_op_remu_i32: | |
402 | return (uint32_t)x % ((uint32_t)y ? : 1); | |
403 | case INDEX_op_rem_i64: | |
404 | return (int64_t)x % ((int64_t)y ? : 1); | |
405 | case INDEX_op_remu_i64: | |
406 | return (uint64_t)x % ((uint64_t)y ? : 1); | |
407 | ||
53108fb5 KB |
408 | default: |
409 | fprintf(stderr, | |
410 | "Unrecognized operation %d in do_constant_folding.\n", op); | |
411 | tcg_abort(); | |
412 | } | |
413 | } | |
414 | ||
fe0de7aa | 415 | static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 | 416 | { |
170ba88f | 417 | const TCGOpDef *def = &tcg_op_defs[op]; |
53108fb5 | 418 | TCGArg res = do_constant_folding_2(op, x, y); |
170ba88f | 419 | if (!(def->flags & TCG_OPF_64BIT)) { |
29f3ff8d | 420 | res = (int32_t)res; |
53108fb5 | 421 | } |
53108fb5 KB |
422 | return res; |
423 | } | |
424 | ||
9519da7e RH |
425 | static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c) |
426 | { | |
427 | switch (c) { | |
428 | case TCG_COND_EQ: | |
429 | return x == y; | |
430 | case TCG_COND_NE: | |
431 | return x != y; | |
432 | case TCG_COND_LT: | |
433 | return (int32_t)x < (int32_t)y; | |
434 | case TCG_COND_GE: | |
435 | return (int32_t)x >= (int32_t)y; | |
436 | case TCG_COND_LE: | |
437 | return (int32_t)x <= (int32_t)y; | |
438 | case TCG_COND_GT: | |
439 | return (int32_t)x > (int32_t)y; | |
440 | case TCG_COND_LTU: | |
441 | return x < y; | |
442 | case TCG_COND_GEU: | |
443 | return x >= y; | |
444 | case TCG_COND_LEU: | |
445 | return x <= y; | |
446 | case TCG_COND_GTU: | |
447 | return x > y; | |
448 | default: | |
449 | tcg_abort(); | |
450 | } | |
451 | } | |
452 | ||
453 | static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c) | |
454 | { | |
455 | switch (c) { | |
456 | case TCG_COND_EQ: | |
457 | return x == y; | |
458 | case TCG_COND_NE: | |
459 | return x != y; | |
460 | case TCG_COND_LT: | |
461 | return (int64_t)x < (int64_t)y; | |
462 | case TCG_COND_GE: | |
463 | return (int64_t)x >= (int64_t)y; | |
464 | case TCG_COND_LE: | |
465 | return (int64_t)x <= (int64_t)y; | |
466 | case TCG_COND_GT: | |
467 | return (int64_t)x > (int64_t)y; | |
468 | case TCG_COND_LTU: | |
469 | return x < y; | |
470 | case TCG_COND_GEU: | |
471 | return x >= y; | |
472 | case TCG_COND_LEU: | |
473 | return x <= y; | |
474 | case TCG_COND_GTU: | |
475 | return x > y; | |
476 | default: | |
477 | tcg_abort(); | |
478 | } | |
479 | } | |
480 | ||
481 | static bool do_constant_folding_cond_eq(TCGCond c) | |
482 | { | |
483 | switch (c) { | |
484 | case TCG_COND_GT: | |
485 | case TCG_COND_LTU: | |
486 | case TCG_COND_LT: | |
487 | case TCG_COND_GTU: | |
488 | case TCG_COND_NE: | |
489 | return 0; | |
490 | case TCG_COND_GE: | |
491 | case TCG_COND_GEU: | |
492 | case TCG_COND_LE: | |
493 | case TCG_COND_LEU: | |
494 | case TCG_COND_EQ: | |
495 | return 1; | |
496 | default: | |
497 | tcg_abort(); | |
498 | } | |
499 | } | |
500 | ||
b336ceb6 AJ |
501 | /* Return 2 if the condition can't be simplified, and the result |
502 | of the condition (0 or 1) if it can */ | |
f8dd19e5 AJ |
503 | static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, |
504 | TCGArg y, TCGCond c) | |
505 | { | |
6349039d RH |
506 | tcg_target_ulong xv = arg_info(x)->val; |
507 | tcg_target_ulong yv = arg_info(y)->val; | |
508 | if (arg_is_const(x) && arg_is_const(y)) { | |
170ba88f RH |
509 | const TCGOpDef *def = &tcg_op_defs[op]; |
510 | tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR)); | |
511 | if (def->flags & TCG_OPF_64BIT) { | |
6349039d | 512 | return do_constant_folding_cond_64(xv, yv, c); |
170ba88f RH |
513 | } else { |
514 | return do_constant_folding_cond_32(xv, yv, c); | |
b336ceb6 | 515 | } |
6349039d | 516 | } else if (args_are_copies(x, y)) { |
9519da7e | 517 | return do_constant_folding_cond_eq(c); |
6349039d | 518 | } else if (arg_is_const(y) && yv == 0) { |
b336ceb6 | 519 | switch (c) { |
f8dd19e5 | 520 | case TCG_COND_LTU: |
b336ceb6 | 521 | return 0; |
f8dd19e5 | 522 | case TCG_COND_GEU: |
b336ceb6 AJ |
523 | return 1; |
524 | default: | |
525 | return 2; | |
f8dd19e5 | 526 | } |
f8dd19e5 | 527 | } |
550276ae | 528 | return 2; |
f8dd19e5 AJ |
529 | } |
530 | ||
6c4382f8 RH |
531 | /* Return 2 if the condition can't be simplified, and the result |
532 | of the condition (0 or 1) if it can */ | |
533 | static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c) | |
534 | { | |
535 | TCGArg al = p1[0], ah = p1[1]; | |
536 | TCGArg bl = p2[0], bh = p2[1]; | |
537 | ||
6349039d RH |
538 | if (arg_is_const(bl) && arg_is_const(bh)) { |
539 | tcg_target_ulong blv = arg_info(bl)->val; | |
540 | tcg_target_ulong bhv = arg_info(bh)->val; | |
541 | uint64_t b = deposit64(blv, 32, 32, bhv); | |
6c4382f8 | 542 | |
6349039d RH |
543 | if (arg_is_const(al) && arg_is_const(ah)) { |
544 | tcg_target_ulong alv = arg_info(al)->val; | |
545 | tcg_target_ulong ahv = arg_info(ah)->val; | |
546 | uint64_t a = deposit64(alv, 32, 32, ahv); | |
6c4382f8 RH |
547 | return do_constant_folding_cond_64(a, b, c); |
548 | } | |
549 | if (b == 0) { | |
550 | switch (c) { | |
551 | case TCG_COND_LTU: | |
552 | return 0; | |
553 | case TCG_COND_GEU: | |
554 | return 1; | |
555 | default: | |
556 | break; | |
557 | } | |
558 | } | |
559 | } | |
6349039d | 560 | if (args_are_copies(al, bl) && args_are_copies(ah, bh)) { |
6c4382f8 RH |
561 | return do_constant_folding_cond_eq(c); |
562 | } | |
563 | return 2; | |
564 | } | |
565 | ||
24c9ae4e RH |
566 | static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2) |
567 | { | |
568 | TCGArg a1 = *p1, a2 = *p2; | |
569 | int sum = 0; | |
6349039d RH |
570 | sum += arg_is_const(a1); |
571 | sum -= arg_is_const(a2); | |
24c9ae4e RH |
572 | |
573 | /* Prefer the constant in second argument, and then the form | |
574 | op a, a, b, which is better handled on non-RISC hosts. */ | |
575 | if (sum > 0 || (sum == 0 && dest == a2)) { | |
576 | *p1 = a2; | |
577 | *p2 = a1; | |
578 | return true; | |
579 | } | |
580 | return false; | |
581 | } | |
582 | ||
0bfcb865 RH |
583 | static bool swap_commutative2(TCGArg *p1, TCGArg *p2) |
584 | { | |
585 | int sum = 0; | |
6349039d RH |
586 | sum += arg_is_const(p1[0]); |
587 | sum += arg_is_const(p1[1]); | |
588 | sum -= arg_is_const(p2[0]); | |
589 | sum -= arg_is_const(p2[1]); | |
0bfcb865 RH |
590 | if (sum > 0) { |
591 | TCGArg t; | |
592 | t = p1[0], p1[0] = p2[0], p2[0] = t; | |
593 | t = p1[1], p1[1] = p2[1], p2[1] = t; | |
594 | return true; | |
595 | } | |
596 | return false; | |
597 | } | |
598 | ||
22613af4 | 599 | /* Propagate constants and copies, fold constant expressions. */ |
36e60ef6 | 600 | void tcg_optimize(TCGContext *s) |
8f2e8c07 | 601 | { |
15fa08f8 RH |
602 | int nb_temps, nb_globals; |
603 | TCGOp *op, *op_next, *prev_mb = NULL; | |
34184b07 EC |
604 | struct tcg_temp_info *infos; |
605 | TCGTempSet temps_used; | |
5d8f5363 | 606 | |
22613af4 KB |
607 | /* Array VALS has an element for each temp. |
608 | If this temp holds a constant then its value is kept in VALS' element. | |
e590d4e6 AJ |
609 | If this temp is a copy of other ones then the other copies are |
610 | available through the doubly linked circular list. */ | |
8f2e8c07 KB |
611 | |
612 | nb_temps = s->nb_temps; | |
613 | nb_globals = s->nb_globals; | |
34184b07 EC |
614 | bitmap_zero(temps_used.l, nb_temps); |
615 | infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps); | |
8f2e8c07 | 616 | |
15fa08f8 | 617 | QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) { |
24666baf | 618 | tcg_target_ulong mask, partmask, affected; |
c45cb8bb | 619 | int nb_oargs, nb_iargs, i; |
cf066674 | 620 | TCGArg tmp; |
c45cb8bb RH |
621 | TCGOpcode opc = op->opc; |
622 | const TCGOpDef *def = &tcg_op_defs[opc]; | |
623 | ||
1208d7dd AJ |
624 | /* Count the arguments, and initialize the temps that are |
625 | going to be used */ | |
c45cb8bb | 626 | if (opc == INDEX_op_call) { |
cd9090aa RH |
627 | nb_oargs = TCGOP_CALLO(op); |
628 | nb_iargs = TCGOP_CALLI(op); | |
1208d7dd | 629 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
6349039d RH |
630 | TCGTemp *ts = arg_temp(op->args[i]); |
631 | if (ts) { | |
34184b07 | 632 | init_ts_info(infos, &temps_used, ts); |
1208d7dd AJ |
633 | } |
634 | } | |
1ff8c541 | 635 | } else { |
cf066674 RH |
636 | nb_oargs = def->nb_oargs; |
637 | nb_iargs = def->nb_iargs; | |
1208d7dd | 638 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
34184b07 | 639 | init_arg_info(infos, &temps_used, op->args[i]); |
1208d7dd | 640 | } |
cf066674 RH |
641 | } |
642 | ||
643 | /* Do copy propagation */ | |
644 | for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { | |
6349039d RH |
645 | TCGTemp *ts = arg_temp(op->args[i]); |
646 | if (ts && ts_is_copy(ts)) { | |
647 | op->args[i] = temp_arg(find_better_copy(s, ts)); | |
22613af4 KB |
648 | } |
649 | } | |
650 | ||
53108fb5 | 651 | /* For commutative operations make constant second argument */ |
c45cb8bb | 652 | switch (opc) { |
170ba88f RH |
653 | CASE_OP_32_64_VEC(add): |
654 | CASE_OP_32_64_VEC(mul): | |
655 | CASE_OP_32_64_VEC(and): | |
656 | CASE_OP_32_64_VEC(or): | |
657 | CASE_OP_32_64_VEC(xor): | |
cb25c80a RH |
658 | CASE_OP_32_64(eqv): |
659 | CASE_OP_32_64(nand): | |
660 | CASE_OP_32_64(nor): | |
03271524 RH |
661 | CASE_OP_32_64(muluh): |
662 | CASE_OP_32_64(mulsh): | |
acd93701 | 663 | swap_commutative(op->args[0], &op->args[1], &op->args[2]); |
53108fb5 | 664 | break; |
65a7cce1 | 665 | CASE_OP_32_64(brcond): |
acd93701 RH |
666 | if (swap_commutative(-1, &op->args[0], &op->args[1])) { |
667 | op->args[2] = tcg_swap_cond(op->args[2]); | |
65a7cce1 AJ |
668 | } |
669 | break; | |
670 | CASE_OP_32_64(setcond): | |
acd93701 RH |
671 | if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) { |
672 | op->args[3] = tcg_swap_cond(op->args[3]); | |
65a7cce1 AJ |
673 | } |
674 | break; | |
fa01a208 | 675 | CASE_OP_32_64(movcond): |
acd93701 RH |
676 | if (swap_commutative(-1, &op->args[1], &op->args[2])) { |
677 | op->args[5] = tcg_swap_cond(op->args[5]); | |
5d8f5363 RH |
678 | } |
679 | /* For movcond, we canonicalize the "false" input reg to match | |
680 | the destination reg so that the tcg backend can implement | |
681 | a "move if true" operation. */ | |
acd93701 RH |
682 | if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) { |
683 | op->args[5] = tcg_invert_cond(op->args[5]); | |
fa01a208 | 684 | } |
1e484e61 | 685 | break; |
d7156f7c | 686 | CASE_OP_32_64(add2): |
acd93701 RH |
687 | swap_commutative(op->args[0], &op->args[2], &op->args[4]); |
688 | swap_commutative(op->args[1], &op->args[3], &op->args[5]); | |
1e484e61 | 689 | break; |
d7156f7c | 690 | CASE_OP_32_64(mulu2): |
4d3203fd | 691 | CASE_OP_32_64(muls2): |
acd93701 | 692 | swap_commutative(op->args[0], &op->args[2], &op->args[3]); |
1414968a | 693 | break; |
0bfcb865 | 694 | case INDEX_op_brcond2_i32: |
acd93701 RH |
695 | if (swap_commutative2(&op->args[0], &op->args[2])) { |
696 | op->args[4] = tcg_swap_cond(op->args[4]); | |
0bfcb865 RH |
697 | } |
698 | break; | |
699 | case INDEX_op_setcond2_i32: | |
acd93701 RH |
700 | if (swap_commutative2(&op->args[1], &op->args[3])) { |
701 | op->args[5] = tcg_swap_cond(op->args[5]); | |
0bfcb865 RH |
702 | } |
703 | break; | |
53108fb5 KB |
704 | default: |
705 | break; | |
706 | } | |
707 | ||
2d497542 RH |
708 | /* Simplify expressions for "shift/rot r, 0, a => movi r, 0", |
709 | and "sub r, 0, a => neg r, a" case. */ | |
c45cb8bb | 710 | switch (opc) { |
01ee5282 AJ |
711 | CASE_OP_32_64(shl): |
712 | CASE_OP_32_64(shr): | |
713 | CASE_OP_32_64(sar): | |
714 | CASE_OP_32_64(rotl): | |
715 | CASE_OP_32_64(rotr): | |
6349039d RH |
716 | if (arg_is_const(op->args[1]) |
717 | && arg_info(op->args[1])->val == 0) { | |
acd93701 | 718 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
01ee5282 AJ |
719 | continue; |
720 | } | |
721 | break; | |
170ba88f | 722 | CASE_OP_32_64_VEC(sub): |
2d497542 RH |
723 | { |
724 | TCGOpcode neg_op; | |
725 | bool have_neg; | |
726 | ||
6349039d | 727 | if (arg_is_const(op->args[2])) { |
2d497542 RH |
728 | /* Proceed with possible constant folding. */ |
729 | break; | |
730 | } | |
c45cb8bb | 731 | if (opc == INDEX_op_sub_i32) { |
2d497542 RH |
732 | neg_op = INDEX_op_neg_i32; |
733 | have_neg = TCG_TARGET_HAS_neg_i32; | |
170ba88f | 734 | } else if (opc == INDEX_op_sub_i64) { |
2d497542 RH |
735 | neg_op = INDEX_op_neg_i64; |
736 | have_neg = TCG_TARGET_HAS_neg_i64; | |
170ba88f RH |
737 | } else { |
738 | neg_op = INDEX_op_neg_vec; | |
739 | have_neg = TCG_TARGET_HAS_neg_vec; | |
2d497542 RH |
740 | } |
741 | if (!have_neg) { | |
742 | break; | |
743 | } | |
6349039d RH |
744 | if (arg_is_const(op->args[1]) |
745 | && arg_info(op->args[1])->val == 0) { | |
c45cb8bb | 746 | op->opc = neg_op; |
acd93701 RH |
747 | reset_temp(op->args[0]); |
748 | op->args[1] = op->args[2]; | |
2d497542 RH |
749 | continue; |
750 | } | |
751 | } | |
752 | break; | |
170ba88f | 753 | CASE_OP_32_64_VEC(xor): |
e201b564 | 754 | CASE_OP_32_64(nand): |
6349039d RH |
755 | if (!arg_is_const(op->args[1]) |
756 | && arg_is_const(op->args[2]) | |
757 | && arg_info(op->args[2])->val == -1) { | |
e201b564 RH |
758 | i = 1; |
759 | goto try_not; | |
760 | } | |
761 | break; | |
762 | CASE_OP_32_64(nor): | |
6349039d RH |
763 | if (!arg_is_const(op->args[1]) |
764 | && arg_is_const(op->args[2]) | |
765 | && arg_info(op->args[2])->val == 0) { | |
e201b564 RH |
766 | i = 1; |
767 | goto try_not; | |
768 | } | |
769 | break; | |
170ba88f | 770 | CASE_OP_32_64_VEC(andc): |
6349039d RH |
771 | if (!arg_is_const(op->args[2]) |
772 | && arg_is_const(op->args[1]) | |
773 | && arg_info(op->args[1])->val == -1) { | |
e201b564 RH |
774 | i = 2; |
775 | goto try_not; | |
776 | } | |
777 | break; | |
170ba88f | 778 | CASE_OP_32_64_VEC(orc): |
e201b564 | 779 | CASE_OP_32_64(eqv): |
6349039d RH |
780 | if (!arg_is_const(op->args[2]) |
781 | && arg_is_const(op->args[1]) | |
782 | && arg_info(op->args[1])->val == 0) { | |
e201b564 RH |
783 | i = 2; |
784 | goto try_not; | |
785 | } | |
786 | break; | |
787 | try_not: | |
788 | { | |
789 | TCGOpcode not_op; | |
790 | bool have_not; | |
791 | ||
170ba88f RH |
792 | if (def->flags & TCG_OPF_VECTOR) { |
793 | not_op = INDEX_op_not_vec; | |
794 | have_not = TCG_TARGET_HAS_not_vec; | |
795 | } else if (def->flags & TCG_OPF_64BIT) { | |
e201b564 RH |
796 | not_op = INDEX_op_not_i64; |
797 | have_not = TCG_TARGET_HAS_not_i64; | |
798 | } else { | |
799 | not_op = INDEX_op_not_i32; | |
800 | have_not = TCG_TARGET_HAS_not_i32; | |
801 | } | |
802 | if (!have_not) { | |
803 | break; | |
804 | } | |
c45cb8bb | 805 | op->opc = not_op; |
acd93701 RH |
806 | reset_temp(op->args[0]); |
807 | op->args[1] = op->args[i]; | |
e201b564 RH |
808 | continue; |
809 | } | |
01ee5282 AJ |
810 | default: |
811 | break; | |
812 | } | |
813 | ||
464a1441 | 814 | /* Simplify expression for "op r, a, const => mov r, a" cases */ |
c45cb8bb | 815 | switch (opc) { |
170ba88f RH |
816 | CASE_OP_32_64_VEC(add): |
817 | CASE_OP_32_64_VEC(sub): | |
818 | CASE_OP_32_64_VEC(or): | |
819 | CASE_OP_32_64_VEC(xor): | |
820 | CASE_OP_32_64_VEC(andc): | |
55c0975c KB |
821 | CASE_OP_32_64(shl): |
822 | CASE_OP_32_64(shr): | |
823 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
824 | CASE_OP_32_64(rotl): |
825 | CASE_OP_32_64(rotr): | |
6349039d RH |
826 | if (!arg_is_const(op->args[1]) |
827 | && arg_is_const(op->args[2]) | |
828 | && arg_info(op->args[2])->val == 0) { | |
acd93701 | 829 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 830 | continue; |
53108fb5 KB |
831 | } |
832 | break; | |
170ba88f RH |
833 | CASE_OP_32_64_VEC(and): |
834 | CASE_OP_32_64_VEC(orc): | |
464a1441 | 835 | CASE_OP_32_64(eqv): |
6349039d RH |
836 | if (!arg_is_const(op->args[1]) |
837 | && arg_is_const(op->args[2]) | |
838 | && arg_info(op->args[2])->val == -1) { | |
acd93701 | 839 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 840 | continue; |
464a1441 RH |
841 | } |
842 | break; | |
56e49438 AJ |
843 | default: |
844 | break; | |
845 | } | |
846 | ||
3031244b AJ |
847 | /* Simplify using known-zero bits. Currently only ops with a single |
848 | output argument is supported. */ | |
3a9d8b17 | 849 | mask = -1; |
633f6502 | 850 | affected = -1; |
c45cb8bb | 851 | switch (opc) { |
3a9d8b17 | 852 | CASE_OP_32_64(ext8s): |
6349039d | 853 | if ((arg_info(op->args[1])->mask & 0x80) != 0) { |
3a9d8b17 PB |
854 | break; |
855 | } | |
856 | CASE_OP_32_64(ext8u): | |
857 | mask = 0xff; | |
858 | goto and_const; | |
859 | CASE_OP_32_64(ext16s): | |
6349039d | 860 | if ((arg_info(op->args[1])->mask & 0x8000) != 0) { |
3a9d8b17 PB |
861 | break; |
862 | } | |
863 | CASE_OP_32_64(ext16u): | |
864 | mask = 0xffff; | |
865 | goto and_const; | |
866 | case INDEX_op_ext32s_i64: | |
6349039d | 867 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
3a9d8b17 PB |
868 | break; |
869 | } | |
870 | case INDEX_op_ext32u_i64: | |
871 | mask = 0xffffffffU; | |
872 | goto and_const; | |
873 | ||
874 | CASE_OP_32_64(and): | |
6349039d RH |
875 | mask = arg_info(op->args[2])->mask; |
876 | if (arg_is_const(op->args[2])) { | |
3a9d8b17 | 877 | and_const: |
6349039d | 878 | affected = arg_info(op->args[1])->mask & ~mask; |
3a9d8b17 | 879 | } |
6349039d | 880 | mask = arg_info(op->args[1])->mask & mask; |
3a9d8b17 PB |
881 | break; |
882 | ||
8bcb5c8f | 883 | case INDEX_op_ext_i32_i64: |
6349039d | 884 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
8bcb5c8f AJ |
885 | break; |
886 | } | |
887 | case INDEX_op_extu_i32_i64: | |
888 | /* We do not compute affected as it is a size changing op. */ | |
6349039d | 889 | mask = (uint32_t)arg_info(op->args[1])->mask; |
8bcb5c8f AJ |
890 | break; |
891 | ||
23ec69ed RH |
892 | CASE_OP_32_64(andc): |
893 | /* Known-zeros does not imply known-ones. Therefore unless | |
acd93701 | 894 | op->args[2] is constant, we can't infer anything from it. */ |
6349039d RH |
895 | if (arg_is_const(op->args[2])) { |
896 | mask = ~arg_info(op->args[2])->mask; | |
23ec69ed RH |
897 | goto and_const; |
898 | } | |
6349039d RH |
899 | /* But we certainly know nothing outside args[1] may be set. */ |
900 | mask = arg_info(op->args[1])->mask; | |
23ec69ed RH |
901 | break; |
902 | ||
e46b225a | 903 | case INDEX_op_sar_i32: |
6349039d RH |
904 | if (arg_is_const(op->args[2])) { |
905 | tmp = arg_info(op->args[2])->val & 31; | |
906 | mask = (int32_t)arg_info(op->args[1])->mask >> tmp; | |
e46b225a AJ |
907 | } |
908 | break; | |
909 | case INDEX_op_sar_i64: | |
6349039d RH |
910 | if (arg_is_const(op->args[2])) { |
911 | tmp = arg_info(op->args[2])->val & 63; | |
912 | mask = (int64_t)arg_info(op->args[1])->mask >> tmp; | |
3a9d8b17 PB |
913 | } |
914 | break; | |
915 | ||
e46b225a | 916 | case INDEX_op_shr_i32: |
6349039d RH |
917 | if (arg_is_const(op->args[2])) { |
918 | tmp = arg_info(op->args[2])->val & 31; | |
919 | mask = (uint32_t)arg_info(op->args[1])->mask >> tmp; | |
e46b225a AJ |
920 | } |
921 | break; | |
922 | case INDEX_op_shr_i64: | |
6349039d RH |
923 | if (arg_is_const(op->args[2])) { |
924 | tmp = arg_info(op->args[2])->val & 63; | |
925 | mask = (uint64_t)arg_info(op->args[1])->mask >> tmp; | |
3a9d8b17 PB |
926 | } |
927 | break; | |
928 | ||
609ad705 | 929 | case INDEX_op_extrl_i64_i32: |
6349039d | 930 | mask = (uint32_t)arg_info(op->args[1])->mask; |
609ad705 RH |
931 | break; |
932 | case INDEX_op_extrh_i64_i32: | |
6349039d | 933 | mask = (uint64_t)arg_info(op->args[1])->mask >> 32; |
4bb7a41e RH |
934 | break; |
935 | ||
3a9d8b17 | 936 | CASE_OP_32_64(shl): |
6349039d RH |
937 | if (arg_is_const(op->args[2])) { |
938 | tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1); | |
939 | mask = arg_info(op->args[1])->mask << tmp; | |
3a9d8b17 PB |
940 | } |
941 | break; | |
942 | ||
943 | CASE_OP_32_64(neg): | |
944 | /* Set to 1 all bits to the left of the rightmost. */ | |
6349039d RH |
945 | mask = -(arg_info(op->args[1])->mask |
946 | & -arg_info(op->args[1])->mask); | |
3a9d8b17 PB |
947 | break; |
948 | ||
949 | CASE_OP_32_64(deposit): | |
6349039d RH |
950 | mask = deposit64(arg_info(op->args[1])->mask, |
951 | op->args[3], op->args[4], | |
952 | arg_info(op->args[2])->mask); | |
3a9d8b17 PB |
953 | break; |
954 | ||
7ec8bab3 | 955 | CASE_OP_32_64(extract): |
6349039d RH |
956 | mask = extract64(arg_info(op->args[1])->mask, |
957 | op->args[2], op->args[3]); | |
acd93701 | 958 | if (op->args[2] == 0) { |
6349039d | 959 | affected = arg_info(op->args[1])->mask & ~mask; |
7ec8bab3 RH |
960 | } |
961 | break; | |
962 | CASE_OP_32_64(sextract): | |
6349039d | 963 | mask = sextract64(arg_info(op->args[1])->mask, |
acd93701 RH |
964 | op->args[2], op->args[3]); |
965 | if (op->args[2] == 0 && (tcg_target_long)mask >= 0) { | |
6349039d | 966 | affected = arg_info(op->args[1])->mask & ~mask; |
7ec8bab3 RH |
967 | } |
968 | break; | |
969 | ||
3a9d8b17 PB |
970 | CASE_OP_32_64(or): |
971 | CASE_OP_32_64(xor): | |
6349039d | 972 | mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask; |
3a9d8b17 PB |
973 | break; |
974 | ||
0e28d006 RH |
975 | case INDEX_op_clz_i32: |
976 | case INDEX_op_ctz_i32: | |
6349039d | 977 | mask = arg_info(op->args[2])->mask | 31; |
0e28d006 RH |
978 | break; |
979 | ||
980 | case INDEX_op_clz_i64: | |
981 | case INDEX_op_ctz_i64: | |
6349039d | 982 | mask = arg_info(op->args[2])->mask | 63; |
0e28d006 RH |
983 | break; |
984 | ||
a768e4e9 RH |
985 | case INDEX_op_ctpop_i32: |
986 | mask = 32 | 31; | |
987 | break; | |
988 | case INDEX_op_ctpop_i64: | |
989 | mask = 64 | 63; | |
990 | break; | |
991 | ||
3a9d8b17 | 992 | CASE_OP_32_64(setcond): |
a763551a | 993 | case INDEX_op_setcond2_i32: |
3a9d8b17 PB |
994 | mask = 1; |
995 | break; | |
996 | ||
997 | CASE_OP_32_64(movcond): | |
6349039d | 998 | mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask; |
3a9d8b17 PB |
999 | break; |
1000 | ||
c8d70272 | 1001 | CASE_OP_32_64(ld8u): |
c8d70272 AJ |
1002 | mask = 0xff; |
1003 | break; | |
1004 | CASE_OP_32_64(ld16u): | |
c8d70272 AJ |
1005 | mask = 0xffff; |
1006 | break; | |
1007 | case INDEX_op_ld32u_i64: | |
c8d70272 AJ |
1008 | mask = 0xffffffffu; |
1009 | break; | |
1010 | ||
1011 | CASE_OP_32_64(qemu_ld): | |
1012 | { | |
acd93701 | 1013 | TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs]; |
59227d5d | 1014 | TCGMemOp mop = get_memop(oi); |
c8d70272 AJ |
1015 | if (!(mop & MO_SIGN)) { |
1016 | mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1; | |
1017 | } | |
1018 | } | |
1019 | break; | |
1020 | ||
3a9d8b17 PB |
1021 | default: |
1022 | break; | |
1023 | } | |
1024 | ||
bc8d688f RH |
1025 | /* 32-bit ops generate 32-bit results. For the result is zero test |
1026 | below, we can ignore high bits, but for further optimizations we | |
1027 | need to record that the high bits contain garbage. */ | |
24666baf | 1028 | partmask = mask; |
bc8d688f | 1029 | if (!(def->flags & TCG_OPF_64BIT)) { |
24666baf RH |
1030 | mask |= ~(tcg_target_ulong)0xffffffffu; |
1031 | partmask &= 0xffffffffu; | |
1032 | affected &= 0xffffffffu; | |
f096dc96 AJ |
1033 | } |
1034 | ||
24666baf | 1035 | if (partmask == 0) { |
eabb7b91 | 1036 | tcg_debug_assert(nb_oargs == 1); |
acd93701 | 1037 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
633f6502 PB |
1038 | continue; |
1039 | } | |
1040 | if (affected == 0) { | |
eabb7b91 | 1041 | tcg_debug_assert(nb_oargs == 1); |
acd93701 | 1042 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
633f6502 PB |
1043 | continue; |
1044 | } | |
1045 | ||
56e49438 | 1046 | /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ |
c45cb8bb | 1047 | switch (opc) { |
170ba88f RH |
1048 | CASE_OP_32_64_VEC(and): |
1049 | CASE_OP_32_64_VEC(mul): | |
03271524 RH |
1050 | CASE_OP_32_64(muluh): |
1051 | CASE_OP_32_64(mulsh): | |
6349039d RH |
1052 | if (arg_is_const(op->args[2]) |
1053 | && arg_info(op->args[2])->val == 0) { | |
acd93701 | 1054 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
53108fb5 KB |
1055 | continue; |
1056 | } | |
1057 | break; | |
56e49438 AJ |
1058 | default: |
1059 | break; | |
1060 | } | |
1061 | ||
1062 | /* Simplify expression for "op r, a, a => mov r, a" cases */ | |
c45cb8bb | 1063 | switch (opc) { |
170ba88f RH |
1064 | CASE_OP_32_64_VEC(or): |
1065 | CASE_OP_32_64_VEC(and): | |
6349039d | 1066 | if (args_are_copies(op->args[1], op->args[2])) { |
acd93701 | 1067 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
9a81090b KB |
1068 | continue; |
1069 | } | |
1070 | break; | |
fe0de7aa BS |
1071 | default: |
1072 | break; | |
53108fb5 KB |
1073 | } |
1074 | ||
3c94193e | 1075 | /* Simplify expression for "op r, a, a => movi r, 0" cases */ |
c45cb8bb | 1076 | switch (opc) { |
170ba88f RH |
1077 | CASE_OP_32_64_VEC(andc): |
1078 | CASE_OP_32_64_VEC(sub): | |
1079 | CASE_OP_32_64_VEC(xor): | |
6349039d | 1080 | if (args_are_copies(op->args[1], op->args[2])) { |
acd93701 | 1081 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
3c94193e AJ |
1082 | continue; |
1083 | } | |
1084 | break; | |
1085 | default: | |
1086 | break; | |
1087 | } | |
1088 | ||
22613af4 KB |
1089 | /* Propagate constants through copy operations and do constant |
1090 | folding. Constants will be substituted to arguments by register | |
1091 | allocator where needed and possible. Also detect copies. */ | |
c45cb8bb | 1092 | switch (opc) { |
170ba88f | 1093 | CASE_OP_32_64_VEC(mov): |
acd93701 | 1094 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
97a79eb7 | 1095 | break; |
22613af4 | 1096 | CASE_OP_32_64(movi): |
170ba88f | 1097 | case INDEX_op_dupi_vec: |
acd93701 | 1098 | tcg_opt_gen_movi(s, op, op->args[0], op->args[1]); |
22613af4 | 1099 | break; |
6e14e91b | 1100 | |
170ba88f RH |
1101 | case INDEX_op_dup_vec: |
1102 | if (arg_is_const(op->args[1])) { | |
1103 | tmp = arg_info(op->args[1])->val; | |
1104 | tmp = dup_const(TCGOP_VECE(op), tmp); | |
1105 | tcg_opt_gen_movi(s, op, op->args[0], tmp); | |
1fb57da7 | 1106 | break; |
170ba88f | 1107 | } |
1fb57da7 | 1108 | goto do_default; |
170ba88f | 1109 | |
a640f031 | 1110 | CASE_OP_32_64(not): |
cb25c80a | 1111 | CASE_OP_32_64(neg): |
25c4d9cc RH |
1112 | CASE_OP_32_64(ext8s): |
1113 | CASE_OP_32_64(ext8u): | |
1114 | CASE_OP_32_64(ext16s): | |
1115 | CASE_OP_32_64(ext16u): | |
a768e4e9 | 1116 | CASE_OP_32_64(ctpop): |
6498594c RH |
1117 | CASE_OP_32_64(bswap16): |
1118 | CASE_OP_32_64(bswap32): | |
1119 | case INDEX_op_bswap64_i64: | |
a640f031 KB |
1120 | case INDEX_op_ext32s_i64: |
1121 | case INDEX_op_ext32u_i64: | |
8bcb5c8f AJ |
1122 | case INDEX_op_ext_i32_i64: |
1123 | case INDEX_op_extu_i32_i64: | |
609ad705 RH |
1124 | case INDEX_op_extrl_i64_i32: |
1125 | case INDEX_op_extrh_i64_i32: | |
6349039d RH |
1126 | if (arg_is_const(op->args[1])) { |
1127 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0); | |
acd93701 | 1128 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1129 | break; |
a640f031 | 1130 | } |
6e14e91b RH |
1131 | goto do_default; |
1132 | ||
53108fb5 KB |
1133 | CASE_OP_32_64(add): |
1134 | CASE_OP_32_64(sub): | |
1135 | CASE_OP_32_64(mul): | |
9a81090b KB |
1136 | CASE_OP_32_64(or): |
1137 | CASE_OP_32_64(and): | |
1138 | CASE_OP_32_64(xor): | |
55c0975c KB |
1139 | CASE_OP_32_64(shl): |
1140 | CASE_OP_32_64(shr): | |
1141 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
1142 | CASE_OP_32_64(rotl): |
1143 | CASE_OP_32_64(rotr): | |
cb25c80a RH |
1144 | CASE_OP_32_64(andc): |
1145 | CASE_OP_32_64(orc): | |
1146 | CASE_OP_32_64(eqv): | |
1147 | CASE_OP_32_64(nand): | |
1148 | CASE_OP_32_64(nor): | |
03271524 RH |
1149 | CASE_OP_32_64(muluh): |
1150 | CASE_OP_32_64(mulsh): | |
01547f7f RH |
1151 | CASE_OP_32_64(div): |
1152 | CASE_OP_32_64(divu): | |
1153 | CASE_OP_32_64(rem): | |
1154 | CASE_OP_32_64(remu): | |
6349039d RH |
1155 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
1156 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, | |
1157 | arg_info(op->args[2])->val); | |
acd93701 | 1158 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1159 | break; |
53108fb5 | 1160 | } |
6e14e91b RH |
1161 | goto do_default; |
1162 | ||
0e28d006 RH |
1163 | CASE_OP_32_64(clz): |
1164 | CASE_OP_32_64(ctz): | |
6349039d RH |
1165 | if (arg_is_const(op->args[1])) { |
1166 | TCGArg v = arg_info(op->args[1])->val; | |
0e28d006 RH |
1167 | if (v != 0) { |
1168 | tmp = do_constant_folding(opc, v, 0); | |
acd93701 | 1169 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
0e28d006 | 1170 | } else { |
acd93701 | 1171 | tcg_opt_gen_mov(s, op, op->args[0], op->args[2]); |
0e28d006 RH |
1172 | } |
1173 | break; | |
1174 | } | |
1175 | goto do_default; | |
1176 | ||
7ef55fc9 | 1177 | CASE_OP_32_64(deposit): |
6349039d RH |
1178 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
1179 | tmp = deposit64(arg_info(op->args[1])->val, | |
1180 | op->args[3], op->args[4], | |
1181 | arg_info(op->args[2])->val); | |
acd93701 | 1182 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1183 | break; |
7ef55fc9 | 1184 | } |
6e14e91b RH |
1185 | goto do_default; |
1186 | ||
7ec8bab3 | 1187 | CASE_OP_32_64(extract): |
6349039d RH |
1188 | if (arg_is_const(op->args[1])) { |
1189 | tmp = extract64(arg_info(op->args[1])->val, | |
acd93701 RH |
1190 | op->args[2], op->args[3]); |
1191 | tcg_opt_gen_movi(s, op, op->args[0], tmp); | |
7ec8bab3 RH |
1192 | break; |
1193 | } | |
1194 | goto do_default; | |
1195 | ||
1196 | CASE_OP_32_64(sextract): | |
6349039d RH |
1197 | if (arg_is_const(op->args[1])) { |
1198 | tmp = sextract64(arg_info(op->args[1])->val, | |
acd93701 RH |
1199 | op->args[2], op->args[3]); |
1200 | tcg_opt_gen_movi(s, op, op->args[0], tmp); | |
7ec8bab3 RH |
1201 | break; |
1202 | } | |
1203 | goto do_default; | |
1204 | ||
f8dd19e5 | 1205 | CASE_OP_32_64(setcond): |
acd93701 RH |
1206 | tmp = do_constant_folding_cond(opc, op->args[1], |
1207 | op->args[2], op->args[3]); | |
b336ceb6 | 1208 | if (tmp != 2) { |
acd93701 | 1209 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
6e14e91b | 1210 | break; |
f8dd19e5 | 1211 | } |
6e14e91b RH |
1212 | goto do_default; |
1213 | ||
fbeaa26c | 1214 | CASE_OP_32_64(brcond): |
acd93701 RH |
1215 | tmp = do_constant_folding_cond(opc, op->args[0], |
1216 | op->args[1], op->args[2]); | |
b336ceb6 AJ |
1217 | if (tmp != 2) { |
1218 | if (tmp) { | |
34184b07 | 1219 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1220 | op->opc = INDEX_op_br; |
acd93701 | 1221 | op->args[0] = op->args[3]; |
fbeaa26c | 1222 | } else { |
0c627cdc | 1223 | tcg_op_remove(s, op); |
fbeaa26c | 1224 | } |
6e14e91b | 1225 | break; |
fbeaa26c | 1226 | } |
6e14e91b RH |
1227 | goto do_default; |
1228 | ||
fa01a208 | 1229 | CASE_OP_32_64(movcond): |
acd93701 RH |
1230 | tmp = do_constant_folding_cond(opc, op->args[1], |
1231 | op->args[2], op->args[5]); | |
b336ceb6 | 1232 | if (tmp != 2) { |
acd93701 | 1233 | tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); |
6e14e91b | 1234 | break; |
fa01a208 | 1235 | } |
6349039d RH |
1236 | if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) { |
1237 | tcg_target_ulong tv = arg_info(op->args[3])->val; | |
1238 | tcg_target_ulong fv = arg_info(op->args[4])->val; | |
acd93701 | 1239 | TCGCond cond = op->args[5]; |
333b21b8 RH |
1240 | if (fv == 1 && tv == 0) { |
1241 | cond = tcg_invert_cond(cond); | |
1242 | } else if (!(tv == 1 && fv == 0)) { | |
1243 | goto do_default; | |
1244 | } | |
acd93701 | 1245 | op->args[3] = cond; |
333b21b8 RH |
1246 | op->opc = opc = (opc == INDEX_op_movcond_i32 |
1247 | ? INDEX_op_setcond_i32 | |
1248 | : INDEX_op_setcond_i64); | |
1249 | nb_iargs = 2; | |
1250 | } | |
6e14e91b | 1251 | goto do_default; |
212c328d RH |
1252 | |
1253 | case INDEX_op_add2_i32: | |
1254 | case INDEX_op_sub2_i32: | |
6349039d RH |
1255 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) |
1256 | && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) { | |
1257 | uint32_t al = arg_info(op->args[2])->val; | |
1258 | uint32_t ah = arg_info(op->args[3])->val; | |
1259 | uint32_t bl = arg_info(op->args[4])->val; | |
1260 | uint32_t bh = arg_info(op->args[5])->val; | |
212c328d RH |
1261 | uint64_t a = ((uint64_t)ah << 32) | al; |
1262 | uint64_t b = ((uint64_t)bh << 32) | bl; | |
1263 | TCGArg rl, rh; | |
ac1043f6 | 1264 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); |
212c328d | 1265 | |
c45cb8bb | 1266 | if (opc == INDEX_op_add2_i32) { |
212c328d RH |
1267 | a += b; |
1268 | } else { | |
1269 | a -= b; | |
1270 | } | |
1271 | ||
acd93701 RH |
1272 | rl = op->args[0]; |
1273 | rh = op->args[1]; | |
1274 | tcg_opt_gen_movi(s, op, rl, (int32_t)a); | |
1275 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32)); | |
212c328d RH |
1276 | break; |
1277 | } | |
1278 | goto do_default; | |
1414968a RH |
1279 | |
1280 | case INDEX_op_mulu2_i32: | |
6349039d RH |
1281 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) { |
1282 | uint32_t a = arg_info(op->args[2])->val; | |
1283 | uint32_t b = arg_info(op->args[3])->val; | |
1414968a RH |
1284 | uint64_t r = (uint64_t)a * b; |
1285 | TCGArg rl, rh; | |
ac1043f6 | 1286 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); |
1414968a | 1287 | |
acd93701 RH |
1288 | rl = op->args[0]; |
1289 | rh = op->args[1]; | |
1290 | tcg_opt_gen_movi(s, op, rl, (int32_t)r); | |
1291 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32)); | |
1414968a RH |
1292 | break; |
1293 | } | |
1294 | goto do_default; | |
6e14e91b | 1295 | |
bc1473ef | 1296 | case INDEX_op_brcond2_i32: |
acd93701 RH |
1297 | tmp = do_constant_folding_cond2(&op->args[0], &op->args[2], |
1298 | op->args[4]); | |
6c4382f8 RH |
1299 | if (tmp != 2) { |
1300 | if (tmp) { | |
a763551a | 1301 | do_brcond_true: |
34184b07 | 1302 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1303 | op->opc = INDEX_op_br; |
acd93701 | 1304 | op->args[0] = op->args[5]; |
6c4382f8 | 1305 | } else { |
a763551a | 1306 | do_brcond_false: |
0c627cdc | 1307 | tcg_op_remove(s, op); |
6c4382f8 | 1308 | } |
acd93701 RH |
1309 | } else if ((op->args[4] == TCG_COND_LT |
1310 | || op->args[4] == TCG_COND_GE) | |
6349039d RH |
1311 | && arg_is_const(op->args[2]) |
1312 | && arg_info(op->args[2])->val == 0 | |
1313 | && arg_is_const(op->args[3]) | |
1314 | && arg_info(op->args[3])->val == 0) { | |
6c4382f8 RH |
1315 | /* Simplify LT/GE comparisons vs zero to a single compare |
1316 | vs the high word of the input. */ | |
a763551a | 1317 | do_brcond_high: |
34184b07 | 1318 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1319 | op->opc = INDEX_op_brcond_i32; |
acd93701 RH |
1320 | op->args[0] = op->args[1]; |
1321 | op->args[1] = op->args[3]; | |
1322 | op->args[2] = op->args[4]; | |
1323 | op->args[3] = op->args[5]; | |
1324 | } else if (op->args[4] == TCG_COND_EQ) { | |
a763551a RH |
1325 | /* Simplify EQ comparisons where one of the pairs |
1326 | can be simplified. */ | |
1327 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1328 | op->args[0], op->args[2], |
1329 | TCG_COND_EQ); | |
a763551a RH |
1330 | if (tmp == 0) { |
1331 | goto do_brcond_false; | |
1332 | } else if (tmp == 1) { | |
1333 | goto do_brcond_high; | |
1334 | } | |
1335 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1336 | op->args[1], op->args[3], |
1337 | TCG_COND_EQ); | |
a763551a RH |
1338 | if (tmp == 0) { |
1339 | goto do_brcond_false; | |
1340 | } else if (tmp != 1) { | |
1341 | goto do_default; | |
1342 | } | |
1343 | do_brcond_low: | |
34184b07 | 1344 | bitmap_zero(temps_used.l, nb_temps); |
c45cb8bb | 1345 | op->opc = INDEX_op_brcond_i32; |
acd93701 RH |
1346 | op->args[1] = op->args[2]; |
1347 | op->args[2] = op->args[4]; | |
1348 | op->args[3] = op->args[5]; | |
1349 | } else if (op->args[4] == TCG_COND_NE) { | |
a763551a RH |
1350 | /* Simplify NE comparisons where one of the pairs |
1351 | can be simplified. */ | |
1352 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1353 | op->args[0], op->args[2], |
1354 | TCG_COND_NE); | |
a763551a RH |
1355 | if (tmp == 0) { |
1356 | goto do_brcond_high; | |
1357 | } else if (tmp == 1) { | |
1358 | goto do_brcond_true; | |
1359 | } | |
1360 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
acd93701 RH |
1361 | op->args[1], op->args[3], |
1362 | TCG_COND_NE); | |
a763551a RH |
1363 | if (tmp == 0) { |
1364 | goto do_brcond_low; | |
1365 | } else if (tmp == 1) { | |
1366 | goto do_brcond_true; | |
1367 | } | |
1368 | goto do_default; | |
6c4382f8 RH |
1369 | } else { |
1370 | goto do_default; | |
bc1473ef | 1371 | } |
6c4382f8 | 1372 | break; |
bc1473ef RH |
1373 | |
1374 | case INDEX_op_setcond2_i32: | |
acd93701 RH |
1375 | tmp = do_constant_folding_cond2(&op->args[1], &op->args[3], |
1376 | op->args[5]); | |
6c4382f8 | 1377 | if (tmp != 2) { |
a763551a | 1378 | do_setcond_const: |
acd93701 RH |
1379 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
1380 | } else if ((op->args[5] == TCG_COND_LT | |
1381 | || op->args[5] == TCG_COND_GE) | |
6349039d RH |
1382 | && arg_is_const(op->args[3]) |
1383 | && arg_info(op->args[3])->val == 0 | |
1384 | && arg_is_const(op->args[4]) | |
1385 | && arg_info(op->args[4])->val == 0) { | |
6c4382f8 RH |
1386 | /* Simplify LT/GE comparisons vs zero to a single compare |
1387 | vs the high word of the input. */ | |
a763551a | 1388 | do_setcond_high: |
acd93701 | 1389 | reset_temp(op->args[0]); |
6349039d | 1390 | arg_info(op->args[0])->mask = 1; |
c45cb8bb | 1391 | op->opc = INDEX_op_setcond_i32; |
acd93701 RH |
1392 | op->args[1] = op->args[2]; |
1393 | op->args[2] = op->args[4]; | |
1394 | op->args[3] = op->args[5]; | |
1395 | } else if (op->args[5] == TCG_COND_EQ) { | |
a763551a RH |
1396 | /* Simplify EQ comparisons where one of the pairs |
1397 | can be simplified. */ | |
1398 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1399 | op->args[1], op->args[3], |
1400 | TCG_COND_EQ); | |
a763551a RH |
1401 | if (tmp == 0) { |
1402 | goto do_setcond_const; | |
1403 | } else if (tmp == 1) { | |
1404 | goto do_setcond_high; | |
1405 | } | |
1406 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1407 | op->args[2], op->args[4], |
1408 | TCG_COND_EQ); | |
a763551a RH |
1409 | if (tmp == 0) { |
1410 | goto do_setcond_high; | |
1411 | } else if (tmp != 1) { | |
1412 | goto do_default; | |
1413 | } | |
1414 | do_setcond_low: | |
acd93701 | 1415 | reset_temp(op->args[0]); |
6349039d | 1416 | arg_info(op->args[0])->mask = 1; |
c45cb8bb | 1417 | op->opc = INDEX_op_setcond_i32; |
acd93701 RH |
1418 | op->args[2] = op->args[3]; |
1419 | op->args[3] = op->args[5]; | |
1420 | } else if (op->args[5] == TCG_COND_NE) { | |
a763551a RH |
1421 | /* Simplify NE comparisons where one of the pairs |
1422 | can be simplified. */ | |
1423 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1424 | op->args[1], op->args[3], |
1425 | TCG_COND_NE); | |
a763551a RH |
1426 | if (tmp == 0) { |
1427 | goto do_setcond_high; | |
1428 | } else if (tmp == 1) { | |
1429 | goto do_setcond_const; | |
1430 | } | |
1431 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
acd93701 RH |
1432 | op->args[2], op->args[4], |
1433 | TCG_COND_NE); | |
a763551a RH |
1434 | if (tmp == 0) { |
1435 | goto do_setcond_low; | |
1436 | } else if (tmp == 1) { | |
1437 | goto do_setcond_const; | |
1438 | } | |
1439 | goto do_default; | |
6c4382f8 RH |
1440 | } else { |
1441 | goto do_default; | |
bc1473ef | 1442 | } |
6c4382f8 | 1443 | break; |
bc1473ef | 1444 | |
8f2e8c07 | 1445 | case INDEX_op_call: |
acd93701 | 1446 | if (!(op->args[nb_oargs + nb_iargs + 1] |
cf066674 | 1447 | & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) { |
22613af4 | 1448 | for (i = 0; i < nb_globals; i++) { |
1208d7dd | 1449 | if (test_bit(i, temps_used.l)) { |
6349039d | 1450 | reset_ts(&s->temps[i]); |
1208d7dd | 1451 | } |
22613af4 KB |
1452 | } |
1453 | } | |
cf066674 | 1454 | goto do_reset_output; |
6e14e91b | 1455 | |
8f2e8c07 | 1456 | default: |
6e14e91b RH |
1457 | do_default: |
1458 | /* Default case: we know nothing about operation (or were unable | |
1459 | to compute the operation result) so no propagation is done. | |
1460 | We trash everything if the operation is the end of a basic | |
3a9d8b17 PB |
1461 | block, otherwise we only trash the output args. "mask" is |
1462 | the non-zero bits mask for the first output arg. */ | |
a2550660 | 1463 | if (def->flags & TCG_OPF_BB_END) { |
34184b07 | 1464 | bitmap_zero(temps_used.l, nb_temps); |
a2550660 | 1465 | } else { |
cf066674 RH |
1466 | do_reset_output: |
1467 | for (i = 0; i < nb_oargs; i++) { | |
acd93701 | 1468 | reset_temp(op->args[i]); |
3031244b AJ |
1469 | /* Save the corresponding known-zero bits mask for the |
1470 | first output argument (only one supported so far). */ | |
1471 | if (i == 0) { | |
6349039d | 1472 | arg_info(op->args[i])->mask = mask; |
3031244b | 1473 | } |
a2550660 | 1474 | } |
22613af4 | 1475 | } |
8f2e8c07 KB |
1476 | break; |
1477 | } | |
34f93921 PK |
1478 | |
1479 | /* Eliminate duplicate and redundant fence instructions. */ | |
acd93701 | 1480 | if (prev_mb) { |
34f93921 PK |
1481 | switch (opc) { |
1482 | case INDEX_op_mb: | |
1483 | /* Merge two barriers of the same type into one, | |
1484 | * or a weaker barrier into a stronger one, | |
1485 | * or two weaker barriers into a stronger one. | |
1486 | * mb X; mb Y => mb X|Y | |
1487 | * mb; strl => mb; st | |
1488 | * ldaq; mb => ld; mb | |
1489 | * ldaq; strl => ld; mb; st | |
1490 | * Other combinations are also merged into a strong | |
1491 | * barrier. This is stricter than specified but for | |
1492 | * the purposes of TCG is better than not optimizing. | |
1493 | */ | |
acd93701 | 1494 | prev_mb->args[0] |= op->args[0]; |
34f93921 PK |
1495 | tcg_op_remove(s, op); |
1496 | break; | |
1497 | ||
1498 | default: | |
1499 | /* Opcodes that end the block stop the optimization. */ | |
1500 | if ((def->flags & TCG_OPF_BB_END) == 0) { | |
1501 | break; | |
1502 | } | |
1503 | /* fallthru */ | |
1504 | case INDEX_op_qemu_ld_i32: | |
1505 | case INDEX_op_qemu_ld_i64: | |
1506 | case INDEX_op_qemu_st_i32: | |
1507 | case INDEX_op_qemu_st_i64: | |
1508 | case INDEX_op_call: | |
1509 | /* Opcodes that touch guest memory stop the optimization. */ | |
acd93701 | 1510 | prev_mb = NULL; |
34f93921 PK |
1511 | break; |
1512 | } | |
1513 | } else if (opc == INDEX_op_mb) { | |
acd93701 | 1514 | prev_mb = op; |
34f93921 | 1515 | } |
8f2e8c07 | 1516 | } |
8f2e8c07 | 1517 | } |