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1 | /* |
2 | * Optimizations for Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2010 Samsung Electronics. | |
5 | * Contributed by Kirill Batuzov <batuzovk@ispras.ru> | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
757e725b | 26 | #include "qemu/osdep.h" |
8f2e8c07 | 27 | #include "qemu-common.h" |
00f6da6a | 28 | #include "exec/cpu-common.h" |
8f2e8c07 KB |
29 | #include "tcg-op.h" |
30 | ||
8f2e8c07 KB |
31 | #define CASE_OP_32_64(x) \ |
32 | glue(glue(case INDEX_op_, x), _i32): \ | |
33 | glue(glue(case INDEX_op_, x), _i64) | |
8f2e8c07 | 34 | |
22613af4 | 35 | struct tcg_temp_info { |
b41059dd | 36 | bool is_const; |
22613af4 KB |
37 | uint16_t prev_copy; |
38 | uint16_t next_copy; | |
39 | tcg_target_ulong val; | |
3a9d8b17 | 40 | tcg_target_ulong mask; |
22613af4 KB |
41 | }; |
42 | ||
43 | static struct tcg_temp_info temps[TCG_MAX_TEMPS]; | |
1208d7dd | 44 | static TCGTempSet temps_used; |
22613af4 | 45 | |
d9c769c6 AJ |
46 | static inline bool temp_is_const(TCGArg arg) |
47 | { | |
b41059dd | 48 | return temps[arg].is_const; |
d9c769c6 AJ |
49 | } |
50 | ||
51 | static inline bool temp_is_copy(TCGArg arg) | |
52 | { | |
b41059dd | 53 | return temps[arg].next_copy != arg; |
d9c769c6 AJ |
54 | } |
55 | ||
b41059dd | 56 | /* Reset TEMP's state, possibly removing the temp for the list of copies. */ |
e590d4e6 | 57 | static void reset_temp(TCGArg temp) |
22613af4 | 58 | { |
b41059dd AJ |
59 | temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy; |
60 | temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy; | |
61 | temps[temp].next_copy = temp; | |
62 | temps[temp].prev_copy = temp; | |
63 | temps[temp].is_const = false; | |
3a9d8b17 | 64 | temps[temp].mask = -1; |
22613af4 KB |
65 | } |
66 | ||
1208d7dd AJ |
67 | /* Reset all temporaries, given that there are NB_TEMPS of them. */ |
68 | static void reset_all_temps(int nb_temps) | |
69 | { | |
70 | bitmap_zero(temps_used.l, nb_temps); | |
71 | } | |
72 | ||
73 | /* Initialize and activate a temporary. */ | |
74 | static void init_temp_info(TCGArg temp) | |
75 | { | |
76 | if (!test_bit(temp, temps_used.l)) { | |
b41059dd AJ |
77 | temps[temp].next_copy = temp; |
78 | temps[temp].prev_copy = temp; | |
79 | temps[temp].is_const = false; | |
1208d7dd AJ |
80 | temps[temp].mask = -1; |
81 | set_bit(temp, temps_used.l); | |
82 | } | |
83 | } | |
84 | ||
fe0de7aa | 85 | static int op_bits(TCGOpcode op) |
22613af4 | 86 | { |
8399ad59 RH |
87 | const TCGOpDef *def = &tcg_op_defs[op]; |
88 | return def->flags & TCG_OPF_64BIT ? 64 : 32; | |
22613af4 KB |
89 | } |
90 | ||
a62f6f56 RH |
91 | static TCGOpcode op_to_mov(TCGOpcode op) |
92 | { | |
93 | switch (op_bits(op)) { | |
94 | case 32: | |
95 | return INDEX_op_mov_i32; | |
96 | case 64: | |
97 | return INDEX_op_mov_i64; | |
98 | default: | |
99 | fprintf(stderr, "op_to_mov: unexpected return value of " | |
100 | "function op_bits.\n"); | |
101 | tcg_abort(); | |
102 | } | |
103 | } | |
104 | ||
fe0de7aa | 105 | static TCGOpcode op_to_movi(TCGOpcode op) |
22613af4 KB |
106 | { |
107 | switch (op_bits(op)) { | |
108 | case 32: | |
109 | return INDEX_op_movi_i32; | |
22613af4 KB |
110 | case 64: |
111 | return INDEX_op_movi_i64; | |
22613af4 KB |
112 | default: |
113 | fprintf(stderr, "op_to_movi: unexpected return value of " | |
114 | "function op_bits.\n"); | |
115 | tcg_abort(); | |
116 | } | |
117 | } | |
118 | ||
e590d4e6 AJ |
119 | static TCGArg find_better_copy(TCGContext *s, TCGArg temp) |
120 | { | |
121 | TCGArg i; | |
122 | ||
123 | /* If this is already a global, we can't do better. */ | |
124 | if (temp < s->nb_globals) { | |
125 | return temp; | |
126 | } | |
127 | ||
128 | /* Search for a global first. */ | |
129 | for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) { | |
130 | if (i < s->nb_globals) { | |
131 | return i; | |
132 | } | |
133 | } | |
134 | ||
135 | /* If it is a temp, search for a temp local. */ | |
136 | if (!s->temps[temp].temp_local) { | |
137 | for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) { | |
138 | if (s->temps[i].temp_local) { | |
139 | return i; | |
140 | } | |
141 | } | |
142 | } | |
143 | ||
144 | /* Failure to find a better representation, return the same temp. */ | |
145 | return temp; | |
146 | } | |
147 | ||
148 | static bool temps_are_copies(TCGArg arg1, TCGArg arg2) | |
149 | { | |
150 | TCGArg i; | |
151 | ||
152 | if (arg1 == arg2) { | |
153 | return true; | |
154 | } | |
155 | ||
d9c769c6 | 156 | if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) { |
e590d4e6 AJ |
157 | return false; |
158 | } | |
159 | ||
160 | for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) { | |
161 | if (i == arg2) { | |
162 | return true; | |
163 | } | |
164 | } | |
165 | ||
166 | return false; | |
167 | } | |
168 | ||
97a79eb7 AJ |
169 | static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg *args, |
170 | TCGArg dst, TCGArg val) | |
171 | { | |
172 | TCGOpcode new_op = op_to_movi(op->opc); | |
173 | tcg_target_ulong mask; | |
174 | ||
175 | op->opc = new_op; | |
176 | ||
177 | reset_temp(dst); | |
b41059dd | 178 | temps[dst].is_const = true; |
97a79eb7 AJ |
179 | temps[dst].val = val; |
180 | mask = val; | |
96152126 | 181 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) { |
97a79eb7 AJ |
182 | /* High bits of the destination are now garbage. */ |
183 | mask |= ~0xffffffffull; | |
184 | } | |
185 | temps[dst].mask = mask; | |
186 | ||
187 | args[0] = dst; | |
188 | args[1] = val; | |
189 | } | |
190 | ||
c45cb8bb | 191 | static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg *args, |
8d6a9160 | 192 | TCGArg dst, TCGArg src) |
22613af4 | 193 | { |
5365718a AJ |
194 | if (temps_are_copies(dst, src)) { |
195 | tcg_op_remove(s, op); | |
196 | return; | |
197 | } | |
198 | ||
8d6a9160 | 199 | TCGOpcode new_op = op_to_mov(op->opc); |
24666baf | 200 | tcg_target_ulong mask; |
a62f6f56 | 201 | |
c45cb8bb | 202 | op->opc = new_op; |
a62f6f56 | 203 | |
3a9d8b17 | 204 | reset_temp(dst); |
24666baf RH |
205 | mask = temps[src].mask; |
206 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { | |
207 | /* High bits of the destination are now garbage. */ | |
208 | mask |= ~0xffffffffull; | |
209 | } | |
210 | temps[dst].mask = mask; | |
211 | ||
3a9d8b17 | 212 | if (s->temps[src].type == s->temps[dst].type) { |
3a9d8b17 PB |
213 | temps[dst].next_copy = temps[src].next_copy; |
214 | temps[dst].prev_copy = src; | |
215 | temps[temps[dst].next_copy].prev_copy = dst; | |
216 | temps[src].next_copy = dst; | |
299f8013 AJ |
217 | temps[dst].is_const = temps[src].is_const; |
218 | temps[dst].val = temps[src].val; | |
3a9d8b17 | 219 | } |
e590d4e6 | 220 | |
c45cb8bb RH |
221 | args[0] = dst; |
222 | args[1] = src; | |
22613af4 KB |
223 | } |
224 | ||
fe0de7aa | 225 | static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 | 226 | { |
03271524 RH |
227 | uint64_t l64, h64; |
228 | ||
53108fb5 KB |
229 | switch (op) { |
230 | CASE_OP_32_64(add): | |
231 | return x + y; | |
232 | ||
233 | CASE_OP_32_64(sub): | |
234 | return x - y; | |
235 | ||
236 | CASE_OP_32_64(mul): | |
237 | return x * y; | |
238 | ||
9a81090b KB |
239 | CASE_OP_32_64(and): |
240 | return x & y; | |
241 | ||
242 | CASE_OP_32_64(or): | |
243 | return x | y; | |
244 | ||
245 | CASE_OP_32_64(xor): | |
246 | return x ^ y; | |
247 | ||
55c0975c | 248 | case INDEX_op_shl_i32: |
50c5c4d1 | 249 | return (uint32_t)x << (y & 31); |
55c0975c | 250 | |
55c0975c | 251 | case INDEX_op_shl_i64: |
50c5c4d1 | 252 | return (uint64_t)x << (y & 63); |
55c0975c KB |
253 | |
254 | case INDEX_op_shr_i32: | |
50c5c4d1 | 255 | return (uint32_t)x >> (y & 31); |
55c0975c | 256 | |
55c0975c | 257 | case INDEX_op_shr_i64: |
50c5c4d1 | 258 | return (uint64_t)x >> (y & 63); |
55c0975c KB |
259 | |
260 | case INDEX_op_sar_i32: | |
50c5c4d1 | 261 | return (int32_t)x >> (y & 31); |
55c0975c | 262 | |
55c0975c | 263 | case INDEX_op_sar_i64: |
50c5c4d1 | 264 | return (int64_t)x >> (y & 63); |
55c0975c KB |
265 | |
266 | case INDEX_op_rotr_i32: | |
50c5c4d1 | 267 | return ror32(x, y & 31); |
55c0975c | 268 | |
55c0975c | 269 | case INDEX_op_rotr_i64: |
50c5c4d1 | 270 | return ror64(x, y & 63); |
55c0975c KB |
271 | |
272 | case INDEX_op_rotl_i32: | |
50c5c4d1 | 273 | return rol32(x, y & 31); |
55c0975c | 274 | |
55c0975c | 275 | case INDEX_op_rotl_i64: |
50c5c4d1 | 276 | return rol64(x, y & 63); |
25c4d9cc RH |
277 | |
278 | CASE_OP_32_64(not): | |
a640f031 | 279 | return ~x; |
25c4d9cc | 280 | |
cb25c80a RH |
281 | CASE_OP_32_64(neg): |
282 | return -x; | |
283 | ||
284 | CASE_OP_32_64(andc): | |
285 | return x & ~y; | |
286 | ||
287 | CASE_OP_32_64(orc): | |
288 | return x | ~y; | |
289 | ||
290 | CASE_OP_32_64(eqv): | |
291 | return ~(x ^ y); | |
292 | ||
293 | CASE_OP_32_64(nand): | |
294 | return ~(x & y); | |
295 | ||
296 | CASE_OP_32_64(nor): | |
297 | return ~(x | y); | |
298 | ||
25c4d9cc | 299 | CASE_OP_32_64(ext8s): |
a640f031 | 300 | return (int8_t)x; |
25c4d9cc RH |
301 | |
302 | CASE_OP_32_64(ext16s): | |
a640f031 | 303 | return (int16_t)x; |
25c4d9cc RH |
304 | |
305 | CASE_OP_32_64(ext8u): | |
a640f031 | 306 | return (uint8_t)x; |
25c4d9cc RH |
307 | |
308 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
309 | return (uint16_t)x; |
310 | ||
8bcb5c8f | 311 | case INDEX_op_ext_i32_i64: |
a640f031 KB |
312 | case INDEX_op_ext32s_i64: |
313 | return (int32_t)x; | |
314 | ||
8bcb5c8f | 315 | case INDEX_op_extu_i32_i64: |
609ad705 | 316 | case INDEX_op_extrl_i64_i32: |
a640f031 KB |
317 | case INDEX_op_ext32u_i64: |
318 | return (uint32_t)x; | |
a640f031 | 319 | |
609ad705 RH |
320 | case INDEX_op_extrh_i64_i32: |
321 | return (uint64_t)x >> 32; | |
322 | ||
03271524 RH |
323 | case INDEX_op_muluh_i32: |
324 | return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32; | |
325 | case INDEX_op_mulsh_i32: | |
326 | return ((int64_t)(int32_t)x * (int32_t)y) >> 32; | |
327 | ||
328 | case INDEX_op_muluh_i64: | |
329 | mulu64(&l64, &h64, x, y); | |
330 | return h64; | |
331 | case INDEX_op_mulsh_i64: | |
332 | muls64(&l64, &h64, x, y); | |
333 | return h64; | |
334 | ||
01547f7f RH |
335 | case INDEX_op_div_i32: |
336 | /* Avoid crashing on divide by zero, otherwise undefined. */ | |
337 | return (int32_t)x / ((int32_t)y ? : 1); | |
338 | case INDEX_op_divu_i32: | |
339 | return (uint32_t)x / ((uint32_t)y ? : 1); | |
340 | case INDEX_op_div_i64: | |
341 | return (int64_t)x / ((int64_t)y ? : 1); | |
342 | case INDEX_op_divu_i64: | |
343 | return (uint64_t)x / ((uint64_t)y ? : 1); | |
344 | ||
345 | case INDEX_op_rem_i32: | |
346 | return (int32_t)x % ((int32_t)y ? : 1); | |
347 | case INDEX_op_remu_i32: | |
348 | return (uint32_t)x % ((uint32_t)y ? : 1); | |
349 | case INDEX_op_rem_i64: | |
350 | return (int64_t)x % ((int64_t)y ? : 1); | |
351 | case INDEX_op_remu_i64: | |
352 | return (uint64_t)x % ((uint64_t)y ? : 1); | |
353 | ||
53108fb5 KB |
354 | default: |
355 | fprintf(stderr, | |
356 | "Unrecognized operation %d in do_constant_folding.\n", op); | |
357 | tcg_abort(); | |
358 | } | |
359 | } | |
360 | ||
fe0de7aa | 361 | static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y) |
53108fb5 KB |
362 | { |
363 | TCGArg res = do_constant_folding_2(op, x, y); | |
53108fb5 | 364 | if (op_bits(op) == 32) { |
29f3ff8d | 365 | res = (int32_t)res; |
53108fb5 | 366 | } |
53108fb5 KB |
367 | return res; |
368 | } | |
369 | ||
9519da7e RH |
370 | static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c) |
371 | { | |
372 | switch (c) { | |
373 | case TCG_COND_EQ: | |
374 | return x == y; | |
375 | case TCG_COND_NE: | |
376 | return x != y; | |
377 | case TCG_COND_LT: | |
378 | return (int32_t)x < (int32_t)y; | |
379 | case TCG_COND_GE: | |
380 | return (int32_t)x >= (int32_t)y; | |
381 | case TCG_COND_LE: | |
382 | return (int32_t)x <= (int32_t)y; | |
383 | case TCG_COND_GT: | |
384 | return (int32_t)x > (int32_t)y; | |
385 | case TCG_COND_LTU: | |
386 | return x < y; | |
387 | case TCG_COND_GEU: | |
388 | return x >= y; | |
389 | case TCG_COND_LEU: | |
390 | return x <= y; | |
391 | case TCG_COND_GTU: | |
392 | return x > y; | |
393 | default: | |
394 | tcg_abort(); | |
395 | } | |
396 | } | |
397 | ||
398 | static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c) | |
399 | { | |
400 | switch (c) { | |
401 | case TCG_COND_EQ: | |
402 | return x == y; | |
403 | case TCG_COND_NE: | |
404 | return x != y; | |
405 | case TCG_COND_LT: | |
406 | return (int64_t)x < (int64_t)y; | |
407 | case TCG_COND_GE: | |
408 | return (int64_t)x >= (int64_t)y; | |
409 | case TCG_COND_LE: | |
410 | return (int64_t)x <= (int64_t)y; | |
411 | case TCG_COND_GT: | |
412 | return (int64_t)x > (int64_t)y; | |
413 | case TCG_COND_LTU: | |
414 | return x < y; | |
415 | case TCG_COND_GEU: | |
416 | return x >= y; | |
417 | case TCG_COND_LEU: | |
418 | return x <= y; | |
419 | case TCG_COND_GTU: | |
420 | return x > y; | |
421 | default: | |
422 | tcg_abort(); | |
423 | } | |
424 | } | |
425 | ||
426 | static bool do_constant_folding_cond_eq(TCGCond c) | |
427 | { | |
428 | switch (c) { | |
429 | case TCG_COND_GT: | |
430 | case TCG_COND_LTU: | |
431 | case TCG_COND_LT: | |
432 | case TCG_COND_GTU: | |
433 | case TCG_COND_NE: | |
434 | return 0; | |
435 | case TCG_COND_GE: | |
436 | case TCG_COND_GEU: | |
437 | case TCG_COND_LE: | |
438 | case TCG_COND_LEU: | |
439 | case TCG_COND_EQ: | |
440 | return 1; | |
441 | default: | |
442 | tcg_abort(); | |
443 | } | |
444 | } | |
445 | ||
b336ceb6 AJ |
446 | /* Return 2 if the condition can't be simplified, and the result |
447 | of the condition (0 or 1) if it can */ | |
f8dd19e5 AJ |
448 | static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, |
449 | TCGArg y, TCGCond c) | |
450 | { | |
d9c769c6 | 451 | if (temp_is_const(x) && temp_is_const(y)) { |
b336ceb6 AJ |
452 | switch (op_bits(op)) { |
453 | case 32: | |
9519da7e | 454 | return do_constant_folding_cond_32(temps[x].val, temps[y].val, c); |
b336ceb6 | 455 | case 64: |
9519da7e | 456 | return do_constant_folding_cond_64(temps[x].val, temps[y].val, c); |
0aed257f | 457 | default: |
9519da7e | 458 | tcg_abort(); |
b336ceb6 | 459 | } |
9519da7e RH |
460 | } else if (temps_are_copies(x, y)) { |
461 | return do_constant_folding_cond_eq(c); | |
d9c769c6 | 462 | } else if (temp_is_const(y) && temps[y].val == 0) { |
b336ceb6 | 463 | switch (c) { |
f8dd19e5 | 464 | case TCG_COND_LTU: |
b336ceb6 | 465 | return 0; |
f8dd19e5 | 466 | case TCG_COND_GEU: |
b336ceb6 AJ |
467 | return 1; |
468 | default: | |
469 | return 2; | |
f8dd19e5 | 470 | } |
f8dd19e5 | 471 | } |
550276ae | 472 | return 2; |
f8dd19e5 AJ |
473 | } |
474 | ||
6c4382f8 RH |
475 | /* Return 2 if the condition can't be simplified, and the result |
476 | of the condition (0 or 1) if it can */ | |
477 | static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c) | |
478 | { | |
479 | TCGArg al = p1[0], ah = p1[1]; | |
480 | TCGArg bl = p2[0], bh = p2[1]; | |
481 | ||
d9c769c6 | 482 | if (temp_is_const(bl) && temp_is_const(bh)) { |
6c4382f8 RH |
483 | uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val; |
484 | ||
d9c769c6 | 485 | if (temp_is_const(al) && temp_is_const(ah)) { |
6c4382f8 RH |
486 | uint64_t a; |
487 | a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val; | |
488 | return do_constant_folding_cond_64(a, b, c); | |
489 | } | |
490 | if (b == 0) { | |
491 | switch (c) { | |
492 | case TCG_COND_LTU: | |
493 | return 0; | |
494 | case TCG_COND_GEU: | |
495 | return 1; | |
496 | default: | |
497 | break; | |
498 | } | |
499 | } | |
500 | } | |
501 | if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) { | |
502 | return do_constant_folding_cond_eq(c); | |
503 | } | |
504 | return 2; | |
505 | } | |
506 | ||
24c9ae4e RH |
507 | static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2) |
508 | { | |
509 | TCGArg a1 = *p1, a2 = *p2; | |
510 | int sum = 0; | |
d9c769c6 AJ |
511 | sum += temp_is_const(a1); |
512 | sum -= temp_is_const(a2); | |
24c9ae4e RH |
513 | |
514 | /* Prefer the constant in second argument, and then the form | |
515 | op a, a, b, which is better handled on non-RISC hosts. */ | |
516 | if (sum > 0 || (sum == 0 && dest == a2)) { | |
517 | *p1 = a2; | |
518 | *p2 = a1; | |
519 | return true; | |
520 | } | |
521 | return false; | |
522 | } | |
523 | ||
0bfcb865 RH |
524 | static bool swap_commutative2(TCGArg *p1, TCGArg *p2) |
525 | { | |
526 | int sum = 0; | |
d9c769c6 AJ |
527 | sum += temp_is_const(p1[0]); |
528 | sum += temp_is_const(p1[1]); | |
529 | sum -= temp_is_const(p2[0]); | |
530 | sum -= temp_is_const(p2[1]); | |
0bfcb865 RH |
531 | if (sum > 0) { |
532 | TCGArg t; | |
533 | t = p1[0], p1[0] = p2[0], p2[0] = t; | |
534 | t = p1[1], p1[1] = p2[1], p2[1] = t; | |
535 | return true; | |
536 | } | |
537 | return false; | |
538 | } | |
539 | ||
22613af4 | 540 | /* Propagate constants and copies, fold constant expressions. */ |
36e60ef6 | 541 | void tcg_optimize(TCGContext *s) |
8f2e8c07 | 542 | { |
c45cb8bb | 543 | int oi, oi_next, nb_temps, nb_globals; |
34f93921 | 544 | TCGArg *prev_mb_args = NULL; |
5d8f5363 | 545 | |
22613af4 KB |
546 | /* Array VALS has an element for each temp. |
547 | If this temp holds a constant then its value is kept in VALS' element. | |
e590d4e6 AJ |
548 | If this temp is a copy of other ones then the other copies are |
549 | available through the doubly linked circular list. */ | |
8f2e8c07 KB |
550 | |
551 | nb_temps = s->nb_temps; | |
552 | nb_globals = s->nb_globals; | |
d193a14a | 553 | reset_all_temps(nb_temps); |
8f2e8c07 | 554 | |
dcb8e758 | 555 | for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) { |
24666baf | 556 | tcg_target_ulong mask, partmask, affected; |
c45cb8bb | 557 | int nb_oargs, nb_iargs, i; |
cf066674 RH |
558 | TCGArg tmp; |
559 | ||
c45cb8bb RH |
560 | TCGOp * const op = &s->gen_op_buf[oi]; |
561 | TCGArg * const args = &s->gen_opparam_buf[op->args]; | |
562 | TCGOpcode opc = op->opc; | |
563 | const TCGOpDef *def = &tcg_op_defs[opc]; | |
564 | ||
565 | oi_next = op->next; | |
1208d7dd AJ |
566 | |
567 | /* Count the arguments, and initialize the temps that are | |
568 | going to be used */ | |
c45cb8bb RH |
569 | if (opc == INDEX_op_call) { |
570 | nb_oargs = op->callo; | |
571 | nb_iargs = op->calli; | |
1208d7dd AJ |
572 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
573 | tmp = args[i]; | |
574 | if (tmp != TCG_CALL_DUMMY_ARG) { | |
575 | init_temp_info(tmp); | |
576 | } | |
577 | } | |
1ff8c541 | 578 | } else { |
cf066674 RH |
579 | nb_oargs = def->nb_oargs; |
580 | nb_iargs = def->nb_iargs; | |
1208d7dd AJ |
581 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
582 | init_temp_info(args[i]); | |
583 | } | |
cf066674 RH |
584 | } |
585 | ||
586 | /* Do copy propagation */ | |
587 | for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { | |
d9c769c6 | 588 | if (temp_is_copy(args[i])) { |
cf066674 | 589 | args[i] = find_better_copy(s, args[i]); |
22613af4 KB |
590 | } |
591 | } | |
592 | ||
53108fb5 | 593 | /* For commutative operations make constant second argument */ |
c45cb8bb | 594 | switch (opc) { |
53108fb5 KB |
595 | CASE_OP_32_64(add): |
596 | CASE_OP_32_64(mul): | |
9a81090b KB |
597 | CASE_OP_32_64(and): |
598 | CASE_OP_32_64(or): | |
599 | CASE_OP_32_64(xor): | |
cb25c80a RH |
600 | CASE_OP_32_64(eqv): |
601 | CASE_OP_32_64(nand): | |
602 | CASE_OP_32_64(nor): | |
03271524 RH |
603 | CASE_OP_32_64(muluh): |
604 | CASE_OP_32_64(mulsh): | |
24c9ae4e | 605 | swap_commutative(args[0], &args[1], &args[2]); |
53108fb5 | 606 | break; |
65a7cce1 | 607 | CASE_OP_32_64(brcond): |
24c9ae4e | 608 | if (swap_commutative(-1, &args[0], &args[1])) { |
65a7cce1 AJ |
609 | args[2] = tcg_swap_cond(args[2]); |
610 | } | |
611 | break; | |
612 | CASE_OP_32_64(setcond): | |
24c9ae4e | 613 | if (swap_commutative(args[0], &args[1], &args[2])) { |
65a7cce1 AJ |
614 | args[3] = tcg_swap_cond(args[3]); |
615 | } | |
616 | break; | |
fa01a208 | 617 | CASE_OP_32_64(movcond): |
24c9ae4e RH |
618 | if (swap_commutative(-1, &args[1], &args[2])) { |
619 | args[5] = tcg_swap_cond(args[5]); | |
5d8f5363 RH |
620 | } |
621 | /* For movcond, we canonicalize the "false" input reg to match | |
622 | the destination reg so that the tcg backend can implement | |
623 | a "move if true" operation. */ | |
24c9ae4e RH |
624 | if (swap_commutative(args[0], &args[4], &args[3])) { |
625 | args[5] = tcg_invert_cond(args[5]); | |
fa01a208 | 626 | } |
1e484e61 | 627 | break; |
d7156f7c | 628 | CASE_OP_32_64(add2): |
1e484e61 RH |
629 | swap_commutative(args[0], &args[2], &args[4]); |
630 | swap_commutative(args[1], &args[3], &args[5]); | |
631 | break; | |
d7156f7c | 632 | CASE_OP_32_64(mulu2): |
4d3203fd | 633 | CASE_OP_32_64(muls2): |
1414968a RH |
634 | swap_commutative(args[0], &args[2], &args[3]); |
635 | break; | |
0bfcb865 RH |
636 | case INDEX_op_brcond2_i32: |
637 | if (swap_commutative2(&args[0], &args[2])) { | |
638 | args[4] = tcg_swap_cond(args[4]); | |
639 | } | |
640 | break; | |
641 | case INDEX_op_setcond2_i32: | |
642 | if (swap_commutative2(&args[1], &args[3])) { | |
643 | args[5] = tcg_swap_cond(args[5]); | |
644 | } | |
645 | break; | |
53108fb5 KB |
646 | default: |
647 | break; | |
648 | } | |
649 | ||
2d497542 RH |
650 | /* Simplify expressions for "shift/rot r, 0, a => movi r, 0", |
651 | and "sub r, 0, a => neg r, a" case. */ | |
c45cb8bb | 652 | switch (opc) { |
01ee5282 AJ |
653 | CASE_OP_32_64(shl): |
654 | CASE_OP_32_64(shr): | |
655 | CASE_OP_32_64(sar): | |
656 | CASE_OP_32_64(rotl): | |
657 | CASE_OP_32_64(rotr): | |
d9c769c6 | 658 | if (temp_is_const(args[1]) && temps[args[1]].val == 0) { |
ebd27391 | 659 | tcg_opt_gen_movi(s, op, args, args[0], 0); |
01ee5282 AJ |
660 | continue; |
661 | } | |
662 | break; | |
2d497542 RH |
663 | CASE_OP_32_64(sub): |
664 | { | |
665 | TCGOpcode neg_op; | |
666 | bool have_neg; | |
667 | ||
d9c769c6 | 668 | if (temp_is_const(args[2])) { |
2d497542 RH |
669 | /* Proceed with possible constant folding. */ |
670 | break; | |
671 | } | |
c45cb8bb | 672 | if (opc == INDEX_op_sub_i32) { |
2d497542 RH |
673 | neg_op = INDEX_op_neg_i32; |
674 | have_neg = TCG_TARGET_HAS_neg_i32; | |
675 | } else { | |
676 | neg_op = INDEX_op_neg_i64; | |
677 | have_neg = TCG_TARGET_HAS_neg_i64; | |
678 | } | |
679 | if (!have_neg) { | |
680 | break; | |
681 | } | |
d9c769c6 | 682 | if (temp_is_const(args[1]) && temps[args[1]].val == 0) { |
c45cb8bb | 683 | op->opc = neg_op; |
2d497542 | 684 | reset_temp(args[0]); |
c45cb8bb | 685 | args[1] = args[2]; |
2d497542 RH |
686 | continue; |
687 | } | |
688 | } | |
689 | break; | |
e201b564 RH |
690 | CASE_OP_32_64(xor): |
691 | CASE_OP_32_64(nand): | |
d9c769c6 AJ |
692 | if (!temp_is_const(args[1]) |
693 | && temp_is_const(args[2]) && temps[args[2]].val == -1) { | |
e201b564 RH |
694 | i = 1; |
695 | goto try_not; | |
696 | } | |
697 | break; | |
698 | CASE_OP_32_64(nor): | |
d9c769c6 AJ |
699 | if (!temp_is_const(args[1]) |
700 | && temp_is_const(args[2]) && temps[args[2]].val == 0) { | |
e201b564 RH |
701 | i = 1; |
702 | goto try_not; | |
703 | } | |
704 | break; | |
705 | CASE_OP_32_64(andc): | |
d9c769c6 AJ |
706 | if (!temp_is_const(args[2]) |
707 | && temp_is_const(args[1]) && temps[args[1]].val == -1) { | |
e201b564 RH |
708 | i = 2; |
709 | goto try_not; | |
710 | } | |
711 | break; | |
712 | CASE_OP_32_64(orc): | |
713 | CASE_OP_32_64(eqv): | |
d9c769c6 AJ |
714 | if (!temp_is_const(args[2]) |
715 | && temp_is_const(args[1]) && temps[args[1]].val == 0) { | |
e201b564 RH |
716 | i = 2; |
717 | goto try_not; | |
718 | } | |
719 | break; | |
720 | try_not: | |
721 | { | |
722 | TCGOpcode not_op; | |
723 | bool have_not; | |
724 | ||
725 | if (def->flags & TCG_OPF_64BIT) { | |
726 | not_op = INDEX_op_not_i64; | |
727 | have_not = TCG_TARGET_HAS_not_i64; | |
728 | } else { | |
729 | not_op = INDEX_op_not_i32; | |
730 | have_not = TCG_TARGET_HAS_not_i32; | |
731 | } | |
732 | if (!have_not) { | |
733 | break; | |
734 | } | |
c45cb8bb | 735 | op->opc = not_op; |
e201b564 | 736 | reset_temp(args[0]); |
c45cb8bb | 737 | args[1] = args[i]; |
e201b564 RH |
738 | continue; |
739 | } | |
01ee5282 AJ |
740 | default: |
741 | break; | |
742 | } | |
743 | ||
464a1441 | 744 | /* Simplify expression for "op r, a, const => mov r, a" cases */ |
c45cb8bb | 745 | switch (opc) { |
53108fb5 KB |
746 | CASE_OP_32_64(add): |
747 | CASE_OP_32_64(sub): | |
55c0975c KB |
748 | CASE_OP_32_64(shl): |
749 | CASE_OP_32_64(shr): | |
750 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
751 | CASE_OP_32_64(rotl): |
752 | CASE_OP_32_64(rotr): | |
38ee188b AJ |
753 | CASE_OP_32_64(or): |
754 | CASE_OP_32_64(xor): | |
464a1441 | 755 | CASE_OP_32_64(andc): |
d9c769c6 AJ |
756 | if (!temp_is_const(args[1]) |
757 | && temp_is_const(args[2]) && temps[args[2]].val == 0) { | |
97a79eb7 AJ |
758 | tcg_opt_gen_mov(s, op, args, args[0], args[1]); |
759 | continue; | |
53108fb5 KB |
760 | } |
761 | break; | |
464a1441 RH |
762 | CASE_OP_32_64(and): |
763 | CASE_OP_32_64(orc): | |
764 | CASE_OP_32_64(eqv): | |
d9c769c6 AJ |
765 | if (!temp_is_const(args[1]) |
766 | && temp_is_const(args[2]) && temps[args[2]].val == -1) { | |
97a79eb7 AJ |
767 | tcg_opt_gen_mov(s, op, args, args[0], args[1]); |
768 | continue; | |
464a1441 RH |
769 | } |
770 | break; | |
56e49438 AJ |
771 | default: |
772 | break; | |
773 | } | |
774 | ||
3031244b AJ |
775 | /* Simplify using known-zero bits. Currently only ops with a single |
776 | output argument is supported. */ | |
3a9d8b17 | 777 | mask = -1; |
633f6502 | 778 | affected = -1; |
c45cb8bb | 779 | switch (opc) { |
3a9d8b17 PB |
780 | CASE_OP_32_64(ext8s): |
781 | if ((temps[args[1]].mask & 0x80) != 0) { | |
782 | break; | |
783 | } | |
784 | CASE_OP_32_64(ext8u): | |
785 | mask = 0xff; | |
786 | goto and_const; | |
787 | CASE_OP_32_64(ext16s): | |
788 | if ((temps[args[1]].mask & 0x8000) != 0) { | |
789 | break; | |
790 | } | |
791 | CASE_OP_32_64(ext16u): | |
792 | mask = 0xffff; | |
793 | goto and_const; | |
794 | case INDEX_op_ext32s_i64: | |
795 | if ((temps[args[1]].mask & 0x80000000) != 0) { | |
796 | break; | |
797 | } | |
798 | case INDEX_op_ext32u_i64: | |
799 | mask = 0xffffffffU; | |
800 | goto and_const; | |
801 | ||
802 | CASE_OP_32_64(and): | |
803 | mask = temps[args[2]].mask; | |
d9c769c6 | 804 | if (temp_is_const(args[2])) { |
3a9d8b17 | 805 | and_const: |
633f6502 | 806 | affected = temps[args[1]].mask & ~mask; |
3a9d8b17 PB |
807 | } |
808 | mask = temps[args[1]].mask & mask; | |
809 | break; | |
810 | ||
8bcb5c8f AJ |
811 | case INDEX_op_ext_i32_i64: |
812 | if ((temps[args[1]].mask & 0x80000000) != 0) { | |
813 | break; | |
814 | } | |
815 | case INDEX_op_extu_i32_i64: | |
816 | /* We do not compute affected as it is a size changing op. */ | |
817 | mask = (uint32_t)temps[args[1]].mask; | |
818 | break; | |
819 | ||
23ec69ed RH |
820 | CASE_OP_32_64(andc): |
821 | /* Known-zeros does not imply known-ones. Therefore unless | |
822 | args[2] is constant, we can't infer anything from it. */ | |
d9c769c6 | 823 | if (temp_is_const(args[2])) { |
23ec69ed RH |
824 | mask = ~temps[args[2]].mask; |
825 | goto and_const; | |
826 | } | |
827 | /* But we certainly know nothing outside args[1] may be set. */ | |
828 | mask = temps[args[1]].mask; | |
829 | break; | |
830 | ||
e46b225a | 831 | case INDEX_op_sar_i32: |
d9c769c6 | 832 | if (temp_is_const(args[2])) { |
50c5c4d1 RH |
833 | tmp = temps[args[2]].val & 31; |
834 | mask = (int32_t)temps[args[1]].mask >> tmp; | |
e46b225a AJ |
835 | } |
836 | break; | |
837 | case INDEX_op_sar_i64: | |
d9c769c6 | 838 | if (temp_is_const(args[2])) { |
50c5c4d1 RH |
839 | tmp = temps[args[2]].val & 63; |
840 | mask = (int64_t)temps[args[1]].mask >> tmp; | |
3a9d8b17 PB |
841 | } |
842 | break; | |
843 | ||
e46b225a | 844 | case INDEX_op_shr_i32: |
d9c769c6 | 845 | if (temp_is_const(args[2])) { |
50c5c4d1 RH |
846 | tmp = temps[args[2]].val & 31; |
847 | mask = (uint32_t)temps[args[1]].mask >> tmp; | |
e46b225a AJ |
848 | } |
849 | break; | |
850 | case INDEX_op_shr_i64: | |
d9c769c6 | 851 | if (temp_is_const(args[2])) { |
50c5c4d1 RH |
852 | tmp = temps[args[2]].val & 63; |
853 | mask = (uint64_t)temps[args[1]].mask >> tmp; | |
3a9d8b17 PB |
854 | } |
855 | break; | |
856 | ||
609ad705 RH |
857 | case INDEX_op_extrl_i64_i32: |
858 | mask = (uint32_t)temps[args[1]].mask; | |
859 | break; | |
860 | case INDEX_op_extrh_i64_i32: | |
861 | mask = (uint64_t)temps[args[1]].mask >> 32; | |
4bb7a41e RH |
862 | break; |
863 | ||
3a9d8b17 | 864 | CASE_OP_32_64(shl): |
d9c769c6 | 865 | if (temp_is_const(args[2])) { |
50c5c4d1 RH |
866 | tmp = temps[args[2]].val & (TCG_TARGET_REG_BITS - 1); |
867 | mask = temps[args[1]].mask << tmp; | |
3a9d8b17 PB |
868 | } |
869 | break; | |
870 | ||
871 | CASE_OP_32_64(neg): | |
872 | /* Set to 1 all bits to the left of the rightmost. */ | |
873 | mask = -(temps[args[1]].mask & -temps[args[1]].mask); | |
874 | break; | |
875 | ||
876 | CASE_OP_32_64(deposit): | |
d998e555 RH |
877 | mask = deposit64(temps[args[1]].mask, args[3], args[4], |
878 | temps[args[2]].mask); | |
3a9d8b17 PB |
879 | break; |
880 | ||
7ec8bab3 RH |
881 | CASE_OP_32_64(extract): |
882 | mask = extract64(temps[args[1]].mask, args[2], args[3]); | |
883 | if (args[2] == 0) { | |
884 | affected = temps[args[1]].mask & ~mask; | |
885 | } | |
886 | break; | |
887 | CASE_OP_32_64(sextract): | |
888 | mask = sextract64(temps[args[1]].mask, args[2], args[3]); | |
889 | if (args[2] == 0 && (tcg_target_long)mask >= 0) { | |
890 | affected = temps[args[1]].mask & ~mask; | |
891 | } | |
892 | break; | |
893 | ||
3a9d8b17 PB |
894 | CASE_OP_32_64(or): |
895 | CASE_OP_32_64(xor): | |
896 | mask = temps[args[1]].mask | temps[args[2]].mask; | |
897 | break; | |
898 | ||
899 | CASE_OP_32_64(setcond): | |
a763551a | 900 | case INDEX_op_setcond2_i32: |
3a9d8b17 PB |
901 | mask = 1; |
902 | break; | |
903 | ||
904 | CASE_OP_32_64(movcond): | |
905 | mask = temps[args[3]].mask | temps[args[4]].mask; | |
906 | break; | |
907 | ||
c8d70272 | 908 | CASE_OP_32_64(ld8u): |
c8d70272 AJ |
909 | mask = 0xff; |
910 | break; | |
911 | CASE_OP_32_64(ld16u): | |
c8d70272 AJ |
912 | mask = 0xffff; |
913 | break; | |
914 | case INDEX_op_ld32u_i64: | |
c8d70272 AJ |
915 | mask = 0xffffffffu; |
916 | break; | |
917 | ||
918 | CASE_OP_32_64(qemu_ld): | |
919 | { | |
59227d5d RH |
920 | TCGMemOpIdx oi = args[nb_oargs + nb_iargs]; |
921 | TCGMemOp mop = get_memop(oi); | |
c8d70272 AJ |
922 | if (!(mop & MO_SIGN)) { |
923 | mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1; | |
924 | } | |
925 | } | |
926 | break; | |
927 | ||
3a9d8b17 PB |
928 | default: |
929 | break; | |
930 | } | |
931 | ||
bc8d688f RH |
932 | /* 32-bit ops generate 32-bit results. For the result is zero test |
933 | below, we can ignore high bits, but for further optimizations we | |
934 | need to record that the high bits contain garbage. */ | |
24666baf | 935 | partmask = mask; |
bc8d688f | 936 | if (!(def->flags & TCG_OPF_64BIT)) { |
24666baf RH |
937 | mask |= ~(tcg_target_ulong)0xffffffffu; |
938 | partmask &= 0xffffffffu; | |
939 | affected &= 0xffffffffu; | |
f096dc96 AJ |
940 | } |
941 | ||
24666baf | 942 | if (partmask == 0) { |
eabb7b91 | 943 | tcg_debug_assert(nb_oargs == 1); |
ebd27391 | 944 | tcg_opt_gen_movi(s, op, args, args[0], 0); |
633f6502 PB |
945 | continue; |
946 | } | |
947 | if (affected == 0) { | |
eabb7b91 | 948 | tcg_debug_assert(nb_oargs == 1); |
97a79eb7 | 949 | tcg_opt_gen_mov(s, op, args, args[0], args[1]); |
633f6502 PB |
950 | continue; |
951 | } | |
952 | ||
56e49438 | 953 | /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ |
c45cb8bb | 954 | switch (opc) { |
61251c0c | 955 | CASE_OP_32_64(and): |
53108fb5 | 956 | CASE_OP_32_64(mul): |
03271524 RH |
957 | CASE_OP_32_64(muluh): |
958 | CASE_OP_32_64(mulsh): | |
d9c769c6 | 959 | if ((temp_is_const(args[2]) && temps[args[2]].val == 0)) { |
ebd27391 | 960 | tcg_opt_gen_movi(s, op, args, args[0], 0); |
53108fb5 KB |
961 | continue; |
962 | } | |
963 | break; | |
56e49438 AJ |
964 | default: |
965 | break; | |
966 | } | |
967 | ||
968 | /* Simplify expression for "op r, a, a => mov r, a" cases */ | |
c45cb8bb | 969 | switch (opc) { |
9a81090b KB |
970 | CASE_OP_32_64(or): |
971 | CASE_OP_32_64(and): | |
0aba1c73 | 972 | if (temps_are_copies(args[1], args[2])) { |
97a79eb7 | 973 | tcg_opt_gen_mov(s, op, args, args[0], args[1]); |
9a81090b KB |
974 | continue; |
975 | } | |
976 | break; | |
fe0de7aa BS |
977 | default: |
978 | break; | |
53108fb5 KB |
979 | } |
980 | ||
3c94193e | 981 | /* Simplify expression for "op r, a, a => movi r, 0" cases */ |
c45cb8bb | 982 | switch (opc) { |
e64e958e | 983 | CASE_OP_32_64(andc): |
3c94193e AJ |
984 | CASE_OP_32_64(sub): |
985 | CASE_OP_32_64(xor): | |
986 | if (temps_are_copies(args[1], args[2])) { | |
ebd27391 | 987 | tcg_opt_gen_movi(s, op, args, args[0], 0); |
3c94193e AJ |
988 | continue; |
989 | } | |
990 | break; | |
991 | default: | |
992 | break; | |
993 | } | |
994 | ||
22613af4 KB |
995 | /* Propagate constants through copy operations and do constant |
996 | folding. Constants will be substituted to arguments by register | |
997 | allocator where needed and possible. Also detect copies. */ | |
c45cb8bb | 998 | switch (opc) { |
22613af4 | 999 | CASE_OP_32_64(mov): |
97a79eb7 AJ |
1000 | tcg_opt_gen_mov(s, op, args, args[0], args[1]); |
1001 | break; | |
22613af4 | 1002 | CASE_OP_32_64(movi): |
ebd27391 | 1003 | tcg_opt_gen_movi(s, op, args, args[0], args[1]); |
22613af4 | 1004 | break; |
6e14e91b | 1005 | |
a640f031 | 1006 | CASE_OP_32_64(not): |
cb25c80a | 1007 | CASE_OP_32_64(neg): |
25c4d9cc RH |
1008 | CASE_OP_32_64(ext8s): |
1009 | CASE_OP_32_64(ext8u): | |
1010 | CASE_OP_32_64(ext16s): | |
1011 | CASE_OP_32_64(ext16u): | |
a640f031 KB |
1012 | case INDEX_op_ext32s_i64: |
1013 | case INDEX_op_ext32u_i64: | |
8bcb5c8f AJ |
1014 | case INDEX_op_ext_i32_i64: |
1015 | case INDEX_op_extu_i32_i64: | |
609ad705 RH |
1016 | case INDEX_op_extrl_i64_i32: |
1017 | case INDEX_op_extrh_i64_i32: | |
d9c769c6 | 1018 | if (temp_is_const(args[1])) { |
c45cb8bb | 1019 | tmp = do_constant_folding(opc, temps[args[1]].val, 0); |
ebd27391 | 1020 | tcg_opt_gen_movi(s, op, args, args[0], tmp); |
6e14e91b | 1021 | break; |
a640f031 | 1022 | } |
6e14e91b RH |
1023 | goto do_default; |
1024 | ||
53108fb5 KB |
1025 | CASE_OP_32_64(add): |
1026 | CASE_OP_32_64(sub): | |
1027 | CASE_OP_32_64(mul): | |
9a81090b KB |
1028 | CASE_OP_32_64(or): |
1029 | CASE_OP_32_64(and): | |
1030 | CASE_OP_32_64(xor): | |
55c0975c KB |
1031 | CASE_OP_32_64(shl): |
1032 | CASE_OP_32_64(shr): | |
1033 | CASE_OP_32_64(sar): | |
25c4d9cc RH |
1034 | CASE_OP_32_64(rotl): |
1035 | CASE_OP_32_64(rotr): | |
cb25c80a RH |
1036 | CASE_OP_32_64(andc): |
1037 | CASE_OP_32_64(orc): | |
1038 | CASE_OP_32_64(eqv): | |
1039 | CASE_OP_32_64(nand): | |
1040 | CASE_OP_32_64(nor): | |
03271524 RH |
1041 | CASE_OP_32_64(muluh): |
1042 | CASE_OP_32_64(mulsh): | |
01547f7f RH |
1043 | CASE_OP_32_64(div): |
1044 | CASE_OP_32_64(divu): | |
1045 | CASE_OP_32_64(rem): | |
1046 | CASE_OP_32_64(remu): | |
d9c769c6 | 1047 | if (temp_is_const(args[1]) && temp_is_const(args[2])) { |
c45cb8bb | 1048 | tmp = do_constant_folding(opc, temps[args[1]].val, |
53108fb5 | 1049 | temps[args[2]].val); |
ebd27391 | 1050 | tcg_opt_gen_movi(s, op, args, args[0], tmp); |
6e14e91b | 1051 | break; |
53108fb5 | 1052 | } |
6e14e91b RH |
1053 | goto do_default; |
1054 | ||
7ef55fc9 | 1055 | CASE_OP_32_64(deposit): |
d9c769c6 | 1056 | if (temp_is_const(args[1]) && temp_is_const(args[2])) { |
d998e555 RH |
1057 | tmp = deposit64(temps[args[1]].val, args[3], args[4], |
1058 | temps[args[2]].val); | |
ebd27391 | 1059 | tcg_opt_gen_movi(s, op, args, args[0], tmp); |
6e14e91b | 1060 | break; |
7ef55fc9 | 1061 | } |
6e14e91b RH |
1062 | goto do_default; |
1063 | ||
7ec8bab3 RH |
1064 | CASE_OP_32_64(extract): |
1065 | if (temp_is_const(args[1])) { | |
1066 | tmp = extract64(temps[args[1]].val, args[2], args[3]); | |
1067 | tcg_opt_gen_movi(s, op, args, args[0], tmp); | |
1068 | break; | |
1069 | } | |
1070 | goto do_default; | |
1071 | ||
1072 | CASE_OP_32_64(sextract): | |
1073 | if (temp_is_const(args[1])) { | |
1074 | tmp = sextract64(temps[args[1]].val, args[2], args[3]); | |
1075 | tcg_opt_gen_movi(s, op, args, args[0], tmp); | |
1076 | break; | |
1077 | } | |
1078 | goto do_default; | |
1079 | ||
f8dd19e5 | 1080 | CASE_OP_32_64(setcond): |
c45cb8bb | 1081 | tmp = do_constant_folding_cond(opc, args[1], args[2], args[3]); |
b336ceb6 | 1082 | if (tmp != 2) { |
ebd27391 | 1083 | tcg_opt_gen_movi(s, op, args, args[0], tmp); |
6e14e91b | 1084 | break; |
f8dd19e5 | 1085 | } |
6e14e91b RH |
1086 | goto do_default; |
1087 | ||
fbeaa26c | 1088 | CASE_OP_32_64(brcond): |
c45cb8bb | 1089 | tmp = do_constant_folding_cond(opc, args[0], args[1], args[2]); |
b336ceb6 AJ |
1090 | if (tmp != 2) { |
1091 | if (tmp) { | |
d193a14a | 1092 | reset_all_temps(nb_temps); |
c45cb8bb RH |
1093 | op->opc = INDEX_op_br; |
1094 | args[0] = args[3]; | |
fbeaa26c | 1095 | } else { |
0c627cdc | 1096 | tcg_op_remove(s, op); |
fbeaa26c | 1097 | } |
6e14e91b | 1098 | break; |
fbeaa26c | 1099 | } |
6e14e91b RH |
1100 | goto do_default; |
1101 | ||
fa01a208 | 1102 | CASE_OP_32_64(movcond): |
c45cb8bb | 1103 | tmp = do_constant_folding_cond(opc, args[1], args[2], args[5]); |
b336ceb6 | 1104 | if (tmp != 2) { |
97a79eb7 | 1105 | tcg_opt_gen_mov(s, op, args, args[0], args[4-tmp]); |
6e14e91b | 1106 | break; |
fa01a208 | 1107 | } |
6e14e91b | 1108 | goto do_default; |
212c328d RH |
1109 | |
1110 | case INDEX_op_add2_i32: | |
1111 | case INDEX_op_sub2_i32: | |
d9c769c6 AJ |
1112 | if (temp_is_const(args[2]) && temp_is_const(args[3]) |
1113 | && temp_is_const(args[4]) && temp_is_const(args[5])) { | |
212c328d RH |
1114 | uint32_t al = temps[args[2]].val; |
1115 | uint32_t ah = temps[args[3]].val; | |
1116 | uint32_t bl = temps[args[4]].val; | |
1117 | uint32_t bh = temps[args[5]].val; | |
1118 | uint64_t a = ((uint64_t)ah << 32) | al; | |
1119 | uint64_t b = ((uint64_t)bh << 32) | bl; | |
1120 | TCGArg rl, rh; | |
5a18407f | 1121 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); |
a4ce099a | 1122 | TCGArg *args2 = &s->gen_opparam_buf[op2->args]; |
212c328d | 1123 | |
c45cb8bb | 1124 | if (opc == INDEX_op_add2_i32) { |
212c328d RH |
1125 | a += b; |
1126 | } else { | |
1127 | a -= b; | |
1128 | } | |
1129 | ||
212c328d RH |
1130 | rl = args[0]; |
1131 | rh = args[1]; | |
29f3ff8d AJ |
1132 | tcg_opt_gen_movi(s, op, args, rl, (int32_t)a); |
1133 | tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(a >> 32)); | |
c45cb8bb RH |
1134 | |
1135 | /* We've done all we need to do with the movi. Skip it. */ | |
1136 | oi_next = op2->next; | |
212c328d RH |
1137 | break; |
1138 | } | |
1139 | goto do_default; | |
1414968a RH |
1140 | |
1141 | case INDEX_op_mulu2_i32: | |
d9c769c6 | 1142 | if (temp_is_const(args[2]) && temp_is_const(args[3])) { |
1414968a RH |
1143 | uint32_t a = temps[args[2]].val; |
1144 | uint32_t b = temps[args[3]].val; | |
1145 | uint64_t r = (uint64_t)a * b; | |
1146 | TCGArg rl, rh; | |
5a18407f | 1147 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2); |
a4ce099a | 1148 | TCGArg *args2 = &s->gen_opparam_buf[op2->args]; |
1414968a RH |
1149 | |
1150 | rl = args[0]; | |
1151 | rh = args[1]; | |
29f3ff8d AJ |
1152 | tcg_opt_gen_movi(s, op, args, rl, (int32_t)r); |
1153 | tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(r >> 32)); | |
c45cb8bb RH |
1154 | |
1155 | /* We've done all we need to do with the movi. Skip it. */ | |
1156 | oi_next = op2->next; | |
1414968a RH |
1157 | break; |
1158 | } | |
1159 | goto do_default; | |
6e14e91b | 1160 | |
bc1473ef | 1161 | case INDEX_op_brcond2_i32: |
6c4382f8 RH |
1162 | tmp = do_constant_folding_cond2(&args[0], &args[2], args[4]); |
1163 | if (tmp != 2) { | |
1164 | if (tmp) { | |
a763551a | 1165 | do_brcond_true: |
d193a14a | 1166 | reset_all_temps(nb_temps); |
c45cb8bb RH |
1167 | op->opc = INDEX_op_br; |
1168 | args[0] = args[5]; | |
6c4382f8 | 1169 | } else { |
a763551a | 1170 | do_brcond_false: |
0c627cdc | 1171 | tcg_op_remove(s, op); |
6c4382f8 RH |
1172 | } |
1173 | } else if ((args[4] == TCG_COND_LT || args[4] == TCG_COND_GE) | |
d9c769c6 AJ |
1174 | && temp_is_const(args[2]) && temps[args[2]].val == 0 |
1175 | && temp_is_const(args[3]) && temps[args[3]].val == 0) { | |
6c4382f8 RH |
1176 | /* Simplify LT/GE comparisons vs zero to a single compare |
1177 | vs the high word of the input. */ | |
a763551a | 1178 | do_brcond_high: |
d193a14a | 1179 | reset_all_temps(nb_temps); |
c45cb8bb RH |
1180 | op->opc = INDEX_op_brcond_i32; |
1181 | args[0] = args[1]; | |
1182 | args[1] = args[3]; | |
1183 | args[2] = args[4]; | |
1184 | args[3] = args[5]; | |
a763551a RH |
1185 | } else if (args[4] == TCG_COND_EQ) { |
1186 | /* Simplify EQ comparisons where one of the pairs | |
1187 | can be simplified. */ | |
1188 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
1189 | args[0], args[2], TCG_COND_EQ); | |
1190 | if (tmp == 0) { | |
1191 | goto do_brcond_false; | |
1192 | } else if (tmp == 1) { | |
1193 | goto do_brcond_high; | |
1194 | } | |
1195 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
1196 | args[1], args[3], TCG_COND_EQ); | |
1197 | if (tmp == 0) { | |
1198 | goto do_brcond_false; | |
1199 | } else if (tmp != 1) { | |
1200 | goto do_default; | |
1201 | } | |
1202 | do_brcond_low: | |
1203 | reset_all_temps(nb_temps); | |
c45cb8bb RH |
1204 | op->opc = INDEX_op_brcond_i32; |
1205 | args[1] = args[2]; | |
1206 | args[2] = args[4]; | |
1207 | args[3] = args[5]; | |
a763551a RH |
1208 | } else if (args[4] == TCG_COND_NE) { |
1209 | /* Simplify NE comparisons where one of the pairs | |
1210 | can be simplified. */ | |
1211 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
1212 | args[0], args[2], TCG_COND_NE); | |
1213 | if (tmp == 0) { | |
1214 | goto do_brcond_high; | |
1215 | } else if (tmp == 1) { | |
1216 | goto do_brcond_true; | |
1217 | } | |
1218 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, | |
1219 | args[1], args[3], TCG_COND_NE); | |
1220 | if (tmp == 0) { | |
1221 | goto do_brcond_low; | |
1222 | } else if (tmp == 1) { | |
1223 | goto do_brcond_true; | |
1224 | } | |
1225 | goto do_default; | |
6c4382f8 RH |
1226 | } else { |
1227 | goto do_default; | |
bc1473ef | 1228 | } |
6c4382f8 | 1229 | break; |
bc1473ef RH |
1230 | |
1231 | case INDEX_op_setcond2_i32: | |
6c4382f8 RH |
1232 | tmp = do_constant_folding_cond2(&args[1], &args[3], args[5]); |
1233 | if (tmp != 2) { | |
a763551a | 1234 | do_setcond_const: |
ebd27391 | 1235 | tcg_opt_gen_movi(s, op, args, args[0], tmp); |
6c4382f8 | 1236 | } else if ((args[5] == TCG_COND_LT || args[5] == TCG_COND_GE) |
d9c769c6 AJ |
1237 | && temp_is_const(args[3]) && temps[args[3]].val == 0 |
1238 | && temp_is_const(args[4]) && temps[args[4]].val == 0) { | |
6c4382f8 RH |
1239 | /* Simplify LT/GE comparisons vs zero to a single compare |
1240 | vs the high word of the input. */ | |
a763551a | 1241 | do_setcond_high: |
66e61b55 | 1242 | reset_temp(args[0]); |
a763551a | 1243 | temps[args[0]].mask = 1; |
c45cb8bb RH |
1244 | op->opc = INDEX_op_setcond_i32; |
1245 | args[1] = args[2]; | |
1246 | args[2] = args[4]; | |
1247 | args[3] = args[5]; | |
a763551a RH |
1248 | } else if (args[5] == TCG_COND_EQ) { |
1249 | /* Simplify EQ comparisons where one of the pairs | |
1250 | can be simplified. */ | |
1251 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
1252 | args[1], args[3], TCG_COND_EQ); | |
1253 | if (tmp == 0) { | |
1254 | goto do_setcond_const; | |
1255 | } else if (tmp == 1) { | |
1256 | goto do_setcond_high; | |
1257 | } | |
1258 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
1259 | args[2], args[4], TCG_COND_EQ); | |
1260 | if (tmp == 0) { | |
1261 | goto do_setcond_high; | |
1262 | } else if (tmp != 1) { | |
1263 | goto do_default; | |
1264 | } | |
1265 | do_setcond_low: | |
1266 | reset_temp(args[0]); | |
1267 | temps[args[0]].mask = 1; | |
c45cb8bb RH |
1268 | op->opc = INDEX_op_setcond_i32; |
1269 | args[2] = args[3]; | |
1270 | args[3] = args[5]; | |
a763551a RH |
1271 | } else if (args[5] == TCG_COND_NE) { |
1272 | /* Simplify NE comparisons where one of the pairs | |
1273 | can be simplified. */ | |
1274 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
1275 | args[1], args[3], TCG_COND_NE); | |
1276 | if (tmp == 0) { | |
1277 | goto do_setcond_high; | |
1278 | } else if (tmp == 1) { | |
1279 | goto do_setcond_const; | |
1280 | } | |
1281 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, | |
1282 | args[2], args[4], TCG_COND_NE); | |
1283 | if (tmp == 0) { | |
1284 | goto do_setcond_low; | |
1285 | } else if (tmp == 1) { | |
1286 | goto do_setcond_const; | |
1287 | } | |
1288 | goto do_default; | |
6c4382f8 RH |
1289 | } else { |
1290 | goto do_default; | |
bc1473ef | 1291 | } |
6c4382f8 | 1292 | break; |
bc1473ef | 1293 | |
8f2e8c07 | 1294 | case INDEX_op_call: |
cf066674 RH |
1295 | if (!(args[nb_oargs + nb_iargs + 1] |
1296 | & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) { | |
22613af4 | 1297 | for (i = 0; i < nb_globals; i++) { |
1208d7dd AJ |
1298 | if (test_bit(i, temps_used.l)) { |
1299 | reset_temp(i); | |
1300 | } | |
22613af4 KB |
1301 | } |
1302 | } | |
cf066674 | 1303 | goto do_reset_output; |
6e14e91b | 1304 | |
8f2e8c07 | 1305 | default: |
6e14e91b RH |
1306 | do_default: |
1307 | /* Default case: we know nothing about operation (or were unable | |
1308 | to compute the operation result) so no propagation is done. | |
1309 | We trash everything if the operation is the end of a basic | |
3a9d8b17 PB |
1310 | block, otherwise we only trash the output args. "mask" is |
1311 | the non-zero bits mask for the first output arg. */ | |
a2550660 | 1312 | if (def->flags & TCG_OPF_BB_END) { |
d193a14a | 1313 | reset_all_temps(nb_temps); |
a2550660 | 1314 | } else { |
cf066674 RH |
1315 | do_reset_output: |
1316 | for (i = 0; i < nb_oargs; i++) { | |
e590d4e6 | 1317 | reset_temp(args[i]); |
3031244b AJ |
1318 | /* Save the corresponding known-zero bits mask for the |
1319 | first output argument (only one supported so far). */ | |
1320 | if (i == 0) { | |
1321 | temps[args[i]].mask = mask; | |
1322 | } | |
a2550660 | 1323 | } |
22613af4 | 1324 | } |
8f2e8c07 KB |
1325 | break; |
1326 | } | |
34f93921 PK |
1327 | |
1328 | /* Eliminate duplicate and redundant fence instructions. */ | |
1329 | if (prev_mb_args) { | |
1330 | switch (opc) { | |
1331 | case INDEX_op_mb: | |
1332 | /* Merge two barriers of the same type into one, | |
1333 | * or a weaker barrier into a stronger one, | |
1334 | * or two weaker barriers into a stronger one. | |
1335 | * mb X; mb Y => mb X|Y | |
1336 | * mb; strl => mb; st | |
1337 | * ldaq; mb => ld; mb | |
1338 | * ldaq; strl => ld; mb; st | |
1339 | * Other combinations are also merged into a strong | |
1340 | * barrier. This is stricter than specified but for | |
1341 | * the purposes of TCG is better than not optimizing. | |
1342 | */ | |
1343 | prev_mb_args[0] |= args[0]; | |
1344 | tcg_op_remove(s, op); | |
1345 | break; | |
1346 | ||
1347 | default: | |
1348 | /* Opcodes that end the block stop the optimization. */ | |
1349 | if ((def->flags & TCG_OPF_BB_END) == 0) { | |
1350 | break; | |
1351 | } | |
1352 | /* fallthru */ | |
1353 | case INDEX_op_qemu_ld_i32: | |
1354 | case INDEX_op_qemu_ld_i64: | |
1355 | case INDEX_op_qemu_st_i32: | |
1356 | case INDEX_op_qemu_st_i64: | |
1357 | case INDEX_op_call: | |
1358 | /* Opcodes that touch guest memory stop the optimization. */ | |
1359 | prev_mb_args = NULL; | |
1360 | break; | |
1361 | } | |
1362 | } else if (opc == INDEX_op_mb) { | |
1363 | prev_mb_args = args; | |
1364 | } | |
8f2e8c07 | 1365 | } |
8f2e8c07 | 1366 | } |