]> git.proxmox.com Git - mirror_qemu.git/blame - tcg/s390/tcg-target.h
tcg-s390: new TCG Target
[mirror_qemu.git] / tcg / s390 / tcg-target.h
CommitLineData
2827822e
AG
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#define TCG_TARGET_S390 1
25
48bb3750 26#ifdef __s390x__
2827822e 27#define TCG_TARGET_REG_BITS 64
48bb3750
RH
28#else
29#define TCG_TARGET_REG_BITS 32
30#endif
31
2827822e
AG
32#define TCG_TARGET_WORDS_BIGENDIAN
33
48bb3750 34typedef enum TCGReg {
2827822e
AG
35 TCG_REG_R0 = 0,
36 TCG_REG_R1,
37 TCG_REG_R2,
38 TCG_REG_R3,
39 TCG_REG_R4,
40 TCG_REG_R5,
41 TCG_REG_R6,
42 TCG_REG_R7,
43 TCG_REG_R8,
44 TCG_REG_R9,
45 TCG_REG_R10,
46 TCG_REG_R11,
47 TCG_REG_R12,
48 TCG_REG_R13,
49 TCG_REG_R14,
50 TCG_REG_R15
48bb3750
RH
51} TCGReg;
52
2827822e
AG
53#define TCG_TARGET_NB_REGS 16
54
36828256 55/* optional instructions */
48bb3750
RH
56#define TCG_TARGET_HAS_div2_i32
57#define TCG_TARGET_HAS_rot_i32
58#define TCG_TARGET_HAS_ext8s_i32
59#define TCG_TARGET_HAS_ext16s_i32
60#define TCG_TARGET_HAS_ext8u_i32
61#define TCG_TARGET_HAS_ext16u_i32
62#define TCG_TARGET_HAS_bswap16_i32
63#define TCG_TARGET_HAS_bswap32_i32
36828256 64// #define TCG_TARGET_HAS_not_i32
48bb3750 65#define TCG_TARGET_HAS_neg_i32
36828256
RH
66// #define TCG_TARGET_HAS_andc_i32
67// #define TCG_TARGET_HAS_orc_i32
8d625cf1 68// #define TCG_TARGET_HAS_eqv_i32
9940a96b 69// #define TCG_TARGET_HAS_nand_i32
32d98fbd 70// #define TCG_TARGET_HAS_nor_i32
36828256 71
48bb3750
RH
72#if TCG_TARGET_REG_BITS == 64
73#define TCG_TARGET_HAS_div2_i64
74#define TCG_TARGET_HAS_rot_i64
75#define TCG_TARGET_HAS_ext8s_i64
76#define TCG_TARGET_HAS_ext16s_i64
77#define TCG_TARGET_HAS_ext32s_i64
78#define TCG_TARGET_HAS_ext8u_i64
79#define TCG_TARGET_HAS_ext16u_i64
80#define TCG_TARGET_HAS_ext32u_i64
81#define TCG_TARGET_HAS_bswap16_i64
82#define TCG_TARGET_HAS_bswap32_i64
83#define TCG_TARGET_HAS_bswap64_i64
36828256 84// #define TCG_TARGET_HAS_not_i64
48bb3750 85#define TCG_TARGET_HAS_neg_i64
36828256
RH
86// #define TCG_TARGET_HAS_andc_i64
87// #define TCG_TARGET_HAS_orc_i64
8d625cf1 88// #define TCG_TARGET_HAS_eqv_i64
9940a96b 89// #define TCG_TARGET_HAS_nand_i64
32d98fbd 90// #define TCG_TARGET_HAS_nor_i64
48bb3750
RH
91#endif
92
93#define TCG_TARGET_HAS_GUEST_BASE
36828256 94
2827822e
AG
95/* used for function call generation */
96#define TCG_REG_CALL_STACK TCG_REG_R15
97#define TCG_TARGET_STACK_ALIGN 8
98#define TCG_TARGET_CALL_STACK_OFFSET 0
99
2bece2c8
RH
100#define TCG_TARGET_EXTEND_ARGS 1
101
2827822e
AG
102enum {
103 /* Note: must be synced with dyngen-exec.h */
104 TCG_AREG0 = TCG_REG_R10,
2827822e
AG
105};
106
107static inline void flush_icache_range(unsigned long start, unsigned long stop)
108{
2827822e 109}