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2827822e AG |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2009 Ulrich Hecht <uli@suse.de> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
14e54f8e MA |
24 | |
25 | #ifndef S390_TCG_TARGET_H | |
26 | #define S390_TCG_TARGET_H | |
2827822e | 27 | |
8c081b18 | 28 | #define TCG_TARGET_INSN_UNIT_SIZE 2 |
006f8638 | 29 | #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19 |
8c081b18 | 30 | |
26a75d12 RH |
31 | /* We have a +- 4GB range on the branches; leave some slop. */ |
32 | #define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) | |
33 | ||
48bb3750 | 34 | typedef enum TCGReg { |
eee6251b RH |
35 | TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, |
36 | TCG_REG_R4, TCG_REG_R5, TCG_REG_R6, TCG_REG_R7, | |
37 | TCG_REG_R8, TCG_REG_R9, TCG_REG_R10, TCG_REG_R11, | |
38 | TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15, | |
39 | ||
34ef7676 RH |
40 | TCG_REG_V0 = 32, TCG_REG_V1, TCG_REG_V2, TCG_REG_V3, |
41 | TCG_REG_V4, TCG_REG_V5, TCG_REG_V6, TCG_REG_V7, | |
42 | TCG_REG_V8, TCG_REG_V9, TCG_REG_V10, TCG_REG_V11, | |
43 | TCG_REG_V12, TCG_REG_V13, TCG_REG_V14, TCG_REG_V15, | |
44 | TCG_REG_V16, TCG_REG_V17, TCG_REG_V18, TCG_REG_V19, | |
45 | TCG_REG_V20, TCG_REG_V21, TCG_REG_V22, TCG_REG_V23, | |
46 | TCG_REG_V24, TCG_REG_V25, TCG_REG_V26, TCG_REG_V27, | |
47 | TCG_REG_V28, TCG_REG_V29, TCG_REG_V30, TCG_REG_V31, | |
48 | ||
eee6251b RH |
49 | TCG_AREG0 = TCG_REG_R10, |
50 | TCG_REG_CALL_STACK = TCG_REG_R15 | |
48bb3750 RH |
51 | } TCGReg; |
52 | ||
34ef7676 | 53 | #define TCG_TARGET_NB_REGS 64 |
2827822e | 54 | |
761ea522 | 55 | /* Facilities required for proper operation; checked at startup. */ |
b2c98d9d | 56 | |
748b7f3e RH |
57 | #define FACILITY_ZARCH_ACTIVE 2 |
58 | #define FACILITY_LONG_DISP 18 | |
3e25f7da | 59 | #define FACILITY_EXT_IMM 21 |
9c3bfb79 | 60 | #define FACILITY_GEN_INST_EXT 34 |
c68d5b7a | 61 | #define FACILITY_45 45 |
761ea522 RH |
62 | |
63 | /* Facilities that are checked at runtime. */ | |
64 | ||
748b7f3e | 65 | #define FACILITY_LOAD_ON_COND2 53 |
92c89a07 | 66 | #define FACILITY_MISC_INSN_EXT2 58 |
6c9b5c0f | 67 | #define FACILITY_MISC_INSN_EXT3 61 |
34ef7676 | 68 | #define FACILITY_VECTOR 129 |
ae77bbe5 | 69 | #define FACILITY_VECTOR_ENH1 135 |
36828256 | 70 | |
34ef7676 | 71 | extern uint64_t s390_facilities[3]; |
748b7f3e RH |
72 | |
73 | #define HAVE_FACILITY(X) \ | |
74 | ((s390_facilities[FACILITY_##X / 64] >> (63 - FACILITY_##X % 64)) & 1) | |
b2c98d9d RH |
75 | |
76 | /* optional instructions */ | |
77 | #define TCG_TARGET_HAS_div2_i32 1 | |
78 | #define TCG_TARGET_HAS_rot_i32 1 | |
79 | #define TCG_TARGET_HAS_ext8s_i32 1 | |
80 | #define TCG_TARGET_HAS_ext16s_i32 1 | |
81 | #define TCG_TARGET_HAS_ext8u_i32 1 | |
82 | #define TCG_TARGET_HAS_ext16u_i32 1 | |
83 | #define TCG_TARGET_HAS_bswap16_i32 1 | |
84 | #define TCG_TARGET_HAS_bswap32_i32 1 | |
6c9b5c0f | 85 | #define TCG_TARGET_HAS_not_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
b2c98d9d | 86 | #define TCG_TARGET_HAS_neg_i32 1 |
6c9b5c0f RH |
87 | #define TCG_TARGET_HAS_andc_i32 HAVE_FACILITY(MISC_INSN_EXT3) |
88 | #define TCG_TARGET_HAS_orc_i32 HAVE_FACILITY(MISC_INSN_EXT3) | |
89 | #define TCG_TARGET_HAS_eqv_i32 HAVE_FACILITY(MISC_INSN_EXT3) | |
90 | #define TCG_TARGET_HAS_nand_i32 HAVE_FACILITY(MISC_INSN_EXT3) | |
91 | #define TCG_TARGET_HAS_nor_i32 HAVE_FACILITY(MISC_INSN_EXT3) | |
0e28d006 RH |
92 | #define TCG_TARGET_HAS_clz_i32 0 |
93 | #define TCG_TARGET_HAS_ctz_i32 0 | |
29a5ea73 | 94 | #define TCG_TARGET_HAS_ctpop_i32 1 |
9c3bfb79 RH |
95 | #define TCG_TARGET_HAS_deposit_i32 1 |
96 | #define TCG_TARGET_HAS_extract_i32 1 | |
b2c98d9d | 97 | #define TCG_TARGET_HAS_sextract_i32 0 |
fce1296f | 98 | #define TCG_TARGET_HAS_extract2_i32 0 |
b2c98d9d RH |
99 | #define TCG_TARGET_HAS_movcond_i32 1 |
100 | #define TCG_TARGET_HAS_add2_i32 1 | |
101 | #define TCG_TARGET_HAS_sub2_i32 1 | |
102 | #define TCG_TARGET_HAS_mulu2_i32 0 | |
103 | #define TCG_TARGET_HAS_muls2_i32 0 | |
104 | #define TCG_TARGET_HAS_muluh_i32 0 | |
105 | #define TCG_TARGET_HAS_mulsh_i32 0 | |
106 | #define TCG_TARGET_HAS_extrl_i64_i32 0 | |
107 | #define TCG_TARGET_HAS_extrh_i64_i32 0 | |
07ce0b05 | 108 | #define TCG_TARGET_HAS_qemu_st8_i32 0 |
48bb3750 | 109 | |
b2c98d9d RH |
110 | #define TCG_TARGET_HAS_div2_i64 1 |
111 | #define TCG_TARGET_HAS_rot_i64 1 | |
112 | #define TCG_TARGET_HAS_ext8s_i64 1 | |
113 | #define TCG_TARGET_HAS_ext16s_i64 1 | |
114 | #define TCG_TARGET_HAS_ext32s_i64 1 | |
115 | #define TCG_TARGET_HAS_ext8u_i64 1 | |
116 | #define TCG_TARGET_HAS_ext16u_i64 1 | |
117 | #define TCG_TARGET_HAS_ext32u_i64 1 | |
118 | #define TCG_TARGET_HAS_bswap16_i64 1 | |
119 | #define TCG_TARGET_HAS_bswap32_i64 1 | |
120 | #define TCG_TARGET_HAS_bswap64_i64 1 | |
6c9b5c0f | 121 | #define TCG_TARGET_HAS_not_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
b2c98d9d | 122 | #define TCG_TARGET_HAS_neg_i64 1 |
6c9b5c0f RH |
123 | #define TCG_TARGET_HAS_andc_i64 HAVE_FACILITY(MISC_INSN_EXT3) |
124 | #define TCG_TARGET_HAS_orc_i64 HAVE_FACILITY(MISC_INSN_EXT3) | |
125 | #define TCG_TARGET_HAS_eqv_i64 HAVE_FACILITY(MISC_INSN_EXT3) | |
126 | #define TCG_TARGET_HAS_nand_i64 HAVE_FACILITY(MISC_INSN_EXT3) | |
127 | #define TCG_TARGET_HAS_nor_i64 HAVE_FACILITY(MISC_INSN_EXT3) | |
3e25f7da | 128 | #define TCG_TARGET_HAS_clz_i64 1 |
0e28d006 | 129 | #define TCG_TARGET_HAS_ctz_i64 0 |
29a5ea73 | 130 | #define TCG_TARGET_HAS_ctpop_i64 1 |
9c3bfb79 RH |
131 | #define TCG_TARGET_HAS_deposit_i64 1 |
132 | #define TCG_TARGET_HAS_extract_i64 1 | |
b2c98d9d | 133 | #define TCG_TARGET_HAS_sextract_i64 0 |
fce1296f | 134 | #define TCG_TARGET_HAS_extract2_i64 0 |
b2c98d9d RH |
135 | #define TCG_TARGET_HAS_movcond_i64 1 |
136 | #define TCG_TARGET_HAS_add2_i64 1 | |
137 | #define TCG_TARGET_HAS_sub2_i64 1 | |
138 | #define TCG_TARGET_HAS_mulu2_i64 1 | |
668ce343 | 139 | #define TCG_TARGET_HAS_muls2_i64 HAVE_FACILITY(MISC_INSN_EXT2) |
b2c98d9d RH |
140 | #define TCG_TARGET_HAS_muluh_i64 0 |
141 | #define TCG_TARGET_HAS_mulsh_i64 0 | |
d5690ea4 | 142 | |
34ef7676 RH |
143 | #define TCG_TARGET_HAS_v64 HAVE_FACILITY(VECTOR) |
144 | #define TCG_TARGET_HAS_v128 HAVE_FACILITY(VECTOR) | |
145 | #define TCG_TARGET_HAS_v256 0 | |
146 | ||
ae77bbe5 RH |
147 | #define TCG_TARGET_HAS_andc_vec 1 |
148 | #define TCG_TARGET_HAS_orc_vec HAVE_FACILITY(VECTOR_ENH1) | |
21eab5bf RH |
149 | #define TCG_TARGET_HAS_nand_vec HAVE_FACILITY(VECTOR_ENH1) |
150 | #define TCG_TARGET_HAS_nor_vec 1 | |
151 | #define TCG_TARGET_HAS_eqv_vec HAVE_FACILITY(VECTOR_ENH1) | |
ae77bbe5 RH |
152 | #define TCG_TARGET_HAS_not_vec 1 |
153 | #define TCG_TARGET_HAS_neg_vec 1 | |
154 | #define TCG_TARGET_HAS_abs_vec 1 | |
22cb37b4 RH |
155 | #define TCG_TARGET_HAS_roti_vec 1 |
156 | #define TCG_TARGET_HAS_rots_vec 1 | |
157 | #define TCG_TARGET_HAS_rotv_vec 1 | |
158 | #define TCG_TARGET_HAS_shi_vec 1 | |
159 | #define TCG_TARGET_HAS_shs_vec 1 | |
160 | #define TCG_TARGET_HAS_shv_vec 1 | |
479b61cb | 161 | #define TCG_TARGET_HAS_mul_vec 1 |
34ef7676 | 162 | #define TCG_TARGET_HAS_sat_vec 0 |
220db7a6 | 163 | #define TCG_TARGET_HAS_minmax_vec 1 |
9bca986d | 164 | #define TCG_TARGET_HAS_bitsel_vec 1 |
34ef7676 RH |
165 | #define TCG_TARGET_HAS_cmpsel_vec 0 |
166 | ||
2827822e | 167 | /* used for function call generation */ |
2827822e | 168 | #define TCG_TARGET_STACK_ALIGN 8 |
a4924e8b | 169 | #define TCG_TARGET_CALL_STACK_OFFSET 160 |
eb8b0224 | 170 | #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND |
c8eef960 | 171 | #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL |
5427a9a7 RH |
172 | #define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF |
173 | #define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF | |
2827822e | 174 | |
e1dcf352 | 175 | #define TCG_TARGET_HAS_MEMORY_BSWAP 1 |
2bece2c8 | 176 | |
71650df7 | 177 | #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) |
659ef5cb | 178 | #define TCG_TARGET_NEED_LDST_LABELS |
28eef8aa | 179 | #define TCG_TARGET_NEED_POOL_LABELS |
659ef5cb | 180 | |
cb9c377f | 181 | #endif |