[mirror_qemu.git] / tcg / tcg-op-gvec.h

/*
 * Generic vector operation expansion
 *
 * Copyright (c) 2018 Linaro
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

/*
 * "Generic" vectors.  All operands are given as offsets from ENV,
 * and therefore cannot also be allocated via tcg_global_mem_new_*.
 * OPRSZ is the byte size of the vector upon which the operation is performed.
 * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
 *
 * All sizes must be 8 or any multiple of 16.
 * When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
 * Operands may completely, but not partially, overlap.
 */

/* Expand a call to a gvec-style helper, with pointers to two vector
   operands, and a descriptor (see tcg-gvec-desc.h).  */
typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
                        uint32_t oprsz, uint32_t maxsz, int32_t data,
                        gen_helper_gvec_2 *fn);

/* Similarly, passing an extra pointer (e.g. env or float_status).  */
typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
                        TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
                        int32_t data, gen_helper_gvec_2_ptr *fn);

/* Similarly, with three vector operands.  */
typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                        uint32_t oprsz, uint32_t maxsz, int32_t data,
                        gen_helper_gvec_3 *fn);

/* Similarly, with four vector operands.  */
typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
                               TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                        uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
                        int32_t data, gen_helper_gvec_4 *fn);

/* Similarly, with five vector operands.  */
typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
                               TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                        uint32_t cofs, uint32_t xofs, uint32_t oprsz,
                        uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);

typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
                                   TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                        TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
                        int32_t data, gen_helper_gvec_3_ptr *fn);

typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
                                   TCGv_ptr, TCGv_ptr, TCGv_i32);
void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                        uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
                        uint32_t maxsz, int32_t data,
                        gen_helper_gvec_4_ptr *fn);

/* Expand a gvec operation.  Either inline or out-of-line depending on
   the actual vector size and the operations supported by the host.  */
typedef struct {
    /* Expand inline as a 64-bit or 32-bit integer.
       Only one of these will be non-NULL.  */
    void (*fni8)(TCGv_i64, TCGv_i64);
    void (*fni4)(TCGv_i32, TCGv_i32);
    /* Expand inline with a host vector type.  */
    void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
    /* Expand out-of-line helper w/descriptor.  */
    gen_helper_gvec_2 *fno;
    /* The opcode, if any, to which this corresponds.  */
    TCGOpcode opc;
    /* The data argument to the out-of-line helper.  */
    int32_t data;
    /* The vector element size, if applicable.  */
    uint8_t vece;
    /* Prefer i64 to v64.  */
    bool prefer_i64;
} GVecGen2;

typedef struct {
    /* Expand inline as a 64-bit or 32-bit integer.
       Only one of these will be non-NULL.  */
    void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
    void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
    /* Expand inline with a host vector type.  */
    void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
    /* Expand out-of-line helper w/descriptor.  */
    gen_helper_gvec_3 *fno;
    /* The opcode, if any, to which this corresponds.  */
    TCGOpcode opc;
    /* The data argument to the out-of-line helper.  */
    int32_t data;
    /* The vector element size, if applicable.  */
    uint8_t vece;
    /* Prefer i64 to v64.  */
    bool prefer_i64;
    /* Load dest as a 3rd source operand.  */
    bool load_dest;
} GVecGen3;

typedef struct {
    /* Expand inline as a 64-bit or 32-bit integer.
       Only one of these will be non-NULL.  */
    void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
    void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
    /* Expand inline with a host vector type.  */
    void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
    /* Expand out-of-line helper w/descriptor.  */
    gen_helper_gvec_4 *fno;
    /* The opcode, if any, to which this corresponds.  */
    TCGOpcode opc;
    /* The data argument to the out-of-line helper.  */
    int32_t data;
    /* The vector element size, if applicable.  */
    uint8_t vece;
    /* Prefer i64 to v64.  */
    bool prefer_i64;
} GVecGen4;

void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
                    uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
                    uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
                    uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);

/* Expand a specific vector operation.  */

void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t oprsz, uint32_t maxsz);

void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);

void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
                     uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);

void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
                          uint32_t s, uint32_t m);
void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
                          uint32_t m, TCGv_i32);
void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
                          uint32_t m, TCGv_i64);

void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);
void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);
void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);
void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x);

/*
 * 64-bit vector operations.  Use these when the register has been allocated
 * with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
 * OPRSZ = MAXSZ = 8.
 */

void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);

void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);

void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
Commit	Line	Data
db432672 RH	1	/*
	2	* Generic vector operation expansion
	3	*
	4	* Copyright (c) 2018 Linaro
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	/*
	21	* "Generic" vectors. All operands are given as offsets from ENV,
	22	* and therefore cannot also be allocated via tcg_global_mem_new_*.
	23	* OPRSZ is the byte size of the vector upon which the operation is performed.
	24	* MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
	25	*
	26	* All sizes must be 8 or any multiple of 16.
	27	* When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
	28	* Operands may completely, but not partially, overlap.
	29	*/
	30
	31	/* Expand a call to a gvec-style helper, with pointers to two vector
	32	operands, and a descriptor (see tcg-gvec-desc.h). */
	33	typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
	34	void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
	35	uint32_t oprsz, uint32_t maxsz, int32_t data,
	36	gen_helper_gvec_2 *fn);
	37
	38	/* Similarly, passing an extra pointer (e.g. env or float_status). */
	39	typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
	40	void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
	41	TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
	42	int32_t data, gen_helper_gvec_2_ptr *fn);
	43
	44	/* Similarly, with three vector operands. */
	45	typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
	46	void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
	47	uint32_t oprsz, uint32_t maxsz, int32_t data,
	48	gen_helper_gvec_3 *fn);
	49
	50	/* Similarly, with four vector operands. */
	51	typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
	52	TCGv_ptr, TCGv_i32);
	53	void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
	54	uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
	55	int32_t data, gen_helper_gvec_4 *fn);
	56
	57	/* Similarly, with five vector operands. */
	58	typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
	59	TCGv_ptr, TCGv_i32);
	60	void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
	61	uint32_t cofs, uint32_t xofs, uint32_t oprsz,
	62	uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
	63
	64	typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
65	TCGv_ptr, TCGv_i32);
66	void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
67	TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
68	int32_t data, gen_helper_gvec_3_ptr *fn);
69
70	typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
71	TCGv_ptr, TCGv_ptr, TCGv_i32);
72	void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
73	uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
74	uint32_t maxsz, int32_t data,
75	gen_helper_gvec_4_ptr *fn);
76
77	/* Expand a gvec operation. Either inline or out-of-line depending on
78	the actual vector size and the operations supported by the host. */
79	typedef struct {
80	/* Expand inline as a 64-bit or 32-bit integer.
81	Only one of these will be non-NULL. */
82	void (*fni8)(TCGv_i64, TCGv_i64);
83	void (*fni4)(TCGv_i32, TCGv_i32);
84	/* Expand inline with a host vector type. */
85	void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
86	/* Expand out-of-line helper w/descriptor. */
87	gen_helper_gvec_2 *fno;
88	/* The opcode, if any, to which this corresponds. */
89	TCGOpcode opc;
90	/* The data argument to the out-of-line helper. */
91	int32_t data;
92	/* The vector element size, if applicable. */
93	uint8_t vece;
94	/* Prefer i64 to v64. */
95	bool prefer_i64;
96	} GVecGen2;
97
98	typedef struct {
99	/* Expand inline as a 64-bit or 32-bit integer.
100	Only one of these will be non-NULL. */
101	void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
102	void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
103	/* Expand inline with a host vector type. */
104	void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
105	/* Expand out-of-line helper w/descriptor. */
106	gen_helper_gvec_3 *fno;
107	/* The opcode, if any, to which this corresponds. */
108	TCGOpcode opc;
109	/* The data argument to the out-of-line helper. */
110	int32_t data;
111	/* The vector element size, if applicable. */
112	uint8_t vece;
113	/* Prefer i64 to v64. */
114	bool prefer_i64;
115	/* Load dest as a 3rd source operand. */
116	bool load_dest;
117	} GVecGen3;
118
119	typedef struct {
120	/* Expand inline as a 64-bit or 32-bit integer.
121	Only one of these will be non-NULL. */
122	void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
123	void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
124	/* Expand inline with a host vector type. */
125	void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
126	/* Expand out-of-line helper w/descriptor. */
127	gen_helper_gvec_4 *fno;
128	/* The opcode, if any, to which this corresponds. */
129	TCGOpcode opc;
130	/* The data argument to the out-of-line helper. */
131	int32_t data;
132	/* The vector element size, if applicable. */
133	uint8_t vece;
134	/* Prefer i64 to v64. */
135	bool prefer_i64;
136	} GVecGen4;
137
138	void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
139	uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
140	void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
141	uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
142	void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
143	uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
144
145	/* Expand a specific vector operation. */
146
147	void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
148	uint32_t oprsz, uint32_t maxsz);
149	void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
150	uint32_t oprsz, uint32_t maxsz);
151	void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
152	uint32_t oprsz, uint32_t maxsz);
153
154	void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
155	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
156	void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
157	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
158
159	void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
160	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
161	void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
162	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
163	void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
164	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
165	void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
166	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
167	void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
168	uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
169
170	void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
171	uint32_t s, uint32_t m);
172	void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
173	uint32_t m, TCGv_i32);
174	void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
175	uint32_t m, TCGv_i64);
176
177	void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);
178	void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);
179	void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);
180	void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x);
181
182	/*
183	* 64-bit vector operations. Use these when the register has been allocated
184	* with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
185	* OPRSZ = MAXSZ = 8.
186	*/
187
188	void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
189	void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
190	void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);
191
192	void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
193	void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
194	void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
195
196	void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
197	void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
198	void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);