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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "tcg.h" | |
25 | ||
bf6247fb | 26 | #ifdef CONFIG_DYNGEN_OP |
c896fe29 FB |
27 | /* legacy dyngen operations */ |
28 | #include "gen-op.h" | |
cf2be984 | 29 | #endif |
c896fe29 FB |
30 | |
31 | int gen_new_label(void); | |
32 | ||
ac56dd48 | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
c896fe29 FB |
34 | { |
35 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 FB |
37 | } |
38 | ||
ac56dd48 | 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
c896fe29 FB |
40 | { |
41 | *gen_opc_ptr++ = opc; | |
42 | *gen_opparam_ptr++ = arg1; | |
c896fe29 FB |
43 | } |
44 | ||
ac56dd48 | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
c896fe29 FB |
46 | { |
47 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
49 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
50 | } |
51 | ||
ac56dd48 | 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
c896fe29 FB |
53 | { |
54 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 | 56 | *gen_opparam_ptr++ = arg2; |
ac56dd48 PB |
57 | } |
58 | ||
bcb0126f PB |
59 | static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2) |
60 | { | |
61 | *gen_opc_ptr++ = opc; | |
62 | *gen_opparam_ptr++ = arg1; | |
63 | *gen_opparam_ptr++ = arg2; | |
64 | } | |
65 | ||
ac56dd48 PB |
66 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
67 | { | |
68 | *gen_opc_ptr++ = opc; | |
69 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
70 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
71 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
72 | } | |
73 | ||
74 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) | |
75 | { | |
76 | *gen_opc_ptr++ = opc; | |
77 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
78 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 | 79 | *gen_opparam_ptr++ = arg3; |
ac56dd48 PB |
80 | } |
81 | ||
82 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
83 | TCGv arg4) | |
84 | { | |
85 | *gen_opc_ptr++ = opc; | |
86 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
87 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
88 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
89 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
90 | } | |
91 | ||
92 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
93 | TCGArg arg4) | |
94 | { | |
95 | *gen_opc_ptr++ = opc; | |
96 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
97 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
98 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
c896fe29 FB |
99 | *gen_opparam_ptr++ = arg4; |
100 | } | |
101 | ||
ac56dd48 PB |
102 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
103 | TCGArg arg4) | |
c896fe29 FB |
104 | { |
105 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
106 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
107 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
108 | *gen_opparam_ptr++ = arg3; |
109 | *gen_opparam_ptr++ = arg4; | |
ac56dd48 PB |
110 | } |
111 | ||
112 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, | |
113 | TCGv arg3, TCGv arg4, | |
114 | TCGv arg5) | |
115 | { | |
116 | *gen_opc_ptr++ = opc; | |
117 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
118 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
119 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
120 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
121 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
122 | } | |
123 | ||
124 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, | |
125 | TCGv arg3, TCGv arg4, | |
126 | TCGArg arg5) | |
127 | { | |
128 | *gen_opc_ptr++ = opc; | |
129 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
130 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
131 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
132 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
133 | *gen_opparam_ptr++ = arg5; |
134 | } | |
135 | ||
ac56dd48 PB |
136 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
137 | TCGv arg3, TCGv arg4, | |
138 | TCGv arg5, TCGv arg6) | |
c896fe29 FB |
139 | { |
140 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
141 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
142 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
143 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
144 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
145 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
146 | *gen_opparam_ptr++ = GET_TCGV(arg6); | |
147 | } | |
148 | ||
149 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, | |
150 | TCGv arg3, TCGv arg4, | |
151 | TCGArg arg5, TCGArg arg6) | |
152 | { | |
153 | *gen_opc_ptr++ = opc; | |
154 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
155 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
156 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
157 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
158 | *gen_opparam_ptr++ = arg5; |
159 | *gen_opparam_ptr++ = arg6; | |
160 | } | |
161 | ||
162 | static inline void gen_set_label(int n) | |
163 | { | |
ac56dd48 | 164 | tcg_gen_op1i(INDEX_op_set_label, n); |
c896fe29 FB |
165 | } |
166 | ||
fb50d413 BS |
167 | static inline void tcg_gen_br(int label) |
168 | { | |
169 | tcg_gen_op1i(INDEX_op_br, label); | |
170 | } | |
171 | ||
ac56dd48 | 172 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
c896fe29 | 173 | { |
98156423 | 174 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 175 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
c896fe29 FB |
176 | } |
177 | ||
ac56dd48 | 178 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
c896fe29 | 179 | { |
ac56dd48 | 180 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
c896fe29 FB |
181 | } |
182 | ||
183 | /* helper calls */ | |
184 | #define TCG_HELPER_CALL_FLAGS 0 | |
185 | ||
186 | static inline void tcg_gen_helper_0_0(void *func) | |
187 | { | |
e8996ee0 FB |
188 | TCGv t0; |
189 | t0 = tcg_const_ptr((tcg_target_long)func); | |
c896fe29 | 190 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 191 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 192 | 0, NULL, 0, NULL); |
e8996ee0 | 193 | tcg_temp_free(t0); |
c896fe29 FB |
194 | } |
195 | ||
ac56dd48 | 196 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
c896fe29 | 197 | { |
e8996ee0 FB |
198 | TCGv t0; |
199 | t0 = tcg_const_ptr((tcg_target_long)func); | |
c896fe29 | 200 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 201 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 202 | 0, NULL, 1, &arg); |
e8996ee0 | 203 | tcg_temp_free(t0); |
c896fe29 FB |
204 | } |
205 | ||
ac56dd48 | 206 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
c896fe29 | 207 | { |
ac56dd48 | 208 | TCGv args[2]; |
e8996ee0 | 209 | TCGv t0; |
c896fe29 FB |
210 | args[0] = arg1; |
211 | args[1] = arg2; | |
e8996ee0 | 212 | t0 = tcg_const_ptr((tcg_target_long)func); |
c896fe29 | 213 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 214 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 215 | 0, NULL, 2, args); |
e8996ee0 | 216 | tcg_temp_free(t0); |
c896fe29 FB |
217 | } |
218 | ||
b0109805 PB |
219 | static inline void tcg_gen_helper_0_3(void *func, |
220 | TCGv arg1, TCGv arg2, TCGv arg3) | |
221 | { | |
222 | TCGv args[3]; | |
e8996ee0 | 223 | TCGv t0; |
b0109805 PB |
224 | args[0] = arg1; |
225 | args[1] = arg2; | |
226 | args[2] = arg3; | |
e8996ee0 | 227 | t0 = tcg_const_ptr((tcg_target_long)func); |
b0109805 | 228 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 229 | t0, TCG_HELPER_CALL_FLAGS, |
b0109805 | 230 | 0, NULL, 3, args); |
e8996ee0 | 231 | tcg_temp_free(t0); |
b0109805 PB |
232 | } |
233 | ||
f8422f52 BS |
234 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
235 | TCGv arg3, TCGv arg4) | |
236 | { | |
237 | TCGv args[4]; | |
e8996ee0 | 238 | TCGv t0; |
f8422f52 BS |
239 | args[0] = arg1; |
240 | args[1] = arg2; | |
241 | args[2] = arg3; | |
242 | args[3] = arg4; | |
e8996ee0 | 243 | t0 = tcg_const_ptr((tcg_target_long)func); |
f8422f52 | 244 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 245 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 246 | 0, NULL, 4, args); |
e8996ee0 | 247 | tcg_temp_free(t0); |
f8422f52 BS |
248 | } |
249 | ||
250 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) | |
251 | { | |
e8996ee0 FB |
252 | TCGv t0; |
253 | t0 = tcg_const_ptr((tcg_target_long)func); | |
f8422f52 | 254 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 255 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 256 | 1, &ret, 0, NULL); |
e8996ee0 | 257 | tcg_temp_free(t0); |
f8422f52 BS |
258 | } |
259 | ||
260 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) | |
261 | { | |
e8996ee0 FB |
262 | TCGv t0; |
263 | t0 = tcg_const_ptr((tcg_target_long)func); | |
f8422f52 | 264 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 265 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 266 | 1, &ret, 1, &arg1); |
e8996ee0 | 267 | tcg_temp_free(t0); |
f8422f52 BS |
268 | } |
269 | ||
ac56dd48 PB |
270 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
271 | TCGv arg1, TCGv arg2) | |
c896fe29 | 272 | { |
ac56dd48 | 273 | TCGv args[2]; |
e8996ee0 | 274 | TCGv t0; |
c896fe29 FB |
275 | args[0] = arg1; |
276 | args[1] = arg2; | |
e8996ee0 | 277 | t0 = tcg_const_ptr((tcg_target_long)func); |
c896fe29 | 278 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 279 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 280 | 1, &ret, 2, args); |
e8996ee0 | 281 | tcg_temp_free(t0); |
c896fe29 FB |
282 | } |
283 | ||
6ddbc6e4 PB |
284 | static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
285 | TCGv arg1, TCGv arg2, TCGv arg3) | |
286 | { | |
287 | TCGv args[3]; | |
e8996ee0 | 288 | TCGv t0; |
6ddbc6e4 PB |
289 | args[0] = arg1; |
290 | args[1] = arg2; | |
291 | args[2] = arg3; | |
e8996ee0 | 292 | t0 = tcg_const_ptr((tcg_target_long)func); |
6ddbc6e4 | 293 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 294 | t0, TCG_HELPER_CALL_FLAGS, |
6ddbc6e4 | 295 | 1, &ret, 3, args); |
e8996ee0 | 296 | tcg_temp_free(t0); |
6ddbc6e4 PB |
297 | } |
298 | ||
f8422f52 BS |
299 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
300 | TCGv arg1, TCGv arg2, TCGv arg3, | |
301 | TCGv arg4) | |
302 | { | |
303 | TCGv args[4]; | |
e8996ee0 | 304 | TCGv t0; |
f8422f52 BS |
305 | args[0] = arg1; |
306 | args[1] = arg2; | |
307 | args[2] = arg3; | |
308 | args[3] = arg4; | |
e8996ee0 | 309 | t0 = tcg_const_ptr((tcg_target_long)func); |
f8422f52 | 310 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 311 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 312 | 1, &ret, 4, args); |
e8996ee0 | 313 | tcg_temp_free(t0); |
f8422f52 BS |
314 | } |
315 | ||
c896fe29 FB |
316 | /* 32 bit ops */ |
317 | ||
ac56dd48 | 318 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 319 | { |
ac56dd48 | 320 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
c896fe29 FB |
321 | } |
322 | ||
ac56dd48 | 323 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 324 | { |
ac56dd48 | 325 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
c896fe29 FB |
326 | } |
327 | ||
ac56dd48 | 328 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 329 | { |
ac56dd48 | 330 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
c896fe29 FB |
331 | } |
332 | ||
ac56dd48 | 333 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 334 | { |
ac56dd48 | 335 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
c896fe29 FB |
336 | } |
337 | ||
ac56dd48 | 338 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 339 | { |
ac56dd48 | 340 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
c896fe29 FB |
341 | } |
342 | ||
ac56dd48 | 343 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 344 | { |
ac56dd48 | 345 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
c896fe29 FB |
346 | } |
347 | ||
ac56dd48 | 348 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 349 | { |
ac56dd48 | 350 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
c896fe29 FB |
351 | } |
352 | ||
ac56dd48 | 353 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 354 | { |
ac56dd48 | 355 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
c896fe29 FB |
356 | } |
357 | ||
ac56dd48 | 358 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
359 | { |
360 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); | |
361 | } | |
362 | ||
ac56dd48 | 363 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 364 | { |
7089442c BS |
365 | /* some cases can be optimized here */ |
366 | if (arg2 == 0) { | |
367 | tcg_gen_mov_i32(ret, arg1); | |
368 | } else { | |
e8996ee0 FB |
369 | TCGv t0 = tcg_const_i32(arg2); |
370 | tcg_gen_add_i32(ret, arg1, t0); | |
371 | tcg_temp_free(t0); | |
7089442c | 372 | } |
c896fe29 FB |
373 | } |
374 | ||
ac56dd48 | 375 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
376 | { |
377 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); | |
378 | } | |
379 | ||
0045734a AJ |
380 | static inline void tcg_gen_subfi_i32(TCGv ret, int32_t arg1, TCGv arg2) |
381 | { | |
382 | TCGv t0 = tcg_const_i32(arg1); | |
383 | tcg_gen_sub_i32(ret, t0, arg2); | |
384 | tcg_temp_free(t0); | |
385 | } | |
386 | ||
ac56dd48 | 387 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 388 | { |
7089442c BS |
389 | /* some cases can be optimized here */ |
390 | if (arg2 == 0) { | |
391 | tcg_gen_mov_i32(ret, arg1); | |
392 | } else { | |
e8996ee0 FB |
393 | TCGv t0 = tcg_const_i32(arg2); |
394 | tcg_gen_sub_i32(ret, arg1, t0); | |
395 | tcg_temp_free(t0); | |
7089442c | 396 | } |
c896fe29 FB |
397 | } |
398 | ||
ac56dd48 | 399 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
400 | { |
401 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); | |
402 | } | |
403 | ||
ac56dd48 | 404 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
405 | { |
406 | /* some cases can be optimized here */ | |
407 | if (arg2 == 0) { | |
408 | tcg_gen_movi_i32(ret, 0); | |
409 | } else if (arg2 == 0xffffffff) { | |
410 | tcg_gen_mov_i32(ret, arg1); | |
411 | } else { | |
e8996ee0 FB |
412 | TCGv t0 = tcg_const_i32(arg2); |
413 | tcg_gen_and_i32(ret, arg1, t0); | |
414 | tcg_temp_free(t0); | |
c896fe29 FB |
415 | } |
416 | } | |
417 | ||
ac56dd48 | 418 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
419 | { |
420 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); | |
421 | } | |
422 | ||
ac56dd48 | 423 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
424 | { |
425 | /* some cases can be optimized here */ | |
426 | if (arg2 == 0xffffffff) { | |
7089442c | 427 | tcg_gen_movi_i32(ret, 0xffffffff); |
c896fe29 FB |
428 | } else if (arg2 == 0) { |
429 | tcg_gen_mov_i32(ret, arg1); | |
430 | } else { | |
e8996ee0 FB |
431 | TCGv t0 = tcg_const_i32(arg2); |
432 | tcg_gen_or_i32(ret, arg1, t0); | |
433 | tcg_temp_free(t0); | |
c896fe29 FB |
434 | } |
435 | } | |
436 | ||
ac56dd48 | 437 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
438 | { |
439 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); | |
440 | } | |
441 | ||
ac56dd48 | 442 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
443 | { |
444 | /* some cases can be optimized here */ | |
445 | if (arg2 == 0) { | |
446 | tcg_gen_mov_i32(ret, arg1); | |
447 | } else { | |
e8996ee0 FB |
448 | TCGv t0 = tcg_const_i32(arg2); |
449 | tcg_gen_xor_i32(ret, arg1, t0); | |
450 | tcg_temp_free(t0); | |
c896fe29 FB |
451 | } |
452 | } | |
453 | ||
ac56dd48 | 454 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
455 | { |
456 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); | |
457 | } | |
458 | ||
ac56dd48 | 459 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 460 | { |
34151a20 FB |
461 | if (arg2 == 0) { |
462 | tcg_gen_mov_i32(ret, arg1); | |
463 | } else { | |
e8996ee0 FB |
464 | TCGv t0 = tcg_const_i32(arg2); |
465 | tcg_gen_shl_i32(ret, arg1, t0); | |
466 | tcg_temp_free(t0); | |
34151a20 | 467 | } |
c896fe29 FB |
468 | } |
469 | ||
ac56dd48 | 470 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
471 | { |
472 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); | |
473 | } | |
474 | ||
ac56dd48 | 475 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 476 | { |
34151a20 FB |
477 | if (arg2 == 0) { |
478 | tcg_gen_mov_i32(ret, arg1); | |
479 | } else { | |
e8996ee0 FB |
480 | TCGv t0 = tcg_const_i32(arg2); |
481 | tcg_gen_shr_i32(ret, arg1, t0); | |
482 | tcg_temp_free(t0); | |
34151a20 | 483 | } |
c896fe29 FB |
484 | } |
485 | ||
ac56dd48 | 486 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
487 | { |
488 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); | |
489 | } | |
490 | ||
ac56dd48 | 491 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 492 | { |
34151a20 FB |
493 | if (arg2 == 0) { |
494 | tcg_gen_mov_i32(ret, arg1); | |
495 | } else { | |
e8996ee0 FB |
496 | TCGv t0 = tcg_const_i32(arg2); |
497 | tcg_gen_sar_i32(ret, arg1, t0); | |
498 | tcg_temp_free(t0); | |
34151a20 | 499 | } |
c896fe29 FB |
500 | } |
501 | ||
ac56dd48 | 502 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
503 | int label_index) |
504 | { | |
ac56dd48 | 505 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
c896fe29 FB |
506 | } |
507 | ||
cb63669a PB |
508 | static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, |
509 | int label_index) | |
510 | { | |
511 | TCGv t0 = tcg_const_i32(arg2); | |
512 | tcg_gen_brcond_i32(cond, arg1, t0, label_index); | |
513 | tcg_temp_free(t0); | |
514 | } | |
515 | ||
ac56dd48 | 516 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
517 | { |
518 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); | |
519 | } | |
520 | ||
f730fd27 TS |
521 | static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
522 | { | |
e8996ee0 FB |
523 | TCGv t0 = tcg_const_i32(arg2); |
524 | tcg_gen_mul_i32(ret, arg1, t0); | |
525 | tcg_temp_free(t0); | |
f730fd27 TS |
526 | } |
527 | ||
c896fe29 | 528 | #ifdef TCG_TARGET_HAS_div_i32 |
ac56dd48 | 529 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
530 | { |
531 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); | |
532 | } | |
533 | ||
ac56dd48 | 534 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
535 | { |
536 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); | |
537 | } | |
538 | ||
ac56dd48 | 539 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
540 | { |
541 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); | |
542 | } | |
543 | ||
ac56dd48 | 544 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
545 | { |
546 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); | |
547 | } | |
548 | #else | |
ac56dd48 | 549 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 550 | { |
ac56dd48 | 551 | TCGv t0; |
c896fe29 FB |
552 | t0 = tcg_temp_new(TCG_TYPE_I32); |
553 | tcg_gen_sari_i32(t0, arg1, 31); | |
554 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 555 | tcg_temp_free(t0); |
c896fe29 FB |
556 | } |
557 | ||
ac56dd48 | 558 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 559 | { |
ac56dd48 | 560 | TCGv t0; |
c896fe29 FB |
561 | t0 = tcg_temp_new(TCG_TYPE_I32); |
562 | tcg_gen_sari_i32(t0, arg1, 31); | |
563 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 564 | tcg_temp_free(t0); |
c896fe29 FB |
565 | } |
566 | ||
ac56dd48 | 567 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 568 | { |
ac56dd48 | 569 | TCGv t0; |
c896fe29 FB |
570 | t0 = tcg_temp_new(TCG_TYPE_I32); |
571 | tcg_gen_movi_i32(t0, 0); | |
572 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 573 | tcg_temp_free(t0); |
c896fe29 FB |
574 | } |
575 | ||
ac56dd48 | 576 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 577 | { |
ac56dd48 | 578 | TCGv t0; |
c896fe29 FB |
579 | t0 = tcg_temp_new(TCG_TYPE_I32); |
580 | tcg_gen_movi_i32(t0, 0); | |
581 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 582 | tcg_temp_free(t0); |
c896fe29 FB |
583 | } |
584 | #endif | |
585 | ||
586 | #if TCG_TARGET_REG_BITS == 32 | |
587 | ||
ac56dd48 | 588 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 589 | { |
98156423 | 590 | if (GET_TCGV(ret) != GET_TCGV(arg)) { |
4d07272d BS |
591 | tcg_gen_mov_i32(ret, arg); |
592 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); | |
593 | } | |
c896fe29 FB |
594 | } |
595 | ||
ac56dd48 | 596 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 FB |
597 | { |
598 | tcg_gen_movi_i32(ret, arg); | |
ac56dd48 | 599 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
c896fe29 FB |
600 | } |
601 | ||
ac56dd48 | 602 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
603 | { |
604 | tcg_gen_ld8u_i32(ret, arg2, offset); | |
ac56dd48 | 605 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
606 | } |
607 | ||
ac56dd48 | 608 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
609 | { |
610 | tcg_gen_ld8s_i32(ret, arg2, offset); | |
ac56dd48 | 611 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
612 | } |
613 | ||
ac56dd48 | 614 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
615 | { |
616 | tcg_gen_ld16u_i32(ret, arg2, offset); | |
ac56dd48 | 617 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
618 | } |
619 | ||
ac56dd48 | 620 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
621 | { |
622 | tcg_gen_ld16s_i32(ret, arg2, offset); | |
ac56dd48 | 623 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
624 | } |
625 | ||
ac56dd48 | 626 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
627 | { |
628 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 629 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
630 | } |
631 | ||
ac56dd48 | 632 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
633 | { |
634 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 635 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
636 | } |
637 | ||
ac56dd48 | 638 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
639 | { |
640 | /* since arg2 and ret have different types, they cannot be the | |
641 | same temporary */ | |
642 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 643 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
c896fe29 FB |
644 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
645 | #else | |
646 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 647 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
c896fe29 FB |
648 | #endif |
649 | } | |
650 | ||
ac56dd48 | 651 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
652 | { |
653 | tcg_gen_st8_i32(arg1, arg2, offset); | |
654 | } | |
655 | ||
ac56dd48 | 656 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
657 | { |
658 | tcg_gen_st16_i32(arg1, arg2, offset); | |
659 | } | |
660 | ||
ac56dd48 | 661 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
662 | { |
663 | tcg_gen_st_i32(arg1, arg2, offset); | |
664 | } | |
665 | ||
ac56dd48 | 666 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
667 | { |
668 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 669 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
c896fe29 FB |
670 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
671 | #else | |
672 | tcg_gen_st_i32(arg1, arg2, offset); | |
ac56dd48 | 673 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
c896fe29 FB |
674 | #endif |
675 | } | |
676 | ||
ac56dd48 | 677 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 678 | { |
ac56dd48 PB |
679 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
680 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
681 | } |
682 | ||
ac56dd48 | 683 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 684 | { |
ac56dd48 PB |
685 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
686 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
687 | } |
688 | ||
ac56dd48 | 689 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
690 | { |
691 | tcg_gen_and_i32(ret, arg1, arg2); | |
ac56dd48 | 692 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
693 | } |
694 | ||
ac56dd48 | 695 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
696 | { |
697 | tcg_gen_andi_i32(ret, arg1, arg2); | |
ac56dd48 | 698 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
699 | } |
700 | ||
ac56dd48 | 701 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
702 | { |
703 | tcg_gen_or_i32(ret, arg1, arg2); | |
ac56dd48 | 704 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
705 | } |
706 | ||
ac56dd48 | 707 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
708 | { |
709 | tcg_gen_ori_i32(ret, arg1, arg2); | |
ac56dd48 | 710 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
711 | } |
712 | ||
ac56dd48 | 713 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
714 | { |
715 | tcg_gen_xor_i32(ret, arg1, arg2); | |
ac56dd48 | 716 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
717 | } |
718 | ||
ac56dd48 | 719 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
720 | { |
721 | tcg_gen_xori_i32(ret, arg1, arg2); | |
ac56dd48 | 722 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
723 | } |
724 | ||
725 | /* XXX: use generic code when basic block handling is OK or CPU | |
726 | specific code (x86) */ | |
ac56dd48 | 727 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
728 | { |
729 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); | |
730 | } | |
731 | ||
ac56dd48 | 732 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
733 | { |
734 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); | |
735 | } | |
736 | ||
ac56dd48 | 737 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
738 | { |
739 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); | |
740 | } | |
741 | ||
ac56dd48 | 742 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
743 | { |
744 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); | |
745 | } | |
746 | ||
ac56dd48 | 747 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
748 | { |
749 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); | |
750 | } | |
751 | ||
ac56dd48 | 752 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
753 | { |
754 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); | |
755 | } | |
756 | ||
ac56dd48 | 757 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
758 | int label_index) |
759 | { | |
ac56dd48 PB |
760 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
761 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), | |
762 | cond, label_index); | |
c896fe29 FB |
763 | } |
764 | ||
ac56dd48 | 765 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 766 | { |
ac56dd48 | 767 | TCGv t0, t1; |
c896fe29 FB |
768 | |
769 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
770 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
771 | ||
ac56dd48 | 772 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
c896fe29 | 773 | |
ac56dd48 PB |
774 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
775 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
776 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); | |
777 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
c896fe29 FB |
778 | |
779 | tcg_gen_mov_i64(ret, t0); | |
e8996ee0 FB |
780 | tcg_temp_free(t0); |
781 | tcg_temp_free(t1); | |
c896fe29 FB |
782 | } |
783 | ||
ac56dd48 | 784 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
785 | { |
786 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); | |
787 | } | |
788 | ||
ac56dd48 | 789 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
790 | { |
791 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); | |
792 | } | |
793 | ||
ac56dd48 | 794 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
795 | { |
796 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); | |
797 | } | |
798 | ||
ac56dd48 | 799 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
800 | { |
801 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); | |
802 | } | |
803 | ||
804 | #else | |
805 | ||
ac56dd48 | 806 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 807 | { |
98156423 | 808 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 809 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
c896fe29 FB |
810 | } |
811 | ||
ac56dd48 | 812 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 | 813 | { |
ac56dd48 | 814 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
c896fe29 FB |
815 | } |
816 | ||
ac56dd48 PB |
817 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
818 | tcg_target_long offset) | |
c896fe29 | 819 | { |
ac56dd48 | 820 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
c896fe29 FB |
821 | } |
822 | ||
ac56dd48 PB |
823 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
824 | tcg_target_long offset) | |
c896fe29 | 825 | { |
ac56dd48 | 826 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
c896fe29 FB |
827 | } |
828 | ||
ac56dd48 PB |
829 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
830 | tcg_target_long offset) | |
c896fe29 | 831 | { |
ac56dd48 | 832 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
c896fe29 FB |
833 | } |
834 | ||
ac56dd48 PB |
835 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
836 | tcg_target_long offset) | |
c896fe29 | 837 | { |
ac56dd48 | 838 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
c896fe29 FB |
839 | } |
840 | ||
ac56dd48 PB |
841 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
842 | tcg_target_long offset) | |
c896fe29 | 843 | { |
ac56dd48 | 844 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
c896fe29 FB |
845 | } |
846 | ||
ac56dd48 PB |
847 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
848 | tcg_target_long offset) | |
c896fe29 | 849 | { |
ac56dd48 | 850 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
c896fe29 FB |
851 | } |
852 | ||
ac56dd48 | 853 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 854 | { |
ac56dd48 | 855 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
c896fe29 FB |
856 | } |
857 | ||
ac56dd48 PB |
858 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
859 | tcg_target_long offset) | |
c896fe29 | 860 | { |
ac56dd48 | 861 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
c896fe29 FB |
862 | } |
863 | ||
ac56dd48 PB |
864 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
865 | tcg_target_long offset) | |
c896fe29 | 866 | { |
ac56dd48 | 867 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
c896fe29 FB |
868 | } |
869 | ||
ac56dd48 PB |
870 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
871 | tcg_target_long offset) | |
c896fe29 | 872 | { |
ac56dd48 | 873 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
c896fe29 FB |
874 | } |
875 | ||
ac56dd48 | 876 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 877 | { |
ac56dd48 | 878 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
c896fe29 FB |
879 | } |
880 | ||
ac56dd48 | 881 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
882 | { |
883 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); | |
884 | } | |
885 | ||
ac56dd48 | 886 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
887 | { |
888 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); | |
889 | } | |
890 | ||
ac56dd48 | 891 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
892 | { |
893 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); | |
894 | } | |
895 | ||
ac56dd48 | 896 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 897 | { |
e8996ee0 FB |
898 | TCGv t0 = tcg_const_i64(arg2); |
899 | tcg_gen_and_i64(ret, arg1, t0); | |
900 | tcg_temp_free(t0); | |
c896fe29 FB |
901 | } |
902 | ||
ac56dd48 | 903 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
904 | { |
905 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); | |
906 | } | |
907 | ||
ac56dd48 | 908 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 909 | { |
e8996ee0 FB |
910 | TCGv t0 = tcg_const_i64(arg2); |
911 | tcg_gen_or_i64(ret, arg1, t0); | |
912 | tcg_temp_free(t0); | |
c896fe29 FB |
913 | } |
914 | ||
ac56dd48 | 915 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
916 | { |
917 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); | |
918 | } | |
919 | ||
ac56dd48 | 920 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 921 | { |
e8996ee0 FB |
922 | TCGv t0 = tcg_const_i64(arg2); |
923 | tcg_gen_xor_i64(ret, arg1, t0); | |
924 | tcg_temp_free(t0); | |
c896fe29 FB |
925 | } |
926 | ||
ac56dd48 | 927 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
928 | { |
929 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); | |
930 | } | |
931 | ||
ac56dd48 | 932 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 933 | { |
34151a20 FB |
934 | if (arg2 == 0) { |
935 | tcg_gen_mov_i64(ret, arg1); | |
936 | } else { | |
e8996ee0 FB |
937 | TCGv t0 = tcg_const_i64(arg2); |
938 | tcg_gen_shl_i64(ret, arg1, t0); | |
939 | tcg_temp_free(t0); | |
34151a20 | 940 | } |
c896fe29 FB |
941 | } |
942 | ||
ac56dd48 | 943 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
944 | { |
945 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); | |
946 | } | |
947 | ||
ac56dd48 | 948 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 949 | { |
34151a20 FB |
950 | if (arg2 == 0) { |
951 | tcg_gen_mov_i64(ret, arg1); | |
952 | } else { | |
e8996ee0 FB |
953 | TCGv t0 = tcg_const_i64(arg2); |
954 | tcg_gen_shr_i64(ret, arg1, t0); | |
955 | tcg_temp_free(t0); | |
34151a20 | 956 | } |
c896fe29 FB |
957 | } |
958 | ||
ac56dd48 | 959 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
960 | { |
961 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); | |
962 | } | |
963 | ||
ac56dd48 | 964 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 965 | { |
34151a20 FB |
966 | if (arg2 == 0) { |
967 | tcg_gen_mov_i64(ret, arg1); | |
968 | } else { | |
e8996ee0 FB |
969 | TCGv t0 = tcg_const_i64(arg2); |
970 | tcg_gen_sar_i64(ret, arg1, t0); | |
971 | tcg_temp_free(t0); | |
34151a20 | 972 | } |
c896fe29 FB |
973 | } |
974 | ||
ac56dd48 | 975 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
976 | int label_index) |
977 | { | |
ac56dd48 | 978 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
c896fe29 FB |
979 | } |
980 | ||
ac56dd48 | 981 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
982 | { |
983 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); | |
984 | } | |
985 | ||
986 | #ifdef TCG_TARGET_HAS_div_i64 | |
ac56dd48 | 987 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
988 | { |
989 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); | |
990 | } | |
991 | ||
ac56dd48 | 992 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
993 | { |
994 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); | |
995 | } | |
996 | ||
ac56dd48 | 997 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
998 | { |
999 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); | |
1000 | } | |
1001 | ||
ac56dd48 | 1002 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
1003 | { |
1004 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); | |
1005 | } | |
1006 | #else | |
ac56dd48 | 1007 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1008 | { |
ac56dd48 | 1009 | TCGv t0; |
c896fe29 FB |
1010 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1011 | tcg_gen_sari_i64(t0, arg1, 63); | |
1012 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 1013 | tcg_temp_free(t0); |
c896fe29 FB |
1014 | } |
1015 | ||
ac56dd48 | 1016 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1017 | { |
ac56dd48 | 1018 | TCGv t0; |
c896fe29 FB |
1019 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1020 | tcg_gen_sari_i64(t0, arg1, 63); | |
1021 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 1022 | tcg_temp_free(t0); |
c896fe29 FB |
1023 | } |
1024 | ||
ac56dd48 | 1025 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1026 | { |
ac56dd48 | 1027 | TCGv t0; |
c896fe29 FB |
1028 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1029 | tcg_gen_movi_i64(t0, 0); | |
1030 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 1031 | tcg_temp_free(t0); |
c896fe29 FB |
1032 | } |
1033 | ||
ac56dd48 | 1034 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1035 | { |
ac56dd48 | 1036 | TCGv t0; |
c896fe29 FB |
1037 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1038 | tcg_gen_movi_i64(t0, 0); | |
1039 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 1040 | tcg_temp_free(t0); |
c896fe29 FB |
1041 | } |
1042 | #endif | |
1043 | ||
1044 | #endif | |
1045 | ||
6359706f AJ |
1046 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1047 | { | |
1048 | /* some cases can be optimized here */ | |
1049 | if (arg2 == 0) { | |
1050 | tcg_gen_mov_i64(ret, arg1); | |
1051 | } else { | |
1052 | TCGv t0 = tcg_const_i64(arg2); | |
1053 | tcg_gen_add_i64(ret, arg1, t0); | |
1054 | tcg_temp_free(t0); | |
1055 | } | |
1056 | } | |
1057 | ||
0045734a AJ |
1058 | static inline void tcg_gen_subfi_i64(TCGv ret, int64_t arg1, TCGv arg2) |
1059 | { | |
1060 | TCGv t0 = tcg_const_i64(arg1); | |
1061 | tcg_gen_sub_i64(ret, t0, arg2); | |
1062 | tcg_temp_free(t0); | |
1063 | } | |
1064 | ||
6359706f AJ |
1065 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1066 | { | |
1067 | /* some cases can be optimized here */ | |
1068 | if (arg2 == 0) { | |
1069 | tcg_gen_mov_i64(ret, arg1); | |
1070 | } else { | |
1071 | TCGv t0 = tcg_const_i64(arg2); | |
1072 | tcg_gen_sub_i64(ret, arg1, t0); | |
1073 | tcg_temp_free(t0); | |
1074 | } | |
1075 | } | |
f02bb954 AJ |
1076 | static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, |
1077 | int label_index) | |
1078 | { | |
1079 | TCGv t0 = tcg_const_i64(arg2); | |
1080 | tcg_gen_brcond_i64(cond, arg1, t0, label_index); | |
1081 | tcg_temp_free(t0); | |
1082 | } | |
1083 | ||
1084 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) | |
1085 | { | |
1086 | TCGv t0 = tcg_const_i64(arg2); | |
1087 | tcg_gen_mul_i64(ret, arg1, t0); | |
1088 | tcg_temp_free(t0); | |
1089 | } | |
1090 | ||
6359706f | 1091 | |
c896fe29 FB |
1092 | /***************************************/ |
1093 | /* optional operations */ | |
1094 | ||
ac56dd48 | 1095 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1096 | { |
1097 | #ifdef TCG_TARGET_HAS_ext8s_i32 | |
1098 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); | |
1099 | #else | |
1100 | tcg_gen_shli_i32(ret, arg, 24); | |
5ff9d6a4 | 1101 | tcg_gen_sari_i32(ret, ret, 24); |
c896fe29 FB |
1102 | #endif |
1103 | } | |
1104 | ||
ac56dd48 | 1105 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1106 | { |
1107 | #ifdef TCG_TARGET_HAS_ext16s_i32 | |
1108 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); | |
1109 | #else | |
1110 | tcg_gen_shli_i32(ret, arg, 16); | |
5ff9d6a4 | 1111 | tcg_gen_sari_i32(ret, ret, 16); |
c896fe29 FB |
1112 | #endif |
1113 | } | |
1114 | ||
86831435 PB |
1115 | /* These are currently just for convenience. |
1116 | We assume a target will recognise these automatically . */ | |
1117 | static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) | |
1118 | { | |
1119 | tcg_gen_andi_i32(ret, arg, 0xffu); | |
1120 | } | |
1121 | ||
1122 | static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) | |
1123 | { | |
1124 | tcg_gen_andi_i32(ret, arg, 0xffffu); | |
1125 | } | |
1126 | ||
c896fe29 | 1127 | /* Note: we assume the two high bytes are set to zero */ |
ac56dd48 | 1128 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1129 | { |
1130 | #ifdef TCG_TARGET_HAS_bswap16_i32 | |
1131 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); | |
1132 | #else | |
ac56dd48 | 1133 | TCGv t0, t1; |
c896fe29 FB |
1134 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1135 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1136 | ||
1137 | tcg_gen_shri_i32(t0, arg, 8); | |
1138 | tcg_gen_andi_i32(t1, arg, 0x000000ff); | |
1139 | tcg_gen_shli_i32(t1, t1, 8); | |
1140 | tcg_gen_or_i32(ret, t0, t1); | |
e8996ee0 FB |
1141 | tcg_temp_free(t0); |
1142 | tcg_temp_free(t1); | |
c896fe29 FB |
1143 | #endif |
1144 | } | |
1145 | ||
ac56dd48 | 1146 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1147 | { |
1148 | #ifdef TCG_TARGET_HAS_bswap_i32 | |
1149 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); | |
1150 | #else | |
ac56dd48 | 1151 | TCGv t0, t1; |
c896fe29 FB |
1152 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1153 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1154 | ||
1155 | tcg_gen_shli_i32(t0, arg, 24); | |
1156 | ||
1157 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); | |
1158 | tcg_gen_shli_i32(t1, t1, 8); | |
1159 | tcg_gen_or_i32(t0, t0, t1); | |
1160 | ||
1161 | tcg_gen_shri_i32(t1, arg, 8); | |
1162 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); | |
1163 | tcg_gen_or_i32(t0, t0, t1); | |
1164 | ||
1165 | tcg_gen_shri_i32(t1, arg, 24); | |
1166 | tcg_gen_or_i32(ret, t0, t1); | |
e8996ee0 FB |
1167 | tcg_temp_free(t0); |
1168 | tcg_temp_free(t1); | |
c896fe29 FB |
1169 | #endif |
1170 | } | |
1171 | ||
1172 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1173 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1174 | { |
1175 | tcg_gen_ext8s_i32(ret, arg); | |
ac56dd48 | 1176 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1177 | } |
1178 | ||
ac56dd48 | 1179 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1180 | { |
1181 | tcg_gen_ext16s_i32(ret, arg); | |
ac56dd48 | 1182 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1183 | } |
1184 | ||
ac56dd48 | 1185 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1186 | { |
1187 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1188 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1189 | } |
1190 | ||
86831435 PB |
1191 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1192 | { | |
1193 | tcg_gen_ext8u_i32(ret, arg); | |
1194 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1195 | } | |
1196 | ||
1197 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1198 | { | |
1199 | tcg_gen_ext16u_i32(ret, arg); | |
1200 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1201 | } | |
1202 | ||
1203 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1204 | { | |
1205 | tcg_gen_mov_i32(ret, arg); | |
1206 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1207 | } | |
1208 | ||
ac56dd48 | 1209 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1210 | { |
1211 | tcg_gen_mov_i32(ret, arg); | |
1212 | } | |
1213 | ||
ac56dd48 | 1214 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1215 | { |
1216 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1217 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
1218 | } |
1219 | ||
ac56dd48 | 1220 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1221 | { |
1222 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1223 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1224 | } |
1225 | ||
ac56dd48 | 1226 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 | 1227 | { |
ac56dd48 | 1228 | TCGv t0, t1; |
c896fe29 FB |
1229 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1230 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1231 | ||
1232 | tcg_gen_bswap_i32(t0, arg); | |
ac56dd48 | 1233 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
c896fe29 | 1234 | tcg_gen_mov_i32(ret, t1); |
ac56dd48 | 1235 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
e8996ee0 FB |
1236 | tcg_temp_free(t0); |
1237 | tcg_temp_free(t1); | |
c896fe29 FB |
1238 | } |
1239 | #else | |
1240 | ||
ac56dd48 | 1241 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1242 | { |
1243 | #ifdef TCG_TARGET_HAS_ext8s_i64 | |
1244 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); | |
1245 | #else | |
1246 | tcg_gen_shli_i64(ret, arg, 56); | |
5ff9d6a4 | 1247 | tcg_gen_sari_i64(ret, ret, 56); |
c896fe29 FB |
1248 | #endif |
1249 | } | |
1250 | ||
ac56dd48 | 1251 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1252 | { |
1253 | #ifdef TCG_TARGET_HAS_ext16s_i64 | |
1254 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); | |
1255 | #else | |
1256 | tcg_gen_shli_i64(ret, arg, 48); | |
5ff9d6a4 | 1257 | tcg_gen_sari_i64(ret, ret, 48); |
c896fe29 FB |
1258 | #endif |
1259 | } | |
1260 | ||
ac56dd48 | 1261 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1262 | { |
1263 | #ifdef TCG_TARGET_HAS_ext32s_i64 | |
1264 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); | |
1265 | #else | |
1266 | tcg_gen_shli_i64(ret, arg, 32); | |
5ff9d6a4 | 1267 | tcg_gen_sari_i64(ret, ret, 32); |
c896fe29 FB |
1268 | #endif |
1269 | } | |
1270 | ||
86831435 PB |
1271 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1272 | { | |
1273 | tcg_gen_andi_i64(ret, arg, 0xffu); | |
1274 | } | |
1275 | ||
1276 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1277 | { | |
1278 | tcg_gen_andi_i64(ret, arg, 0xffffu); | |
1279 | } | |
1280 | ||
1281 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1282 | { | |
1283 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); | |
1284 | } | |
1285 | ||
c896fe29 | 1286 | /* Note: we assume the target supports move between 32 and 64 bit |
ac56dd48 PB |
1287 | registers. This will probably break MIPS64 targets. */ |
1288 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) | |
c896fe29 FB |
1289 | { |
1290 | tcg_gen_mov_i32(ret, arg); | |
1291 | } | |
1292 | ||
1293 | /* Note: we assume the target supports move between 32 and 64 bit | |
1294 | registers */ | |
ac56dd48 | 1295 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 | 1296 | { |
86831435 | 1297 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); |
c896fe29 FB |
1298 | } |
1299 | ||
1300 | /* Note: we assume the target supports move between 32 and 64 bit | |
1301 | registers */ | |
ac56dd48 | 1302 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1303 | { |
1304 | tcg_gen_ext32s_i64(ret, arg); | |
1305 | } | |
1306 | ||
ac56dd48 | 1307 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1308 | { |
1309 | #ifdef TCG_TARGET_HAS_bswap_i64 | |
1310 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); | |
1311 | #else | |
ac56dd48 | 1312 | TCGv t0, t1; |
c896fe29 FB |
1313 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1314 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1315 | ||
1316 | tcg_gen_shli_i64(t0, arg, 56); | |
1317 | ||
1318 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); | |
1319 | tcg_gen_shli_i64(t1, t1, 40); | |
1320 | tcg_gen_or_i64(t0, t0, t1); | |
1321 | ||
1322 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); | |
1323 | tcg_gen_shli_i64(t1, t1, 24); | |
1324 | tcg_gen_or_i64(t0, t0, t1); | |
1325 | ||
1326 | tcg_gen_andi_i64(t1, arg, 0xff000000); | |
1327 | tcg_gen_shli_i64(t1, t1, 8); | |
1328 | tcg_gen_or_i64(t0, t0, t1); | |
1329 | ||
1330 | tcg_gen_shri_i64(t1, arg, 8); | |
1331 | tcg_gen_andi_i64(t1, t1, 0xff000000); | |
1332 | tcg_gen_or_i64(t0, t0, t1); | |
1333 | ||
1334 | tcg_gen_shri_i64(t1, arg, 24); | |
1335 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); | |
1336 | tcg_gen_or_i64(t0, t0, t1); | |
1337 | ||
1338 | tcg_gen_shri_i64(t1, arg, 40); | |
1339 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); | |
1340 | tcg_gen_or_i64(t0, t0, t1); | |
1341 | ||
1342 | tcg_gen_shri_i64(t1, arg, 56); | |
1343 | tcg_gen_or_i64(ret, t0, t1); | |
e8996ee0 FB |
1344 | tcg_temp_free(t0); |
1345 | tcg_temp_free(t1); | |
c896fe29 FB |
1346 | #endif |
1347 | } | |
1348 | ||
1349 | #endif | |
1350 | ||
390efc54 PB |
1351 | static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1352 | { | |
1353 | #ifdef TCG_TARGET_HAS_neg_i32 | |
1354 | tcg_gen_op2(INDEX_op_neg_i32, ret, arg); | |
1355 | #else | |
e8996ee0 FB |
1356 | TCGv t0 = tcg_const_i32(0); |
1357 | tcg_gen_sub_i32(ret, t0, arg); | |
1358 | tcg_temp_free(t0); | |
390efc54 PB |
1359 | #endif |
1360 | } | |
1361 | ||
1362 | static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) | |
1363 | { | |
1364 | #ifdef TCG_TARGET_HAS_neg_i64 | |
1365 | tcg_gen_op2(INDEX_op_neg_i64, ret, arg); | |
1366 | #else | |
e8996ee0 FB |
1367 | TCGv t0 = tcg_const_i64(0); |
1368 | tcg_gen_sub_i64(ret, t0, arg); | |
1369 | tcg_temp_free(t0); | |
390efc54 PB |
1370 | #endif |
1371 | } | |
1372 | ||
0b6ce4cf FB |
1373 | static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1374 | { | |
e8996ee0 | 1375 | tcg_gen_xori_i32(ret, arg, -1); |
0b6ce4cf FB |
1376 | } |
1377 | ||
1378 | static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) | |
1379 | { | |
e8996ee0 | 1380 | tcg_gen_xori_i64(ret, arg, -1); |
0b6ce4cf | 1381 | } |
5ff9d6a4 FB |
1382 | |
1383 | static inline void tcg_gen_discard_i32(TCGv arg) | |
1384 | { | |
1385 | tcg_gen_op1(INDEX_op_discard, arg); | |
1386 | } | |
1387 | ||
1388 | #if TCG_TARGET_REG_BITS == 32 | |
1389 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1390 | { | |
1391 | tcg_gen_discard_i32(arg); | |
1392 | tcg_gen_discard_i32(TCGV_HIGH(arg)); | |
1393 | } | |
1394 | #else | |
1395 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1396 | { | |
1397 | tcg_gen_op1(INDEX_op_discard, arg); | |
1398 | } | |
1399 | #endif | |
1400 | ||
36aa55dc PB |
1401 | static inline void tcg_gen_concat_i32_i64(TCGv dest, TCGv low, TCGv high) |
1402 | { | |
1403 | #if TCG_TARGET_REG_BITS == 32 | |
1404 | tcg_gen_mov_i32(dest, low); | |
1405 | tcg_gen_mov_i32(TCGV_HIGH(dest), high); | |
1406 | #else | |
1407 | TCGv tmp = tcg_temp_new (TCG_TYPE_I64); | |
1408 | /* This extension is only needed for type correctness. | |
1409 | We may be able to do better given target specific information. */ | |
1410 | tcg_gen_extu_i32_i64(tmp, high); | |
1411 | tcg_gen_shli_i64(tmp, tmp, 32); | |
1412 | tcg_gen_extu_i32_i64(dest, low); | |
1413 | tcg_gen_or_i64(dest, dest, tmp); | |
1414 | tcg_temp_free(tmp); | |
1415 | #endif | |
1416 | } | |
1417 | ||
945ca823 BS |
1418 | static inline void tcg_gen_concat32_i64(TCGv dest, TCGv low, TCGv high) |
1419 | { | |
1420 | #if TCG_TARGET_REG_BITS == 32 | |
1421 | tcg_gen_concat_i32_i64(dest, low, high); | |
1422 | #else | |
1423 | TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
88422e2e | 1424 | tcg_gen_ext32u_i64(dest, low); |
945ca823 | 1425 | tcg_gen_shli_i64(tmp, high, 32); |
88422e2e | 1426 | tcg_gen_or_i64(dest, dest, tmp); |
945ca823 BS |
1427 | tcg_temp_free(tmp); |
1428 | #endif | |
1429 | } | |
1430 | ||
f24cb33e AJ |
1431 | static inline void tcg_gen_andc_i32(TCGv ret, TCGv arg1, TCGv arg2) |
1432 | { | |
1433 | TCGv t0; | |
1434 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1435 | tcg_gen_not_i32(t0, arg2); | |
1436 | tcg_gen_and_i32(ret, arg1, t0); | |
1437 | tcg_temp_free(t0); | |
1438 | } | |
1439 | ||
1440 | static inline void tcg_gen_andc_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1441 | { | |
1442 | TCGv t0; | |
1443 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1444 | tcg_gen_not_i64(t0, arg2); | |
1445 | tcg_gen_and_i64(ret, arg1, t0); | |
1446 | tcg_temp_free(t0); | |
1447 | } | |
1448 | ||
1449 | static inline void tcg_gen_eqv_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1450 | { | |
1451 | TCGv t0; | |
1452 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1453 | tcg_gen_xor_i32(t0, arg1, arg2); | |
1454 | tcg_gen_not_i32(ret, t0); | |
1455 | tcg_temp_free(t0); | |
1456 | } | |
1457 | ||
1458 | static inline void tcg_gen_eqv_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1459 | { | |
1460 | TCGv t0; | |
1461 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1462 | tcg_gen_xor_i64(t0, arg1, arg2); | |
1463 | tcg_gen_not_i64(ret, t0); | |
1464 | tcg_temp_free(t0); | |
1465 | } | |
1466 | ||
1467 | static inline void tcg_gen_nand_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1468 | { | |
1469 | TCGv t0; | |
1470 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1471 | tcg_gen_and_i32(t0, arg1, arg2); | |
1472 | tcg_gen_not_i32(ret, t0); | |
1473 | tcg_temp_free(t0); | |
1474 | } | |
1475 | ||
1476 | static inline void tcg_gen_nand_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1477 | { | |
1478 | TCGv t0; | |
1479 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1480 | tcg_gen_and_i64(t0, arg1, arg2); | |
1481 | tcg_gen_not_i64(ret, t0); | |
1482 | tcg_temp_free(t0); | |
1483 | } | |
1484 | ||
1485 | static inline void tcg_gen_nor_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1486 | { | |
1487 | TCGv t0; | |
1488 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1489 | tcg_gen_or_i32(t0, arg1, arg2); | |
1490 | tcg_gen_not_i32(ret, t0); | |
1491 | tcg_temp_free(t0); | |
1492 | } | |
1493 | ||
1494 | static inline void tcg_gen_nor_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1495 | { | |
1496 | TCGv t0; | |
1497 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1498 | tcg_gen_or_i64(t0, arg1, arg2); | |
1499 | tcg_gen_not_i64(ret, t0); | |
1500 | tcg_temp_free(t0); | |
1501 | } | |
1502 | ||
1503 | static inline void tcg_gen_orc_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1504 | { | |
1505 | TCGv t0; | |
1506 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1507 | tcg_gen_not_i32(t0, arg2); | |
1508 | tcg_gen_or_i32(ret, arg1, t0); | |
1509 | tcg_temp_free(t0); | |
1510 | } | |
1511 | ||
1512 | static inline void tcg_gen_orc_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1513 | { | |
1514 | TCGv t0; | |
1515 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1516 | tcg_gen_not_i64(t0, arg2); | |
1517 | tcg_gen_or_i64(ret, arg1, t0); | |
1518 | tcg_temp_free(t0); | |
1519 | } | |
1520 | ||
15824571 AJ |
1521 | static inline void tcg_gen_rotl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
1522 | { | |
1523 | TCGv t0, t1; | |
1524 | ||
1525 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1526 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1527 | tcg_gen_shl_i32(t0, arg1, arg2); | |
1528 | tcg_gen_subfi_i32(t1, 32, arg2); | |
1529 | tcg_gen_shr_i32(t1, arg1, t1); | |
1530 | tcg_gen_or_i32(ret, t0, t1); | |
1531 | tcg_temp_free(t0); | |
1532 | tcg_temp_free(t1); | |
1533 | } | |
1534 | ||
1535 | static inline void tcg_gen_rotl_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1536 | { | |
1537 | TCGv t0, t1; | |
1538 | ||
1539 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1540 | t1 = tcg_temp_new(TCG_TYPE_I64); | |
1541 | tcg_gen_shl_i64(t0, arg1, arg2); | |
1542 | tcg_gen_subfi_i64(t1, 64, arg2); | |
1543 | tcg_gen_shr_i64(t1, arg1, t1); | |
1544 | tcg_gen_or_i64(ret, t0, t1); | |
1545 | tcg_temp_free(t0); | |
1546 | tcg_temp_free(t1); | |
1547 | } | |
1548 | ||
1549 | static inline void tcg_gen_rotli_i32(TCGv ret, TCGv arg1, int32_t arg2) | |
1550 | { | |
1551 | /* some cases can be optimized here */ | |
1552 | if (arg2 == 0) { | |
1553 | tcg_gen_mov_i32(ret, arg1); | |
1554 | } else { | |
1555 | TCGv t0, t1; | |
1556 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1557 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1558 | tcg_gen_shli_i32(t0, arg1, arg2); | |
1559 | tcg_gen_shri_i32(t1, arg1, 32 - arg2); | |
1560 | tcg_gen_or_i32(ret, t0, t1); | |
1561 | tcg_temp_free(t0); | |
1562 | tcg_temp_free(t1); | |
1563 | } | |
1564 | } | |
1565 | ||
1566 | static inline void tcg_gen_rotli_i64(TCGv ret, TCGv arg1, int64_t arg2) | |
1567 | { | |
1568 | /* some cases can be optimized here */ | |
1569 | if (arg2 == 0) { | |
1570 | tcg_gen_mov_i64(ret, arg1); | |
1571 | } else { | |
1572 | TCGv t0, t1; | |
1573 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1574 | t1 = tcg_temp_new(TCG_TYPE_I64); | |
1575 | tcg_gen_shli_i64(t0, arg1, arg2); | |
1576 | tcg_gen_shri_i64(t1, arg1, 64 - arg2); | |
1577 | tcg_gen_or_i64(ret, t0, t1); | |
1578 | tcg_temp_free(t0); | |
1579 | tcg_temp_free(t1); | |
1580 | } | |
1581 | } | |
1582 | ||
1583 | static inline void tcg_gen_rotr_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1584 | { | |
1585 | TCGv t0, t1; | |
1586 | ||
1587 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1588 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1589 | tcg_gen_shr_i32(t0, arg1, arg2); | |
1590 | tcg_gen_subfi_i32(t1, 32, arg2); | |
1591 | tcg_gen_shl_i32(t1, arg1, t1); | |
1592 | tcg_gen_or_i32(ret, t0, t1); | |
1593 | tcg_temp_free(t0); | |
1594 | tcg_temp_free(t1); | |
1595 | } | |
1596 | ||
1597 | static inline void tcg_gen_rotr_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1598 | { | |
1599 | TCGv t0, t1; | |
1600 | ||
1601 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1602 | t1 = tcg_temp_new(TCG_TYPE_I64); | |
1603 | tcg_gen_shl_i64(t0, arg1, arg2); | |
1604 | tcg_gen_subfi_i64(t1, 64, arg2); | |
1605 | tcg_gen_shl_i64(t1, arg1, t1); | |
1606 | tcg_gen_or_i64(ret, t0, t1); | |
1607 | tcg_temp_free(t0); | |
1608 | tcg_temp_free(t1); | |
1609 | } | |
1610 | ||
1611 | static inline void tcg_gen_rotri_i32(TCGv ret, TCGv arg1, int32_t arg2) | |
1612 | { | |
1613 | /* some cases can be optimized here */ | |
1614 | if (arg2 == 0) { | |
1615 | tcg_gen_mov_i32(ret, arg1); | |
1616 | } else { | |
1617 | tcg_gen_rotli_i32(ret, arg1, 32 - arg2); | |
1618 | } | |
1619 | } | |
1620 | ||
1621 | static inline void tcg_gen_rotri_i64(TCGv ret, TCGv arg1, int64_t arg2) | |
1622 | { | |
1623 | /* some cases can be optimized here */ | |
1624 | if (arg2 == 0) { | |
de3526b2 | 1625 | tcg_gen_mov_i64(ret, arg1); |
15824571 AJ |
1626 | } else { |
1627 | tcg_gen_rotli_i64(ret, arg1, 64 - arg2); | |
1628 | } | |
1629 | } | |
1630 | ||
c896fe29 FB |
1631 | /***************************************/ |
1632 | /* QEMU specific operations. Their type depend on the QEMU CPU | |
1633 | type. */ | |
1634 | #ifndef TARGET_LONG_BITS | |
1635 | #error must include QEMU headers | |
1636 | #endif | |
1637 | ||
7e4597d7 FB |
1638 | /* debug info: write the PC of the corresponding QEMU CPU instruction */ |
1639 | static inline void tcg_gen_debug_insn_start(uint64_t pc) | |
1640 | { | |
1641 | /* XXX: must really use a 32 bit size for TCGArg in all cases */ | |
1642 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS | |
bcb0126f PB |
1643 | tcg_gen_op2ii(INDEX_op_debug_insn_start, |
1644 | (uint32_t)(pc), (uint32_t)(pc >> 32)); | |
7e4597d7 FB |
1645 | #else |
1646 | tcg_gen_op1i(INDEX_op_debug_insn_start, pc); | |
1647 | #endif | |
1648 | } | |
1649 | ||
c896fe29 FB |
1650 | static inline void tcg_gen_exit_tb(tcg_target_long val) |
1651 | { | |
ac56dd48 | 1652 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
c896fe29 FB |
1653 | } |
1654 | ||
1655 | static inline void tcg_gen_goto_tb(int idx) | |
1656 | { | |
ac56dd48 | 1657 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
c896fe29 FB |
1658 | } |
1659 | ||
1660 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1661 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1662 | { |
1663 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1664 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 | 1665 | #else |
ac56dd48 PB |
1666 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1667 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1668 | #endif |
1669 | } | |
1670 | ||
ac56dd48 | 1671 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1672 | { |
1673 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1674 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 | 1675 | #else |
ac56dd48 | 1676 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1677 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1678 | #endif |
1679 | } | |
1680 | ||
ac56dd48 | 1681 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1682 | { |
1683 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1684 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 | 1685 | #else |
ac56dd48 PB |
1686 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1687 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1688 | #endif |
1689 | } | |
1690 | ||
ac56dd48 | 1691 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1692 | { |
1693 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1694 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 | 1695 | #else |
ac56dd48 | 1696 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1697 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1698 | #endif |
1699 | } | |
1700 | ||
ac56dd48 | 1701 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1702 | { |
1703 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1704 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1705 | #else |
ac56dd48 PB |
1706 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1707 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1708 | #endif |
1709 | } | |
1710 | ||
ac56dd48 | 1711 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1712 | { |
1713 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1714 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1715 | #else |
ac56dd48 PB |
1716 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1717 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); | |
c896fe29 FB |
1718 | #endif |
1719 | } | |
1720 | ||
ac56dd48 | 1721 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1722 | { |
1723 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1724 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
c896fe29 | 1725 | #else |
ac56dd48 PB |
1726 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1727 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1728 | #endif |
1729 | } | |
1730 | ||
ac56dd48 | 1731 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1732 | { |
1733 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1734 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 | 1735 | #else |
ac56dd48 | 1736 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1737 | #endif |
1738 | } | |
1739 | ||
ac56dd48 | 1740 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1741 | { |
1742 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1743 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 | 1744 | #else |
ac56dd48 | 1745 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1746 | #endif |
1747 | } | |
1748 | ||
ac56dd48 | 1749 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1750 | { |
1751 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1752 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 | 1753 | #else |
ac56dd48 | 1754 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1755 | #endif |
1756 | } | |
1757 | ||
ac56dd48 | 1758 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1759 | { |
1760 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1761 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
c896fe29 | 1762 | #else |
ac56dd48 PB |
1763 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1764 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1765 | #endif |
1766 | } | |
1767 | ||
56b8f567 | 1768 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
a768e4b2 | 1769 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
f8422f52 | 1770 | |
c896fe29 FB |
1771 | #else /* TCG_TARGET_REG_BITS == 32 */ |
1772 | ||
ac56dd48 | 1773 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1774 | { |
ac56dd48 | 1775 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 FB |
1776 | } |
1777 | ||
ac56dd48 | 1778 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1779 | { |
ac56dd48 | 1780 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 FB |
1781 | } |
1782 | ||
ac56dd48 | 1783 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1784 | { |
ac56dd48 | 1785 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 FB |
1786 | } |
1787 | ||
ac56dd48 | 1788 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1789 | { |
ac56dd48 | 1790 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 FB |
1791 | } |
1792 | ||
ac56dd48 | 1793 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1794 | { |
ac56dd48 | 1795 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 FB |
1796 | } |
1797 | ||
ac56dd48 | 1798 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1799 | { |
ac56dd48 | 1800 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
c896fe29 FB |
1801 | } |
1802 | ||
ac56dd48 | 1803 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1804 | { |
ac56dd48 | 1805 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
c896fe29 FB |
1806 | } |
1807 | ||
ac56dd48 | 1808 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1809 | { |
ac56dd48 | 1810 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 FB |
1811 | } |
1812 | ||
ac56dd48 | 1813 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1814 | { |
ac56dd48 | 1815 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 FB |
1816 | } |
1817 | ||
ac56dd48 | 1818 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1819 | { |
ac56dd48 | 1820 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 FB |
1821 | } |
1822 | ||
ac56dd48 | 1823 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1824 | { |
ac56dd48 | 1825 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
c896fe29 FB |
1826 | } |
1827 | ||
56b8f567 | 1828 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
a768e4b2 | 1829 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
f8422f52 | 1830 | |
c896fe29 | 1831 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
f8422f52 BS |
1832 | |
1833 | #if TARGET_LONG_BITS == 64 | |
1834 | #define TCG_TYPE_TL TCG_TYPE_I64 | |
1835 | #define tcg_gen_movi_tl tcg_gen_movi_i64 | |
1836 | #define tcg_gen_mov_tl tcg_gen_mov_i64 | |
1837 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 | |
1838 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 | |
1839 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 | |
1840 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 | |
1841 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 | |
1842 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 | |
1843 | #define tcg_gen_ld_tl tcg_gen_ld_i64 | |
1844 | #define tcg_gen_st8_tl tcg_gen_st8_i64 | |
1845 | #define tcg_gen_st16_tl tcg_gen_st16_i64 | |
1846 | #define tcg_gen_st32_tl tcg_gen_st32_i64 | |
1847 | #define tcg_gen_st_tl tcg_gen_st_i64 | |
1848 | #define tcg_gen_add_tl tcg_gen_add_i64 | |
1849 | #define tcg_gen_addi_tl tcg_gen_addi_i64 | |
1850 | #define tcg_gen_sub_tl tcg_gen_sub_i64 | |
390efc54 | 1851 | #define tcg_gen_neg_tl tcg_gen_neg_i64 |
10460c8a | 1852 | #define tcg_gen_subfi_tl tcg_gen_subfi_i64 |
f8422f52 BS |
1853 | #define tcg_gen_subi_tl tcg_gen_subi_i64 |
1854 | #define tcg_gen_and_tl tcg_gen_and_i64 | |
1855 | #define tcg_gen_andi_tl tcg_gen_andi_i64 | |
1856 | #define tcg_gen_or_tl tcg_gen_or_i64 | |
1857 | #define tcg_gen_ori_tl tcg_gen_ori_i64 | |
1858 | #define tcg_gen_xor_tl tcg_gen_xor_i64 | |
1859 | #define tcg_gen_xori_tl tcg_gen_xori_i64 | |
0b6ce4cf | 1860 | #define tcg_gen_not_tl tcg_gen_not_i64 |
f8422f52 BS |
1861 | #define tcg_gen_shl_tl tcg_gen_shl_i64 |
1862 | #define tcg_gen_shli_tl tcg_gen_shli_i64 | |
1863 | #define tcg_gen_shr_tl tcg_gen_shr_i64 | |
1864 | #define tcg_gen_shri_tl tcg_gen_shri_i64 | |
1865 | #define tcg_gen_sar_tl tcg_gen_sar_i64 | |
1866 | #define tcg_gen_sari_tl tcg_gen_sari_i64 | |
0cf767d6 | 1867 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
cb63669a | 1868 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64 |
f730fd27 TS |
1869 | #define tcg_gen_mul_tl tcg_gen_mul_i64 |
1870 | #define tcg_gen_muli_tl tcg_gen_muli_i64 | |
a768e4b2 | 1871 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
e429073d BS |
1872 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
1873 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 | |
1874 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 | |
1875 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 | |
1876 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 | |
1877 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 | |
0b6ce4cf FB |
1878 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64 |
1879 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64 | |
1880 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64 | |
1881 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64 | |
1882 | #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 | |
1883 | #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 | |
945ca823 | 1884 | #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64 |
f24cb33e AJ |
1885 | #define tcg_gen_andc_tl tcg_gen_andc_i64 |
1886 | #define tcg_gen_eqv_tl tcg_gen_eqv_i64 | |
1887 | #define tcg_gen_nand_tl tcg_gen_nand_i64 | |
1888 | #define tcg_gen_nor_tl tcg_gen_nor_i64 | |
1889 | #define tcg_gen_orc_tl tcg_gen_orc_i64 | |
15824571 AJ |
1890 | #define tcg_gen_rotl_tl tcg_gen_rotl_i64 |
1891 | #define tcg_gen_rotli_tl tcg_gen_rotli_i64 | |
1892 | #define tcg_gen_rotr_tl tcg_gen_rotr_i64 | |
1893 | #define tcg_gen_rotri_tl tcg_gen_rotri_i64 | |
a98824ac | 1894 | #define tcg_const_tl tcg_const_i64 |
bdffd4a9 | 1895 | #define tcg_const_local_tl tcg_const_local_i64 |
f8422f52 BS |
1896 | #else |
1897 | #define TCG_TYPE_TL TCG_TYPE_I32 | |
1898 | #define tcg_gen_movi_tl tcg_gen_movi_i32 | |
1899 | #define tcg_gen_mov_tl tcg_gen_mov_i32 | |
1900 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 | |
1901 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 | |
1902 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 | |
1903 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 | |
1904 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 | |
1905 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 | |
1906 | #define tcg_gen_ld_tl tcg_gen_ld_i32 | |
1907 | #define tcg_gen_st8_tl tcg_gen_st8_i32 | |
1908 | #define tcg_gen_st16_tl tcg_gen_st16_i32 | |
1909 | #define tcg_gen_st32_tl tcg_gen_st_i32 | |
1910 | #define tcg_gen_st_tl tcg_gen_st_i32 | |
1911 | #define tcg_gen_add_tl tcg_gen_add_i32 | |
1912 | #define tcg_gen_addi_tl tcg_gen_addi_i32 | |
1913 | #define tcg_gen_sub_tl tcg_gen_sub_i32 | |
390efc54 | 1914 | #define tcg_gen_neg_tl tcg_gen_neg_i32 |
0045734a | 1915 | #define tcg_gen_subfi_tl tcg_gen_subfi_i32 |
f8422f52 BS |
1916 | #define tcg_gen_subi_tl tcg_gen_subi_i32 |
1917 | #define tcg_gen_and_tl tcg_gen_and_i32 | |
1918 | #define tcg_gen_andi_tl tcg_gen_andi_i32 | |
1919 | #define tcg_gen_or_tl tcg_gen_or_i32 | |
1920 | #define tcg_gen_ori_tl tcg_gen_ori_i32 | |
1921 | #define tcg_gen_xor_tl tcg_gen_xor_i32 | |
1922 | #define tcg_gen_xori_tl tcg_gen_xori_i32 | |
0b6ce4cf | 1923 | #define tcg_gen_not_tl tcg_gen_not_i32 |
f8422f52 BS |
1924 | #define tcg_gen_shl_tl tcg_gen_shl_i32 |
1925 | #define tcg_gen_shli_tl tcg_gen_shli_i32 | |
1926 | #define tcg_gen_shr_tl tcg_gen_shr_i32 | |
1927 | #define tcg_gen_shri_tl tcg_gen_shri_i32 | |
1928 | #define tcg_gen_sar_tl tcg_gen_sar_i32 | |
1929 | #define tcg_gen_sari_tl tcg_gen_sari_i32 | |
0cf767d6 | 1930 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
cb63669a | 1931 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32 |
f730fd27 TS |
1932 | #define tcg_gen_mul_tl tcg_gen_mul_i32 |
1933 | #define tcg_gen_muli_tl tcg_gen_muli_i32 | |
a768e4b2 | 1934 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
e429073d BS |
1935 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
1936 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 | |
1937 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 | |
1938 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 | |
1939 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 | |
1940 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 | |
0b6ce4cf FB |
1941 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32 |
1942 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32 | |
1943 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32 | |
1944 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32 | |
1945 | #define tcg_gen_ext32u_tl tcg_gen_mov_i32 | |
1946 | #define tcg_gen_ext32s_tl tcg_gen_mov_i32 | |
945ca823 | 1947 | #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64 |
f24cb33e AJ |
1948 | #define tcg_gen_andc_tl tcg_gen_andc_i32 |
1949 | #define tcg_gen_eqv_tl tcg_gen_eqv_i32 | |
1950 | #define tcg_gen_nand_tl tcg_gen_nand_i32 | |
1951 | #define tcg_gen_nor_tl tcg_gen_nor_i32 | |
1952 | #define tcg_gen_orc_tl tcg_gen_orc_i32 | |
15824571 AJ |
1953 | #define tcg_gen_rotl_tl tcg_gen_rotl_i32 |
1954 | #define tcg_gen_rotli_tl tcg_gen_rotli_i32 | |
1955 | #define tcg_gen_rotr_tl tcg_gen_rotr_i32 | |
1956 | #define tcg_gen_rotri_tl tcg_gen_rotri_i32 | |
a98824ac | 1957 | #define tcg_const_tl tcg_const_i32 |
bdffd4a9 | 1958 | #define tcg_const_local_tl tcg_const_local_i32 |
f8422f52 | 1959 | #endif |
6ddbc6e4 PB |
1960 | |
1961 | #if TCG_TARGET_REG_BITS == 32 | |
48d38ca5 | 1962 | #define tcg_gen_add_ptr tcg_gen_add_i32 |
6ddbc6e4 | 1963 | #define tcg_gen_addi_ptr tcg_gen_addi_i32 |
48d38ca5 | 1964 | #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32 |
6ddbc6e4 | 1965 | #else /* TCG_TARGET_REG_BITS == 32 */ |
48d38ca5 | 1966 | #define tcg_gen_add_ptr tcg_gen_add_i64 |
6ddbc6e4 | 1967 | #define tcg_gen_addi_ptr tcg_gen_addi_i64 |
48d38ca5 | 1968 | #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64 |
6ddbc6e4 PB |
1969 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
1970 |