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tcg: Tidy generated code for tcg_outN
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CommitLineData
c896fe29
FB
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
c896fe29
FB
25/* define it to use liveness analysis (better code) */
26#define USE_LIVENESS_ANALYSIS
8f2e8c07 27#define USE_TCG_OPTIMIZATIONS
c896fe29 28
cca82982
AJ
29#include "config.h"
30
813da627
RH
31/* Define to jump the ELF file used to communicate with GDB. */
32#undef DEBUG_JIT
33
a6c6f76c 34#if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
cca82982
AJ
35/* define it to suppress various consistency checks (faster) */
36#define NDEBUG
37#endif
38
ca10f867 39#include "qemu-common.h"
1de7afc9
PB
40#include "qemu/cache-utils.h"
41#include "qemu/host-utils.h"
42#include "qemu/timer.h"
c896fe29
FB
43
44/* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
46 instructions */
47#define NO_CPU_IO_DEFS
48#include "cpu.h"
c896fe29
FB
49
50#include "tcg-op.h"
813da627
RH
51
52#if TCG_TARGET_REG_BITS == 64
53# define ELF_CLASS ELFCLASS64
54#else
55# define ELF_CLASS ELFCLASS32
56#endif
57#ifdef HOST_WORDS_BIGENDIAN
58# define ELF_DATA ELFDATA2MSB
59#else
60# define ELF_DATA ELFDATA2LSB
61#endif
62
c896fe29
FB
63#include "elf.h"
64
c0ad3001 65/* Forward declarations for functions declared in tcg-target.c and used here. */
e4d58b41
RH
66static void tcg_target_init(TCGContext *s);
67static void tcg_target_qemu_prologue(TCGContext *s);
c896fe29 68static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 69 tcg_target_long value, tcg_target_long addend);
c896fe29 70
497a22eb
RH
71/* The CIE and FDE header definitions will be common to all hosts. */
72typedef struct {
73 uint32_t len __attribute__((aligned((sizeof(void *)))));
74 uint32_t id;
75 uint8_t version;
76 char augmentation[1];
77 uint8_t code_align;
78 uint8_t data_align;
79 uint8_t return_column;
80} DebugFrameCIE;
81
82typedef struct QEMU_PACKED {
83 uint32_t len __attribute__((aligned((sizeof(void *)))));
84 uint32_t cie_offset;
85 tcg_target_long func_start;
86 tcg_target_long func_len;
87} DebugFrameFDEHeader;
88
813da627
RH
89static void tcg_register_jit_int(void *buf, size_t size,
90 void *debug_frame, size_t debug_frame_size)
91 __attribute__((unused));
92
c0ad3001
SW
93/* Forward declarations for functions declared and used in tcg-target.c. */
94static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
2a534aff 95static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
c0ad3001 96 tcg_target_long arg2);
2a534aff 97static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
c0ad3001 98static void tcg_out_movi(TCGContext *s, TCGType type,
2a534aff 99 TCGReg ret, tcg_target_long arg);
c0ad3001
SW
100static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
101 const int *const_args);
2a534aff 102static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
c0ad3001
SW
103 tcg_target_long arg2);
104static int tcg_target_const_match(tcg_target_long val,
105 const TCGArgConstraint *arg_ct);
c0ad3001 106
8399ad59 107TCGOpDef tcg_op_defs[] = {
0e2029a0 108#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
c896fe29
FB
109#include "tcg-opc.h"
110#undef DEF
c896fe29 111};
2a24374a 112const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs);
c896fe29 113
b1d8e52e
BS
114static TCGRegSet tcg_target_available_regs[2];
115static TCGRegSet tcg_target_call_clobber_regs;
c896fe29 116
c896fe29
FB
117static inline void tcg_out8(TCGContext *s, uint8_t v)
118{
119 *s->code_ptr++ = v;
120}
121
122static inline void tcg_out16(TCGContext *s, uint16_t v)
123{
2bb8656d
RH
124 uint8_t *p = s->code_ptr;
125 *(uint16_t *)p = v;
126 s->code_ptr = p + 2;
c896fe29
FB
127}
128
129static inline void tcg_out32(TCGContext *s, uint32_t v)
130{
2bb8656d
RH
131 uint8_t *p = s->code_ptr;
132 *(uint32_t *)p = v;
133 s->code_ptr = p + 4;
c896fe29
FB
134}
135
136/* label relocation processing */
137
a5ad5916
SW
138static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
139 int label_index, long addend)
c896fe29
FB
140{
141 TCGLabel *l;
142 TCGRelocation *r;
143
144 l = &s->labels[label_index];
145 if (l->has_value) {
623e265c
PB
146 /* FIXME: This may break relocations on RISC targets that
147 modify instruction fields in place. The caller may not have
148 written the initial value. */
f54b3f92 149 patch_reloc(code_ptr, type, l->u.value, addend);
c896fe29
FB
150 } else {
151 /* add a new relocation entry */
152 r = tcg_malloc(sizeof(TCGRelocation));
153 r->type = type;
154 r->ptr = code_ptr;
155 r->addend = addend;
156 r->next = l->u.first_reloc;
157 l->u.first_reloc = r;
158 }
159}
160
9d6fca70 161static void tcg_out_label(TCGContext *s, int label_index, void *ptr)
c896fe29
FB
162{
163 TCGLabel *l;
164 TCGRelocation *r;
9d6fca70 165 tcg_target_long value = (tcg_target_long)ptr;
c896fe29
FB
166
167 l = &s->labels[label_index];
168 if (l->has_value)
169 tcg_abort();
170 r = l->u.first_reloc;
171 while (r != NULL) {
f54b3f92 172 patch_reloc(r->ptr, r->type, value, r->addend);
c896fe29
FB
173 r = r->next;
174 }
175 l->has_value = 1;
176 l->u.value = value;
177}
178
179int gen_new_label(void)
180{
181 TCGContext *s = &tcg_ctx;
182 int idx;
183 TCGLabel *l;
184
185 if (s->nb_labels >= TCG_MAX_LABELS)
186 tcg_abort();
187 idx = s->nb_labels++;
188 l = &s->labels[idx];
189 l->has_value = 0;
190 l->u.first_reloc = NULL;
191 return idx;
192}
193
194#include "tcg-target.c"
195
c896fe29
FB
196/* pool based memory allocation */
197void *tcg_malloc_internal(TCGContext *s, int size)
198{
199 TCGPool *p;
200 int pool_size;
201
202 if (size > TCG_POOL_CHUNK_SIZE) {
203 /* big malloc: insert a new pool (XXX: could optimize) */
7267c094 204 p = g_malloc(sizeof(TCGPool) + size);
c896fe29 205 p->size = size;
4055299e
KB
206 p->next = s->pool_first_large;
207 s->pool_first_large = p;
208 return p->data;
c896fe29
FB
209 } else {
210 p = s->pool_current;
211 if (!p) {
212 p = s->pool_first;
213 if (!p)
214 goto new_pool;
215 } else {
216 if (!p->next) {
217 new_pool:
218 pool_size = TCG_POOL_CHUNK_SIZE;
7267c094 219 p = g_malloc(sizeof(TCGPool) + pool_size);
c896fe29
FB
220 p->size = pool_size;
221 p->next = NULL;
222 if (s->pool_current)
223 s->pool_current->next = p;
224 else
225 s->pool_first = p;
226 } else {
227 p = p->next;
228 }
229 }
230 }
231 s->pool_current = p;
232 s->pool_cur = p->data + size;
233 s->pool_end = p->data + p->size;
234 return p->data;
235}
236
237void tcg_pool_reset(TCGContext *s)
238{
4055299e
KB
239 TCGPool *p, *t;
240 for (p = s->pool_first_large; p; p = t) {
241 t = p->next;
242 g_free(p);
243 }
244 s->pool_first_large = NULL;
c896fe29
FB
245 s->pool_cur = s->pool_end = NULL;
246 s->pool_current = NULL;
247}
248
c896fe29
FB
249void tcg_context_init(TCGContext *s)
250{
251 int op, total_args, n;
252 TCGOpDef *def;
253 TCGArgConstraint *args_ct;
254 int *sorted_args;
255
256 memset(s, 0, sizeof(*s));
c896fe29
FB
257 s->nb_globals = 0;
258
259 /* Count total number of arguments and allocate the corresponding
260 space */
261 total_args = 0;
262 for(op = 0; op < NB_OPS; op++) {
263 def = &tcg_op_defs[op];
264 n = def->nb_iargs + def->nb_oargs;
265 total_args += n;
266 }
267
7267c094
AL
268 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
269 sorted_args = g_malloc(sizeof(int) * total_args);
c896fe29
FB
270
271 for(op = 0; op < NB_OPS; op++) {
272 def = &tcg_op_defs[op];
273 def->args_ct = args_ct;
274 def->sorted_args = sorted_args;
275 n = def->nb_iargs + def->nb_oargs;
276 sorted_args += n;
277 args_ct += n;
278 }
279
280 tcg_target_init(s);
9002ec79 281}
b03cce8e 282
9002ec79
RH
283void tcg_prologue_init(TCGContext *s)
284{
b03cce8e 285 /* init global prologue and epilogue */
0b0d3320 286 s->code_buf = s->code_gen_prologue;
b03cce8e
FB
287 s->code_ptr = s->code_buf;
288 tcg_target_qemu_prologue(s);
2aeabc08
SW
289 flush_icache_range((tcg_target_ulong)s->code_buf,
290 (tcg_target_ulong)s->code_ptr);
d6b64b2b
RH
291
292#ifdef DEBUG_DISAS
293 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
294 size_t size = s->code_ptr - s->code_buf;
295 qemu_log("PROLOGUE: [size=%zu]\n", size);
296 log_disas(s->code_buf, size);
297 qemu_log("\n");
298 qemu_log_flush();
299 }
300#endif
c896fe29
FB
301}
302
303void tcg_set_frame(TCGContext *s, int reg,
304 tcg_target_long start, tcg_target_long size)
305{
306 s->frame_start = start;
307 s->frame_end = start + size;
308 s->frame_reg = reg;
309}
310
c896fe29
FB
311void tcg_func_start(TCGContext *s)
312{
e8996ee0 313 int i;
c896fe29
FB
314 tcg_pool_reset(s);
315 s->nb_temps = s->nb_globals;
641d5fbe 316 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
e8996ee0 317 s->first_free_temp[i] = -1;
c896fe29
FB
318 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
319 s->nb_labels = 0;
320 s->current_frame_offset = s->frame_start;
321
0a209d4b
RH
322#ifdef CONFIG_DEBUG_TCG
323 s->goto_tb_issue_mask = 0;
324#endif
325
92414b31 326 s->gen_opc_ptr = s->gen_opc_buf;
1ff0a2c5 327 s->gen_opparam_ptr = s->gen_opparam_buf;
b76f0d8c
YL
328
329#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
330 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
331 for TLB miss cases at the end of TB */
332 s->qemu_ldst_labels = tcg_malloc(sizeof(TCGLabelQemuLdst) *
333 TCG_MAX_QEMU_LDST);
334 s->nb_qemu_ldst_labels = 0;
335#endif
c896fe29
FB
336}
337
338static inline void tcg_temp_alloc(TCGContext *s, int n)
339{
340 if (n > TCG_MAX_TEMPS)
341 tcg_abort();
342}
343
a7812ae4
PB
344static inline int tcg_global_reg_new_internal(TCGType type, int reg,
345 const char *name)
c896fe29
FB
346{
347 TCGContext *s = &tcg_ctx;
348 TCGTemp *ts;
349 int idx;
350
351#if TCG_TARGET_REG_BITS == 32
352 if (type != TCG_TYPE_I32)
353 tcg_abort();
354#endif
355 if (tcg_regset_test_reg(s->reserved_regs, reg))
356 tcg_abort();
357 idx = s->nb_globals;
358 tcg_temp_alloc(s, s->nb_globals + 1);
359 ts = &s->temps[s->nb_globals];
360 ts->base_type = type;
361 ts->type = type;
362 ts->fixed_reg = 1;
363 ts->reg = reg;
c896fe29
FB
364 ts->name = name;
365 s->nb_globals++;
366 tcg_regset_set_reg(s->reserved_regs, reg);
a7812ae4
PB
367 return idx;
368}
369
370TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
371{
372 int idx;
373
374 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
375 return MAKE_TCGV_I32(idx);
376}
377
378TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
379{
380 int idx;
381
382 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
383 return MAKE_TCGV_I64(idx);
c896fe29
FB
384}
385
a7812ae4
PB
386static inline int tcg_global_mem_new_internal(TCGType type, int reg,
387 tcg_target_long offset,
388 const char *name)
c896fe29
FB
389{
390 TCGContext *s = &tcg_ctx;
391 TCGTemp *ts;
392 int idx;
393
394 idx = s->nb_globals;
395#if TCG_TARGET_REG_BITS == 32
396 if (type == TCG_TYPE_I64) {
397 char buf[64];
c588979b 398 tcg_temp_alloc(s, s->nb_globals + 2);
c896fe29
FB
399 ts = &s->temps[s->nb_globals];
400 ts->base_type = type;
401 ts->type = TCG_TYPE_I32;
402 ts->fixed_reg = 0;
403 ts->mem_allocated = 1;
404 ts->mem_reg = reg;
405#ifdef TCG_TARGET_WORDS_BIGENDIAN
406 ts->mem_offset = offset + 4;
407#else
408 ts->mem_offset = offset;
409#endif
c896fe29
FB
410 pstrcpy(buf, sizeof(buf), name);
411 pstrcat(buf, sizeof(buf), "_0");
412 ts->name = strdup(buf);
413 ts++;
414
415 ts->base_type = type;
416 ts->type = TCG_TYPE_I32;
417 ts->fixed_reg = 0;
418 ts->mem_allocated = 1;
419 ts->mem_reg = reg;
420#ifdef TCG_TARGET_WORDS_BIGENDIAN
421 ts->mem_offset = offset;
422#else
423 ts->mem_offset = offset + 4;
424#endif
c896fe29
FB
425 pstrcpy(buf, sizeof(buf), name);
426 pstrcat(buf, sizeof(buf), "_1");
427 ts->name = strdup(buf);
428
429 s->nb_globals += 2;
430 } else
431#endif
432 {
433 tcg_temp_alloc(s, s->nb_globals + 1);
434 ts = &s->temps[s->nb_globals];
435 ts->base_type = type;
436 ts->type = type;
437 ts->fixed_reg = 0;
438 ts->mem_allocated = 1;
439 ts->mem_reg = reg;
440 ts->mem_offset = offset;
c896fe29
FB
441 ts->name = name;
442 s->nb_globals++;
443 }
a7812ae4
PB
444 return idx;
445}
446
447TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
448 const char *name)
449{
450 int idx;
451
452 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
453 return MAKE_TCGV_I32(idx);
454}
455
456TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
457 const char *name)
458{
459 int idx;
460
461 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
462 return MAKE_TCGV_I64(idx);
c896fe29
FB
463}
464
a7812ae4 465static inline int tcg_temp_new_internal(TCGType type, int temp_local)
c896fe29
FB
466{
467 TCGContext *s = &tcg_ctx;
468 TCGTemp *ts;
641d5fbe 469 int idx, k;
c896fe29 470
641d5fbe
FB
471 k = type;
472 if (temp_local)
473 k += TCG_TYPE_COUNT;
474 idx = s->first_free_temp[k];
e8996ee0
FB
475 if (idx != -1) {
476 /* There is already an available temp with the
477 right type */
478 ts = &s->temps[idx];
641d5fbe 479 s->first_free_temp[k] = ts->next_free_temp;
e8996ee0 480 ts->temp_allocated = 1;
641d5fbe 481 assert(ts->temp_local == temp_local);
e8996ee0
FB
482 } else {
483 idx = s->nb_temps;
c896fe29 484#if TCG_TARGET_REG_BITS == 32
e8996ee0 485 if (type == TCG_TYPE_I64) {
8df1ca4b 486 tcg_temp_alloc(s, s->nb_temps + 2);
e8996ee0
FB
487 ts = &s->temps[s->nb_temps];
488 ts->base_type = type;
489 ts->type = TCG_TYPE_I32;
490 ts->temp_allocated = 1;
641d5fbe 491 ts->temp_local = temp_local;
e8996ee0
FB
492 ts->name = NULL;
493 ts++;
494 ts->base_type = TCG_TYPE_I32;
495 ts->type = TCG_TYPE_I32;
496 ts->temp_allocated = 1;
641d5fbe 497 ts->temp_local = temp_local;
e8996ee0
FB
498 ts->name = NULL;
499 s->nb_temps += 2;
500 } else
c896fe29 501#endif
e8996ee0
FB
502 {
503 tcg_temp_alloc(s, s->nb_temps + 1);
504 ts = &s->temps[s->nb_temps];
505 ts->base_type = type;
506 ts->type = type;
507 ts->temp_allocated = 1;
641d5fbe 508 ts->temp_local = temp_local;
e8996ee0
FB
509 ts->name = NULL;
510 s->nb_temps++;
511 }
c896fe29 512 }
27bfd83c
PM
513
514#if defined(CONFIG_DEBUG_TCG)
515 s->temps_in_use++;
516#endif
a7812ae4 517 return idx;
c896fe29
FB
518}
519
a7812ae4
PB
520TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
521{
522 int idx;
523
524 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
525 return MAKE_TCGV_I32(idx);
526}
527
528TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
529{
530 int idx;
531
532 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
533 return MAKE_TCGV_I64(idx);
534}
535
536static inline void tcg_temp_free_internal(int idx)
c896fe29
FB
537{
538 TCGContext *s = &tcg_ctx;
539 TCGTemp *ts;
641d5fbe 540 int k;
c896fe29 541
27bfd83c
PM
542#if defined(CONFIG_DEBUG_TCG)
543 s->temps_in_use--;
544 if (s->temps_in_use < 0) {
545 fprintf(stderr, "More temporaries freed than allocated!\n");
546 }
547#endif
548
e8996ee0 549 assert(idx >= s->nb_globals && idx < s->nb_temps);
c896fe29 550 ts = &s->temps[idx];
e8996ee0
FB
551 assert(ts->temp_allocated != 0);
552 ts->temp_allocated = 0;
641d5fbe
FB
553 k = ts->base_type;
554 if (ts->temp_local)
555 k += TCG_TYPE_COUNT;
556 ts->next_free_temp = s->first_free_temp[k];
557 s->first_free_temp[k] = idx;
c896fe29
FB
558}
559
a7812ae4
PB
560void tcg_temp_free_i32(TCGv_i32 arg)
561{
562 tcg_temp_free_internal(GET_TCGV_I32(arg));
563}
564
565void tcg_temp_free_i64(TCGv_i64 arg)
566{
567 tcg_temp_free_internal(GET_TCGV_I64(arg));
568}
e8996ee0 569
a7812ae4 570TCGv_i32 tcg_const_i32(int32_t val)
c896fe29 571{
a7812ae4
PB
572 TCGv_i32 t0;
573 t0 = tcg_temp_new_i32();
e8996ee0
FB
574 tcg_gen_movi_i32(t0, val);
575 return t0;
576}
c896fe29 577
a7812ae4 578TCGv_i64 tcg_const_i64(int64_t val)
e8996ee0 579{
a7812ae4
PB
580 TCGv_i64 t0;
581 t0 = tcg_temp_new_i64();
e8996ee0
FB
582 tcg_gen_movi_i64(t0, val);
583 return t0;
c896fe29
FB
584}
585
a7812ae4 586TCGv_i32 tcg_const_local_i32(int32_t val)
bdffd4a9 587{
a7812ae4
PB
588 TCGv_i32 t0;
589 t0 = tcg_temp_local_new_i32();
bdffd4a9
AJ
590 tcg_gen_movi_i32(t0, val);
591 return t0;
592}
593
a7812ae4 594TCGv_i64 tcg_const_local_i64(int64_t val)
bdffd4a9 595{
a7812ae4
PB
596 TCGv_i64 t0;
597 t0 = tcg_temp_local_new_i64();
bdffd4a9
AJ
598 tcg_gen_movi_i64(t0, val);
599 return t0;
600}
601
27bfd83c
PM
602#if defined(CONFIG_DEBUG_TCG)
603void tcg_clear_temp_count(void)
604{
605 TCGContext *s = &tcg_ctx;
606 s->temps_in_use = 0;
607}
608
609int tcg_check_temp_count(void)
610{
611 TCGContext *s = &tcg_ctx;
612 if (s->temps_in_use) {
613 /* Clear the count so that we don't give another
614 * warning immediately next time around.
615 */
616 s->temps_in_use = 0;
617 return 1;
618 }
619 return 0;
620}
621#endif
622
c896fe29
FB
623void tcg_register_helper(void *func, const char *name)
624{
625 TCGContext *s = &tcg_ctx;
626 int n;
627 if ((s->nb_helpers + 1) > s->allocated_helpers) {
628 n = s->allocated_helpers;
629 if (n == 0) {
630 n = 4;
631 } else {
632 n *= 2;
633 }
634 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
635 s->allocated_helpers = n;
636 }
4dc81f28 637 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
c896fe29
FB
638 s->helpers[s->nb_helpers].name = name;
639 s->nb_helpers++;
640}
641
39cf05d3
FB
642/* Note: we convert the 64 bit args to 32 bit and do some alignment
643 and endian swap. Maybe it would be better to do the alignment
644 and endian swap in tcg_reg_alloc_call(). */
a7812ae4
PB
645void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
646 int sizemask, TCGArg ret, int nargs, TCGArg *args)
c896fe29 647{
a7812ae4
PB
648 int i;
649 int real_args;
650 int nb_rets;
651 TCGArg *nparam;
2bece2c8
RH
652
653#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
654 for (i = 0; i < nargs; ++i) {
655 int is_64bit = sizemask & (1 << (i+1)*2);
656 int is_signed = sizemask & (2 << (i+1)*2);
657 if (!is_64bit) {
658 TCGv_i64 temp = tcg_temp_new_i64();
659 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
660 if (is_signed) {
661 tcg_gen_ext32s_i64(temp, orig);
662 } else {
663 tcg_gen_ext32u_i64(temp, orig);
664 }
665 args[i] = GET_TCGV_I64(temp);
666 }
667 }
668#endif /* TCG_TARGET_EXTEND_ARGS */
669
efd7f486 670 *s->gen_opc_ptr++ = INDEX_op_call;
c4afe5c4 671 nparam = s->gen_opparam_ptr++;
a7812ae4
PB
672 if (ret != TCG_CALL_DUMMY_ARG) {
673#if TCG_TARGET_REG_BITS < 64
674 if (sizemask & 1) {
39cf05d3 675#ifdef TCG_TARGET_WORDS_BIGENDIAN
c4afe5c4
EV
676 *s->gen_opparam_ptr++ = ret + 1;
677 *s->gen_opparam_ptr++ = ret;
39cf05d3 678#else
c4afe5c4
EV
679 *s->gen_opparam_ptr++ = ret;
680 *s->gen_opparam_ptr++ = ret + 1;
39cf05d3 681#endif
a7812ae4
PB
682 nb_rets = 2;
683 } else
684#endif
685 {
c4afe5c4 686 *s->gen_opparam_ptr++ = ret;
a7812ae4 687 nb_rets = 1;
c896fe29 688 }
a7812ae4
PB
689 } else {
690 nb_rets = 0;
c896fe29 691 }
a7812ae4
PB
692 real_args = 0;
693 for (i = 0; i < nargs; i++) {
694#if TCG_TARGET_REG_BITS < 64
2bece2c8
RH
695 int is_64bit = sizemask & (1 << (i+1)*2);
696 if (is_64bit) {
39cf05d3
FB
697#ifdef TCG_TARGET_CALL_ALIGN_ARGS
698 /* some targets want aligned 64 bit args */
ebd486d5 699 if (real_args & 1) {
c4afe5c4 700 *s->gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
ebd486d5 701 real_args++;
39cf05d3
FB
702 }
703#endif
3f90f252
RH
704 /* If stack grows up, then we will be placing successive
705 arguments at lower addresses, which means we need to
706 reverse the order compared to how we would normally
707 treat either big or little-endian. For those arguments
708 that will wind up in registers, this still works for
709 HPPA (the only current STACK_GROWSUP target) since the
710 argument registers are *also* allocated in decreasing
711 order. If another such target is added, this logic may
712 have to get more complicated to differentiate between
713 stack arguments and register arguments. */
714#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
c4afe5c4
EV
715 *s->gen_opparam_ptr++ = args[i] + 1;
716 *s->gen_opparam_ptr++ = args[i];
c896fe29 717#else
c4afe5c4
EV
718 *s->gen_opparam_ptr++ = args[i];
719 *s->gen_opparam_ptr++ = args[i] + 1;
c896fe29 720#endif
a7812ae4 721 real_args += 2;
2bece2c8 722 continue;
c896fe29 723 }
2bece2c8
RH
724#endif /* TCG_TARGET_REG_BITS < 64 */
725
c4afe5c4 726 *s->gen_opparam_ptr++ = args[i];
2bece2c8 727 real_args++;
c896fe29 728 }
c4afe5c4 729 *s->gen_opparam_ptr++ = GET_TCGV_PTR(func);
a7812ae4 730
c4afe5c4 731 *s->gen_opparam_ptr++ = flags;
a7812ae4
PB
732
733 *nparam = (nb_rets << 16) | (real_args + 1);
734
735 /* total parameters, needed to go backward in the instruction stream */
c4afe5c4 736 *s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
2bece2c8
RH
737
738#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
739 for (i = 0; i < nargs; ++i) {
740 int is_64bit = sizemask & (1 << (i+1)*2);
741 if (!is_64bit) {
742 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
743 tcg_temp_free_i64(temp);
744 }
745 }
746#endif /* TCG_TARGET_EXTEND_ARGS */
c896fe29 747}
c896fe29 748
ac56dd48 749#if TCG_TARGET_REG_BITS == 32
a7812ae4 750void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
c896fe29
FB
751 int c, int right, int arith)
752{
cf60bce4 753 if (c == 0) {
a7812ae4 754 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
cf60bce4
FB
755 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
756 } else if (c >= 32) {
c896fe29
FB
757 c -= 32;
758 if (right) {
759 if (arith) {
a7812ae4 760 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 761 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
c896fe29 762 } else {
a7812ae4 763 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 764 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
c896fe29
FB
765 }
766 } else {
a7812ae4
PB
767 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
768 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
c896fe29
FB
769 }
770 } else {
a7812ae4 771 TCGv_i32 t0, t1;
c896fe29 772
a7812ae4
PB
773 t0 = tcg_temp_new_i32();
774 t1 = tcg_temp_new_i32();
c896fe29 775 if (right) {
ac56dd48 776 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
c896fe29 777 if (arith)
ac56dd48 778 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4 779 else
ac56dd48 780 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4
PB
781 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
782 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
ac56dd48 783 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
c896fe29 784 } else {
a7812ae4 785 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
c896fe29 786 /* Note: ret can be the same as arg1, so we use t1 */
a7812ae4 787 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
ac56dd48
PB
788 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
789 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
a7812ae4 790 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
c896fe29 791 }
a7812ae4
PB
792 tcg_temp_free_i32(t0);
793 tcg_temp_free_i32(t1);
c896fe29
FB
794 }
795}
ac56dd48 796#endif
c896fe29 797
be210acb 798
8fcd3692 799static void tcg_reg_alloc_start(TCGContext *s)
c896fe29
FB
800{
801 int i;
802 TCGTemp *ts;
803 for(i = 0; i < s->nb_globals; i++) {
804 ts = &s->temps[i];
805 if (ts->fixed_reg) {
806 ts->val_type = TEMP_VAL_REG;
807 } else {
808 ts->val_type = TEMP_VAL_MEM;
809 }
810 }
e8996ee0
FB
811 for(i = s->nb_globals; i < s->nb_temps; i++) {
812 ts = &s->temps[i];
7dfd8c6a
AJ
813 if (ts->temp_local) {
814 ts->val_type = TEMP_VAL_MEM;
815 } else {
816 ts->val_type = TEMP_VAL_DEAD;
817 }
e8996ee0
FB
818 ts->mem_allocated = 0;
819 ts->fixed_reg = 0;
820 }
c896fe29
FB
821 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
822 s->reg_to_temp[i] = -1;
823 }
824}
825
ac56dd48
PB
826static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
827 int idx)
c896fe29
FB
828{
829 TCGTemp *ts;
ac56dd48 830
7f6f0ae5 831 assert(idx >= 0 && idx < s->nb_temps);
ac56dd48
PB
832 ts = &s->temps[idx];
833 if (idx < s->nb_globals) {
834 pstrcpy(buf, buf_size, ts->name);
c896fe29 835 } else {
641d5fbe
FB
836 if (ts->temp_local)
837 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
838 else
839 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
c896fe29
FB
840 }
841 return buf;
842}
843
a7812ae4
PB
844char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
845{
846 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
847}
848
849char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
ac56dd48 850{
a810a2de 851 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
ac56dd48
PB
852}
853
e8996ee0 854static int helper_cmp(const void *p1, const void *p2)
4dc81f28 855{
e8996ee0
FB
856 const TCGHelperInfo *th1 = p1;
857 const TCGHelperInfo *th2 = p2;
858 if (th1->func < th2->func)
859 return -1;
860 else if (th1->func == th2->func)
861 return 0;
862 else
863 return 1;
4dc81f28
FB
864}
865
e8996ee0
FB
866/* find helper definition (Note: A hash table would be better) */
867static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4dc81f28 868{
e8996ee0 869 int m, m_min, m_max;
4dc81f28 870 TCGHelperInfo *th;
e8996ee0 871 tcg_target_ulong v;
4dc81f28 872
e8996ee0
FB
873 if (unlikely(!s->helpers_sorted)) {
874 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
875 helper_cmp);
876 s->helpers_sorted = 1;
877 }
878
879 /* binary search */
880 m_min = 0;
881 m_max = s->nb_helpers - 1;
882 while (m_min <= m_max) {
883 m = (m_min + m_max) >> 1;
884 th = &s->helpers[m];
885 v = th->func;
886 if (v == val)
887 return th;
888 else if (val < v) {
889 m_max = m - 1;
890 } else {
891 m_min = m + 1;
4dc81f28
FB
892 }
893 }
e8996ee0 894 return NULL;
4dc81f28
FB
895}
896
f48f3ede
BS
897static const char * const cond_name[] =
898{
0aed257f
RH
899 [TCG_COND_NEVER] = "never",
900 [TCG_COND_ALWAYS] = "always",
f48f3ede
BS
901 [TCG_COND_EQ] = "eq",
902 [TCG_COND_NE] = "ne",
903 [TCG_COND_LT] = "lt",
904 [TCG_COND_GE] = "ge",
905 [TCG_COND_LE] = "le",
906 [TCG_COND_GT] = "gt",
907 [TCG_COND_LTU] = "ltu",
908 [TCG_COND_GEU] = "geu",
909 [TCG_COND_LEU] = "leu",
910 [TCG_COND_GTU] = "gtu"
911};
912
eeacee4d 913void tcg_dump_ops(TCGContext *s)
c896fe29
FB
914{
915 const uint16_t *opc_ptr;
916 const TCGArg *args;
917 TCGArg arg;
a9751609
RH
918 TCGOpcode c;
919 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
c896fe29
FB
920 const TCGOpDef *def;
921 char buf[128];
922
7e4597d7 923 first_insn = 1;
92414b31 924 opc_ptr = s->gen_opc_buf;
1ff0a2c5 925 args = s->gen_opparam_buf;
efd7f486 926 while (opc_ptr < s->gen_opc_ptr) {
c896fe29
FB
927 c = *opc_ptr++;
928 def = &tcg_op_defs[c];
7e4597d7
FB
929 if (c == INDEX_op_debug_insn_start) {
930 uint64_t pc;
931#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
932 pc = ((uint64_t)args[1] << 32) | args[0];
933#else
934 pc = args[0];
935#endif
eeacee4d
BS
936 if (!first_insn) {
937 qemu_log("\n");
938 }
939 qemu_log(" ---- 0x%" PRIx64, pc);
7e4597d7
FB
940 first_insn = 0;
941 nb_oargs = def->nb_oargs;
942 nb_iargs = def->nb_iargs;
943 nb_cargs = def->nb_cargs;
944 } else if (c == INDEX_op_call) {
c896fe29 945 TCGArg arg;
4dc81f28 946
c896fe29
FB
947 /* variable number of arguments */
948 arg = *args++;
949 nb_oargs = arg >> 16;
950 nb_iargs = arg & 0xffff;
951 nb_cargs = def->nb_cargs;
c896fe29 952
eeacee4d 953 qemu_log(" %s ", def->name);
7e4597d7 954
b03cce8e 955 /* function name */
eeacee4d
BS
956 qemu_log("%s",
957 tcg_get_arg_str_idx(s, buf, sizeof(buf),
958 args[nb_oargs + nb_iargs - 1]));
b03cce8e 959 /* flags */
eeacee4d 960 qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]);
b03cce8e 961 /* nb out args */
eeacee4d 962 qemu_log(",$%d", nb_oargs);
b03cce8e 963 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
964 qemu_log(",");
965 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
966 args[i]));
b03cce8e
FB
967 }
968 for(i = 0; i < (nb_iargs - 1); i++) {
eeacee4d 969 qemu_log(",");
39cf05d3 970 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
eeacee4d 971 qemu_log("<dummy>");
39cf05d3 972 } else {
eeacee4d
BS
973 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
974 args[nb_oargs + i]));
39cf05d3 975 }
b03cce8e 976 }
fba3161f 977 } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) {
e8996ee0
FB
978 tcg_target_ulong val;
979 TCGHelperInfo *th;
980
981 nb_oargs = def->nb_oargs;
982 nb_iargs = def->nb_iargs;
983 nb_cargs = def->nb_cargs;
eeacee4d
BS
984 qemu_log(" %s %s,$", def->name,
985 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
e8996ee0
FB
986 val = args[1];
987 th = tcg_find_helper(s, val);
988 if (th) {
eeacee4d 989 qemu_log("%s", th->name);
e8996ee0 990 } else {
eeacee4d
BS
991 if (c == INDEX_op_movi_i32) {
992 qemu_log("0x%x", (uint32_t)val);
993 } else {
994 qemu_log("0x%" PRIx64 , (uint64_t)val);
995 }
e8996ee0 996 }
b03cce8e 997 } else {
eeacee4d 998 qemu_log(" %s ", def->name);
b03cce8e
FB
999 if (c == INDEX_op_nopn) {
1000 /* variable number of arguments */
1001 nb_cargs = *args;
1002 nb_oargs = 0;
1003 nb_iargs = 0;
1004 } else {
1005 nb_oargs = def->nb_oargs;
1006 nb_iargs = def->nb_iargs;
1007 nb_cargs = def->nb_cargs;
1008 }
1009
1010 k = 0;
1011 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
1012 if (k != 0) {
1013 qemu_log(",");
1014 }
1015 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1016 args[k++]));
b03cce8e
FB
1017 }
1018 for(i = 0; i < nb_iargs; i++) {
eeacee4d
BS
1019 if (k != 0) {
1020 qemu_log(",");
1021 }
1022 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1023 args[k++]));
b03cce8e 1024 }
be210acb
RH
1025 switch (c) {
1026 case INDEX_op_brcond_i32:
be210acb 1027 case INDEX_op_setcond_i32:
ffc5ea09 1028 case INDEX_op_movcond_i32:
ffc5ea09 1029 case INDEX_op_brcond2_i32:
be210acb 1030 case INDEX_op_setcond2_i32:
ffc5ea09 1031 case INDEX_op_brcond_i64:
be210acb 1032 case INDEX_op_setcond_i64:
ffc5ea09 1033 case INDEX_op_movcond_i64:
eeacee4d
BS
1034 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
1035 qemu_log(",%s", cond_name[args[k++]]);
1036 } else {
1037 qemu_log(",$0x%" TCG_PRIlx, args[k++]);
1038 }
f48f3ede 1039 i = 1;
be210acb
RH
1040 break;
1041 default:
f48f3ede 1042 i = 0;
be210acb
RH
1043 break;
1044 }
f48f3ede 1045 for(; i < nb_cargs; i++) {
eeacee4d
BS
1046 if (k != 0) {
1047 qemu_log(",");
1048 }
b03cce8e 1049 arg = args[k++];
eeacee4d 1050 qemu_log("$0x%" TCG_PRIlx, arg);
b03cce8e 1051 }
c896fe29 1052 }
eeacee4d 1053 qemu_log("\n");
c896fe29
FB
1054 args += nb_iargs + nb_oargs + nb_cargs;
1055 }
1056}
1057
1058/* we give more priority to constraints with less registers */
1059static int get_constraint_priority(const TCGOpDef *def, int k)
1060{
1061 const TCGArgConstraint *arg_ct;
1062
1063 int i, n;
1064 arg_ct = &def->args_ct[k];
1065 if (arg_ct->ct & TCG_CT_ALIAS) {
1066 /* an alias is equivalent to a single register */
1067 n = 1;
1068 } else {
1069 if (!(arg_ct->ct & TCG_CT_REG))
1070 return 0;
1071 n = 0;
1072 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1073 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1074 n++;
1075 }
1076 }
1077 return TCG_TARGET_NB_REGS - n + 1;
1078}
1079
1080/* sort from highest priority to lowest */
1081static void sort_constraints(TCGOpDef *def, int start, int n)
1082{
1083 int i, j, p1, p2, tmp;
1084
1085 for(i = 0; i < n; i++)
1086 def->sorted_args[start + i] = start + i;
1087 if (n <= 1)
1088 return;
1089 for(i = 0; i < n - 1; i++) {
1090 for(j = i + 1; j < n; j++) {
1091 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1092 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1093 if (p1 < p2) {
1094 tmp = def->sorted_args[start + i];
1095 def->sorted_args[start + i] = def->sorted_args[start + j];
1096 def->sorted_args[start + j] = tmp;
1097 }
1098 }
1099 }
1100}
1101
1102void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1103{
a9751609 1104 TCGOpcode op;
c896fe29
FB
1105 TCGOpDef *def;
1106 const char *ct_str;
1107 int i, nb_args;
1108
1109 for(;;) {
a9751609 1110 if (tdefs->op == (TCGOpcode)-1)
c896fe29
FB
1111 break;
1112 op = tdefs->op;
c3b08d0e 1113 assert((unsigned)op < NB_OPS);
c896fe29 1114 def = &tcg_op_defs[op];
c68aaa18
SW
1115#if defined(CONFIG_DEBUG_TCG)
1116 /* Duplicate entry in op definitions? */
1117 assert(!def->used);
1118 def->used = 1;
1119#endif
c896fe29
FB
1120 nb_args = def->nb_iargs + def->nb_oargs;
1121 for(i = 0; i < nb_args; i++) {
1122 ct_str = tdefs->args_ct_str[i];
c68aaa18
SW
1123 /* Incomplete TCGTargetOpDef entry? */
1124 assert(ct_str != NULL);
c896fe29
FB
1125 tcg_regset_clear(def->args_ct[i].u.regs);
1126 def->args_ct[i].ct = 0;
1127 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1128 int oarg;
1129 oarg = ct_str[0] - '0';
1130 assert(oarg < def->nb_oargs);
1131 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1132 /* TCG_CT_ALIAS is for the output arguments. The input
5ff9d6a4 1133 argument is tagged with TCG_CT_IALIAS. */
c896fe29 1134 def->args_ct[i] = def->args_ct[oarg];
5ff9d6a4
FB
1135 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1136 def->args_ct[oarg].alias_index = i;
c896fe29 1137 def->args_ct[i].ct |= TCG_CT_IALIAS;
5ff9d6a4 1138 def->args_ct[i].alias_index = oarg;
c896fe29
FB
1139 } else {
1140 for(;;) {
1141 if (*ct_str == '\0')
1142 break;
1143 switch(*ct_str) {
1144 case 'i':
1145 def->args_ct[i].ct |= TCG_CT_CONST;
1146 ct_str++;
1147 break;
1148 default:
1149 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1150 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1151 ct_str, i, def->name);
1152 exit(1);
1153 }
1154 }
1155 }
1156 }
1157 }
1158
c68aaa18
SW
1159 /* TCGTargetOpDef entry with too much information? */
1160 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1161
c896fe29
FB
1162 /* sort the constraints (XXX: this is just an heuristic) */
1163 sort_constraints(def, 0, def->nb_oargs);
1164 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1165
1166#if 0
1167 {
1168 int i;
1169
1170 printf("%s: sorted=", def->name);
1171 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1172 printf(" %d", def->sorted_args[i]);
1173 printf("\n");
1174 }
1175#endif
1176 tdefs++;
1177 }
1178
c68aaa18 1179#if defined(CONFIG_DEBUG_TCG)
a9751609 1180 i = 0;
c68aaa18 1181 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
f412c762 1182 const TCGOpDef *def = &tcg_op_defs[op];
c1a61f6c 1183 if (def->flags & TCG_OPF_NOT_PRESENT) {
c68aaa18 1184 /* Wrong entry in op definitions? */
f412c762
RH
1185 if (def->used) {
1186 fprintf(stderr, "Invalid op definition for %s\n", def->name);
a9751609
RH
1187 i = 1;
1188 }
c68aaa18
SW
1189 } else {
1190 /* Missing entry in op definitions? */
f412c762
RH
1191 if (!def->used) {
1192 fprintf(stderr, "Missing op definition for %s\n", def->name);
a9751609
RH
1193 i = 1;
1194 }
c68aaa18
SW
1195 }
1196 }
a9751609
RH
1197 if (i == 1) {
1198 tcg_abort();
1199 }
c68aaa18 1200#endif
c896fe29
FB
1201}
1202
1203#ifdef USE_LIVENESS_ANALYSIS
1204
1205/* set a nop for an operation using 'nb_args' */
1206static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1207 TCGArg *args, int nb_args)
1208{
1209 if (nb_args == 0) {
1210 *opc_ptr = INDEX_op_nop;
1211 } else {
1212 *opc_ptr = INDEX_op_nopn;
1213 args[0] = nb_args;
1214 args[nb_args - 1] = nb_args;
1215 }
1216}
1217
9c43b68d
AJ
1218/* liveness analysis: end of function: all temps are dead, and globals
1219 should be in memory. */
1220static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps,
1221 uint8_t *mem_temps)
c896fe29 1222{
9c43b68d
AJ
1223 memset(dead_temps, 1, s->nb_temps);
1224 memset(mem_temps, 1, s->nb_globals);
1225 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals);
c896fe29
FB
1226}
1227
9c43b68d
AJ
1228/* liveness analysis: end of basic block: all temps are dead, globals
1229 and local temps should be in memory. */
1230static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps,
1231 uint8_t *mem_temps)
641d5fbe
FB
1232{
1233 int i;
641d5fbe 1234
9c43b68d
AJ
1235 memset(dead_temps, 1, s->nb_temps);
1236 memset(mem_temps, 1, s->nb_globals);
641d5fbe 1237 for(i = s->nb_globals; i < s->nb_temps; i++) {
9c43b68d 1238 mem_temps[i] = s->temps[i].temp_local;
641d5fbe
FB
1239 }
1240}
1241
866cb6cb 1242/* Liveness analysis : update the opc_dead_args array to tell if a
c896fe29
FB
1243 given input arguments is dead. Instructions updating dead
1244 temporaries are removed. */
8fcd3692 1245static void tcg_liveness_analysis(TCGContext *s)
c896fe29 1246{
a9751609 1247 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
f1fae40c 1248 TCGOpcode op, op_new;
c896fe29
FB
1249 TCGArg *args;
1250 const TCGOpDef *def;
9c43b68d 1251 uint8_t *dead_temps, *mem_temps;
ec7a869d
AJ
1252 uint16_t dead_args;
1253 uint8_t sync_args;
c896fe29 1254
efd7f486 1255 s->gen_opc_ptr++; /* skip end */
c896fe29 1256
92414b31 1257 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
c896fe29 1258
866cb6cb 1259 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
ec7a869d 1260 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
c896fe29
FB
1261
1262 dead_temps = tcg_malloc(s->nb_temps);
9c43b68d
AJ
1263 mem_temps = tcg_malloc(s->nb_temps);
1264 tcg_la_func_end(s, dead_temps, mem_temps);
c896fe29 1265
c4afe5c4 1266 args = s->gen_opparam_ptr;
c896fe29
FB
1267 op_index = nb_ops - 1;
1268 while (op_index >= 0) {
92414b31 1269 op = s->gen_opc_buf[op_index];
c896fe29
FB
1270 def = &tcg_op_defs[op];
1271 switch(op) {
1272 case INDEX_op_call:
c6e113f5
FB
1273 {
1274 int call_flags;
c896fe29 1275
c6e113f5
FB
1276 nb_args = args[-1];
1277 args -= nb_args;
1278 nb_iargs = args[0] & 0xffff;
1279 nb_oargs = args[0] >> 16;
1280 args++;
1281 call_flags = args[nb_oargs + nb_iargs];
1282
1283 /* pure functions can be removed if their result is not
1284 used */
78505279 1285 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) {
c6e113f5
FB
1286 for(i = 0; i < nb_oargs; i++) {
1287 arg = args[i];
9c43b68d 1288 if (!dead_temps[arg] || mem_temps[arg]) {
c6e113f5 1289 goto do_not_remove_call;
9c43b68d 1290 }
c6e113f5 1291 }
92414b31 1292 tcg_set_nop(s, s->gen_opc_buf + op_index,
c6e113f5
FB
1293 args - 1, nb_args);
1294 } else {
1295 do_not_remove_call:
c896fe29 1296
c6e113f5 1297 /* output args are dead */
6b64b624 1298 dead_args = 0;
ec7a869d 1299 sync_args = 0;
c6e113f5
FB
1300 for(i = 0; i < nb_oargs; i++) {
1301 arg = args[i];
6b64b624
AJ
1302 if (dead_temps[arg]) {
1303 dead_args |= (1 << i);
1304 }
9c43b68d
AJ
1305 if (mem_temps[arg]) {
1306 sync_args |= (1 << i);
1307 }
c6e113f5 1308 dead_temps[arg] = 1;
9c43b68d 1309 mem_temps[arg] = 0;
c6e113f5 1310 }
78505279
AJ
1311
1312 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) {
1313 /* globals should be synced to memory */
1314 memset(mem_temps, 1, s->nb_globals);
1315 }
1316 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS |
1317 TCG_CALL_NO_READ_GLOBALS))) {
9c43b68d
AJ
1318 /* globals should go back to memory */
1319 memset(dead_temps, 1, s->nb_globals);
b9c18f56
AJ
1320 }
1321
c6e113f5 1322 /* input args are live */
866cb6cb
AJ
1323 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1324 arg = args[i];
39cf05d3
FB
1325 if (arg != TCG_CALL_DUMMY_ARG) {
1326 if (dead_temps[arg]) {
866cb6cb 1327 dead_args |= (1 << i);
39cf05d3
FB
1328 }
1329 dead_temps[arg] = 0;
c6e113f5 1330 }
c6e113f5 1331 }
866cb6cb 1332 s->op_dead_args[op_index] = dead_args;
ec7a869d 1333 s->op_sync_args[op_index] = sync_args;
c896fe29 1334 }
c6e113f5 1335 args--;
c896fe29 1336 }
c896fe29 1337 break;
7e4597d7
FB
1338 case INDEX_op_debug_insn_start:
1339 args -= def->nb_args;
1340 break;
c896fe29
FB
1341 case INDEX_op_nopn:
1342 nb_args = args[-1];
1343 args -= nb_args;
1344 break;
5ff9d6a4
FB
1345 case INDEX_op_discard:
1346 args--;
1347 /* mark the temporary as dead */
1348 dead_temps[args[0]] = 1;
9c43b68d 1349 mem_temps[args[0]] = 0;
5ff9d6a4 1350 break;
c896fe29
FB
1351 case INDEX_op_end:
1352 break;
1305c451
RH
1353
1354 case INDEX_op_add2_i32:
f1fae40c
RH
1355 op_new = INDEX_op_add_i32;
1356 goto do_addsub2;
1305c451 1357 case INDEX_op_sub2_i32:
f1fae40c
RH
1358 op_new = INDEX_op_sub_i32;
1359 goto do_addsub2;
1360 case INDEX_op_add2_i64:
1361 op_new = INDEX_op_add_i64;
1362 goto do_addsub2;
1363 case INDEX_op_sub2_i64:
1364 op_new = INDEX_op_sub_i64;
1365 do_addsub2:
1305c451
RH
1366 args -= 6;
1367 nb_iargs = 4;
1368 nb_oargs = 2;
1369 /* Test if the high part of the operation is dead, but not
1370 the low part. The result can be optimized to a simple
1371 add or sub. This happens often for x86_64 guest when the
1372 cpu mode is set to 32 bit. */
3c5645fa
KB
1373 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1374 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1305c451
RH
1375 goto do_remove;
1376 }
1377 /* Create the single operation plus nop. */
f1fae40c 1378 s->gen_opc_buf[op_index] = op = op_new;
1305c451
RH
1379 args[1] = args[2];
1380 args[2] = args[4];
92414b31
EV
1381 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1382 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 3);
1305c451
RH
1383 /* Fall through and mark the single-word operation live. */
1384 nb_iargs = 2;
1385 nb_oargs = 1;
1386 }
1387 goto do_not_remove;
1388
1414968a 1389 case INDEX_op_mulu2_i32:
f1fae40c
RH
1390 case INDEX_op_muls2_i32:
1391 op_new = INDEX_op_mul_i32;
1392 goto do_mul2;
1393 case INDEX_op_mulu2_i64:
1394 case INDEX_op_muls2_i64:
1395 op_new = INDEX_op_mul_i64;
1396 do_mul2:
1414968a
RH
1397 args -= 4;
1398 nb_iargs = 2;
1399 nb_oargs = 2;
1400 /* Likewise, test for the high part of the operation dead. */
3c5645fa
KB
1401 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1402 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1414968a
RH
1403 goto do_remove;
1404 }
f1fae40c 1405 s->gen_opc_buf[op_index] = op = op_new;
1414968a
RH
1406 args[1] = args[2];
1407 args[2] = args[3];
92414b31
EV
1408 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1409 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 1);
1414968a
RH
1410 /* Fall through and mark the single-word operation live. */
1411 nb_oargs = 1;
1412 }
1413 goto do_not_remove;
1414
c896fe29 1415 default:
1305c451 1416 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
49516bc0
AJ
1417 args -= def->nb_args;
1418 nb_iargs = def->nb_iargs;
1419 nb_oargs = def->nb_oargs;
c896fe29 1420
49516bc0
AJ
1421 /* Test if the operation can be removed because all
1422 its outputs are dead. We assume that nb_oargs == 0
1423 implies side effects */
1424 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1425 for(i = 0; i < nb_oargs; i++) {
1426 arg = args[i];
9c43b68d 1427 if (!dead_temps[arg] || mem_temps[arg]) {
49516bc0 1428 goto do_not_remove;
9c43b68d 1429 }
49516bc0 1430 }
1305c451 1431 do_remove:
92414b31 1432 tcg_set_nop(s, s->gen_opc_buf + op_index, args, def->nb_args);
c896fe29 1433#ifdef CONFIG_PROFILER
49516bc0 1434 s->del_op_count++;
c896fe29 1435#endif
49516bc0
AJ
1436 } else {
1437 do_not_remove:
c896fe29 1438
49516bc0 1439 /* output args are dead */
6b64b624 1440 dead_args = 0;
ec7a869d 1441 sync_args = 0;
49516bc0
AJ
1442 for(i = 0; i < nb_oargs; i++) {
1443 arg = args[i];
6b64b624
AJ
1444 if (dead_temps[arg]) {
1445 dead_args |= (1 << i);
1446 }
9c43b68d
AJ
1447 if (mem_temps[arg]) {
1448 sync_args |= (1 << i);
1449 }
49516bc0 1450 dead_temps[arg] = 1;
9c43b68d 1451 mem_temps[arg] = 0;
49516bc0
AJ
1452 }
1453
1454 /* if end of basic block, update */
1455 if (def->flags & TCG_OPF_BB_END) {
9c43b68d 1456 tcg_la_bb_end(s, dead_temps, mem_temps);
3d5c5f87
AJ
1457 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1458 /* globals should be synced to memory */
9c43b68d 1459 memset(mem_temps, 1, s->nb_globals);
49516bc0
AJ
1460 }
1461
1462 /* input args are live */
866cb6cb
AJ
1463 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1464 arg = args[i];
49516bc0 1465 if (dead_temps[arg]) {
866cb6cb 1466 dead_args |= (1 << i);
c896fe29 1467 }
49516bc0 1468 dead_temps[arg] = 0;
c896fe29 1469 }
866cb6cb 1470 s->op_dead_args[op_index] = dead_args;
ec7a869d 1471 s->op_sync_args[op_index] = sync_args;
c896fe29
FB
1472 }
1473 break;
1474 }
1475 op_index--;
1476 }
1477
1ff0a2c5 1478 if (args != s->gen_opparam_buf) {
c896fe29 1479 tcg_abort();
1ff0a2c5 1480 }
c896fe29
FB
1481}
1482#else
1483/* dummy liveness analysis */
655feed5 1484static void tcg_liveness_analysis(TCGContext *s)
c896fe29
FB
1485{
1486 int nb_ops;
92414b31 1487 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
c896fe29 1488
866cb6cb
AJ
1489 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1490 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
ec7a869d
AJ
1491 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1492 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t));
c896fe29
FB
1493}
1494#endif
1495
1496#ifndef NDEBUG
1497static void dump_regs(TCGContext *s)
1498{
1499 TCGTemp *ts;
1500 int i;
1501 char buf[64];
1502
1503 for(i = 0; i < s->nb_temps; i++) {
1504 ts = &s->temps[i];
ac56dd48 1505 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
c896fe29
FB
1506 switch(ts->val_type) {
1507 case TEMP_VAL_REG:
1508 printf("%s", tcg_target_reg_names[ts->reg]);
1509 break;
1510 case TEMP_VAL_MEM:
1511 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1512 break;
1513 case TEMP_VAL_CONST:
1514 printf("$0x%" TCG_PRIlx, ts->val);
1515 break;
1516 case TEMP_VAL_DEAD:
1517 printf("D");
1518 break;
1519 default:
1520 printf("???");
1521 break;
1522 }
1523 printf("\n");
1524 }
1525
1526 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1527 if (s->reg_to_temp[i] >= 0) {
1528 printf("%s: %s\n",
1529 tcg_target_reg_names[i],
ac56dd48 1530 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
c896fe29
FB
1531 }
1532 }
1533}
1534
1535static void check_regs(TCGContext *s)
1536{
1537 int reg, k;
1538 TCGTemp *ts;
1539 char buf[64];
1540
1541 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1542 k = s->reg_to_temp[reg];
1543 if (k >= 0) {
1544 ts = &s->temps[k];
1545 if (ts->val_type != TEMP_VAL_REG ||
1546 ts->reg != reg) {
1547 printf("Inconsistency for register %s:\n",
1548 tcg_target_reg_names[reg]);
b03cce8e 1549 goto fail;
c896fe29
FB
1550 }
1551 }
1552 }
1553 for(k = 0; k < s->nb_temps; k++) {
1554 ts = &s->temps[k];
1555 if (ts->val_type == TEMP_VAL_REG &&
1556 !ts->fixed_reg &&
1557 s->reg_to_temp[ts->reg] != k) {
1558 printf("Inconsistency for temp %s:\n",
ac56dd48 1559 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
b03cce8e 1560 fail:
c896fe29
FB
1561 printf("reg state:\n");
1562 dump_regs(s);
1563 tcg_abort();
1564 }
1565 }
1566}
1567#endif
1568
1569static void temp_allocate_frame(TCGContext *s, int temp)
1570{
1571 TCGTemp *ts;
1572 ts = &s->temps[temp];
9b9c37c3
RH
1573#if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1574 /* Sparc64 stack is accessed with offset of 2047 */
b591dc59
BS
1575 s->current_frame_offset = (s->current_frame_offset +
1576 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1577 ~(sizeof(tcg_target_long) - 1);
f44c9960 1578#endif
b591dc59
BS
1579 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1580 s->frame_end) {
5ff9d6a4 1581 tcg_abort();
b591dc59 1582 }
c896fe29
FB
1583 ts->mem_offset = s->current_frame_offset;
1584 ts->mem_reg = s->frame_reg;
1585 ts->mem_allocated = 1;
b591dc59 1586 s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long);
c896fe29
FB
1587}
1588
7f6ceedf
AJ
1589/* sync register 'reg' by saving it to the corresponding temporary */
1590static inline void tcg_reg_sync(TCGContext *s, int reg)
1591{
1592 TCGTemp *ts;
1593 int temp;
1594
1595 temp = s->reg_to_temp[reg];
1596 ts = &s->temps[temp];
1597 assert(ts->val_type == TEMP_VAL_REG);
1598 if (!ts->mem_coherent && !ts->fixed_reg) {
1599 if (!ts->mem_allocated) {
1600 temp_allocate_frame(s, temp);
1601 }
1602 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1603 }
1604 ts->mem_coherent = 1;
1605}
1606
c896fe29
FB
1607/* free register 'reg' by spilling the corresponding temporary if necessary */
1608static void tcg_reg_free(TCGContext *s, int reg)
1609{
c896fe29
FB
1610 int temp;
1611
1612 temp = s->reg_to_temp[reg];
1613 if (temp != -1) {
7f6ceedf
AJ
1614 tcg_reg_sync(s, reg);
1615 s->temps[temp].val_type = TEMP_VAL_MEM;
c896fe29
FB
1616 s->reg_to_temp[reg] = -1;
1617 }
1618}
1619
1620/* Allocate a register belonging to reg1 & ~reg2 */
1621static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1622{
1623 int i, reg;
1624 TCGRegSet reg_ct;
1625
1626 tcg_regset_andnot(reg_ct, reg1, reg2);
1627
1628 /* first try free registers */
0954d0d9 1629 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1630 reg = tcg_target_reg_alloc_order[i];
1631 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1632 return reg;
1633 }
1634
1635 /* XXX: do better spill choice */
0954d0d9 1636 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1637 reg = tcg_target_reg_alloc_order[i];
1638 if (tcg_regset_test_reg(reg_ct, reg)) {
1639 tcg_reg_free(s, reg);
1640 return reg;
1641 }
1642 }
1643
1644 tcg_abort();
1645}
1646
639368dd
AJ
1647/* mark a temporary as dead. */
1648static inline void temp_dead(TCGContext *s, int temp)
1649{
1650 TCGTemp *ts;
1651
1652 ts = &s->temps[temp];
1653 if (!ts->fixed_reg) {
1654 if (ts->val_type == TEMP_VAL_REG) {
1655 s->reg_to_temp[ts->reg] = -1;
1656 }
e5138db5 1657 if (temp < s->nb_globals || ts->temp_local) {
639368dd
AJ
1658 ts->val_type = TEMP_VAL_MEM;
1659 } else {
1660 ts->val_type = TEMP_VAL_DEAD;
1661 }
1662 }
1663}
1664
1ad80729 1665/* sync a temporary to memory. 'allocated_regs' is used in case a
641d5fbe 1666 temporary registers needs to be allocated to store a constant. */
1ad80729 1667static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs)
641d5fbe
FB
1668{
1669 TCGTemp *ts;
641d5fbe
FB
1670
1671 ts = &s->temps[temp];
1672 if (!ts->fixed_reg) {
1673 switch(ts->val_type) {
1ad80729
AJ
1674 case TEMP_VAL_CONST:
1675 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1676 allocated_regs);
1677 ts->val_type = TEMP_VAL_REG;
1678 s->reg_to_temp[ts->reg] = temp;
1679 ts->mem_coherent = 0;
1680 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1681 /* fallthrough*/
641d5fbe 1682 case TEMP_VAL_REG:
1ad80729 1683 tcg_reg_sync(s, ts->reg);
641d5fbe
FB
1684 break;
1685 case TEMP_VAL_DEAD:
641d5fbe
FB
1686 case TEMP_VAL_MEM:
1687 break;
1688 default:
1689 tcg_abort();
1690 }
1691 }
1692}
1693
1ad80729
AJ
1694/* save a temporary to memory. 'allocated_regs' is used in case a
1695 temporary registers needs to be allocated to store a constant. */
1696static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1697{
2c0366f0
AJ
1698#ifdef USE_LIVENESS_ANALYSIS
1699 /* The liveness analysis already ensures that globals are back
1700 in memory. Keep an assert for safety. */
1701 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg);
1702#else
1ad80729
AJ
1703 temp_sync(s, temp, allocated_regs);
1704 temp_dead(s, temp);
2c0366f0 1705#endif
1ad80729
AJ
1706}
1707
9814dd27 1708/* save globals to their canonical location and assume they can be
e8996ee0
FB
1709 modified be the following code. 'allocated_regs' is used in case a
1710 temporary registers needs to be allocated to store a constant. */
1711static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
c896fe29 1712{
641d5fbe 1713 int i;
c896fe29
FB
1714
1715 for(i = 0; i < s->nb_globals; i++) {
641d5fbe 1716 temp_save(s, i, allocated_regs);
c896fe29 1717 }
e5097dc8
FB
1718}
1719
3d5c5f87
AJ
1720/* sync globals to their canonical location and assume they can be
1721 read by the following code. 'allocated_regs' is used in case a
1722 temporary registers needs to be allocated to store a constant. */
1723static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
1724{
1725 int i;
1726
1727 for (i = 0; i < s->nb_globals; i++) {
1728#ifdef USE_LIVENESS_ANALYSIS
1729 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg ||
1730 s->temps[i].mem_coherent);
1731#else
1732 temp_sync(s, i, allocated_regs);
1733#endif
1734 }
1735}
1736
e5097dc8 1737/* at the end of a basic block, we assume all temporaries are dead and
e8996ee0
FB
1738 all globals are stored at their canonical location. */
1739static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
e5097dc8
FB
1740{
1741 TCGTemp *ts;
1742 int i;
1743
c896fe29
FB
1744 for(i = s->nb_globals; i < s->nb_temps; i++) {
1745 ts = &s->temps[i];
641d5fbe
FB
1746 if (ts->temp_local) {
1747 temp_save(s, i, allocated_regs);
1748 } else {
2c0366f0
AJ
1749#ifdef USE_LIVENESS_ANALYSIS
1750 /* The liveness analysis already ensures that temps are dead.
1751 Keep an assert for safety. */
1752 assert(ts->val_type == TEMP_VAL_DEAD);
1753#else
639368dd 1754 temp_dead(s, i);
2c0366f0 1755#endif
c896fe29
FB
1756 }
1757 }
e8996ee0
FB
1758
1759 save_globals(s, allocated_regs);
c896fe29
FB
1760}
1761
866cb6cb 1762#define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
ec7a869d 1763#define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
c896fe29 1764
ec7a869d
AJ
1765static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
1766 uint16_t dead_args, uint8_t sync_args)
e8996ee0
FB
1767{
1768 TCGTemp *ots;
1769 tcg_target_ulong val;
1770
1771 ots = &s->temps[args[0]];
1772 val = args[1];
1773
1774 if (ots->fixed_reg) {
1775 /* for fixed registers, we do not do any constant
1776 propagation */
1777 tcg_out_movi(s, ots->type, ots->reg, val);
1778 } else {
1235fc06 1779 /* The movi is not explicitly generated here */
e8996ee0
FB
1780 if (ots->val_type == TEMP_VAL_REG)
1781 s->reg_to_temp[ots->reg] = -1;
1782 ots->val_type = TEMP_VAL_CONST;
1783 ots->val = val;
1784 }
ec7a869d
AJ
1785 if (NEED_SYNC_ARG(0)) {
1786 temp_sync(s, args[0], s->reserved_regs);
1787 }
4c4e1ab2
AJ
1788 if (IS_DEAD_ARG(0)) {
1789 temp_dead(s, args[0]);
1790 }
e8996ee0
FB
1791}
1792
c896fe29 1793static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
ec7a869d
AJ
1794 const TCGArg *args, uint16_t dead_args,
1795 uint8_t sync_args)
c896fe29 1796{
c29c1d7e 1797 TCGRegSet allocated_regs;
c896fe29 1798 TCGTemp *ts, *ots;
c29c1d7e 1799 const TCGArgConstraint *arg_ct, *oarg_ct;
c896fe29 1800
c29c1d7e 1801 tcg_regset_set(allocated_regs, s->reserved_regs);
c896fe29
FB
1802 ots = &s->temps[args[0]];
1803 ts = &s->temps[args[1]];
c29c1d7e
AJ
1804 oarg_ct = &def->args_ct[0];
1805 arg_ct = &def->args_ct[1];
1806
1807 /* If the source value is not in a register, and we're going to be
1808 forced to have it in a register in order to perform the copy,
1809 then copy the SOURCE value into its own register first. That way
1810 we don't have to reload SOURCE the next time it is used. */
1811 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG)
1812 || ts->val_type == TEMP_VAL_MEM) {
1813 ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1814 if (ts->val_type == TEMP_VAL_MEM) {
1815 tcg_out_ld(s, ts->type, ts->reg, ts->mem_reg, ts->mem_offset);
1816 ts->mem_coherent = 1;
1817 } else if (ts->val_type == TEMP_VAL_CONST) {
1818 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1819 }
1820 s->reg_to_temp[ts->reg] = args[1];
1821 ts->val_type = TEMP_VAL_REG;
1822 }
c896fe29 1823
c29c1d7e
AJ
1824 if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
1825 /* mov to a non-saved dead register makes no sense (even with
1826 liveness analysis disabled). */
1827 assert(NEED_SYNC_ARG(0));
1828 /* The code above should have moved the temp to a register. */
1829 assert(ts->val_type == TEMP_VAL_REG);
1830 if (!ots->mem_allocated) {
1831 temp_allocate_frame(s, args[0]);
1832 }
1833 tcg_out_st(s, ots->type, ts->reg, ots->mem_reg, ots->mem_offset);
1834 if (IS_DEAD_ARG(1)) {
1835 temp_dead(s, args[1]);
1836 }
1837 temp_dead(s, args[0]);
1838 } else if (ts->val_type == TEMP_VAL_CONST) {
1839 /* propagate constant */
1840 if (ots->val_type == TEMP_VAL_REG) {
1841 s->reg_to_temp[ots->reg] = -1;
1842 }
1843 ots->val_type = TEMP_VAL_CONST;
1844 ots->val = ts->val;
1845 } else {
1846 /* The code in the first if block should have moved the
1847 temp to a register. */
1848 assert(ts->val_type == TEMP_VAL_REG);
866cb6cb 1849 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
c896fe29 1850 /* the mov can be suppressed */
c29c1d7e 1851 if (ots->val_type == TEMP_VAL_REG) {
c896fe29 1852 s->reg_to_temp[ots->reg] = -1;
c29c1d7e
AJ
1853 }
1854 ots->reg = ts->reg;
639368dd 1855 temp_dead(s, args[1]);
c896fe29 1856 } else {
c29c1d7e
AJ
1857 if (ots->val_type != TEMP_VAL_REG) {
1858 /* When allocating a new register, make sure to not spill the
1859 input one. */
1860 tcg_regset_set_reg(allocated_regs, ts->reg);
1861 ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs);
c896fe29 1862 }
c29c1d7e 1863 tcg_out_mov(s, ots->type, ots->reg, ts->reg);
c896fe29 1864 }
c29c1d7e
AJ
1865 ots->val_type = TEMP_VAL_REG;
1866 ots->mem_coherent = 0;
1867 s->reg_to_temp[ots->reg] = args[0];
1868 if (NEED_SYNC_ARG(0)) {
1869 tcg_reg_sync(s, ots->reg);
c896fe29 1870 }
ec7a869d 1871 }
c896fe29
FB
1872}
1873
1874static void tcg_reg_alloc_op(TCGContext *s,
a9751609 1875 const TCGOpDef *def, TCGOpcode opc,
ec7a869d
AJ
1876 const TCGArg *args, uint16_t dead_args,
1877 uint8_t sync_args)
c896fe29
FB
1878{
1879 TCGRegSet allocated_regs;
1880 int i, k, nb_iargs, nb_oargs, reg;
1881 TCGArg arg;
1882 const TCGArgConstraint *arg_ct;
1883 TCGTemp *ts;
1884 TCGArg new_args[TCG_MAX_OP_ARGS];
1885 int const_args[TCG_MAX_OP_ARGS];
1886
1887 nb_oargs = def->nb_oargs;
1888 nb_iargs = def->nb_iargs;
1889
1890 /* copy constants */
1891 memcpy(new_args + nb_oargs + nb_iargs,
1892 args + nb_oargs + nb_iargs,
1893 sizeof(TCGArg) * def->nb_cargs);
1894
1895 /* satisfy input constraints */
1896 tcg_regset_set(allocated_regs, s->reserved_regs);
1897 for(k = 0; k < nb_iargs; k++) {
1898 i = def->sorted_args[nb_oargs + k];
1899 arg = args[i];
1900 arg_ct = &def->args_ct[i];
1901 ts = &s->temps[arg];
1902 if (ts->val_type == TEMP_VAL_MEM) {
1903 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1904 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB
1905 ts->val_type = TEMP_VAL_REG;
1906 ts->reg = reg;
1907 ts->mem_coherent = 1;
1908 s->reg_to_temp[reg] = arg;
1909 } else if (ts->val_type == TEMP_VAL_CONST) {
1910 if (tcg_target_const_match(ts->val, arg_ct)) {
1911 /* constant is OK for instruction */
1912 const_args[i] = 1;
1913 new_args[i] = ts->val;
1914 goto iarg_end;
1915 } else {
e8996ee0 1916 /* need to move to a register */
c896fe29
FB
1917 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1918 tcg_out_movi(s, ts->type, reg, ts->val);
e8996ee0
FB
1919 ts->val_type = TEMP_VAL_REG;
1920 ts->reg = reg;
1921 ts->mem_coherent = 0;
1922 s->reg_to_temp[reg] = arg;
c896fe29
FB
1923 }
1924 }
1925 assert(ts->val_type == TEMP_VAL_REG);
5ff9d6a4
FB
1926 if (arg_ct->ct & TCG_CT_IALIAS) {
1927 if (ts->fixed_reg) {
1928 /* if fixed register, we must allocate a new register
1929 if the alias is not the same register */
1930 if (arg != args[arg_ct->alias_index])
1931 goto allocate_in_reg;
1932 } else {
1933 /* if the input is aliased to an output and if it is
1934 not dead after the instruction, we must allocate
1935 a new register and move it */
866cb6cb 1936 if (!IS_DEAD_ARG(i)) {
5ff9d6a4 1937 goto allocate_in_reg;
866cb6cb 1938 }
5ff9d6a4 1939 }
c896fe29
FB
1940 }
1941 reg = ts->reg;
1942 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1943 /* nothing to do : the constraint is satisfied */
1944 } else {
1945 allocate_in_reg:
1946 /* allocate a new register matching the constraint
1947 and move the temporary register into it */
1948 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 1949 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29 1950 }
c896fe29
FB
1951 new_args[i] = reg;
1952 const_args[i] = 0;
1953 tcg_regset_set_reg(allocated_regs, reg);
1954 iarg_end: ;
1955 }
1956
a52ad07e
AJ
1957 /* mark dead temporaries and free the associated registers */
1958 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1959 if (IS_DEAD_ARG(i)) {
1960 temp_dead(s, args[i]);
1961 }
1962 }
1963
e8996ee0
FB
1964 if (def->flags & TCG_OPF_BB_END) {
1965 tcg_reg_alloc_bb_end(s, allocated_regs);
1966 } else {
e8996ee0
FB
1967 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1968 /* XXX: permit generic clobber register list ? */
1969 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1970 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1971 tcg_reg_free(s, reg);
1972 }
c896fe29 1973 }
3d5c5f87
AJ
1974 }
1975 if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1976 /* sync globals if the op has side effects and might trigger
1977 an exception. */
1978 sync_globals(s, allocated_regs);
c896fe29 1979 }
e8996ee0
FB
1980
1981 /* satisfy the output constraints */
1982 tcg_regset_set(allocated_regs, s->reserved_regs);
1983 for(k = 0; k < nb_oargs; k++) {
1984 i = def->sorted_args[k];
1985 arg = args[i];
1986 arg_ct = &def->args_ct[i];
1987 ts = &s->temps[arg];
1988 if (arg_ct->ct & TCG_CT_ALIAS) {
1989 reg = new_args[arg_ct->alias_index];
1990 } else {
1991 /* if fixed register, we try to use it */
1992 reg = ts->reg;
1993 if (ts->fixed_reg &&
1994 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1995 goto oarg_end;
1996 }
1997 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
c896fe29 1998 }
e8996ee0
FB
1999 tcg_regset_set_reg(allocated_regs, reg);
2000 /* if a fixed register is used, then a move will be done afterwards */
2001 if (!ts->fixed_reg) {
ec7a869d
AJ
2002 if (ts->val_type == TEMP_VAL_REG) {
2003 s->reg_to_temp[ts->reg] = -1;
2004 }
2005 ts->val_type = TEMP_VAL_REG;
2006 ts->reg = reg;
2007 /* temp value is modified, so the value kept in memory is
2008 potentially not the same */
2009 ts->mem_coherent = 0;
2010 s->reg_to_temp[reg] = arg;
e8996ee0
FB
2011 }
2012 oarg_end:
2013 new_args[i] = reg;
c896fe29 2014 }
c896fe29
FB
2015 }
2016
c896fe29
FB
2017 /* emit instruction */
2018 tcg_out_op(s, opc, new_args, const_args);
2019
2020 /* move the outputs in the correct register if needed */
2021 for(i = 0; i < nb_oargs; i++) {
2022 ts = &s->temps[args[i]];
2023 reg = new_args[i];
2024 if (ts->fixed_reg && ts->reg != reg) {
3b6dac34 2025 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29 2026 }
ec7a869d
AJ
2027 if (NEED_SYNC_ARG(i)) {
2028 tcg_reg_sync(s, reg);
2029 }
2030 if (IS_DEAD_ARG(i)) {
2031 temp_dead(s, args[i]);
2032 }
c896fe29
FB
2033 }
2034}
2035
b03cce8e
FB
2036#ifdef TCG_TARGET_STACK_GROWSUP
2037#define STACK_DIR(x) (-(x))
2038#else
2039#define STACK_DIR(x) (x)
2040#endif
2041
c896fe29 2042static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
a9751609 2043 TCGOpcode opc, const TCGArg *args,
ec7a869d 2044 uint16_t dead_args, uint8_t sync_args)
c896fe29
FB
2045{
2046 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
2047 TCGArg arg, func_arg;
2048 TCGTemp *ts;
f54b3f92 2049 tcg_target_long stack_offset, call_stack_size, func_addr;
b03cce8e 2050 int const_func_arg, allocate_args;
c896fe29
FB
2051 TCGRegSet allocated_regs;
2052 const TCGArgConstraint *arg_ct;
2053
2054 arg = *args++;
2055
2056 nb_oargs = arg >> 16;
2057 nb_iargs = arg & 0xffff;
2058 nb_params = nb_iargs - 1;
2059
2060 flags = args[nb_oargs + nb_iargs];
2061
6e17d0c5 2062 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
c896fe29
FB
2063 if (nb_regs > nb_params)
2064 nb_regs = nb_params;
2065
2066 /* assign stack slots first */
c896fe29
FB
2067 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
2068 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
2069 ~(TCG_TARGET_STACK_ALIGN - 1);
b03cce8e
FB
2070 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
2071 if (allocate_args) {
345649c0
BS
2072 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2073 preallocate call stack */
2074 tcg_abort();
b03cce8e 2075 }
39cf05d3
FB
2076
2077 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
c896fe29
FB
2078 for(i = nb_regs; i < nb_params; i++) {
2079 arg = args[nb_oargs + i];
39cf05d3
FB
2080#ifdef TCG_TARGET_STACK_GROWSUP
2081 stack_offset -= sizeof(tcg_target_long);
2082#endif
2083 if (arg != TCG_CALL_DUMMY_ARG) {
2084 ts = &s->temps[arg];
2085 if (ts->val_type == TEMP_VAL_REG) {
2086 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
2087 } else if (ts->val_type == TEMP_VAL_MEM) {
2088 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2089 s->reserved_regs);
2090 /* XXX: not correct if reading values from the stack */
2091 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2092 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2093 } else if (ts->val_type == TEMP_VAL_CONST) {
2094 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2095 s->reserved_regs);
2096 /* XXX: sign extend may be needed on some targets */
2097 tcg_out_movi(s, ts->type, reg, ts->val);
2098 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2099 } else {
2100 tcg_abort();
2101 }
c896fe29 2102 }
39cf05d3
FB
2103#ifndef TCG_TARGET_STACK_GROWSUP
2104 stack_offset += sizeof(tcg_target_long);
2105#endif
c896fe29
FB
2106 }
2107
2108 /* assign input registers */
2109 tcg_regset_set(allocated_regs, s->reserved_regs);
2110 for(i = 0; i < nb_regs; i++) {
2111 arg = args[nb_oargs + i];
39cf05d3
FB
2112 if (arg != TCG_CALL_DUMMY_ARG) {
2113 ts = &s->temps[arg];
2114 reg = tcg_target_call_iarg_regs[i];
2115 tcg_reg_free(s, reg);
2116 if (ts->val_type == TEMP_VAL_REG) {
2117 if (ts->reg != reg) {
3b6dac34 2118 tcg_out_mov(s, ts->type, reg, ts->reg);
39cf05d3
FB
2119 }
2120 } else if (ts->val_type == TEMP_VAL_MEM) {
2121 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2122 } else if (ts->val_type == TEMP_VAL_CONST) {
2123 /* XXX: sign extend ? */
2124 tcg_out_movi(s, ts->type, reg, ts->val);
2125 } else {
2126 tcg_abort();
c896fe29 2127 }
39cf05d3 2128 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2129 }
c896fe29
FB
2130 }
2131
2132 /* assign function address */
2133 func_arg = args[nb_oargs + nb_iargs - 1];
2134 arg_ct = &def->args_ct[0];
2135 ts = &s->temps[func_arg];
f54b3f92 2136 func_addr = ts->val;
c896fe29
FB
2137 const_func_arg = 0;
2138 if (ts->val_type == TEMP_VAL_MEM) {
2139 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 2140 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 2141 func_arg = reg;
e8996ee0 2142 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2143 } else if (ts->val_type == TEMP_VAL_REG) {
2144 reg = ts->reg;
2145 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2146 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 2147 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29
FB
2148 }
2149 func_arg = reg;
e8996ee0 2150 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2151 } else if (ts->val_type == TEMP_VAL_CONST) {
f54b3f92 2152 if (tcg_target_const_match(func_addr, arg_ct)) {
c896fe29 2153 const_func_arg = 1;
f54b3f92 2154 func_arg = func_addr;
c896fe29
FB
2155 } else {
2156 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
f54b3f92 2157 tcg_out_movi(s, ts->type, reg, func_addr);
c896fe29 2158 func_arg = reg;
e8996ee0 2159 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2160 }
2161 } else {
2162 tcg_abort();
2163 }
e8996ee0 2164
c896fe29
FB
2165
2166 /* mark dead temporaries and free the associated registers */
866cb6cb 2167 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
866cb6cb 2168 if (IS_DEAD_ARG(i)) {
639368dd 2169 temp_dead(s, args[i]);
c896fe29
FB
2170 }
2171 }
2172
2173 /* clobber call registers */
2174 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2175 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2176 tcg_reg_free(s, reg);
2177 }
2178 }
78505279
AJ
2179
2180 /* Save globals if they might be written by the helper, sync them if
2181 they might be read. */
2182 if (flags & TCG_CALL_NO_READ_GLOBALS) {
2183 /* Nothing to do */
2184 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) {
2185 sync_globals(s, allocated_regs);
2186 } else {
b9c18f56
AJ
2187 save_globals(s, allocated_regs);
2188 }
c896fe29
FB
2189
2190 tcg_out_op(s, opc, &func_arg, &const_func_arg);
c896fe29
FB
2191
2192 /* assign output registers and emit moves if needed */
2193 for(i = 0; i < nb_oargs; i++) {
2194 arg = args[i];
2195 ts = &s->temps[arg];
2196 reg = tcg_target_call_oarg_regs[i];
e8996ee0 2197 assert(s->reg_to_temp[reg] == -1);
c896fe29
FB
2198 if (ts->fixed_reg) {
2199 if (ts->reg != reg) {
3b6dac34 2200 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29
FB
2201 }
2202 } else {
ec7a869d
AJ
2203 if (ts->val_type == TEMP_VAL_REG) {
2204 s->reg_to_temp[ts->reg] = -1;
2205 }
2206 ts->val_type = TEMP_VAL_REG;
2207 ts->reg = reg;
2208 ts->mem_coherent = 0;
2209 s->reg_to_temp[reg] = arg;
2210 if (NEED_SYNC_ARG(i)) {
2211 tcg_reg_sync(s, reg);
2212 }
8c11ad25 2213 if (IS_DEAD_ARG(i)) {
639368dd 2214 temp_dead(s, args[i]);
8c11ad25 2215 }
c896fe29
FB
2216 }
2217 }
2218
2219 return nb_iargs + nb_oargs + def->nb_cargs + 1;
2220}
2221
2222#ifdef CONFIG_PROFILER
2223
54604f74 2224static int64_t tcg_table_op_count[NB_OPS];
c896fe29 2225
871e6c35 2226static void dump_op_count(void)
c896fe29
FB
2227{
2228 int i;
2229 FILE *f;
54604f74 2230 f = fopen("/tmp/op.log", "w");
c896fe29 2231 for(i = INDEX_op_end; i < NB_OPS; i++) {
54604f74 2232 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
c896fe29
FB
2233 }
2234 fclose(f);
2235}
2236#endif
2237
2238
2239static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2ba1eeb6 2240 long search_pc)
c896fe29 2241{
a9751609
RH
2242 TCGOpcode opc;
2243 int op_index;
c896fe29 2244 const TCGOpDef *def;
c896fe29
FB
2245 const TCGArg *args;
2246
2247#ifdef DEBUG_DISAS
8fec2b8c 2248 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
93fcfe39 2249 qemu_log("OP:\n");
eeacee4d 2250 tcg_dump_ops(s);
93fcfe39 2251 qemu_log("\n");
c896fe29
FB
2252 }
2253#endif
2254
c5cc28ff
AJ
2255#ifdef CONFIG_PROFILER
2256 s->opt_time -= profile_getclock();
2257#endif
2258
8f2e8c07 2259#ifdef USE_TCG_OPTIMIZATIONS
c4afe5c4 2260 s->gen_opparam_ptr =
1ff0a2c5 2261 tcg_optimize(s, s->gen_opc_ptr, s->gen_opparam_buf, tcg_op_defs);
8f2e8c07
KB
2262#endif
2263
a23a9ec6 2264#ifdef CONFIG_PROFILER
c5cc28ff 2265 s->opt_time += profile_getclock();
a23a9ec6
FB
2266 s->la_time -= profile_getclock();
2267#endif
c5cc28ff 2268
c896fe29 2269 tcg_liveness_analysis(s);
c5cc28ff 2270
a23a9ec6
FB
2271#ifdef CONFIG_PROFILER
2272 s->la_time += profile_getclock();
2273#endif
c896fe29
FB
2274
2275#ifdef DEBUG_DISAS
8fec2b8c 2276 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
c5cc28ff 2277 qemu_log("OP after optimization and liveness analysis:\n");
eeacee4d 2278 tcg_dump_ops(s);
93fcfe39 2279 qemu_log("\n");
c896fe29
FB
2280 }
2281#endif
2282
2283 tcg_reg_alloc_start(s);
2284
2285 s->code_buf = gen_code_buf;
2286 s->code_ptr = gen_code_buf;
2287
1ff0a2c5 2288 args = s->gen_opparam_buf;
c896fe29 2289 op_index = 0;
b3db8758 2290
c896fe29 2291 for(;;) {
92414b31 2292 opc = s->gen_opc_buf[op_index];
c896fe29 2293#ifdef CONFIG_PROFILER
54604f74 2294 tcg_table_op_count[opc]++;
c896fe29
FB
2295#endif
2296 def = &tcg_op_defs[opc];
2297#if 0
2298 printf("%s: %d %d %d\n", def->name,
2299 def->nb_oargs, def->nb_iargs, def->nb_cargs);
2300 // dump_regs(s);
2301#endif
2302 switch(opc) {
2303 case INDEX_op_mov_i32:
c896fe29 2304 case INDEX_op_mov_i64:
ec7a869d
AJ
2305 tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index],
2306 s->op_sync_args[op_index]);
c896fe29 2307 break;
e8996ee0 2308 case INDEX_op_movi_i32:
e8996ee0 2309 case INDEX_op_movi_i64:
ec7a869d
AJ
2310 tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index],
2311 s->op_sync_args[op_index]);
e8996ee0 2312 break;
7e4597d7
FB
2313 case INDEX_op_debug_insn_start:
2314 /* debug instruction */
2315 break;
c896fe29
FB
2316 case INDEX_op_nop:
2317 case INDEX_op_nop1:
2318 case INDEX_op_nop2:
2319 case INDEX_op_nop3:
2320 break;
2321 case INDEX_op_nopn:
2322 args += args[0];
2323 goto next;
5ff9d6a4 2324 case INDEX_op_discard:
639368dd 2325 temp_dead(s, args[0]);
5ff9d6a4 2326 break;
c896fe29 2327 case INDEX_op_set_label:
e8996ee0 2328 tcg_reg_alloc_bb_end(s, s->reserved_regs);
9d6fca70 2329 tcg_out_label(s, args[0], s->code_ptr);
c896fe29
FB
2330 break;
2331 case INDEX_op_call:
ec7a869d
AJ
2332 args += tcg_reg_alloc_call(s, def, opc, args,
2333 s->op_dead_args[op_index],
2334 s->op_sync_args[op_index]);
c896fe29
FB
2335 goto next;
2336 case INDEX_op_end:
2337 goto the_end;
c896fe29 2338 default:
25c4d9cc
RH
2339 /* Sanity check that we've not introduced any unhandled opcodes. */
2340 if (def->flags & TCG_OPF_NOT_PRESENT) {
2341 tcg_abort();
2342 }
c896fe29
FB
2343 /* Note: in order to speed up the code, it would be much
2344 faster to have specialized register allocator functions for
2345 some common argument patterns */
ec7a869d
AJ
2346 tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index],
2347 s->op_sync_args[op_index]);
c896fe29
FB
2348 break;
2349 }
2350 args += def->nb_args;
8df1ca4b 2351 next:
2ba1eeb6 2352 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
b314f270 2353 return op_index;
c896fe29
FB
2354 }
2355 op_index++;
2356#ifndef NDEBUG
2357 check_regs(s);
2358#endif
2359 }
2360 the_end:
b76f0d8c
YL
2361#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2362 /* Generate TB finalization at the end of block */
2363 tcg_out_tb_finalize(s);
2364#endif
c896fe29
FB
2365 return -1;
2366}
2367
54604f74 2368int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
c896fe29
FB
2369{
2370#ifdef CONFIG_PROFILER
2371 {
c896fe29 2372 int n;
92414b31 2373 n = (s->gen_opc_ptr - s->gen_opc_buf);
a23a9ec6
FB
2374 s->op_count += n;
2375 if (n > s->op_count_max)
2376 s->op_count_max = n;
2377
2378 s->temp_count += s->nb_temps;
2379 if (s->nb_temps > s->temp_count_max)
2380 s->temp_count_max = s->nb_temps;
c896fe29
FB
2381 }
2382#endif
2383
2ba1eeb6 2384 tcg_gen_code_common(s, gen_code_buf, -1);
c896fe29
FB
2385
2386 /* flush instruction cache */
2aeabc08
SW
2387 flush_icache_range((tcg_target_ulong)gen_code_buf,
2388 (tcg_target_ulong)s->code_ptr);
2389
c896fe29
FB
2390 return s->code_ptr - gen_code_buf;
2391}
2392
2ba1eeb6 2393/* Return the index of the micro operation such as the pc after is <
623e265c
PB
2394 offset bytes from the start of the TB. The contents of gen_code_buf must
2395 not be changed, though writing the same values is ok.
2396 Return -1 if not found. */
54604f74 2397int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
c896fe29 2398{
623e265c 2399 return tcg_gen_code_common(s, gen_code_buf, offset);
c896fe29 2400}
a23a9ec6
FB
2401
2402#ifdef CONFIG_PROFILER
405cf9ff 2403void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6
FB
2404{
2405 TCGContext *s = &tcg_ctx;
2406 int64_t tot;
2407
2408 tot = s->interm_time + s->code_time;
2409 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2410 tot, tot / 2.4e9);
2411 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2412 s->tb_count,
2413 s->tb_count1 - s->tb_count,
2414 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2415 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2416 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
a23a9ec6
FB
2417 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2418 s->tb_count ?
2419 (double)s->del_op_count / s->tb_count : 0);
2420 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2421 s->tb_count ?
2422 (double)s->temp_count / s->tb_count : 0,
2423 s->temp_count_max);
2424
2425 cpu_fprintf(f, "cycles/op %0.1f\n",
2426 s->op_count ? (double)tot / s->op_count : 0);
2427 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2428 s->code_in_len ? (double)tot / s->code_in_len : 0);
2429 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2430 s->code_out_len ? (double)tot / s->code_out_len : 0);
2431 if (tot == 0)
2432 tot = 1;
2433 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2434 (double)s->interm_time / tot * 100.0);
2435 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2436 (double)s->code_time / tot * 100.0);
c5cc28ff
AJ
2437 cpu_fprintf(f, "optim./code time %0.1f%%\n",
2438 (double)s->opt_time / (s->code_time ? s->code_time : 1)
2439 * 100.0);
a23a9ec6
FB
2440 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2441 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2442 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2443 s->restore_count);
2444 cpu_fprintf(f, " avg cycles %0.1f\n",
2445 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
871e6c35
BS
2446
2447 dump_op_count();
a23a9ec6
FB
2448}
2449#else
405cf9ff 2450void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6 2451{
24bf7b3a 2452 cpu_fprintf(f, "[TCG profiler not compiled]\n");
a23a9ec6
FB
2453}
2454#endif
813da627
RH
2455
2456#ifdef ELF_HOST_MACHINE
5872bbf2
RH
2457/* In order to use this feature, the backend needs to do three things:
2458
2459 (1) Define ELF_HOST_MACHINE to indicate both what value to
2460 put into the ELF image and to indicate support for the feature.
2461
2462 (2) Define tcg_register_jit. This should create a buffer containing
2463 the contents of a .debug_frame section that describes the post-
2464 prologue unwind info for the tcg machine.
2465
2466 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2467*/
813da627
RH
2468
2469/* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2470typedef enum {
2471 JIT_NOACTION = 0,
2472 JIT_REGISTER_FN,
2473 JIT_UNREGISTER_FN
2474} jit_actions_t;
2475
2476struct jit_code_entry {
2477 struct jit_code_entry *next_entry;
2478 struct jit_code_entry *prev_entry;
2479 const void *symfile_addr;
2480 uint64_t symfile_size;
2481};
2482
2483struct jit_descriptor {
2484 uint32_t version;
2485 uint32_t action_flag;
2486 struct jit_code_entry *relevant_entry;
2487 struct jit_code_entry *first_entry;
2488};
2489
2490void __jit_debug_register_code(void) __attribute__((noinline));
2491void __jit_debug_register_code(void)
2492{
2493 asm("");
2494}
2495
2496/* Must statically initialize the version, because GDB may check
2497 the version before we can set it. */
2498struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 };
2499
2500/* End GDB interface. */
2501
2502static int find_string(const char *strtab, const char *str)
2503{
2504 const char *p = strtab + 1;
2505
2506 while (1) {
2507 if (strcmp(p, str) == 0) {
2508 return p - strtab;
2509 }
2510 p += strlen(p) + 1;
2511 }
2512}
2513
5872bbf2 2514static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
813da627
RH
2515 void *debug_frame, size_t debug_frame_size)
2516{
5872bbf2
RH
2517 struct __attribute__((packed)) DebugInfo {
2518 uint32_t len;
2519 uint16_t version;
2520 uint32_t abbrev;
2521 uint8_t ptr_size;
2522 uint8_t cu_die;
2523 uint16_t cu_lang;
2524 uintptr_t cu_low_pc;
2525 uintptr_t cu_high_pc;
2526 uint8_t fn_die;
2527 char fn_name[16];
2528 uintptr_t fn_low_pc;
2529 uintptr_t fn_high_pc;
2530 uint8_t cu_eoc;
2531 };
813da627
RH
2532
2533 struct ElfImage {
2534 ElfW(Ehdr) ehdr;
2535 ElfW(Phdr) phdr;
5872bbf2
RH
2536 ElfW(Shdr) shdr[7];
2537 ElfW(Sym) sym[2];
2538 struct DebugInfo di;
2539 uint8_t da[24];
2540 char str[80];
2541 };
2542
2543 struct ElfImage *img;
2544
2545 static const struct ElfImage img_template = {
2546 .ehdr = {
2547 .e_ident[EI_MAG0] = ELFMAG0,
2548 .e_ident[EI_MAG1] = ELFMAG1,
2549 .e_ident[EI_MAG2] = ELFMAG2,
2550 .e_ident[EI_MAG3] = ELFMAG3,
2551 .e_ident[EI_CLASS] = ELF_CLASS,
2552 .e_ident[EI_DATA] = ELF_DATA,
2553 .e_ident[EI_VERSION] = EV_CURRENT,
2554 .e_type = ET_EXEC,
2555 .e_machine = ELF_HOST_MACHINE,
2556 .e_version = EV_CURRENT,
2557 .e_phoff = offsetof(struct ElfImage, phdr),
2558 .e_shoff = offsetof(struct ElfImage, shdr),
2559 .e_ehsize = sizeof(ElfW(Shdr)),
2560 .e_phentsize = sizeof(ElfW(Phdr)),
2561 .e_phnum = 1,
2562 .e_shentsize = sizeof(ElfW(Shdr)),
2563 .e_shnum = ARRAY_SIZE(img->shdr),
2564 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1,
abbb3eae
RH
2565#ifdef ELF_HOST_FLAGS
2566 .e_flags = ELF_HOST_FLAGS,
2567#endif
2568#ifdef ELF_OSABI
2569 .e_ident[EI_OSABI] = ELF_OSABI,
2570#endif
5872bbf2
RH
2571 },
2572 .phdr = {
2573 .p_type = PT_LOAD,
2574 .p_flags = PF_X,
2575 },
2576 .shdr = {
2577 [0] = { .sh_type = SHT_NULL },
2578 /* Trick: The contents of code_gen_buffer are not present in
2579 this fake ELF file; that got allocated elsewhere. Therefore
2580 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2581 will not look for contents. We can record any address. */
2582 [1] = { /* .text */
2583 .sh_type = SHT_NOBITS,
2584 .sh_flags = SHF_EXECINSTR | SHF_ALLOC,
2585 },
2586 [2] = { /* .debug_info */
2587 .sh_type = SHT_PROGBITS,
2588 .sh_offset = offsetof(struct ElfImage, di),
2589 .sh_size = sizeof(struct DebugInfo),
2590 },
2591 [3] = { /* .debug_abbrev */
2592 .sh_type = SHT_PROGBITS,
2593 .sh_offset = offsetof(struct ElfImage, da),
2594 .sh_size = sizeof(img->da),
2595 },
2596 [4] = { /* .debug_frame */
2597 .sh_type = SHT_PROGBITS,
2598 .sh_offset = sizeof(struct ElfImage),
2599 },
2600 [5] = { /* .symtab */
2601 .sh_type = SHT_SYMTAB,
2602 .sh_offset = offsetof(struct ElfImage, sym),
2603 .sh_size = sizeof(img->sym),
2604 .sh_info = 1,
2605 .sh_link = ARRAY_SIZE(img->shdr) - 1,
2606 .sh_entsize = sizeof(ElfW(Sym)),
2607 },
2608 [6] = { /* .strtab */
2609 .sh_type = SHT_STRTAB,
2610 .sh_offset = offsetof(struct ElfImage, str),
2611 .sh_size = sizeof(img->str),
2612 }
2613 },
2614 .sym = {
2615 [1] = { /* code_gen_buffer */
2616 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC),
2617 .st_shndx = 1,
2618 }
2619 },
2620 .di = {
2621 .len = sizeof(struct DebugInfo) - 4,
2622 .version = 2,
2623 .ptr_size = sizeof(void *),
2624 .cu_die = 1,
2625 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */
2626 .fn_die = 2,
2627 .fn_name = "code_gen_buffer"
2628 },
2629 .da = {
2630 1, /* abbrev number (the cu) */
2631 0x11, 1, /* DW_TAG_compile_unit, has children */
2632 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2633 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2634 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2635 0, 0, /* end of abbrev */
2636 2, /* abbrev number (the fn) */
2637 0x2e, 0, /* DW_TAG_subprogram, no children */
2638 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2639 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2640 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2641 0, 0, /* end of abbrev */
2642 0 /* no more abbrev */
2643 },
2644 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2645 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
813da627
RH
2646 };
2647
2648 /* We only need a single jit entry; statically allocate it. */
2649 static struct jit_code_entry one_entry;
2650
5872bbf2 2651 uintptr_t buf = (uintptr_t)buf_ptr;
813da627 2652 size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
813da627 2653
5872bbf2
RH
2654 img = g_malloc(img_size);
2655 *img = img_template;
2656 memcpy(img + 1, debug_frame, debug_frame_size);
813da627 2657
5872bbf2
RH
2658 img->phdr.p_vaddr = buf;
2659 img->phdr.p_paddr = buf;
2660 img->phdr.p_memsz = buf_size;
813da627 2661
813da627 2662 img->shdr[1].sh_name = find_string(img->str, ".text");
5872bbf2 2663 img->shdr[1].sh_addr = buf;
813da627
RH
2664 img->shdr[1].sh_size = buf_size;
2665
5872bbf2
RH
2666 img->shdr[2].sh_name = find_string(img->str, ".debug_info");
2667 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev");
2668
2669 img->shdr[4].sh_name = find_string(img->str, ".debug_frame");
2670 img->shdr[4].sh_size = debug_frame_size;
2671
2672 img->shdr[5].sh_name = find_string(img->str, ".symtab");
2673 img->shdr[6].sh_name = find_string(img->str, ".strtab");
2674
2675 img->sym[1].st_name = find_string(img->str, "code_gen_buffer");
2676 img->sym[1].st_value = buf;
2677 img->sym[1].st_size = buf_size;
813da627 2678
5872bbf2 2679 img->di.cu_low_pc = buf;
45aba097 2680 img->di.cu_high_pc = buf + buf_size;
5872bbf2 2681 img->di.fn_low_pc = buf;
45aba097 2682 img->di.fn_high_pc = buf + buf_size;
813da627
RH
2683
2684#ifdef DEBUG_JIT
2685 /* Enable this block to be able to debug the ELF image file creation.
2686 One can use readelf, objdump, or other inspection utilities. */
2687 {
2688 FILE *f = fopen("/tmp/qemu.jit", "w+b");
2689 if (f) {
5872bbf2 2690 if (fwrite(img, img_size, 1, f) != img_size) {
813da627
RH
2691 /* Avoid stupid unused return value warning for fwrite. */
2692 }
2693 fclose(f);
2694 }
2695 }
2696#endif
2697
2698 one_entry.symfile_addr = img;
2699 one_entry.symfile_size = img_size;
2700
2701 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN;
2702 __jit_debug_descriptor.relevant_entry = &one_entry;
2703 __jit_debug_descriptor.first_entry = &one_entry;
2704 __jit_debug_register_code();
2705}
2706#else
5872bbf2
RH
2707/* No support for the feature. Provide the entry point expected by exec.c,
2708 and implement the internal function we declared earlier. */
813da627
RH
2709
2710static void tcg_register_jit_int(void *buf, size_t size,
2711 void *debug_frame, size_t debug_frame_size)
2712{
2713}
2714
2715void tcg_register_jit(void *buf, size_t buf_size)
2716{
2717}
2718#endif /* ELF_HOST_MACHINE */