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tcg: Add forward declarations for local functions
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c896fe29
FB
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
c896fe29
FB
25/* define it to use liveness analysis (better code) */
26#define USE_LIVENESS_ANALYSIS
8f2e8c07 27#define USE_TCG_OPTIMIZATIONS
c896fe29 28
cca82982
AJ
29#include "config.h"
30
a6c6f76c 31#if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
cca82982
AJ
32/* define it to suppress various consistency checks (faster) */
33#define NDEBUG
34#endif
35
c896fe29
FB
36#include <stdarg.h>
37#include <stdlib.h>
38#include <stdio.h>
39#include <string.h>
40#include <inttypes.h>
3fe43da7
FB
41#ifdef _WIN32
42#include <malloc.h>
43#endif
b29fe3ed 44#ifdef _AIX
45#include <alloca.h>
46#endif
c896fe29 47
ca10f867 48#include "qemu-common.h"
902b3d5c 49#include "cache-utils.h"
379f6698 50#include "host-utils.h"
2d8ebcf9 51#include "qemu-timer.h"
c896fe29
FB
52
53/* Note: the long term plan is to reduce the dependancies on the QEMU
54 CPU definitions. Currently they are used for qemu_ld/st
55 instructions */
56#define NO_CPU_IO_DEFS
57#include "cpu.h"
c896fe29
FB
58
59#include "tcg-op.h"
60#include "elf.h"
61
379f6698
PB
62#if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
63#error GUEST_BASE not supported on this host.
64#endif
c896fe29 65
c0ad3001 66/* Forward declarations for functions declared in tcg-target.c and used here. */
e4d58b41
RH
67static void tcg_target_init(TCGContext *s);
68static void tcg_target_qemu_prologue(TCGContext *s);
c896fe29 69static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 70 tcg_target_long value, tcg_target_long addend);
c896fe29 71
c0ad3001
SW
72/* Forward declarations for functions declared and used in tcg-target.c. */
73static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
74static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
75 tcg_target_long arg2);
76static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg);
77static void tcg_out_movi(TCGContext *s, TCGType type,
78 int ret, tcg_target_long arg);
79static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
80 const int *const_args);
81static void tcg_out_st(TCGContext *s, TCGType type, int arg, int arg1,
82 tcg_target_long arg2);
83static int tcg_target_const_match(tcg_target_long val,
84 const TCGArgConstraint *arg_ct);
85static int tcg_target_get_call_iarg_regs_count(int flags);
86
8399ad59 87TCGOpDef tcg_op_defs[] = {
0e2029a0 88#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
c896fe29
FB
89#include "tcg-opc.h"
90#undef DEF
c896fe29
FB
91};
92
b1d8e52e
BS
93static TCGRegSet tcg_target_available_regs[2];
94static TCGRegSet tcg_target_call_clobber_regs;
c896fe29
FB
95
96/* XXX: move that inside the context */
97uint16_t *gen_opc_ptr;
98TCGArg *gen_opparam_ptr;
99
100static inline void tcg_out8(TCGContext *s, uint8_t v)
101{
102 *s->code_ptr++ = v;
103}
104
105static inline void tcg_out16(TCGContext *s, uint16_t v)
106{
107 *(uint16_t *)s->code_ptr = v;
108 s->code_ptr += 2;
109}
110
111static inline void tcg_out32(TCGContext *s, uint32_t v)
112{
113 *(uint32_t *)s->code_ptr = v;
114 s->code_ptr += 4;
115}
116
117/* label relocation processing */
118
a5ad5916
SW
119static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
120 int label_index, long addend)
c896fe29
FB
121{
122 TCGLabel *l;
123 TCGRelocation *r;
124
125 l = &s->labels[label_index];
126 if (l->has_value) {
623e265c
PB
127 /* FIXME: This may break relocations on RISC targets that
128 modify instruction fields in place. The caller may not have
129 written the initial value. */
f54b3f92 130 patch_reloc(code_ptr, type, l->u.value, addend);
c896fe29
FB
131 } else {
132 /* add a new relocation entry */
133 r = tcg_malloc(sizeof(TCGRelocation));
134 r->type = type;
135 r->ptr = code_ptr;
136 r->addend = addend;
137 r->next = l->u.first_reloc;
138 l->u.first_reloc = r;
139 }
140}
141
142static void tcg_out_label(TCGContext *s, int label_index,
143 tcg_target_long value)
144{
145 TCGLabel *l;
146 TCGRelocation *r;
147
148 l = &s->labels[label_index];
149 if (l->has_value)
150 tcg_abort();
151 r = l->u.first_reloc;
152 while (r != NULL) {
f54b3f92 153 patch_reloc(r->ptr, r->type, value, r->addend);
c896fe29
FB
154 r = r->next;
155 }
156 l->has_value = 1;
157 l->u.value = value;
158}
159
160int gen_new_label(void)
161{
162 TCGContext *s = &tcg_ctx;
163 int idx;
164 TCGLabel *l;
165
166 if (s->nb_labels >= TCG_MAX_LABELS)
167 tcg_abort();
168 idx = s->nb_labels++;
169 l = &s->labels[idx];
170 l->has_value = 0;
171 l->u.first_reloc = NULL;
172 return idx;
173}
174
175#include "tcg-target.c"
176
c896fe29
FB
177/* pool based memory allocation */
178void *tcg_malloc_internal(TCGContext *s, int size)
179{
180 TCGPool *p;
181 int pool_size;
182
183 if (size > TCG_POOL_CHUNK_SIZE) {
184 /* big malloc: insert a new pool (XXX: could optimize) */
7267c094 185 p = g_malloc(sizeof(TCGPool) + size);
c896fe29
FB
186 p->size = size;
187 if (s->pool_current)
188 s->pool_current->next = p;
189 else
190 s->pool_first = p;
191 p->next = s->pool_current;
192 } else {
193 p = s->pool_current;
194 if (!p) {
195 p = s->pool_first;
196 if (!p)
197 goto new_pool;
198 } else {
199 if (!p->next) {
200 new_pool:
201 pool_size = TCG_POOL_CHUNK_SIZE;
7267c094 202 p = g_malloc(sizeof(TCGPool) + pool_size);
c896fe29
FB
203 p->size = pool_size;
204 p->next = NULL;
205 if (s->pool_current)
206 s->pool_current->next = p;
207 else
208 s->pool_first = p;
209 } else {
210 p = p->next;
211 }
212 }
213 }
214 s->pool_current = p;
215 s->pool_cur = p->data + size;
216 s->pool_end = p->data + p->size;
217 return p->data;
218}
219
220void tcg_pool_reset(TCGContext *s)
221{
222 s->pool_cur = s->pool_end = NULL;
223 s->pool_current = NULL;
224}
225
c896fe29
FB
226void tcg_context_init(TCGContext *s)
227{
228 int op, total_args, n;
229 TCGOpDef *def;
230 TCGArgConstraint *args_ct;
231 int *sorted_args;
232
233 memset(s, 0, sizeof(*s));
234 s->temps = s->static_temps;
235 s->nb_globals = 0;
236
237 /* Count total number of arguments and allocate the corresponding
238 space */
239 total_args = 0;
240 for(op = 0; op < NB_OPS; op++) {
241 def = &tcg_op_defs[op];
242 n = def->nb_iargs + def->nb_oargs;
243 total_args += n;
244 }
245
7267c094
AL
246 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
247 sorted_args = g_malloc(sizeof(int) * total_args);
c896fe29
FB
248
249 for(op = 0; op < NB_OPS; op++) {
250 def = &tcg_op_defs[op];
251 def->args_ct = args_ct;
252 def->sorted_args = sorted_args;
253 n = def->nb_iargs + def->nb_oargs;
254 sorted_args += n;
255 args_ct += n;
256 }
257
258 tcg_target_init(s);
9002ec79 259}
b03cce8e 260
9002ec79
RH
261void tcg_prologue_init(TCGContext *s)
262{
b03cce8e
FB
263 /* init global prologue and epilogue */
264 s->code_buf = code_gen_prologue;
265 s->code_ptr = s->code_buf;
266 tcg_target_qemu_prologue(s);
267 flush_icache_range((unsigned long)s->code_buf,
268 (unsigned long)s->code_ptr);
c896fe29
FB
269}
270
271void tcg_set_frame(TCGContext *s, int reg,
272 tcg_target_long start, tcg_target_long size)
273{
274 s->frame_start = start;
275 s->frame_end = start + size;
276 s->frame_reg = reg;
277}
278
c896fe29
FB
279void tcg_func_start(TCGContext *s)
280{
e8996ee0 281 int i;
c896fe29
FB
282 tcg_pool_reset(s);
283 s->nb_temps = s->nb_globals;
641d5fbe 284 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
e8996ee0 285 s->first_free_temp[i] = -1;
c896fe29
FB
286 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
287 s->nb_labels = 0;
288 s->current_frame_offset = s->frame_start;
289
290 gen_opc_ptr = gen_opc_buf;
291 gen_opparam_ptr = gen_opparam_buf;
292}
293
294static inline void tcg_temp_alloc(TCGContext *s, int n)
295{
296 if (n > TCG_MAX_TEMPS)
297 tcg_abort();
298}
299
a7812ae4
PB
300static inline int tcg_global_reg_new_internal(TCGType type, int reg,
301 const char *name)
c896fe29
FB
302{
303 TCGContext *s = &tcg_ctx;
304 TCGTemp *ts;
305 int idx;
306
307#if TCG_TARGET_REG_BITS == 32
308 if (type != TCG_TYPE_I32)
309 tcg_abort();
310#endif
311 if (tcg_regset_test_reg(s->reserved_regs, reg))
312 tcg_abort();
313 idx = s->nb_globals;
314 tcg_temp_alloc(s, s->nb_globals + 1);
315 ts = &s->temps[s->nb_globals];
316 ts->base_type = type;
317 ts->type = type;
318 ts->fixed_reg = 1;
319 ts->reg = reg;
c896fe29
FB
320 ts->name = name;
321 s->nb_globals++;
322 tcg_regset_set_reg(s->reserved_regs, reg);
a7812ae4
PB
323 return idx;
324}
325
326TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
327{
328 int idx;
329
330 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
331 return MAKE_TCGV_I32(idx);
332}
333
334TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
335{
336 int idx;
337
338 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
339 return MAKE_TCGV_I64(idx);
c896fe29
FB
340}
341
a7812ae4
PB
342static inline int tcg_global_mem_new_internal(TCGType type, int reg,
343 tcg_target_long offset,
344 const char *name)
c896fe29
FB
345{
346 TCGContext *s = &tcg_ctx;
347 TCGTemp *ts;
348 int idx;
349
350 idx = s->nb_globals;
351#if TCG_TARGET_REG_BITS == 32
352 if (type == TCG_TYPE_I64) {
353 char buf[64];
c588979b 354 tcg_temp_alloc(s, s->nb_globals + 2);
c896fe29
FB
355 ts = &s->temps[s->nb_globals];
356 ts->base_type = type;
357 ts->type = TCG_TYPE_I32;
358 ts->fixed_reg = 0;
359 ts->mem_allocated = 1;
360 ts->mem_reg = reg;
361#ifdef TCG_TARGET_WORDS_BIGENDIAN
362 ts->mem_offset = offset + 4;
363#else
364 ts->mem_offset = offset;
365#endif
c896fe29
FB
366 pstrcpy(buf, sizeof(buf), name);
367 pstrcat(buf, sizeof(buf), "_0");
368 ts->name = strdup(buf);
369 ts++;
370
371 ts->base_type = type;
372 ts->type = TCG_TYPE_I32;
373 ts->fixed_reg = 0;
374 ts->mem_allocated = 1;
375 ts->mem_reg = reg;
376#ifdef TCG_TARGET_WORDS_BIGENDIAN
377 ts->mem_offset = offset;
378#else
379 ts->mem_offset = offset + 4;
380#endif
c896fe29
FB
381 pstrcpy(buf, sizeof(buf), name);
382 pstrcat(buf, sizeof(buf), "_1");
383 ts->name = strdup(buf);
384
385 s->nb_globals += 2;
386 } else
387#endif
388 {
389 tcg_temp_alloc(s, s->nb_globals + 1);
390 ts = &s->temps[s->nb_globals];
391 ts->base_type = type;
392 ts->type = type;
393 ts->fixed_reg = 0;
394 ts->mem_allocated = 1;
395 ts->mem_reg = reg;
396 ts->mem_offset = offset;
c896fe29
FB
397 ts->name = name;
398 s->nb_globals++;
399 }
a7812ae4
PB
400 return idx;
401}
402
403TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
404 const char *name)
405{
406 int idx;
407
408 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
409 return MAKE_TCGV_I32(idx);
410}
411
412TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
413 const char *name)
414{
415 int idx;
416
417 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
418 return MAKE_TCGV_I64(idx);
c896fe29
FB
419}
420
a7812ae4 421static inline int tcg_temp_new_internal(TCGType type, int temp_local)
c896fe29
FB
422{
423 TCGContext *s = &tcg_ctx;
424 TCGTemp *ts;
641d5fbe 425 int idx, k;
c896fe29 426
641d5fbe
FB
427 k = type;
428 if (temp_local)
429 k += TCG_TYPE_COUNT;
430 idx = s->first_free_temp[k];
e8996ee0
FB
431 if (idx != -1) {
432 /* There is already an available temp with the
433 right type */
434 ts = &s->temps[idx];
641d5fbe 435 s->first_free_temp[k] = ts->next_free_temp;
e8996ee0 436 ts->temp_allocated = 1;
641d5fbe 437 assert(ts->temp_local == temp_local);
e8996ee0
FB
438 } else {
439 idx = s->nb_temps;
c896fe29 440#if TCG_TARGET_REG_BITS == 32
e8996ee0 441 if (type == TCG_TYPE_I64) {
8df1ca4b 442 tcg_temp_alloc(s, s->nb_temps + 2);
e8996ee0
FB
443 ts = &s->temps[s->nb_temps];
444 ts->base_type = type;
445 ts->type = TCG_TYPE_I32;
446 ts->temp_allocated = 1;
641d5fbe 447 ts->temp_local = temp_local;
e8996ee0
FB
448 ts->name = NULL;
449 ts++;
450 ts->base_type = TCG_TYPE_I32;
451 ts->type = TCG_TYPE_I32;
452 ts->temp_allocated = 1;
641d5fbe 453 ts->temp_local = temp_local;
e8996ee0
FB
454 ts->name = NULL;
455 s->nb_temps += 2;
456 } else
c896fe29 457#endif
e8996ee0
FB
458 {
459 tcg_temp_alloc(s, s->nb_temps + 1);
460 ts = &s->temps[s->nb_temps];
461 ts->base_type = type;
462 ts->type = type;
463 ts->temp_allocated = 1;
641d5fbe 464 ts->temp_local = temp_local;
e8996ee0
FB
465 ts->name = NULL;
466 s->nb_temps++;
467 }
c896fe29 468 }
27bfd83c
PM
469
470#if defined(CONFIG_DEBUG_TCG)
471 s->temps_in_use++;
472#endif
a7812ae4 473 return idx;
c896fe29
FB
474}
475
a7812ae4
PB
476TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
477{
478 int idx;
479
480 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
481 return MAKE_TCGV_I32(idx);
482}
483
484TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
485{
486 int idx;
487
488 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
489 return MAKE_TCGV_I64(idx);
490}
491
492static inline void tcg_temp_free_internal(int idx)
c896fe29
FB
493{
494 TCGContext *s = &tcg_ctx;
495 TCGTemp *ts;
641d5fbe 496 int k;
c896fe29 497
27bfd83c
PM
498#if defined(CONFIG_DEBUG_TCG)
499 s->temps_in_use--;
500 if (s->temps_in_use < 0) {
501 fprintf(stderr, "More temporaries freed than allocated!\n");
502 }
503#endif
504
e8996ee0 505 assert(idx >= s->nb_globals && idx < s->nb_temps);
c896fe29 506 ts = &s->temps[idx];
e8996ee0
FB
507 assert(ts->temp_allocated != 0);
508 ts->temp_allocated = 0;
641d5fbe
FB
509 k = ts->base_type;
510 if (ts->temp_local)
511 k += TCG_TYPE_COUNT;
512 ts->next_free_temp = s->first_free_temp[k];
513 s->first_free_temp[k] = idx;
c896fe29
FB
514}
515
a7812ae4
PB
516void tcg_temp_free_i32(TCGv_i32 arg)
517{
518 tcg_temp_free_internal(GET_TCGV_I32(arg));
519}
520
521void tcg_temp_free_i64(TCGv_i64 arg)
522{
523 tcg_temp_free_internal(GET_TCGV_I64(arg));
524}
e8996ee0 525
a7812ae4 526TCGv_i32 tcg_const_i32(int32_t val)
c896fe29 527{
a7812ae4
PB
528 TCGv_i32 t0;
529 t0 = tcg_temp_new_i32();
e8996ee0
FB
530 tcg_gen_movi_i32(t0, val);
531 return t0;
532}
c896fe29 533
a7812ae4 534TCGv_i64 tcg_const_i64(int64_t val)
e8996ee0 535{
a7812ae4
PB
536 TCGv_i64 t0;
537 t0 = tcg_temp_new_i64();
e8996ee0
FB
538 tcg_gen_movi_i64(t0, val);
539 return t0;
c896fe29
FB
540}
541
a7812ae4 542TCGv_i32 tcg_const_local_i32(int32_t val)
bdffd4a9 543{
a7812ae4
PB
544 TCGv_i32 t0;
545 t0 = tcg_temp_local_new_i32();
bdffd4a9
AJ
546 tcg_gen_movi_i32(t0, val);
547 return t0;
548}
549
a7812ae4 550TCGv_i64 tcg_const_local_i64(int64_t val)
bdffd4a9 551{
a7812ae4
PB
552 TCGv_i64 t0;
553 t0 = tcg_temp_local_new_i64();
bdffd4a9
AJ
554 tcg_gen_movi_i64(t0, val);
555 return t0;
556}
557
27bfd83c
PM
558#if defined(CONFIG_DEBUG_TCG)
559void tcg_clear_temp_count(void)
560{
561 TCGContext *s = &tcg_ctx;
562 s->temps_in_use = 0;
563}
564
565int tcg_check_temp_count(void)
566{
567 TCGContext *s = &tcg_ctx;
568 if (s->temps_in_use) {
569 /* Clear the count so that we don't give another
570 * warning immediately next time around.
571 */
572 s->temps_in_use = 0;
573 return 1;
574 }
575 return 0;
576}
577#endif
578
c896fe29
FB
579void tcg_register_helper(void *func, const char *name)
580{
581 TCGContext *s = &tcg_ctx;
582 int n;
583 if ((s->nb_helpers + 1) > s->allocated_helpers) {
584 n = s->allocated_helpers;
585 if (n == 0) {
586 n = 4;
587 } else {
588 n *= 2;
589 }
590 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
591 s->allocated_helpers = n;
592 }
4dc81f28 593 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
c896fe29
FB
594 s->helpers[s->nb_helpers].name = name;
595 s->nb_helpers++;
596}
597
39cf05d3
FB
598/* Note: we convert the 64 bit args to 32 bit and do some alignment
599 and endian swap. Maybe it would be better to do the alignment
600 and endian swap in tcg_reg_alloc_call(). */
a7812ae4
PB
601void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
602 int sizemask, TCGArg ret, int nargs, TCGArg *args)
c896fe29 603{
568fffe3 604#if defined(TCG_TARGET_I386) && TCG_TARGET_REG_BITS < 64
a7812ae4 605 int call_type;
9678d950 606#endif
a7812ae4
PB
607 int i;
608 int real_args;
609 int nb_rets;
610 TCGArg *nparam;
2bece2c8
RH
611
612#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
613 for (i = 0; i < nargs; ++i) {
614 int is_64bit = sizemask & (1 << (i+1)*2);
615 int is_signed = sizemask & (2 << (i+1)*2);
616 if (!is_64bit) {
617 TCGv_i64 temp = tcg_temp_new_i64();
618 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
619 if (is_signed) {
620 tcg_gen_ext32s_i64(temp, orig);
621 } else {
622 tcg_gen_ext32u_i64(temp, orig);
623 }
624 args[i] = GET_TCGV_I64(temp);
625 }
626 }
627#endif /* TCG_TARGET_EXTEND_ARGS */
628
a7812ae4
PB
629 *gen_opc_ptr++ = INDEX_op_call;
630 nparam = gen_opparam_ptr++;
568fffe3 631#if defined(TCG_TARGET_I386) && TCG_TARGET_REG_BITS < 64
a7812ae4 632 call_type = (flags & TCG_CALL_TYPE_MASK);
9678d950 633#endif
a7812ae4
PB
634 if (ret != TCG_CALL_DUMMY_ARG) {
635#if TCG_TARGET_REG_BITS < 64
636 if (sizemask & 1) {
39cf05d3 637#ifdef TCG_TARGET_WORDS_BIGENDIAN
a7812ae4
PB
638 *gen_opparam_ptr++ = ret + 1;
639 *gen_opparam_ptr++ = ret;
39cf05d3 640#else
a7812ae4
PB
641 *gen_opparam_ptr++ = ret;
642 *gen_opparam_ptr++ = ret + 1;
39cf05d3 643#endif
a7812ae4
PB
644 nb_rets = 2;
645 } else
646#endif
647 {
648 *gen_opparam_ptr++ = ret;
649 nb_rets = 1;
c896fe29 650 }
a7812ae4
PB
651 } else {
652 nb_rets = 0;
c896fe29 653 }
a7812ae4
PB
654 real_args = 0;
655 for (i = 0; i < nargs; i++) {
656#if TCG_TARGET_REG_BITS < 64
2bece2c8
RH
657 int is_64bit = sizemask & (1 << (i+1)*2);
658 if (is_64bit) {
c896fe29
FB
659#ifdef TCG_TARGET_I386
660 /* REGPARM case: if the third parameter is 64 bit, it is
661 allocated on the stack */
a7812ae4 662 if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
c896fe29
FB
663 call_type = TCG_CALL_TYPE_REGPARM_2;
664 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
665 }
a7812ae4 666#endif
39cf05d3
FB
667#ifdef TCG_TARGET_CALL_ALIGN_ARGS
668 /* some targets want aligned 64 bit args */
ebd486d5 669 if (real_args & 1) {
a7812ae4 670 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
ebd486d5 671 real_args++;
39cf05d3
FB
672 }
673#endif
3f90f252
RH
674 /* If stack grows up, then we will be placing successive
675 arguments at lower addresses, which means we need to
676 reverse the order compared to how we would normally
677 treat either big or little-endian. For those arguments
678 that will wind up in registers, this still works for
679 HPPA (the only current STACK_GROWSUP target) since the
680 argument registers are *also* allocated in decreasing
681 order. If another such target is added, this logic may
682 have to get more complicated to differentiate between
683 stack arguments and register arguments. */
684#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
a7812ae4
PB
685 *gen_opparam_ptr++ = args[i] + 1;
686 *gen_opparam_ptr++ = args[i];
c896fe29 687#else
a7812ae4
PB
688 *gen_opparam_ptr++ = args[i];
689 *gen_opparam_ptr++ = args[i] + 1;
c896fe29 690#endif
a7812ae4 691 real_args += 2;
2bece2c8 692 continue;
c896fe29 693 }
2bece2c8
RH
694#endif /* TCG_TARGET_REG_BITS < 64 */
695
696 *gen_opparam_ptr++ = args[i];
697 real_args++;
c896fe29 698 }
a7812ae4
PB
699 *gen_opparam_ptr++ = GET_TCGV_PTR(func);
700
701 *gen_opparam_ptr++ = flags;
702
703 *nparam = (nb_rets << 16) | (real_args + 1);
704
705 /* total parameters, needed to go backward in the instruction stream */
706 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
2bece2c8
RH
707
708#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
709 for (i = 0; i < nargs; ++i) {
710 int is_64bit = sizemask & (1 << (i+1)*2);
711 if (!is_64bit) {
712 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
713 tcg_temp_free_i64(temp);
714 }
715 }
716#endif /* TCG_TARGET_EXTEND_ARGS */
c896fe29 717}
c896fe29 718
ac56dd48 719#if TCG_TARGET_REG_BITS == 32
a7812ae4 720void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
c896fe29
FB
721 int c, int right, int arith)
722{
cf60bce4 723 if (c == 0) {
a7812ae4 724 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
cf60bce4
FB
725 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
726 } else if (c >= 32) {
c896fe29
FB
727 c -= 32;
728 if (right) {
729 if (arith) {
a7812ae4 730 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 731 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
c896fe29 732 } else {
a7812ae4 733 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 734 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
c896fe29
FB
735 }
736 } else {
a7812ae4
PB
737 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
738 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
c896fe29
FB
739 }
740 } else {
a7812ae4 741 TCGv_i32 t0, t1;
c896fe29 742
a7812ae4
PB
743 t0 = tcg_temp_new_i32();
744 t1 = tcg_temp_new_i32();
c896fe29 745 if (right) {
ac56dd48 746 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
c896fe29 747 if (arith)
ac56dd48 748 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4 749 else
ac56dd48 750 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4
PB
751 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
752 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
ac56dd48 753 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
c896fe29 754 } else {
a7812ae4 755 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
c896fe29 756 /* Note: ret can be the same as arg1, so we use t1 */
a7812ae4 757 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
ac56dd48
PB
758 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
759 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
a7812ae4 760 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
c896fe29 761 }
a7812ae4
PB
762 tcg_temp_free_i32(t0);
763 tcg_temp_free_i32(t1);
c896fe29
FB
764 }
765}
ac56dd48 766#endif
c896fe29 767
be210acb 768
8fcd3692 769static void tcg_reg_alloc_start(TCGContext *s)
c896fe29
FB
770{
771 int i;
772 TCGTemp *ts;
773 for(i = 0; i < s->nb_globals; i++) {
774 ts = &s->temps[i];
775 if (ts->fixed_reg) {
776 ts->val_type = TEMP_VAL_REG;
777 } else {
778 ts->val_type = TEMP_VAL_MEM;
779 }
780 }
e8996ee0
FB
781 for(i = s->nb_globals; i < s->nb_temps; i++) {
782 ts = &s->temps[i];
783 ts->val_type = TEMP_VAL_DEAD;
784 ts->mem_allocated = 0;
785 ts->fixed_reg = 0;
786 }
c896fe29
FB
787 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
788 s->reg_to_temp[i] = -1;
789 }
790}
791
ac56dd48
PB
792static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
793 int idx)
c896fe29
FB
794{
795 TCGTemp *ts;
ac56dd48
PB
796
797 ts = &s->temps[idx];
798 if (idx < s->nb_globals) {
799 pstrcpy(buf, buf_size, ts->name);
c896fe29 800 } else {
641d5fbe
FB
801 if (ts->temp_local)
802 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
803 else
804 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
c896fe29
FB
805 }
806 return buf;
807}
808
a7812ae4
PB
809char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
810{
811 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
812}
813
814char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
ac56dd48 815{
a810a2de 816 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
ac56dd48
PB
817}
818
e8996ee0 819static int helper_cmp(const void *p1, const void *p2)
4dc81f28 820{
e8996ee0
FB
821 const TCGHelperInfo *th1 = p1;
822 const TCGHelperInfo *th2 = p2;
823 if (th1->func < th2->func)
824 return -1;
825 else if (th1->func == th2->func)
826 return 0;
827 else
828 return 1;
4dc81f28
FB
829}
830
e8996ee0
FB
831/* find helper definition (Note: A hash table would be better) */
832static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4dc81f28 833{
e8996ee0 834 int m, m_min, m_max;
4dc81f28 835 TCGHelperInfo *th;
e8996ee0 836 tcg_target_ulong v;
4dc81f28 837
e8996ee0
FB
838 if (unlikely(!s->helpers_sorted)) {
839 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
840 helper_cmp);
841 s->helpers_sorted = 1;
842 }
843
844 /* binary search */
845 m_min = 0;
846 m_max = s->nb_helpers - 1;
847 while (m_min <= m_max) {
848 m = (m_min + m_max) >> 1;
849 th = &s->helpers[m];
850 v = th->func;
851 if (v == val)
852 return th;
853 else if (val < v) {
854 m_max = m - 1;
855 } else {
856 m_min = m + 1;
4dc81f28
FB
857 }
858 }
e8996ee0 859 return NULL;
4dc81f28
FB
860}
861
f48f3ede
BS
862static const char * const cond_name[] =
863{
864 [TCG_COND_EQ] = "eq",
865 [TCG_COND_NE] = "ne",
866 [TCG_COND_LT] = "lt",
867 [TCG_COND_GE] = "ge",
868 [TCG_COND_LE] = "le",
869 [TCG_COND_GT] = "gt",
870 [TCG_COND_LTU] = "ltu",
871 [TCG_COND_GEU] = "geu",
872 [TCG_COND_LEU] = "leu",
873 [TCG_COND_GTU] = "gtu"
874};
875
c896fe29
FB
876void tcg_dump_ops(TCGContext *s, FILE *outfile)
877{
878 const uint16_t *opc_ptr;
879 const TCGArg *args;
880 TCGArg arg;
a9751609
RH
881 TCGOpcode c;
882 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
c896fe29
FB
883 const TCGOpDef *def;
884 char buf[128];
885
7e4597d7 886 first_insn = 1;
c896fe29
FB
887 opc_ptr = gen_opc_buf;
888 args = gen_opparam_buf;
889 while (opc_ptr < gen_opc_ptr) {
890 c = *opc_ptr++;
891 def = &tcg_op_defs[c];
7e4597d7
FB
892 if (c == INDEX_op_debug_insn_start) {
893 uint64_t pc;
894#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
895 pc = ((uint64_t)args[1] << 32) | args[0];
896#else
897 pc = args[0];
898#endif
899 if (!first_insn)
900 fprintf(outfile, "\n");
901 fprintf(outfile, " ---- 0x%" PRIx64, pc);
902 first_insn = 0;
903 nb_oargs = def->nb_oargs;
904 nb_iargs = def->nb_iargs;
905 nb_cargs = def->nb_cargs;
906 } else if (c == INDEX_op_call) {
c896fe29 907 TCGArg arg;
4dc81f28 908
c896fe29
FB
909 /* variable number of arguments */
910 arg = *args++;
911 nb_oargs = arg >> 16;
912 nb_iargs = arg & 0xffff;
913 nb_cargs = def->nb_cargs;
c896fe29 914
7e4597d7
FB
915 fprintf(outfile, " %s ", def->name);
916
b03cce8e 917 /* function name */
ac56dd48 918 fprintf(outfile, "%s",
e8996ee0 919 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
b03cce8e
FB
920 /* flags */
921 fprintf(outfile, ",$0x%" TCG_PRIlx,
922 args[nb_oargs + nb_iargs]);
923 /* nb out args */
924 fprintf(outfile, ",$%d", nb_oargs);
925 for(i = 0; i < nb_oargs; i++) {
926 fprintf(outfile, ",");
927 fprintf(outfile, "%s",
928 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
929 }
930 for(i = 0; i < (nb_iargs - 1); i++) {
c896fe29 931 fprintf(outfile, ",");
39cf05d3
FB
932 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
933 fprintf(outfile, "<dummy>");
934 } else {
935 fprintf(outfile, "%s",
936 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
937 }
b03cce8e 938 }
e8996ee0
FB
939 } else if (c == INDEX_op_movi_i32
940#if TCG_TARGET_REG_BITS == 64
941 || c == INDEX_op_movi_i64
942#endif
943 ) {
944 tcg_target_ulong val;
945 TCGHelperInfo *th;
946
947 nb_oargs = def->nb_oargs;
948 nb_iargs = def->nb_iargs;
949 nb_cargs = def->nb_cargs;
950 fprintf(outfile, " %s %s,$", def->name,
951 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
952 val = args[1];
953 th = tcg_find_helper(s, val);
954 if (th) {
3e9a474e 955 fprintf(outfile, "%s", th->name);
e8996ee0
FB
956 } else {
957 if (c == INDEX_op_movi_i32)
958 fprintf(outfile, "0x%x", (uint32_t)val);
959 else
960 fprintf(outfile, "0x%" PRIx64 , (uint64_t)val);
961 }
b03cce8e 962 } else {
7e4597d7 963 fprintf(outfile, " %s ", def->name);
b03cce8e
FB
964 if (c == INDEX_op_nopn) {
965 /* variable number of arguments */
966 nb_cargs = *args;
967 nb_oargs = 0;
968 nb_iargs = 0;
969 } else {
970 nb_oargs = def->nb_oargs;
971 nb_iargs = def->nb_iargs;
972 nb_cargs = def->nb_cargs;
973 }
974
975 k = 0;
976 for(i = 0; i < nb_oargs; i++) {
977 if (k != 0)
978 fprintf(outfile, ",");
979 fprintf(outfile, "%s",
980 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
981 }
982 for(i = 0; i < nb_iargs; i++) {
983 if (k != 0)
984 fprintf(outfile, ",");
985 fprintf(outfile, "%s",
986 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
987 }
be210acb
RH
988 switch (c) {
989 case INDEX_op_brcond_i32:
990#if TCG_TARGET_REG_BITS == 32
991 case INDEX_op_brcond2_i32:
992#elif TCG_TARGET_REG_BITS == 64
993 case INDEX_op_brcond_i64:
994#endif
995 case INDEX_op_setcond_i32:
f48f3ede 996#if TCG_TARGET_REG_BITS == 32
be210acb 997 case INDEX_op_setcond2_i32:
f48f3ede 998#elif TCG_TARGET_REG_BITS == 64
be210acb 999 case INDEX_op_setcond_i64:
f48f3ede 1000#endif
f48f3ede
BS
1001 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])
1002 fprintf(outfile, ",%s", cond_name[args[k++]]);
1003 else
1004 fprintf(outfile, ",$0x%" TCG_PRIlx, args[k++]);
1005 i = 1;
be210acb
RH
1006 break;
1007 default:
f48f3ede 1008 i = 0;
be210acb
RH
1009 break;
1010 }
f48f3ede 1011 for(; i < nb_cargs; i++) {
b03cce8e
FB
1012 if (k != 0)
1013 fprintf(outfile, ",");
1014 arg = args[k++];
1015 fprintf(outfile, "$0x%" TCG_PRIlx, arg);
1016 }
c896fe29
FB
1017 }
1018 fprintf(outfile, "\n");
1019 args += nb_iargs + nb_oargs + nb_cargs;
1020 }
1021}
1022
1023/* we give more priority to constraints with less registers */
1024static int get_constraint_priority(const TCGOpDef *def, int k)
1025{
1026 const TCGArgConstraint *arg_ct;
1027
1028 int i, n;
1029 arg_ct = &def->args_ct[k];
1030 if (arg_ct->ct & TCG_CT_ALIAS) {
1031 /* an alias is equivalent to a single register */
1032 n = 1;
1033 } else {
1034 if (!(arg_ct->ct & TCG_CT_REG))
1035 return 0;
1036 n = 0;
1037 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1038 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1039 n++;
1040 }
1041 }
1042 return TCG_TARGET_NB_REGS - n + 1;
1043}
1044
1045/* sort from highest priority to lowest */
1046static void sort_constraints(TCGOpDef *def, int start, int n)
1047{
1048 int i, j, p1, p2, tmp;
1049
1050 for(i = 0; i < n; i++)
1051 def->sorted_args[start + i] = start + i;
1052 if (n <= 1)
1053 return;
1054 for(i = 0; i < n - 1; i++) {
1055 for(j = i + 1; j < n; j++) {
1056 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1057 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1058 if (p1 < p2) {
1059 tmp = def->sorted_args[start + i];
1060 def->sorted_args[start + i] = def->sorted_args[start + j];
1061 def->sorted_args[start + j] = tmp;
1062 }
1063 }
1064 }
1065}
1066
1067void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1068{
a9751609 1069 TCGOpcode op;
c896fe29
FB
1070 TCGOpDef *def;
1071 const char *ct_str;
1072 int i, nb_args;
1073
1074 for(;;) {
a9751609 1075 if (tdefs->op == (TCGOpcode)-1)
c896fe29
FB
1076 break;
1077 op = tdefs->op;
c3b08d0e 1078 assert((unsigned)op < NB_OPS);
c896fe29 1079 def = &tcg_op_defs[op];
c68aaa18
SW
1080#if defined(CONFIG_DEBUG_TCG)
1081 /* Duplicate entry in op definitions? */
1082 assert(!def->used);
1083 def->used = 1;
1084#endif
c896fe29
FB
1085 nb_args = def->nb_iargs + def->nb_oargs;
1086 for(i = 0; i < nb_args; i++) {
1087 ct_str = tdefs->args_ct_str[i];
c68aaa18
SW
1088 /* Incomplete TCGTargetOpDef entry? */
1089 assert(ct_str != NULL);
c896fe29
FB
1090 tcg_regset_clear(def->args_ct[i].u.regs);
1091 def->args_ct[i].ct = 0;
1092 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1093 int oarg;
1094 oarg = ct_str[0] - '0';
1095 assert(oarg < def->nb_oargs);
1096 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1097 /* TCG_CT_ALIAS is for the output arguments. The input
5ff9d6a4 1098 argument is tagged with TCG_CT_IALIAS. */
c896fe29 1099 def->args_ct[i] = def->args_ct[oarg];
5ff9d6a4
FB
1100 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1101 def->args_ct[oarg].alias_index = i;
c896fe29 1102 def->args_ct[i].ct |= TCG_CT_IALIAS;
5ff9d6a4 1103 def->args_ct[i].alias_index = oarg;
c896fe29
FB
1104 } else {
1105 for(;;) {
1106 if (*ct_str == '\0')
1107 break;
1108 switch(*ct_str) {
1109 case 'i':
1110 def->args_ct[i].ct |= TCG_CT_CONST;
1111 ct_str++;
1112 break;
1113 default:
1114 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1115 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1116 ct_str, i, def->name);
1117 exit(1);
1118 }
1119 }
1120 }
1121 }
1122 }
1123
c68aaa18
SW
1124 /* TCGTargetOpDef entry with too much information? */
1125 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1126
c896fe29
FB
1127 /* sort the constraints (XXX: this is just an heuristic) */
1128 sort_constraints(def, 0, def->nb_oargs);
1129 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1130
1131#if 0
1132 {
1133 int i;
1134
1135 printf("%s: sorted=", def->name);
1136 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1137 printf(" %d", def->sorted_args[i]);
1138 printf("\n");
1139 }
1140#endif
1141 tdefs++;
1142 }
1143
c68aaa18 1144#if defined(CONFIG_DEBUG_TCG)
a9751609 1145 i = 0;
c68aaa18 1146 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
f412c762
RH
1147 const TCGOpDef *def = &tcg_op_defs[op];
1148 if (op < INDEX_op_call
1149 || op == INDEX_op_debug_insn_start
1150 || (def->flags & TCG_OPF_NOT_PRESENT)) {
c68aaa18 1151 /* Wrong entry in op definitions? */
f412c762
RH
1152 if (def->used) {
1153 fprintf(stderr, "Invalid op definition for %s\n", def->name);
a9751609
RH
1154 i = 1;
1155 }
c68aaa18
SW
1156 } else {
1157 /* Missing entry in op definitions? */
f412c762
RH
1158 if (!def->used) {
1159 fprintf(stderr, "Missing op definition for %s\n", def->name);
a9751609
RH
1160 i = 1;
1161 }
c68aaa18
SW
1162 }
1163 }
a9751609
RH
1164 if (i == 1) {
1165 tcg_abort();
1166 }
c68aaa18 1167#endif
c896fe29
FB
1168}
1169
1170#ifdef USE_LIVENESS_ANALYSIS
1171
1172/* set a nop for an operation using 'nb_args' */
1173static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1174 TCGArg *args, int nb_args)
1175{
1176 if (nb_args == 0) {
1177 *opc_ptr = INDEX_op_nop;
1178 } else {
1179 *opc_ptr = INDEX_op_nopn;
1180 args[0] = nb_args;
1181 args[nb_args - 1] = nb_args;
1182 }
1183}
1184
641d5fbe
FB
1185/* liveness analysis: end of function: globals are live, temps are
1186 dead. */
1187/* XXX: at this stage, not used as there would be little gains because
1188 most TBs end with a conditional jump. */
1189static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps)
c896fe29
FB
1190{
1191 memset(dead_temps, 0, s->nb_globals);
1192 memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals);
1193}
1194
641d5fbe
FB
1195/* liveness analysis: end of basic block: globals are live, temps are
1196 dead, local temps are live. */
1197static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps)
1198{
1199 int i;
1200 TCGTemp *ts;
1201
1202 memset(dead_temps, 0, s->nb_globals);
1203 ts = &s->temps[s->nb_globals];
1204 for(i = s->nb_globals; i < s->nb_temps; i++) {
1205 if (ts->temp_local)
1206 dead_temps[i] = 0;
1207 else
1208 dead_temps[i] = 1;
1209 ts++;
1210 }
1211}
1212
866cb6cb 1213/* Liveness analysis : update the opc_dead_args array to tell if a
c896fe29
FB
1214 given input arguments is dead. Instructions updating dead
1215 temporaries are removed. */
8fcd3692 1216static void tcg_liveness_analysis(TCGContext *s)
c896fe29 1217{
a9751609
RH
1218 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1219 TCGOpcode op;
c896fe29
FB
1220 TCGArg *args;
1221 const TCGOpDef *def;
1222 uint8_t *dead_temps;
866cb6cb 1223 unsigned int dead_args;
c896fe29
FB
1224
1225 gen_opc_ptr++; /* skip end */
1226
1227 nb_ops = gen_opc_ptr - gen_opc_buf;
1228
866cb6cb 1229 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
c896fe29
FB
1230
1231 dead_temps = tcg_malloc(s->nb_temps);
1232 memset(dead_temps, 1, s->nb_temps);
1233
1234 args = gen_opparam_ptr;
1235 op_index = nb_ops - 1;
1236 while (op_index >= 0) {
1237 op = gen_opc_buf[op_index];
1238 def = &tcg_op_defs[op];
1239 switch(op) {
1240 case INDEX_op_call:
c6e113f5
FB
1241 {
1242 int call_flags;
c896fe29 1243
c6e113f5
FB
1244 nb_args = args[-1];
1245 args -= nb_args;
1246 nb_iargs = args[0] & 0xffff;
1247 nb_oargs = args[0] >> 16;
1248 args++;
1249 call_flags = args[nb_oargs + nb_iargs];
1250
1251 /* pure functions can be removed if their result is not
1252 used */
1253 if (call_flags & TCG_CALL_PURE) {
1254 for(i = 0; i < nb_oargs; i++) {
1255 arg = args[i];
1256 if (!dead_temps[arg])
1257 goto do_not_remove_call;
1258 }
1259 tcg_set_nop(s, gen_opc_buf + op_index,
1260 args - 1, nb_args);
1261 } else {
1262 do_not_remove_call:
c896fe29 1263
c6e113f5 1264 /* output args are dead */
6b64b624 1265 dead_args = 0;
c6e113f5
FB
1266 for(i = 0; i < nb_oargs; i++) {
1267 arg = args[i];
6b64b624
AJ
1268 if (dead_temps[arg]) {
1269 dead_args |= (1 << i);
1270 }
c6e113f5
FB
1271 dead_temps[arg] = 1;
1272 }
1273
b9c18f56
AJ
1274 if (!(call_flags & TCG_CALL_CONST)) {
1275 /* globals are live (they may be used by the call) */
1276 memset(dead_temps, 0, s->nb_globals);
1277 }
1278
c6e113f5 1279 /* input args are live */
866cb6cb
AJ
1280 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1281 arg = args[i];
39cf05d3
FB
1282 if (arg != TCG_CALL_DUMMY_ARG) {
1283 if (dead_temps[arg]) {
866cb6cb 1284 dead_args |= (1 << i);
39cf05d3
FB
1285 }
1286 dead_temps[arg] = 0;
c6e113f5 1287 }
c6e113f5 1288 }
866cb6cb 1289 s->op_dead_args[op_index] = dead_args;
c896fe29 1290 }
c6e113f5 1291 args--;
c896fe29 1292 }
c896fe29
FB
1293 break;
1294 case INDEX_op_set_label:
1295 args--;
1296 /* mark end of basic block */
1297 tcg_la_bb_end(s, dead_temps);
1298 break;
7e4597d7
FB
1299 case INDEX_op_debug_insn_start:
1300 args -= def->nb_args;
1301 break;
c896fe29
FB
1302 case INDEX_op_nopn:
1303 nb_args = args[-1];
1304 args -= nb_args;
1305 break;
5ff9d6a4
FB
1306 case INDEX_op_discard:
1307 args--;
1308 /* mark the temporary as dead */
1309 dead_temps[args[0]] = 1;
1310 break;
c896fe29
FB
1311 case INDEX_op_end:
1312 break;
1313 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1314 default:
49516bc0
AJ
1315 args -= def->nb_args;
1316 nb_iargs = def->nb_iargs;
1317 nb_oargs = def->nb_oargs;
c896fe29 1318
49516bc0
AJ
1319 /* Test if the operation can be removed because all
1320 its outputs are dead. We assume that nb_oargs == 0
1321 implies side effects */
1322 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1323 for(i = 0; i < nb_oargs; i++) {
1324 arg = args[i];
1325 if (!dead_temps[arg])
1326 goto do_not_remove;
1327 }
1328 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
c896fe29 1329#ifdef CONFIG_PROFILER
49516bc0 1330 s->del_op_count++;
c896fe29 1331#endif
49516bc0
AJ
1332 } else {
1333 do_not_remove:
c896fe29 1334
49516bc0 1335 /* output args are dead */
6b64b624 1336 dead_args = 0;
49516bc0
AJ
1337 for(i = 0; i < nb_oargs; i++) {
1338 arg = args[i];
6b64b624
AJ
1339 if (dead_temps[arg]) {
1340 dead_args |= (1 << i);
1341 }
49516bc0
AJ
1342 dead_temps[arg] = 1;
1343 }
1344
1345 /* if end of basic block, update */
1346 if (def->flags & TCG_OPF_BB_END) {
1347 tcg_la_bb_end(s, dead_temps);
1348 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
1349 /* globals are live */
1350 memset(dead_temps, 0, s->nb_globals);
1351 }
1352
1353 /* input args are live */
866cb6cb
AJ
1354 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1355 arg = args[i];
49516bc0 1356 if (dead_temps[arg]) {
866cb6cb 1357 dead_args |= (1 << i);
c896fe29 1358 }
49516bc0 1359 dead_temps[arg] = 0;
c896fe29 1360 }
866cb6cb 1361 s->op_dead_args[op_index] = dead_args;
c896fe29
FB
1362 }
1363 break;
1364 }
1365 op_index--;
1366 }
1367
1368 if (args != gen_opparam_buf)
1369 tcg_abort();
1370}
1371#else
1372/* dummy liveness analysis */
655feed5 1373static void tcg_liveness_analysis(TCGContext *s)
c896fe29
FB
1374{
1375 int nb_ops;
1376 nb_ops = gen_opc_ptr - gen_opc_buf;
1377
866cb6cb
AJ
1378 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1379 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
c896fe29
FB
1380}
1381#endif
1382
1383#ifndef NDEBUG
1384static void dump_regs(TCGContext *s)
1385{
1386 TCGTemp *ts;
1387 int i;
1388 char buf[64];
1389
1390 for(i = 0; i < s->nb_temps; i++) {
1391 ts = &s->temps[i];
ac56dd48 1392 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
c896fe29
FB
1393 switch(ts->val_type) {
1394 case TEMP_VAL_REG:
1395 printf("%s", tcg_target_reg_names[ts->reg]);
1396 break;
1397 case TEMP_VAL_MEM:
1398 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1399 break;
1400 case TEMP_VAL_CONST:
1401 printf("$0x%" TCG_PRIlx, ts->val);
1402 break;
1403 case TEMP_VAL_DEAD:
1404 printf("D");
1405 break;
1406 default:
1407 printf("???");
1408 break;
1409 }
1410 printf("\n");
1411 }
1412
1413 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1414 if (s->reg_to_temp[i] >= 0) {
1415 printf("%s: %s\n",
1416 tcg_target_reg_names[i],
ac56dd48 1417 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
c896fe29
FB
1418 }
1419 }
1420}
1421
1422static void check_regs(TCGContext *s)
1423{
1424 int reg, k;
1425 TCGTemp *ts;
1426 char buf[64];
1427
1428 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1429 k = s->reg_to_temp[reg];
1430 if (k >= 0) {
1431 ts = &s->temps[k];
1432 if (ts->val_type != TEMP_VAL_REG ||
1433 ts->reg != reg) {
1434 printf("Inconsistency for register %s:\n",
1435 tcg_target_reg_names[reg]);
b03cce8e 1436 goto fail;
c896fe29
FB
1437 }
1438 }
1439 }
1440 for(k = 0; k < s->nb_temps; k++) {
1441 ts = &s->temps[k];
1442 if (ts->val_type == TEMP_VAL_REG &&
1443 !ts->fixed_reg &&
1444 s->reg_to_temp[ts->reg] != k) {
1445 printf("Inconsistency for temp %s:\n",
ac56dd48 1446 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
b03cce8e 1447 fail:
c896fe29
FB
1448 printf("reg state:\n");
1449 dump_regs(s);
1450 tcg_abort();
1451 }
1452 }
1453}
1454#endif
1455
1456static void temp_allocate_frame(TCGContext *s, int temp)
1457{
1458 TCGTemp *ts;
1459 ts = &s->temps[temp];
f44c9960 1460#ifndef __sparc_v9__ /* Sparc64 stack is accessed with offset of 2047 */
b591dc59
BS
1461 s->current_frame_offset = (s->current_frame_offset +
1462 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1463 ~(sizeof(tcg_target_long) - 1);
f44c9960 1464#endif
b591dc59
BS
1465 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1466 s->frame_end) {
5ff9d6a4 1467 tcg_abort();
b591dc59 1468 }
c896fe29
FB
1469 ts->mem_offset = s->current_frame_offset;
1470 ts->mem_reg = s->frame_reg;
1471 ts->mem_allocated = 1;
b591dc59 1472 s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long);
c896fe29
FB
1473}
1474
1475/* free register 'reg' by spilling the corresponding temporary if necessary */
1476static void tcg_reg_free(TCGContext *s, int reg)
1477{
1478 TCGTemp *ts;
1479 int temp;
1480
1481 temp = s->reg_to_temp[reg];
1482 if (temp != -1) {
1483 ts = &s->temps[temp];
1484 assert(ts->val_type == TEMP_VAL_REG);
1485 if (!ts->mem_coherent) {
1486 if (!ts->mem_allocated)
1487 temp_allocate_frame(s, temp);
e4d5434c 1488 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB
1489 }
1490 ts->val_type = TEMP_VAL_MEM;
1491 s->reg_to_temp[reg] = -1;
1492 }
1493}
1494
1495/* Allocate a register belonging to reg1 & ~reg2 */
1496static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1497{
1498 int i, reg;
1499 TCGRegSet reg_ct;
1500
1501 tcg_regset_andnot(reg_ct, reg1, reg2);
1502
1503 /* first try free registers */
0954d0d9 1504 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1505 reg = tcg_target_reg_alloc_order[i];
1506 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1507 return reg;
1508 }
1509
1510 /* XXX: do better spill choice */
0954d0d9 1511 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1512 reg = tcg_target_reg_alloc_order[i];
1513 if (tcg_regset_test_reg(reg_ct, reg)) {
1514 tcg_reg_free(s, reg);
1515 return reg;
1516 }
1517 }
1518
1519 tcg_abort();
1520}
1521
641d5fbe
FB
1522/* save a temporary to memory. 'allocated_regs' is used in case a
1523 temporary registers needs to be allocated to store a constant. */
1524static void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1525{
1526 TCGTemp *ts;
1527 int reg;
1528
1529 ts = &s->temps[temp];
1530 if (!ts->fixed_reg) {
1531 switch(ts->val_type) {
1532 case TEMP_VAL_REG:
1533 tcg_reg_free(s, ts->reg);
1534 break;
1535 case TEMP_VAL_DEAD:
1536 ts->val_type = TEMP_VAL_MEM;
1537 break;
1538 case TEMP_VAL_CONST:
d6859202
AJ
1539 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1540 allocated_regs);
641d5fbe
FB
1541 if (!ts->mem_allocated)
1542 temp_allocate_frame(s, temp);
d6859202
AJ
1543 tcg_out_movi(s, ts->type, reg, ts->val);
1544 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
641d5fbe
FB
1545 ts->val_type = TEMP_VAL_MEM;
1546 break;
1547 case TEMP_VAL_MEM:
1548 break;
1549 default:
1550 tcg_abort();
1551 }
1552 }
1553}
1554
e5097dc8 1555/* save globals to their cannonical location and assume they can be
e8996ee0
FB
1556 modified be the following code. 'allocated_regs' is used in case a
1557 temporary registers needs to be allocated to store a constant. */
1558static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
c896fe29 1559{
641d5fbe 1560 int i;
c896fe29
FB
1561
1562 for(i = 0; i < s->nb_globals; i++) {
641d5fbe 1563 temp_save(s, i, allocated_regs);
c896fe29 1564 }
e5097dc8
FB
1565}
1566
1567/* at the end of a basic block, we assume all temporaries are dead and
e8996ee0
FB
1568 all globals are stored at their canonical location. */
1569static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
e5097dc8
FB
1570{
1571 TCGTemp *ts;
1572 int i;
1573
c896fe29
FB
1574 for(i = s->nb_globals; i < s->nb_temps; i++) {
1575 ts = &s->temps[i];
641d5fbe
FB
1576 if (ts->temp_local) {
1577 temp_save(s, i, allocated_regs);
1578 } else {
1579 if (ts->val_type == TEMP_VAL_REG) {
1580 s->reg_to_temp[ts->reg] = -1;
1581 }
1582 ts->val_type = TEMP_VAL_DEAD;
c896fe29
FB
1583 }
1584 }
e8996ee0
FB
1585
1586 save_globals(s, allocated_regs);
c896fe29
FB
1587}
1588
866cb6cb 1589#define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
c896fe29 1590
e8996ee0
FB
1591static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args)
1592{
1593 TCGTemp *ots;
1594 tcg_target_ulong val;
1595
1596 ots = &s->temps[args[0]];
1597 val = args[1];
1598
1599 if (ots->fixed_reg) {
1600 /* for fixed registers, we do not do any constant
1601 propagation */
1602 tcg_out_movi(s, ots->type, ots->reg, val);
1603 } else {
1235fc06 1604 /* The movi is not explicitly generated here */
e8996ee0
FB
1605 if (ots->val_type == TEMP_VAL_REG)
1606 s->reg_to_temp[ots->reg] = -1;
1607 ots->val_type = TEMP_VAL_CONST;
1608 ots->val = val;
1609 }
1610}
1611
c896fe29
FB
1612static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1613 const TCGArg *args,
866cb6cb 1614 unsigned int dead_args)
c896fe29
FB
1615{
1616 TCGTemp *ts, *ots;
1617 int reg;
1618 const TCGArgConstraint *arg_ct;
1619
1620 ots = &s->temps[args[0]];
1621 ts = &s->temps[args[1]];
1622 arg_ct = &def->args_ct[0];
1623
866cb6cb 1624 /* XXX: always mark arg dead if IS_DEAD_ARG(1) */
c896fe29 1625 if (ts->val_type == TEMP_VAL_REG) {
866cb6cb 1626 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
c896fe29
FB
1627 /* the mov can be suppressed */
1628 if (ots->val_type == TEMP_VAL_REG)
1629 s->reg_to_temp[ots->reg] = -1;
1630 reg = ts->reg;
1631 s->reg_to_temp[reg] = -1;
1632 ts->val_type = TEMP_VAL_DEAD;
1633 } else {
1634 if (ots->val_type == TEMP_VAL_REG) {
1635 reg = ots->reg;
1636 } else {
1637 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1638 }
1639 if (ts->reg != reg) {
3b6dac34 1640 tcg_out_mov(s, ots->type, reg, ts->reg);
c896fe29
FB
1641 }
1642 }
1643 } else if (ts->val_type == TEMP_VAL_MEM) {
1644 if (ots->val_type == TEMP_VAL_REG) {
1645 reg = ots->reg;
1646 } else {
1647 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1648 }
e4d5434c 1649 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 1650 } else if (ts->val_type == TEMP_VAL_CONST) {
e8996ee0 1651 if (ots->fixed_reg) {
c896fe29 1652 reg = ots->reg;
e8996ee0 1653 tcg_out_movi(s, ots->type, reg, ts->val);
c896fe29 1654 } else {
e8996ee0
FB
1655 /* propagate constant */
1656 if (ots->val_type == TEMP_VAL_REG)
1657 s->reg_to_temp[ots->reg] = -1;
1658 ots->val_type = TEMP_VAL_CONST;
1659 ots->val = ts->val;
1660 return;
c896fe29 1661 }
c896fe29
FB
1662 } else {
1663 tcg_abort();
1664 }
1665 s->reg_to_temp[reg] = args[0];
1666 ots->reg = reg;
1667 ots->val_type = TEMP_VAL_REG;
1668 ots->mem_coherent = 0;
1669}
1670
1671static void tcg_reg_alloc_op(TCGContext *s,
a9751609 1672 const TCGOpDef *def, TCGOpcode opc,
c896fe29 1673 const TCGArg *args,
866cb6cb 1674 unsigned int dead_args)
c896fe29
FB
1675{
1676 TCGRegSet allocated_regs;
1677 int i, k, nb_iargs, nb_oargs, reg;
1678 TCGArg arg;
1679 const TCGArgConstraint *arg_ct;
1680 TCGTemp *ts;
1681 TCGArg new_args[TCG_MAX_OP_ARGS];
1682 int const_args[TCG_MAX_OP_ARGS];
1683
1684 nb_oargs = def->nb_oargs;
1685 nb_iargs = def->nb_iargs;
1686
1687 /* copy constants */
1688 memcpy(new_args + nb_oargs + nb_iargs,
1689 args + nb_oargs + nb_iargs,
1690 sizeof(TCGArg) * def->nb_cargs);
1691
1692 /* satisfy input constraints */
1693 tcg_regset_set(allocated_regs, s->reserved_regs);
1694 for(k = 0; k < nb_iargs; k++) {
1695 i = def->sorted_args[nb_oargs + k];
1696 arg = args[i];
1697 arg_ct = &def->args_ct[i];
1698 ts = &s->temps[arg];
1699 if (ts->val_type == TEMP_VAL_MEM) {
1700 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1701 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB
1702 ts->val_type = TEMP_VAL_REG;
1703 ts->reg = reg;
1704 ts->mem_coherent = 1;
1705 s->reg_to_temp[reg] = arg;
1706 } else if (ts->val_type == TEMP_VAL_CONST) {
1707 if (tcg_target_const_match(ts->val, arg_ct)) {
1708 /* constant is OK for instruction */
1709 const_args[i] = 1;
1710 new_args[i] = ts->val;
1711 goto iarg_end;
1712 } else {
e8996ee0 1713 /* need to move to a register */
c896fe29
FB
1714 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1715 tcg_out_movi(s, ts->type, reg, ts->val);
e8996ee0
FB
1716 ts->val_type = TEMP_VAL_REG;
1717 ts->reg = reg;
1718 ts->mem_coherent = 0;
1719 s->reg_to_temp[reg] = arg;
c896fe29
FB
1720 }
1721 }
1722 assert(ts->val_type == TEMP_VAL_REG);
5ff9d6a4
FB
1723 if (arg_ct->ct & TCG_CT_IALIAS) {
1724 if (ts->fixed_reg) {
1725 /* if fixed register, we must allocate a new register
1726 if the alias is not the same register */
1727 if (arg != args[arg_ct->alias_index])
1728 goto allocate_in_reg;
1729 } else {
1730 /* if the input is aliased to an output and if it is
1731 not dead after the instruction, we must allocate
1732 a new register and move it */
866cb6cb 1733 if (!IS_DEAD_ARG(i)) {
5ff9d6a4 1734 goto allocate_in_reg;
866cb6cb 1735 }
5ff9d6a4 1736 }
c896fe29
FB
1737 }
1738 reg = ts->reg;
1739 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1740 /* nothing to do : the constraint is satisfied */
1741 } else {
1742 allocate_in_reg:
1743 /* allocate a new register matching the constraint
1744 and move the temporary register into it */
1745 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 1746 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29 1747 }
c896fe29
FB
1748 new_args[i] = reg;
1749 const_args[i] = 0;
1750 tcg_regset_set_reg(allocated_regs, reg);
1751 iarg_end: ;
1752 }
1753
e8996ee0
FB
1754 if (def->flags & TCG_OPF_BB_END) {
1755 tcg_reg_alloc_bb_end(s, allocated_regs);
1756 } else {
1757 /* mark dead temporaries and free the associated registers */
866cb6cb
AJ
1758 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1759 arg = args[i];
1760 if (IS_DEAD_ARG(i)) {
e8996ee0
FB
1761 ts = &s->temps[arg];
1762 if (!ts->fixed_reg) {
1763 if (ts->val_type == TEMP_VAL_REG)
1764 s->reg_to_temp[ts->reg] = -1;
1765 ts->val_type = TEMP_VAL_DEAD;
1766 }
c896fe29
FB
1767 }
1768 }
e8996ee0
FB
1769
1770 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1771 /* XXX: permit generic clobber register list ? */
1772 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1773 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1774 tcg_reg_free(s, reg);
1775 }
c896fe29 1776 }
e8996ee0
FB
1777 /* XXX: for load/store we could do that only for the slow path
1778 (i.e. when a memory callback is called) */
1779
1780 /* store globals and free associated registers (we assume the insn
1781 can modify any global. */
1782 save_globals(s, allocated_regs);
c896fe29 1783 }
e8996ee0
FB
1784
1785 /* satisfy the output constraints */
1786 tcg_regset_set(allocated_regs, s->reserved_regs);
1787 for(k = 0; k < nb_oargs; k++) {
1788 i = def->sorted_args[k];
1789 arg = args[i];
1790 arg_ct = &def->args_ct[i];
1791 ts = &s->temps[arg];
1792 if (arg_ct->ct & TCG_CT_ALIAS) {
1793 reg = new_args[arg_ct->alias_index];
1794 } else {
1795 /* if fixed register, we try to use it */
1796 reg = ts->reg;
1797 if (ts->fixed_reg &&
1798 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1799 goto oarg_end;
1800 }
1801 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
c896fe29 1802 }
e8996ee0
FB
1803 tcg_regset_set_reg(allocated_regs, reg);
1804 /* if a fixed register is used, then a move will be done afterwards */
1805 if (!ts->fixed_reg) {
1806 if (ts->val_type == TEMP_VAL_REG)
1807 s->reg_to_temp[ts->reg] = -1;
8c11ad25
AJ
1808 if (IS_DEAD_ARG(i)) {
1809 ts->val_type = TEMP_VAL_DEAD;
1810 } else {
1811 ts->val_type = TEMP_VAL_REG;
1812 ts->reg = reg;
1813 /* temp value is modified, so the value kept in memory is
1814 potentially not the same */
1815 ts->mem_coherent = 0;
1816 s->reg_to_temp[reg] = arg;
1817 }
e8996ee0
FB
1818 }
1819 oarg_end:
1820 new_args[i] = reg;
c896fe29 1821 }
c896fe29
FB
1822 }
1823
c896fe29
FB
1824 /* emit instruction */
1825 tcg_out_op(s, opc, new_args, const_args);
1826
1827 /* move the outputs in the correct register if needed */
1828 for(i = 0; i < nb_oargs; i++) {
1829 ts = &s->temps[args[i]];
1830 reg = new_args[i];
1831 if (ts->fixed_reg && ts->reg != reg) {
3b6dac34 1832 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29
FB
1833 }
1834 }
1835}
1836
b03cce8e
FB
1837#ifdef TCG_TARGET_STACK_GROWSUP
1838#define STACK_DIR(x) (-(x))
1839#else
1840#define STACK_DIR(x) (x)
1841#endif
1842
c896fe29 1843static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
a9751609 1844 TCGOpcode opc, const TCGArg *args,
866cb6cb 1845 unsigned int dead_args)
c896fe29
FB
1846{
1847 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1848 TCGArg arg, func_arg;
1849 TCGTemp *ts;
f54b3f92 1850 tcg_target_long stack_offset, call_stack_size, func_addr;
b03cce8e 1851 int const_func_arg, allocate_args;
c896fe29
FB
1852 TCGRegSet allocated_regs;
1853 const TCGArgConstraint *arg_ct;
1854
1855 arg = *args++;
1856
1857 nb_oargs = arg >> 16;
1858 nb_iargs = arg & 0xffff;
1859 nb_params = nb_iargs - 1;
1860
1861 flags = args[nb_oargs + nb_iargs];
1862
1863 nb_regs = tcg_target_get_call_iarg_regs_count(flags);
1864 if (nb_regs > nb_params)
1865 nb_regs = nb_params;
1866
1867 /* assign stack slots first */
c896fe29
FB
1868 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1869 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1870 ~(TCG_TARGET_STACK_ALIGN - 1);
b03cce8e
FB
1871 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1872 if (allocate_args) {
345649c0
BS
1873 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
1874 preallocate call stack */
1875 tcg_abort();
b03cce8e 1876 }
39cf05d3
FB
1877
1878 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
c896fe29
FB
1879 for(i = nb_regs; i < nb_params; i++) {
1880 arg = args[nb_oargs + i];
39cf05d3
FB
1881#ifdef TCG_TARGET_STACK_GROWSUP
1882 stack_offset -= sizeof(tcg_target_long);
1883#endif
1884 if (arg != TCG_CALL_DUMMY_ARG) {
1885 ts = &s->temps[arg];
1886 if (ts->val_type == TEMP_VAL_REG) {
1887 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1888 } else if (ts->val_type == TEMP_VAL_MEM) {
1889 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1890 s->reserved_regs);
1891 /* XXX: not correct if reading values from the stack */
1892 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1893 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1894 } else if (ts->val_type == TEMP_VAL_CONST) {
1895 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1896 s->reserved_regs);
1897 /* XXX: sign extend may be needed on some targets */
1898 tcg_out_movi(s, ts->type, reg, ts->val);
1899 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1900 } else {
1901 tcg_abort();
1902 }
c896fe29 1903 }
39cf05d3
FB
1904#ifndef TCG_TARGET_STACK_GROWSUP
1905 stack_offset += sizeof(tcg_target_long);
1906#endif
c896fe29
FB
1907 }
1908
1909 /* assign input registers */
1910 tcg_regset_set(allocated_regs, s->reserved_regs);
1911 for(i = 0; i < nb_regs; i++) {
1912 arg = args[nb_oargs + i];
39cf05d3
FB
1913 if (arg != TCG_CALL_DUMMY_ARG) {
1914 ts = &s->temps[arg];
1915 reg = tcg_target_call_iarg_regs[i];
1916 tcg_reg_free(s, reg);
1917 if (ts->val_type == TEMP_VAL_REG) {
1918 if (ts->reg != reg) {
3b6dac34 1919 tcg_out_mov(s, ts->type, reg, ts->reg);
39cf05d3
FB
1920 }
1921 } else if (ts->val_type == TEMP_VAL_MEM) {
1922 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1923 } else if (ts->val_type == TEMP_VAL_CONST) {
1924 /* XXX: sign extend ? */
1925 tcg_out_movi(s, ts->type, reg, ts->val);
1926 } else {
1927 tcg_abort();
c896fe29 1928 }
39cf05d3 1929 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 1930 }
c896fe29
FB
1931 }
1932
1933 /* assign function address */
1934 func_arg = args[nb_oargs + nb_iargs - 1];
1935 arg_ct = &def->args_ct[0];
1936 ts = &s->temps[func_arg];
f54b3f92 1937 func_addr = ts->val;
c896fe29
FB
1938 const_func_arg = 0;
1939 if (ts->val_type == TEMP_VAL_MEM) {
1940 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1941 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 1942 func_arg = reg;
e8996ee0 1943 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
1944 } else if (ts->val_type == TEMP_VAL_REG) {
1945 reg = ts->reg;
1946 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1947 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 1948 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29
FB
1949 }
1950 func_arg = reg;
e8996ee0 1951 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 1952 } else if (ts->val_type == TEMP_VAL_CONST) {
f54b3f92 1953 if (tcg_target_const_match(func_addr, arg_ct)) {
c896fe29 1954 const_func_arg = 1;
f54b3f92 1955 func_arg = func_addr;
c896fe29
FB
1956 } else {
1957 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
f54b3f92 1958 tcg_out_movi(s, ts->type, reg, func_addr);
c896fe29 1959 func_arg = reg;
e8996ee0 1960 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
1961 }
1962 } else {
1963 tcg_abort();
1964 }
e8996ee0 1965
c896fe29
FB
1966
1967 /* mark dead temporaries and free the associated registers */
866cb6cb
AJ
1968 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1969 arg = args[i];
1970 if (IS_DEAD_ARG(i)) {
c896fe29 1971 ts = &s->temps[arg];
e8996ee0 1972 if (!ts->fixed_reg) {
c896fe29
FB
1973 if (ts->val_type == TEMP_VAL_REG)
1974 s->reg_to_temp[ts->reg] = -1;
1975 ts->val_type = TEMP_VAL_DEAD;
1976 }
1977 }
1978 }
1979
1980 /* clobber call registers */
1981 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1982 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1983 tcg_reg_free(s, reg);
1984 }
1985 }
1986
1987 /* store globals and free associated registers (we assume the call
1988 can modify any global. */
b9c18f56
AJ
1989 if (!(flags & TCG_CALL_CONST)) {
1990 save_globals(s, allocated_regs);
1991 }
c896fe29
FB
1992
1993 tcg_out_op(s, opc, &func_arg, &const_func_arg);
c896fe29
FB
1994
1995 /* assign output registers and emit moves if needed */
1996 for(i = 0; i < nb_oargs; i++) {
1997 arg = args[i];
1998 ts = &s->temps[arg];
1999 reg = tcg_target_call_oarg_regs[i];
e8996ee0 2000 assert(s->reg_to_temp[reg] == -1);
c896fe29
FB
2001 if (ts->fixed_reg) {
2002 if (ts->reg != reg) {
3b6dac34 2003 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29
FB
2004 }
2005 } else {
2006 if (ts->val_type == TEMP_VAL_REG)
2007 s->reg_to_temp[ts->reg] = -1;
8c11ad25
AJ
2008 if (IS_DEAD_ARG(i)) {
2009 ts->val_type = TEMP_VAL_DEAD;
2010 } else {
2011 ts->val_type = TEMP_VAL_REG;
2012 ts->reg = reg;
2013 ts->mem_coherent = 0;
2014 s->reg_to_temp[reg] = arg;
2015 }
c896fe29
FB
2016 }
2017 }
2018
2019 return nb_iargs + nb_oargs + def->nb_cargs + 1;
2020}
2021
2022#ifdef CONFIG_PROFILER
2023
54604f74 2024static int64_t tcg_table_op_count[NB_OPS];
c896fe29 2025
871e6c35 2026static void dump_op_count(void)
c896fe29
FB
2027{
2028 int i;
2029 FILE *f;
54604f74 2030 f = fopen("/tmp/op.log", "w");
c896fe29 2031 for(i = INDEX_op_end; i < NB_OPS; i++) {
54604f74 2032 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
c896fe29
FB
2033 }
2034 fclose(f);
2035}
2036#endif
2037
2038
2039static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2ba1eeb6 2040 long search_pc)
c896fe29 2041{
a9751609
RH
2042 TCGOpcode opc;
2043 int op_index;
c896fe29 2044 const TCGOpDef *def;
866cb6cb 2045 unsigned int dead_args;
c896fe29
FB
2046 const TCGArg *args;
2047
2048#ifdef DEBUG_DISAS
8fec2b8c 2049 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
93fcfe39 2050 qemu_log("OP:\n");
c896fe29 2051 tcg_dump_ops(s, logfile);
93fcfe39 2052 qemu_log("\n");
c896fe29
FB
2053 }
2054#endif
2055
8f2e8c07
KB
2056#ifdef USE_TCG_OPTIMIZATIONS
2057 gen_opparam_ptr =
2058 tcg_optimize(s, gen_opc_ptr, gen_opparam_buf, tcg_op_defs);
2059#endif
2060
a23a9ec6
FB
2061#ifdef CONFIG_PROFILER
2062 s->la_time -= profile_getclock();
2063#endif
c896fe29 2064 tcg_liveness_analysis(s);
a23a9ec6
FB
2065#ifdef CONFIG_PROFILER
2066 s->la_time += profile_getclock();
2067#endif
c896fe29
FB
2068
2069#ifdef DEBUG_DISAS
8fec2b8c 2070 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
6a957025 2071 qemu_log("OP after liveness analysis:\n");
c896fe29 2072 tcg_dump_ops(s, logfile);
93fcfe39 2073 qemu_log("\n");
c896fe29
FB
2074 }
2075#endif
2076
2077 tcg_reg_alloc_start(s);
2078
2079 s->code_buf = gen_code_buf;
2080 s->code_ptr = gen_code_buf;
2081
c896fe29
FB
2082 args = gen_opparam_buf;
2083 op_index = 0;
b3db8758 2084
c896fe29
FB
2085 for(;;) {
2086 opc = gen_opc_buf[op_index];
2087#ifdef CONFIG_PROFILER
54604f74 2088 tcg_table_op_count[opc]++;
c896fe29
FB
2089#endif
2090 def = &tcg_op_defs[opc];
2091#if 0
2092 printf("%s: %d %d %d\n", def->name,
2093 def->nb_oargs, def->nb_iargs, def->nb_cargs);
2094 // dump_regs(s);
2095#endif
2096 switch(opc) {
2097 case INDEX_op_mov_i32:
2098#if TCG_TARGET_REG_BITS == 64
2099 case INDEX_op_mov_i64:
2100#endif
866cb6cb
AJ
2101 dead_args = s->op_dead_args[op_index];
2102 tcg_reg_alloc_mov(s, def, args, dead_args);
c896fe29 2103 break;
e8996ee0
FB
2104 case INDEX_op_movi_i32:
2105#if TCG_TARGET_REG_BITS == 64
2106 case INDEX_op_movi_i64:
2107#endif
2108 tcg_reg_alloc_movi(s, args);
2109 break;
7e4597d7
FB
2110 case INDEX_op_debug_insn_start:
2111 /* debug instruction */
2112 break;
c896fe29
FB
2113 case INDEX_op_nop:
2114 case INDEX_op_nop1:
2115 case INDEX_op_nop2:
2116 case INDEX_op_nop3:
2117 break;
2118 case INDEX_op_nopn:
2119 args += args[0];
2120 goto next;
5ff9d6a4
FB
2121 case INDEX_op_discard:
2122 {
2123 TCGTemp *ts;
2124 ts = &s->temps[args[0]];
2125 /* mark the temporary as dead */
e8996ee0 2126 if (!ts->fixed_reg) {
5ff9d6a4
FB
2127 if (ts->val_type == TEMP_VAL_REG)
2128 s->reg_to_temp[ts->reg] = -1;
2129 ts->val_type = TEMP_VAL_DEAD;
2130 }
2131 }
2132 break;
c896fe29 2133 case INDEX_op_set_label:
e8996ee0 2134 tcg_reg_alloc_bb_end(s, s->reserved_regs);
c896fe29
FB
2135 tcg_out_label(s, args[0], (long)s->code_ptr);
2136 break;
2137 case INDEX_op_call:
866cb6cb
AJ
2138 dead_args = s->op_dead_args[op_index];
2139 args += tcg_reg_alloc_call(s, def, opc, args, dead_args);
c896fe29
FB
2140 goto next;
2141 case INDEX_op_end:
2142 goto the_end;
c896fe29 2143 default:
25c4d9cc
RH
2144 /* Sanity check that we've not introduced any unhandled opcodes. */
2145 if (def->flags & TCG_OPF_NOT_PRESENT) {
2146 tcg_abort();
2147 }
c896fe29
FB
2148 /* Note: in order to speed up the code, it would be much
2149 faster to have specialized register allocator functions for
2150 some common argument patterns */
866cb6cb
AJ
2151 dead_args = s->op_dead_args[op_index];
2152 tcg_reg_alloc_op(s, def, opc, args, dead_args);
c896fe29
FB
2153 break;
2154 }
2155 args += def->nb_args;
8df1ca4b 2156 next:
2ba1eeb6 2157 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
b314f270 2158 return op_index;
c896fe29
FB
2159 }
2160 op_index++;
2161#ifndef NDEBUG
2162 check_regs(s);
2163#endif
2164 }
2165 the_end:
2166 return -1;
2167}
2168
54604f74 2169int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
c896fe29
FB
2170{
2171#ifdef CONFIG_PROFILER
2172 {
c896fe29
FB
2173 int n;
2174 n = (gen_opc_ptr - gen_opc_buf);
a23a9ec6
FB
2175 s->op_count += n;
2176 if (n > s->op_count_max)
2177 s->op_count_max = n;
2178
2179 s->temp_count += s->nb_temps;
2180 if (s->nb_temps > s->temp_count_max)
2181 s->temp_count_max = s->nb_temps;
c896fe29
FB
2182 }
2183#endif
2184
2ba1eeb6 2185 tcg_gen_code_common(s, gen_code_buf, -1);
c896fe29
FB
2186
2187 /* flush instruction cache */
2188 flush_icache_range((unsigned long)gen_code_buf,
2189 (unsigned long)s->code_ptr);
2190 return s->code_ptr - gen_code_buf;
2191}
2192
2ba1eeb6 2193/* Return the index of the micro operation such as the pc after is <
623e265c
PB
2194 offset bytes from the start of the TB. The contents of gen_code_buf must
2195 not be changed, though writing the same values is ok.
2196 Return -1 if not found. */
54604f74 2197int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
c896fe29 2198{
623e265c 2199 return tcg_gen_code_common(s, gen_code_buf, offset);
c896fe29 2200}
a23a9ec6
FB
2201
2202#ifdef CONFIG_PROFILER
405cf9ff 2203void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6
FB
2204{
2205 TCGContext *s = &tcg_ctx;
2206 int64_t tot;
2207
2208 tot = s->interm_time + s->code_time;
2209 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2210 tot, tot / 2.4e9);
2211 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2212 s->tb_count,
2213 s->tb_count1 - s->tb_count,
2214 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2215 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2216 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
a23a9ec6
FB
2217 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2218 s->tb_count ?
2219 (double)s->del_op_count / s->tb_count : 0);
2220 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2221 s->tb_count ?
2222 (double)s->temp_count / s->tb_count : 0,
2223 s->temp_count_max);
2224
2225 cpu_fprintf(f, "cycles/op %0.1f\n",
2226 s->op_count ? (double)tot / s->op_count : 0);
2227 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2228 s->code_in_len ? (double)tot / s->code_in_len : 0);
2229 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2230 s->code_out_len ? (double)tot / s->code_out_len : 0);
2231 if (tot == 0)
2232 tot = 1;
2233 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2234 (double)s->interm_time / tot * 100.0);
2235 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2236 (double)s->code_time / tot * 100.0);
2237 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2238 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2239 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2240 s->restore_count);
2241 cpu_fprintf(f, " avg cycles %0.1f\n",
2242 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
871e6c35
BS
2243
2244 dump_op_count();
a23a9ec6
FB
2245}
2246#else
405cf9ff 2247void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6 2248{
24bf7b3a 2249 cpu_fprintf(f, "[TCG profiler not compiled]\n");
a23a9ec6
FB
2250}
2251#endif