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db2b9a59 DHB |
1 | # OpenSBI boot test for RISC-V machines |
2 | # | |
3 | # Copyright (c) 2022, Ventana Micro | |
4 | # | |
5 | # This work is licensed under the terms of the GNU GPL, version 2 or | |
6 | # later. See the COPYING file in the top-level directory. | |
7 | ||
8 | from avocado_qemu import QemuSystemTest | |
9 | from avocado import skip | |
10 | from avocado_qemu import wait_for_console_pattern | |
11 | ||
12 | class RiscvOpenSBI(QemuSystemTest): | |
13 | """ | |
14 | :avocado: tags=accel:tcg | |
15 | """ | |
16 | timeout = 5 | |
17 | ||
18 | def boot_opensbi(self): | |
19 | self.vm.set_console() | |
20 | self.vm.launch() | |
21 | wait_for_console_pattern(self, 'Platform Name') | |
22 | wait_for_console_pattern(self, 'Boot HART MEDELEG') | |
23 | ||
24 | @skip("requires OpenSBI fix to work") | |
25 | def test_riscv32_spike(self): | |
26 | """ | |
27 | :avocado: tags=arch:riscv32 | |
28 | :avocado: tags=machine:spike | |
29 | """ | |
30 | self.boot_opensbi() | |
31 | ||
32 | def test_riscv64_spike(self): | |
33 | """ | |
34 | :avocado: tags=arch:riscv64 | |
35 | :avocado: tags=machine:spike | |
36 | """ | |
37 | self.boot_opensbi() | |
38 | ||
39 | def test_riscv32_sifive_u(self): | |
40 | """ | |
41 | :avocado: tags=arch:riscv32 | |
42 | :avocado: tags=machine:sifive_u | |
43 | """ | |
44 | self.boot_opensbi() | |
45 | ||
46 | def test_riscv64_sifive_u(self): | |
47 | """ | |
48 | :avocado: tags=arch:riscv64 | |
49 | :avocado: tags=machine:sifive_u | |
50 | """ | |
51 | self.boot_opensbi() | |
52 | ||
53 | def test_riscv32_virt(self): | |
54 | """ | |
55 | :avocado: tags=arch:riscv32 | |
56 | :avocado: tags=machine:virt | |
57 | """ | |
58 | self.boot_opensbi() | |
59 | ||
60 | def test_riscv64_virt(self): | |
61 | """ | |
62 | :avocado: tags=arch:riscv64 | |
63 | :avocado: tags=machine:virt | |
64 | """ | |
65 | self.boot_opensbi() |