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[rustc.git] / tests / codegen / unchecked_shifts.rs
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1// compile-flags: -O
2// min-llvm-version: 15.0 (LLVM 13 in CI does this differently from submodule LLVM)
3// ignore-debug (because unchecked is checked in debug)
4
5#![crate_type = "lib"]
6#![feature(unchecked_math)]
7
8// CHECK-LABEL: @unchecked_shl_unsigned_same
9#[no_mangle]
10pub unsafe fn unchecked_shl_unsigned_same(a: u32, b: u32) -> u32 {
11 // CHECK-NOT: and i32
12 // CHECK: shl i32 %a, %b
13 // CHECK-NOT: and i32
14 a.unchecked_shl(b)
15}
16
17// CHECK-LABEL: @unchecked_shl_unsigned_smaller
18#[no_mangle]
19pub unsafe fn unchecked_shl_unsigned_smaller(a: u16, b: u32) -> u16 {
20 // This uses -DAG to avoid failing on irrelevant reorderings,
21 // like emitting the truncation earlier.
22
23 // CHECK-DAG: %[[INRANGE:.+]] = icmp ult i32 %b, 65536
24 // CHECK-DAG: tail call void @llvm.assume(i1 %[[INRANGE]])
25 // CHECK-DAG: %[[TRUNC:.+]] = trunc i32 %b to i16
26 // CHECK-DAG: shl i16 %a, %[[TRUNC]]
27 a.unchecked_shl(b)
28}
29
30// CHECK-LABEL: @unchecked_shl_unsigned_bigger
31#[no_mangle]
32pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 {
33 // CHECK: %[[EXT:.+]] = zext i32 %b to i64
34 // CHECK: shl i64 %a, %[[EXT]]
35 a.unchecked_shl(b)
36}
37
38// CHECK-LABEL: @unchecked_shr_signed_same
39#[no_mangle]
40pub unsafe fn unchecked_shr_signed_same(a: i32, b: u32) -> i32 {
41 // CHECK-NOT: and i32
42 // CHECK: ashr i32 %a, %b
43 // CHECK-NOT: and i32
44 a.unchecked_shr(b)
45}
46
47// CHECK-LABEL: @unchecked_shr_signed_smaller
48#[no_mangle]
49pub unsafe fn unchecked_shr_signed_smaller(a: i16, b: u32) -> i16 {
50 // This uses -DAG to avoid failing on irrelevant reorderings,
51 // like emitting the truncation earlier.
52
53 // CHECK-DAG: %[[INRANGE:.+]] = icmp ult i32 %b, 32768
54 // CHECK-DAG: tail call void @llvm.assume(i1 %[[INRANGE]])
55 // CHECK-DAG: %[[TRUNC:.+]] = trunc i32 %b to i16
56 // CHECK-DAG: ashr i16 %a, %[[TRUNC]]
57 a.unchecked_shr(b)
58}
59
60// CHECK-LABEL: @unchecked_shr_signed_bigger
61#[no_mangle]
62pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 {
63 // CHECK: %[[EXT:.+]] = zext i32 %b to i64
64 // CHECK: ashr i64 %a, %[[EXT]]
65 a.unchecked_shr(b)
66}