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93e9eb68 KW |
1 | /* |
2 | * Floppy test cases. | |
3 | * | |
4 | * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #include <stdint.h> | |
26 | #include <string.h> | |
27 | #include <stdio.h> | |
28 | ||
29 | #include <glib.h> | |
30 | ||
31 | #include "libqtest.h" | |
32 | #include "qemu-common.h" | |
33 | ||
34 | #define TEST_IMAGE_SIZE 1440 * 1024 | |
35 | ||
36 | #define FLOPPY_BASE 0x3f0 | |
37 | #define FLOPPY_IRQ 6 | |
38 | ||
39 | enum { | |
40 | reg_sra = 0x0, | |
41 | reg_srb = 0x1, | |
42 | reg_dor = 0x2, | |
43 | reg_msr = 0x4, | |
44 | reg_dsr = 0x4, | |
45 | reg_fifo = 0x5, | |
46 | reg_dir = 0x7, | |
47 | }; | |
48 | ||
49 | enum { | |
98272dbb | 50 | CMD_SENSE_INT = 0x08, |
67f194bd | 51 | CMD_READ_ID = 0x0a, |
98272dbb | 52 | CMD_SEEK = 0x0f, |
6f442fe8 | 53 | CMD_VERIFY = 0x16, |
98272dbb PH |
54 | CMD_READ = 0xe6, |
55 | CMD_RELATIVE_SEEK_OUT = 0x8f, | |
56 | CMD_RELATIVE_SEEK_IN = 0xcf, | |
93e9eb68 KW |
57 | }; |
58 | ||
59 | enum { | |
5f8ae8e2 HP |
60 | BUSY = 0x10, |
61 | NONDMA = 0x20, | |
93e9eb68 KW |
62 | RQM = 0x80, |
63 | DIO = 0x40, | |
64 | ||
65 | DSKCHG = 0x80, | |
66 | }; | |
67 | ||
748bfb4e | 68 | static char test_image[] = "/tmp/qtest.XXXXXX"; |
93e9eb68 KW |
69 | |
70 | #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask)) | |
71 | #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0) | |
72 | ||
7cd33161 PH |
73 | static uint8_t base = 0x70; |
74 | ||
75 | enum { | |
76 | CMOS_FLOPPY = 0x10, | |
77 | }; | |
78 | ||
93e9eb68 KW |
79 | static void floppy_send(uint8_t byte) |
80 | { | |
81 | uint8_t msr; | |
82 | ||
83 | msr = inb(FLOPPY_BASE + reg_msr); | |
84 | assert_bit_set(msr, RQM); | |
85 | assert_bit_clear(msr, DIO); | |
86 | ||
87 | outb(FLOPPY_BASE + reg_fifo, byte); | |
88 | } | |
89 | ||
90 | static uint8_t floppy_recv(void) | |
91 | { | |
92 | uint8_t msr; | |
93 | ||
94 | msr = inb(FLOPPY_BASE + reg_msr); | |
95 | assert_bit_set(msr, RQM | DIO); | |
96 | ||
97 | return inb(FLOPPY_BASE + reg_fifo); | |
98 | } | |
99 | ||
c3cdc1b0 KW |
100 | /* pcn: Present Cylinder Number */ |
101 | static void ack_irq(uint8_t *pcn) | |
93e9eb68 | 102 | { |
98272dbb PH |
103 | uint8_t ret; |
104 | ||
93e9eb68 KW |
105 | g_assert(get_irq(FLOPPY_IRQ)); |
106 | floppy_send(CMD_SENSE_INT); | |
107 | floppy_recv(); | |
c3cdc1b0 | 108 | |
98272dbb | 109 | ret = floppy_recv(); |
c3cdc1b0 KW |
110 | if (pcn != NULL) { |
111 | *pcn = ret; | |
112 | } | |
98272dbb | 113 | |
c3cdc1b0 | 114 | g_assert(!get_irq(FLOPPY_IRQ)); |
93e9eb68 KW |
115 | } |
116 | ||
6f442fe8 | 117 | static uint8_t send_read_command(uint8_t cmd) |
8b9ef60d PH |
118 | { |
119 | uint8_t drive = 0; | |
120 | uint8_t head = 0; | |
121 | uint8_t cyl = 0; | |
122 | uint8_t sect_addr = 1; | |
123 | uint8_t sect_size = 2; | |
124 | uint8_t eot = 1; | |
125 | uint8_t gap = 0x1b; | |
126 | uint8_t gpl = 0xff; | |
127 | ||
128 | uint8_t msr = 0; | |
129 | uint8_t st0; | |
130 | ||
131 | uint8_t ret = 0; | |
132 | ||
6f442fe8 | 133 | floppy_send(cmd); |
8b9ef60d PH |
134 | floppy_send(head << 2 | drive); |
135 | g_assert(!get_irq(FLOPPY_IRQ)); | |
136 | floppy_send(cyl); | |
137 | floppy_send(head); | |
138 | floppy_send(sect_addr); | |
139 | floppy_send(sect_size); | |
140 | floppy_send(eot); | |
141 | floppy_send(gap); | |
142 | floppy_send(gpl); | |
143 | ||
144 | uint8_t i = 0; | |
145 | uint8_t n = 2; | |
146 | for (; i < n; i++) { | |
147 | msr = inb(FLOPPY_BASE + reg_msr); | |
148 | if (msr == 0xd0) { | |
149 | break; | |
150 | } | |
151 | sleep(1); | |
152 | } | |
153 | ||
154 | if (i >= n) { | |
155 | return 1; | |
156 | } | |
157 | ||
158 | st0 = floppy_recv(); | |
075f5532 | 159 | if (st0 != 0x40) { |
8b9ef60d PH |
160 | ret = 1; |
161 | } | |
162 | ||
163 | floppy_recv(); | |
164 | floppy_recv(); | |
165 | floppy_recv(); | |
166 | floppy_recv(); | |
167 | floppy_recv(); | |
168 | floppy_recv(); | |
169 | ||
170 | return ret; | |
171 | } | |
172 | ||
5f8ae8e2 HP |
173 | static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0) |
174 | { | |
175 | uint8_t drive = 0; | |
176 | uint8_t head = 0; | |
177 | uint8_t cyl = 0; | |
178 | uint8_t sect_addr = 1; | |
179 | uint8_t sect_size = 2; | |
180 | uint8_t eot = nb_sect; | |
181 | uint8_t gap = 0x1b; | |
182 | uint8_t gpl = 0xff; | |
183 | ||
184 | uint8_t msr = 0; | |
185 | uint8_t st0; | |
186 | ||
187 | uint8_t ret = 0; | |
188 | ||
189 | floppy_send(CMD_READ); | |
190 | floppy_send(head << 2 | drive); | |
191 | g_assert(!get_irq(FLOPPY_IRQ)); | |
192 | floppy_send(cyl); | |
193 | floppy_send(head); | |
194 | floppy_send(sect_addr); | |
195 | floppy_send(sect_size); | |
196 | floppy_send(eot); | |
197 | floppy_send(gap); | |
198 | floppy_send(gpl); | |
199 | ||
200 | uint16_t i = 0; | |
201 | uint8_t n = 2; | |
202 | for (; i < n; i++) { | |
203 | msr = inb(FLOPPY_BASE + reg_msr); | |
204 | if (msr == (BUSY | NONDMA | DIO | RQM)) { | |
205 | break; | |
206 | } | |
207 | sleep(1); | |
208 | } | |
209 | ||
210 | if (i >= n) { | |
211 | return 1; | |
212 | } | |
213 | ||
214 | /* Non-DMA mode */ | |
215 | for (i = 0; i < 512 * 2 * nb_sect; i++) { | |
216 | msr = inb(FLOPPY_BASE + reg_msr); | |
217 | assert_bit_set(msr, BUSY | RQM | DIO); | |
218 | inb(FLOPPY_BASE + reg_fifo); | |
219 | } | |
220 | ||
4964e18e KW |
221 | msr = inb(FLOPPY_BASE + reg_msr); |
222 | assert_bit_set(msr, BUSY | RQM | DIO); | |
223 | g_assert(get_irq(FLOPPY_IRQ)); | |
224 | ||
5f8ae8e2 HP |
225 | st0 = floppy_recv(); |
226 | if (st0 != expected_st0) { | |
227 | ret = 1; | |
228 | } | |
229 | ||
230 | floppy_recv(); | |
231 | floppy_recv(); | |
232 | floppy_recv(); | |
233 | floppy_recv(); | |
234 | floppy_recv(); | |
4964e18e | 235 | g_assert(get_irq(FLOPPY_IRQ)); |
5f8ae8e2 HP |
236 | floppy_recv(); |
237 | ||
4964e18e KW |
238 | /* Check that we're back in command phase */ |
239 | msr = inb(FLOPPY_BASE + reg_msr); | |
240 | assert_bit_clear(msr, BUSY | DIO); | |
241 | assert_bit_set(msr, RQM); | |
242 | g_assert(!get_irq(FLOPPY_IRQ)); | |
243 | ||
5f8ae8e2 HP |
244 | return ret; |
245 | } | |
246 | ||
c3cdc1b0 | 247 | static void send_seek(int cyl) |
93e9eb68 KW |
248 | { |
249 | int drive = 0; | |
250 | int head = 0; | |
93e9eb68 KW |
251 | |
252 | floppy_send(CMD_SEEK); | |
253 | floppy_send(head << 2 | drive); | |
254 | g_assert(!get_irq(FLOPPY_IRQ)); | |
255 | floppy_send(cyl); | |
c3cdc1b0 | 256 | ack_irq(NULL); |
93e9eb68 KW |
257 | } |
258 | ||
7cd33161 | 259 | static uint8_t cmos_read(uint8_t reg) |
93e9eb68 | 260 | { |
7cd33161 PH |
261 | outb(base + 0, reg); |
262 | return inb(base + 1); | |
263 | } | |
93e9eb68 | 264 | |
7cd33161 PH |
265 | static void test_cmos(void) |
266 | { | |
267 | uint8_t cmos; | |
93e9eb68 | 268 | |
7cd33161 | 269 | cmos = cmos_read(CMOS_FLOPPY); |
62c76250 | 270 | g_assert(cmos == 0x40 || cmos == 0x50); |
7cd33161 | 271 | } |
93e9eb68 | 272 | |
7cd33161 PH |
273 | static void test_no_media_on_start(void) |
274 | { | |
275 | uint8_t dir; | |
276 | ||
277 | /* Media changed bit must be set all time after start if there is | |
278 | * no media in drive. */ | |
93e9eb68 KW |
279 | dir = inb(FLOPPY_BASE + reg_dir); |
280 | assert_bit_set(dir, DSKCHG); | |
281 | dir = inb(FLOPPY_BASE + reg_dir); | |
282 | assert_bit_set(dir, DSKCHG); | |
c3cdc1b0 | 283 | send_seek(1); |
93e9eb68 KW |
284 | dir = inb(FLOPPY_BASE + reg_dir); |
285 | assert_bit_set(dir, DSKCHG); | |
286 | dir = inb(FLOPPY_BASE + reg_dir); | |
287 | assert_bit_set(dir, DSKCHG); | |
7cd33161 PH |
288 | } |
289 | ||
8b9ef60d PH |
290 | static void test_read_without_media(void) |
291 | { | |
292 | uint8_t ret; | |
293 | ||
6f442fe8 | 294 | ret = send_read_command(CMD_READ); |
8b9ef60d PH |
295 | g_assert(ret == 0); |
296 | } | |
297 | ||
1f507913 | 298 | static void test_media_insert(void) |
7cd33161 PH |
299 | { |
300 | uint8_t dir; | |
93e9eb68 | 301 | |
7cd33161 | 302 | /* Insert media in drive. DSKCHK should not be reset until a step pulse |
93e9eb68 | 303 | * is sent. */ |
0d1aa05e | 304 | qmp_discard_response("{'execute':'change', 'arguments':{" |
b8e665e4 | 305 | " 'device':'floppy0', 'target': %s, 'arg': 'raw' }}", |
0d1aa05e | 306 | test_image); |
2e1280e8 | 307 | qmp_discard_response(""); /* ignore event (open -> close) */ |
93e9eb68 KW |
308 | |
309 | dir = inb(FLOPPY_BASE + reg_dir); | |
310 | assert_bit_set(dir, DSKCHG); | |
311 | dir = inb(FLOPPY_BASE + reg_dir); | |
312 | assert_bit_set(dir, DSKCHG); | |
313 | ||
c3cdc1b0 | 314 | send_seek(0); |
59240c34 PH |
315 | dir = inb(FLOPPY_BASE + reg_dir); |
316 | assert_bit_set(dir, DSKCHG); | |
317 | dir = inb(FLOPPY_BASE + reg_dir); | |
318 | assert_bit_set(dir, DSKCHG); | |
319 | ||
320 | /* Step to next track should clear DSKCHG bit. */ | |
c3cdc1b0 | 321 | send_seek(1); |
93e9eb68 KW |
322 | dir = inb(FLOPPY_BASE + reg_dir); |
323 | assert_bit_clear(dir, DSKCHG); | |
324 | dir = inb(FLOPPY_BASE + reg_dir); | |
325 | assert_bit_clear(dir, DSKCHG); | |
1f507913 HP |
326 | } |
327 | ||
328 | static void test_media_change(void) | |
329 | { | |
330 | uint8_t dir; | |
331 | ||
332 | test_media_insert(); | |
7cd33161 PH |
333 | |
334 | /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't | |
335 | * reset the bit. */ | |
0d1aa05e SH |
336 | qmp_discard_response("{'execute':'eject', 'arguments':{" |
337 | " 'device':'floppy0' }}"); | |
338 | qmp_discard_response(""); /* ignore event */ | |
7cd33161 PH |
339 | |
340 | dir = inb(FLOPPY_BASE + reg_dir); | |
341 | assert_bit_set(dir, DSKCHG); | |
342 | dir = inb(FLOPPY_BASE + reg_dir); | |
343 | assert_bit_set(dir, DSKCHG); | |
344 | ||
c3cdc1b0 | 345 | send_seek(0); |
59240c34 PH |
346 | dir = inb(FLOPPY_BASE + reg_dir); |
347 | assert_bit_set(dir, DSKCHG); | |
348 | dir = inb(FLOPPY_BASE + reg_dir); | |
349 | assert_bit_set(dir, DSKCHG); | |
350 | ||
c3cdc1b0 | 351 | send_seek(1); |
7cd33161 PH |
352 | dir = inb(FLOPPY_BASE + reg_dir); |
353 | assert_bit_set(dir, DSKCHG); | |
354 | dir = inb(FLOPPY_BASE + reg_dir); | |
355 | assert_bit_set(dir, DSKCHG); | |
93e9eb68 KW |
356 | } |
357 | ||
b3ce604e PH |
358 | static void test_sense_interrupt(void) |
359 | { | |
360 | int drive = 0; | |
361 | int head = 0; | |
362 | int cyl = 0; | |
363 | int ret = 0; | |
364 | ||
365 | floppy_send(CMD_SENSE_INT); | |
366 | ret = floppy_recv(); | |
367 | g_assert(ret == 0x80); | |
368 | ||
369 | floppy_send(CMD_SEEK); | |
370 | floppy_send(head << 2 | drive); | |
371 | g_assert(!get_irq(FLOPPY_IRQ)); | |
372 | floppy_send(cyl); | |
373 | ||
374 | floppy_send(CMD_SENSE_INT); | |
375 | ret = floppy_recv(); | |
376 | g_assert(ret == 0x20); | |
377 | floppy_recv(); | |
378 | } | |
379 | ||
98272dbb PH |
380 | static void test_relative_seek(void) |
381 | { | |
382 | uint8_t drive = 0; | |
383 | uint8_t head = 0; | |
384 | uint8_t cyl = 1; | |
c3cdc1b0 | 385 | uint8_t pcn; |
98272dbb PH |
386 | |
387 | /* Send seek to track 0 */ | |
c3cdc1b0 | 388 | send_seek(0); |
98272dbb PH |
389 | |
390 | /* Send relative seek to increase track by 1 */ | |
391 | floppy_send(CMD_RELATIVE_SEEK_IN); | |
392 | floppy_send(head << 2 | drive); | |
393 | g_assert(!get_irq(FLOPPY_IRQ)); | |
394 | floppy_send(cyl); | |
395 | ||
c3cdc1b0 KW |
396 | ack_irq(&pcn); |
397 | g_assert(pcn == 1); | |
98272dbb PH |
398 | |
399 | /* Send relative seek to decrease track by 1 */ | |
400 | floppy_send(CMD_RELATIVE_SEEK_OUT); | |
401 | floppy_send(head << 2 | drive); | |
402 | g_assert(!get_irq(FLOPPY_IRQ)); | |
403 | floppy_send(cyl); | |
404 | ||
c3cdc1b0 KW |
405 | ack_irq(&pcn); |
406 | g_assert(pcn == 0); | |
98272dbb PH |
407 | } |
408 | ||
67f194bd KW |
409 | static void test_read_id(void) |
410 | { | |
411 | uint8_t drive = 0; | |
412 | uint8_t head = 0; | |
413 | uint8_t cyl; | |
414 | uint8_t st0; | |
4964e18e | 415 | uint8_t msr; |
67f194bd KW |
416 | |
417 | /* Seek to track 0 and check with READ ID */ | |
418 | send_seek(0); | |
419 | ||
420 | floppy_send(CMD_READ_ID); | |
421 | g_assert(!get_irq(FLOPPY_IRQ)); | |
422 | floppy_send(head << 2 | drive); | |
423 | ||
4964e18e KW |
424 | msr = inb(FLOPPY_BASE + reg_msr); |
425 | if (!get_irq(FLOPPY_IRQ)) { | |
426 | assert_bit_set(msr, BUSY); | |
427 | assert_bit_clear(msr, RQM); | |
428 | } | |
429 | ||
67f194bd KW |
430 | while (!get_irq(FLOPPY_IRQ)) { |
431 | /* qemu involves a timer with READ ID... */ | |
432 | clock_step(1000000000LL / 50); | |
433 | } | |
434 | ||
4964e18e KW |
435 | msr = inb(FLOPPY_BASE + reg_msr); |
436 | assert_bit_set(msr, BUSY | RQM | DIO); | |
437 | ||
67f194bd KW |
438 | st0 = floppy_recv(); |
439 | floppy_recv(); | |
440 | floppy_recv(); | |
441 | cyl = floppy_recv(); | |
442 | head = floppy_recv(); | |
443 | floppy_recv(); | |
4964e18e | 444 | g_assert(get_irq(FLOPPY_IRQ)); |
67f194bd | 445 | floppy_recv(); |
4964e18e | 446 | g_assert(!get_irq(FLOPPY_IRQ)); |
67f194bd KW |
447 | |
448 | g_assert_cmpint(cyl, ==, 0); | |
449 | g_assert_cmpint(head, ==, 0); | |
450 | g_assert_cmpint(st0, ==, head << 2); | |
451 | ||
452 | /* Seek to track 8 on head 1 and check with READ ID */ | |
453 | head = 1; | |
454 | cyl = 8; | |
455 | ||
456 | floppy_send(CMD_SEEK); | |
457 | floppy_send(head << 2 | drive); | |
458 | g_assert(!get_irq(FLOPPY_IRQ)); | |
459 | floppy_send(cyl); | |
460 | g_assert(get_irq(FLOPPY_IRQ)); | |
461 | ack_irq(NULL); | |
462 | ||
463 | floppy_send(CMD_READ_ID); | |
464 | g_assert(!get_irq(FLOPPY_IRQ)); | |
465 | floppy_send(head << 2 | drive); | |
466 | ||
4964e18e KW |
467 | msr = inb(FLOPPY_BASE + reg_msr); |
468 | if (!get_irq(FLOPPY_IRQ)) { | |
469 | assert_bit_set(msr, BUSY); | |
470 | assert_bit_clear(msr, RQM); | |
471 | } | |
472 | ||
67f194bd KW |
473 | while (!get_irq(FLOPPY_IRQ)) { |
474 | /* qemu involves a timer with READ ID... */ | |
475 | clock_step(1000000000LL / 50); | |
476 | } | |
477 | ||
4964e18e KW |
478 | msr = inb(FLOPPY_BASE + reg_msr); |
479 | assert_bit_set(msr, BUSY | RQM | DIO); | |
480 | ||
67f194bd KW |
481 | st0 = floppy_recv(); |
482 | floppy_recv(); | |
483 | floppy_recv(); | |
484 | cyl = floppy_recv(); | |
485 | head = floppy_recv(); | |
486 | floppy_recv(); | |
4964e18e | 487 | g_assert(get_irq(FLOPPY_IRQ)); |
67f194bd | 488 | floppy_recv(); |
4964e18e | 489 | g_assert(!get_irq(FLOPPY_IRQ)); |
67f194bd KW |
490 | |
491 | g_assert_cmpint(cyl, ==, 8); | |
492 | g_assert_cmpint(head, ==, 1); | |
493 | g_assert_cmpint(st0, ==, head << 2); | |
494 | } | |
495 | ||
5f8ae8e2 HP |
496 | static void test_read_no_dma_1(void) |
497 | { | |
498 | uint8_t ret; | |
499 | ||
500 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
501 | send_seek(0); | |
075f5532 | 502 | ret = send_read_no_dma_command(1, 0x04); |
5f8ae8e2 HP |
503 | g_assert(ret == 0); |
504 | } | |
505 | ||
506 | static void test_read_no_dma_18(void) | |
507 | { | |
508 | uint8_t ret; | |
509 | ||
510 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
511 | send_seek(0); | |
075f5532 | 512 | ret = send_read_no_dma_command(18, 0x04); |
5f8ae8e2 HP |
513 | g_assert(ret == 0); |
514 | } | |
515 | ||
516 | static void test_read_no_dma_19(void) | |
517 | { | |
518 | uint8_t ret; | |
519 | ||
520 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
521 | send_seek(0); | |
522 | ret = send_read_no_dma_command(19, 0x20); | |
523 | g_assert(ret == 0); | |
524 | } | |
525 | ||
6f442fe8 HP |
526 | static void test_verify(void) |
527 | { | |
528 | uint8_t ret; | |
529 | ||
530 | ret = send_read_command(CMD_VERIFY); | |
531 | g_assert(ret == 0); | |
532 | } | |
533 | ||
3359847e BS |
534 | /* success if no crash or abort */ |
535 | static void fuzz_registers(void) | |
536 | { | |
537 | unsigned int i; | |
538 | ||
539 | for (i = 0; i < 1000; i++) { | |
540 | uint8_t reg, val; | |
541 | ||
542 | reg = (uint8_t)g_test_rand_int_range(0, 8); | |
543 | val = (uint8_t)g_test_rand_int_range(0, 256); | |
544 | ||
545 | outb(FLOPPY_BASE + reg, val); | |
546 | inb(FLOPPY_BASE + reg); | |
547 | } | |
548 | } | |
549 | ||
93e9eb68 KW |
550 | int main(int argc, char **argv) |
551 | { | |
552 | const char *arch = qtest_get_arch(); | |
93e9eb68 KW |
553 | int fd; |
554 | int ret; | |
555 | ||
556 | /* Check architecture */ | |
557 | if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) { | |
558 | g_test_message("Skipping test for non-x86\n"); | |
559 | return 0; | |
560 | } | |
561 | ||
562 | /* Create a temporary raw image */ | |
563 | fd = mkstemp(test_image); | |
564 | g_assert(fd >= 0); | |
565 | ret = ftruncate(fd, TEST_IMAGE_SIZE); | |
566 | g_assert(ret == 0); | |
567 | close(fd); | |
568 | ||
569 | /* Run the tests */ | |
570 | g_test_init(&argc, &argv, NULL); | |
571 | ||
b7fcff01 | 572 | qtest_start(NULL); |
93e9eb68 | 573 | qtest_irq_intercept_in(global_qtest, "ioapic"); |
7cd33161 PH |
574 | qtest_add_func("/fdc/cmos", test_cmos); |
575 | qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start); | |
8b9ef60d | 576 | qtest_add_func("/fdc/read_without_media", test_read_without_media); |
93e9eb68 | 577 | qtest_add_func("/fdc/media_change", test_media_change); |
b3ce604e | 578 | qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt); |
98272dbb | 579 | qtest_add_func("/fdc/relative_seek", test_relative_seek); |
67f194bd | 580 | qtest_add_func("/fdc/read_id", test_read_id); |
6f442fe8 | 581 | qtest_add_func("/fdc/verify", test_verify); |
44212dcc | 582 | qtest_add_func("/fdc/media_insert", test_media_insert); |
5f8ae8e2 HP |
583 | qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1); |
584 | qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18); | |
585 | qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19); | |
3359847e | 586 | qtest_add_func("/fdc/fuzz-registers", fuzz_registers); |
93e9eb68 KW |
587 | |
588 | ret = g_test_run(); | |
589 | ||
590 | /* Cleanup */ | |
1d9358e6 | 591 | qtest_end(); |
93e9eb68 KW |
592 | unlink(test_image); |
593 | ||
594 | return ret; | |
595 | } |