[mirror_qemu.git] / tests / fdc-test.c

/*
 * Floppy test cases.
 *
 * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include <stdint.h>
#include <string.h>
#include <stdio.h>

#include <glib.h>

#include "libqtest.h"
#include "qemu-common.h"

#define TEST_IMAGE_SIZE 1440 * 1024

#define FLOPPY_BASE 0x3f0
#define FLOPPY_IRQ 6

enum {
    reg_sra         = 0x0,
    reg_srb         = 0x1,
    reg_dor         = 0x2,
    reg_msr         = 0x4,
    reg_dsr         = 0x4,
    reg_fifo        = 0x5,
    reg_dir         = 0x7,
};

enum {
    CMD_SENSE_INT           = 0x08,
    CMD_READ_ID             = 0x0a,
    CMD_SEEK                = 0x0f,
    CMD_VERIFY              = 0x16,
    CMD_READ                = 0xe6,
    CMD_RELATIVE_SEEK_OUT   = 0x8f,
    CMD_RELATIVE_SEEK_IN    = 0xcf,
};

enum {
    BUSY    = 0x10,
    NONDMA  = 0x20,
    RQM     = 0x80,
    DIO     = 0x40,

    DSKCHG  = 0x80,
};

char test_image[] = "/tmp/qtest.XXXXXX";

#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)

static uint8_t base = 0x70;

enum {
    CMOS_FLOPPY     = 0x10,
};

static void floppy_send(uint8_t byte)
{
    uint8_t msr;

    msr = inb(FLOPPY_BASE + reg_msr);
    assert_bit_set(msr, RQM);
    assert_bit_clear(msr, DIO);

    outb(FLOPPY_BASE + reg_fifo, byte);
}

static uint8_t floppy_recv(void)
{
    uint8_t msr;

    msr = inb(FLOPPY_BASE + reg_msr);
    assert_bit_set(msr, RQM | DIO);

    return inb(FLOPPY_BASE + reg_fifo);
}

/* pcn: Present Cylinder Number */
static void ack_irq(uint8_t *pcn)
{
    uint8_t ret;

    g_assert(get_irq(FLOPPY_IRQ));
    floppy_send(CMD_SENSE_INT);
    floppy_recv();

    ret = floppy_recv();
    if (pcn != NULL) {
        *pcn = ret;
    }

    g_assert(!get_irq(FLOPPY_IRQ));
}

static uint8_t send_read_command(uint8_t cmd)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 0;
    uint8_t sect_addr = 1;
    uint8_t sect_size = 2;
    uint8_t eot = 1;
    uint8_t gap = 0x1b;
    uint8_t gpl = 0xff;

    uint8_t msr = 0;
    uint8_t st0;

    uint8_t ret = 0;

    floppy_send(cmd);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    floppy_send(head);
    floppy_send(sect_addr);
    floppy_send(sect_size);
    floppy_send(eot);
    floppy_send(gap);
    floppy_send(gpl);

    uint8_t i = 0;
    uint8_t n = 2;
    for (; i < n; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        if (msr == 0xd0) {
            break;
        }
        sleep(1);
    }

    if (i >= n) {
        return 1;
    }

    st0 = floppy_recv();
    if (st0 != 0x40) {
        ret = 1;
    }

    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();

    return ret;
}

static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 0;
    uint8_t sect_addr = 1;
    uint8_t sect_size = 2;
    uint8_t eot = nb_sect;
    uint8_t gap = 0x1b;
    uint8_t gpl = 0xff;

    uint8_t msr = 0;
    uint8_t st0;

    uint8_t ret = 0;

    floppy_send(CMD_READ);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    floppy_send(head);
    floppy_send(sect_addr);
    floppy_send(sect_size);
    floppy_send(eot);
    floppy_send(gap);
    floppy_send(gpl);

    uint16_t i = 0;
    uint8_t n = 2;
    for (; i < n; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        if (msr == (BUSY | NONDMA | DIO | RQM)) {
            break;
        }
        sleep(1);
    }

    if (i >= n) {
        return 1;
    }

    /* Non-DMA mode */
    for (i = 0; i < 512 * 2 * nb_sect; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        assert_bit_set(msr, BUSY | RQM | DIO);
        inb(FLOPPY_BASE + reg_fifo);
    }

    st0 = floppy_recv();
    if (st0 != expected_st0) {
        ret = 1;
    }

    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();

    return ret;
}

static void send_seek(int cyl)
{
    int drive = 0;
    int head = 0;

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    ack_irq(NULL);
}

static uint8_t cmos_read(uint8_t reg)
{
    outb(base + 0, reg);
    return inb(base + 1);
}

static void test_cmos(void)
{
    uint8_t cmos;

    cmos = cmos_read(CMOS_FLOPPY);
    g_assert(cmos == 0x40);
}

static void test_no_media_on_start(void)
{
    uint8_t dir;

    /* Media changed bit must be set all time after start if there is
     * no media in drive. */
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
}

static void test_read_without_media(void)
{
    uint8_t ret;

    ret = send_read_command(CMD_READ);
    g_assert(ret == 0);
}

static void test_media_insert(void)
{
    uint8_t dir;

    /* Insert media in drive. DSKCHK should not be reset until a step pulse
     * is sent. */
    qmp_discard_response("{'execute':'change', 'arguments':{"
                         " 'device':'floppy0', 'target': %s }}",
                         test_image);
    qmp_discard_response(""); /* ignore event
                                 (FIXME open -> open transition?!) */
    qmp_discard_response(""); /* ignore event */

    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(0);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    /* Step to next track should clear DSKCHG bit. */
    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_clear(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_clear(dir, DSKCHG);
}

static void test_media_change(void)
{
    uint8_t dir;

    test_media_insert();

    /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
     * reset the bit. */
    qmp_discard_response("{'execute':'eject', 'arguments':{"
                         " 'device':'floppy0' }}");
    qmp_discard_response(""); /* ignore event */

    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(0);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
}

static void test_sense_interrupt(void)
{
    int drive = 0;
    int head = 0;
    int cyl = 0;
    int ret = 0;

    floppy_send(CMD_SENSE_INT);
    ret = floppy_recv();
    g_assert(ret == 0x80);

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    floppy_send(CMD_SENSE_INT);
    ret = floppy_recv();
    g_assert(ret == 0x20);
    floppy_recv();
}

static void test_relative_seek(void)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 1;
    uint8_t pcn;

    /* Send seek to track 0 */
    send_seek(0);

    /* Send relative seek to increase track by 1 */
    floppy_send(CMD_RELATIVE_SEEK_IN);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    ack_irq(&pcn);
    g_assert(pcn == 1);

    /* Send relative seek to decrease track by 1 */
    floppy_send(CMD_RELATIVE_SEEK_OUT);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    ack_irq(&pcn);
    g_assert(pcn == 0);
}

static void test_read_id(void)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl;
    uint8_t st0;

    /* Seek to track 0 and check with READ ID */
    send_seek(0);

    floppy_send(CMD_READ_ID);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(head << 2 | drive);

    while (!get_irq(FLOPPY_IRQ)) {
        /* qemu involves a timer with READ ID... */
        clock_step(1000000000LL / 50);
    }

    st0 = floppy_recv();
    floppy_recv();
    floppy_recv();
    cyl = floppy_recv();
    head = floppy_recv();
    floppy_recv();
    floppy_recv();

    g_assert_cmpint(cyl, ==, 0);
    g_assert_cmpint(head, ==, 0);
    g_assert_cmpint(st0, ==, head << 2);

    /* Seek to track 8 on head 1 and check with READ ID */
    head = 1;
    cyl = 8;

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    g_assert(get_irq(FLOPPY_IRQ));
    ack_irq(NULL);

    floppy_send(CMD_READ_ID);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(head << 2 | drive);

    while (!get_irq(FLOPPY_IRQ)) {
        /* qemu involves a timer with READ ID... */
        clock_step(1000000000LL / 50);
    }

    st0 = floppy_recv();
    floppy_recv();
    floppy_recv();
    cyl = floppy_recv();
    head = floppy_recv();
    floppy_recv();
    floppy_recv();

    g_assert_cmpint(cyl, ==, 8);
    g_assert_cmpint(head, ==, 1);
    g_assert_cmpint(st0, ==, head << 2);
}

static void test_read_no_dma_1(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(1, 0x04);
    g_assert(ret == 0);
}

static void test_read_no_dma_18(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(18, 0x04);
    g_assert(ret == 0);
}

static void test_read_no_dma_19(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(19, 0x20);
    g_assert(ret == 0);
}

static void test_verify(void)
{
    uint8_t ret;

    ret = send_read_command(CMD_VERIFY);
    g_assert(ret == 0);
}

/* success if no crash or abort */
static void fuzz_registers(void)
{
    unsigned int i;

    for (i = 0; i < 1000; i++) {
        uint8_t reg, val;

        reg = (uint8_t)g_test_rand_int_range(0, 8);
        val = (uint8_t)g_test_rand_int_range(0, 256);

        outb(FLOPPY_BASE + reg, val);
        inb(FLOPPY_BASE + reg);
    }
}

int main(int argc, char **argv)
{
    const char *arch = qtest_get_arch();
    int fd;
    int ret;

    /* Check architecture */
    if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
        g_test_message("Skipping test for non-x86\n");
        return 0;
    }

    /* Create a temporary raw image */
    fd = mkstemp(test_image);
    g_assert(fd >= 0);
    ret = ftruncate(fd, TEST_IMAGE_SIZE);
    g_assert(ret == 0);
    close(fd);

    /* Run the tests */
    g_test_init(&argc, &argv, NULL);

    qtest_start(NULL);
    qtest_irq_intercept_in(global_qtest, "ioapic");
    qtest_add_func("/fdc/cmos", test_cmos);
    qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
    qtest_add_func("/fdc/read_without_media", test_read_without_media);
    qtest_add_func("/fdc/media_change", test_media_change);
    qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
    qtest_add_func("/fdc/relative_seek", test_relative_seek);
    qtest_add_func("/fdc/read_id", test_read_id);
    qtest_add_func("/fdc/verify", test_verify);
    qtest_add_func("/fdc/media_insert", test_media_insert);
    qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
    qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
    qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
    qtest_add_func("/fdc/fuzz-registers", fuzz_registers);

    ret = g_test_run();

    /* Cleanup */
    qtest_end();
    unlink(test_image);

    return ret;
}
Commit	Line	Data
93e9eb68 KW	1	/*
	2	* Floppy test cases.
	3	*
	4	* Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#include <stdint.h>
	26	#include <string.h>
	27	#include <stdio.h>
	28
	29	#include <glib.h>
	30
	31	#include "libqtest.h"
	32	#include "qemu-common.h"
	33
	34	#define TEST_IMAGE_SIZE 1440 * 1024
	35
	36	#define FLOPPY_BASE 0x3f0
	37	#define FLOPPY_IRQ 6
	38
	39	enum {
	40	reg_sra = 0x0,
	41	reg_srb = 0x1,
	42	reg_dor = 0x2,
	43	reg_msr = 0x4,
	44	reg_dsr = 0x4,
	45	reg_fifo = 0x5,
	46	reg_dir = 0x7,
	47	};
	48
	49	enum {
98272dbb	50	CMD_SENSE_INT = 0x08,
67f194bd	51	CMD_READ_ID = 0x0a,
98272dbb	52	CMD_SEEK = 0x0f,
6f442fe8	53	CMD_VERIFY = 0x16,
98272dbb PH	54	CMD_READ = 0xe6,
	55	CMD_RELATIVE_SEEK_OUT = 0x8f,
	56	CMD_RELATIVE_SEEK_IN = 0xcf,
93e9eb68 KW	57	};
	58
	59	enum {
5f8ae8e2 HP	60	BUSY = 0x10,
5f8ae8e2 HP	61	NONDMA = 0x20,
93e9eb68 KW	62	RQM = 0x80,
	63	DIO = 0x40,
	64
	65	DSKCHG = 0x80,
	66	};
	67
	68	char test_image[] = "/tmp/qtest.XXXXXX";
	69
	70	#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
	71	#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
	72
7cd33161 PH	73	static uint8_t base = 0x70;
	74
	75	enum {
	76	CMOS_FLOPPY = 0x10,
	77	};
	78
93e9eb68 KW	79	static void floppy_send(uint8_t byte)
	80	{
	81	uint8_t msr;
	82
	83	msr = inb(FLOPPY_BASE + reg_msr);
	84	assert_bit_set(msr, RQM);
	85	assert_bit_clear(msr, DIO);
	86
	87	outb(FLOPPY_BASE + reg_fifo, byte);
	88	}
	89
	90	static uint8_t floppy_recv(void)
	91	{
	92	uint8_t msr;
	93
	94	msr = inb(FLOPPY_BASE + reg_msr);
	95	assert_bit_set(msr, RQM \| DIO);
	96
	97	return inb(FLOPPY_BASE + reg_fifo);
	98	}
	99
c3cdc1b0 KW	100	/* pcn: Present Cylinder Number */
c3cdc1b0 KW	101	static void ack_irq(uint8_t *pcn)
93e9eb68	102	{
98272dbb PH	103	uint8_t ret;
98272dbb PH	104
93e9eb68 KW	105	g_assert(get_irq(FLOPPY_IRQ));
	106	floppy_send(CMD_SENSE_INT);
	107	floppy_recv();
c3cdc1b0	108
98272dbb	109	ret = floppy_recv();
c3cdc1b0 KW	110	if (pcn != NULL) {
	111	*pcn = ret;
	112	}
98272dbb	113
c3cdc1b0	114	g_assert(!get_irq(FLOPPY_IRQ));
93e9eb68 KW	115	}
93e9eb68 KW	116
6f442fe8	117	static uint8_t send_read_command(uint8_t cmd)
8b9ef60d PH	118	{
	119	uint8_t drive = 0;
	120	uint8_t head = 0;
	121	uint8_t cyl = 0;
	122	uint8_t sect_addr = 1;
	123	uint8_t sect_size = 2;
	124	uint8_t eot = 1;
	125	uint8_t gap = 0x1b;
	126	uint8_t gpl = 0xff;
	127
	128	uint8_t msr = 0;
	129	uint8_t st0;
	130
	131	uint8_t ret = 0;
	132
6f442fe8	133	floppy_send(cmd);
8b9ef60d PH	134	floppy_send(head << 2 \| drive);
	135	g_assert(!get_irq(FLOPPY_IRQ));
	136	floppy_send(cyl);
	137	floppy_send(head);
	138	floppy_send(sect_addr);
	139	floppy_send(sect_size);
	140	floppy_send(eot);
	141	floppy_send(gap);
	142	floppy_send(gpl);
	143
	144	uint8_t i = 0;
	145	uint8_t n = 2;
	146	for (; i < n; i++) {
	147	msr = inb(FLOPPY_BASE + reg_msr);
	148	if (msr == 0xd0) {
	149	break;
	150	}
	151	sleep(1);
	152	}
	153
	154	if (i >= n) {
	155	return 1;
	156	}
	157
	158	st0 = floppy_recv();
075f5532	159	if (st0 != 0x40) {
8b9ef60d PH	160	ret = 1;
	161	}
	162
	163	floppy_recv();
	164	floppy_recv();
	165	floppy_recv();
	166	floppy_recv();
	167	floppy_recv();
	168	floppy_recv();
	169
	170	return ret;
	171	}
	172
5f8ae8e2 HP	173	static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
	174	{
	175	uint8_t drive = 0;
	176	uint8_t head = 0;
	177	uint8_t cyl = 0;
	178	uint8_t sect_addr = 1;
	179	uint8_t sect_size = 2;
	180	uint8_t eot = nb_sect;
	181	uint8_t gap = 0x1b;
	182	uint8_t gpl = 0xff;
	183
	184	uint8_t msr = 0;
	185	uint8_t st0;
	186
	187	uint8_t ret = 0;
	188
	189	floppy_send(CMD_READ);
	190	floppy_send(head << 2 \| drive);
	191	g_assert(!get_irq(FLOPPY_IRQ));
	192	floppy_send(cyl);
	193	floppy_send(head);
	194	floppy_send(sect_addr);
	195	floppy_send(sect_size);
	196	floppy_send(eot);
	197	floppy_send(gap);
	198	floppy_send(gpl);
	199
	200	uint16_t i = 0;
	201	uint8_t n = 2;
	202	for (; i < n; i++) {
	203	msr = inb(FLOPPY_BASE + reg_msr);
	204	if (msr == (BUSY \| NONDMA \| DIO \| RQM)) {
	205	break;
	206	}
	207	sleep(1);
	208	}
	209
	210	if (i >= n) {
	211	return 1;
	212	}
	213
	214	/* Non-DMA mode */
	215	for (i = 0; i < 512 * 2 * nb_sect; i++) {
	216	msr = inb(FLOPPY_BASE + reg_msr);
	217	assert_bit_set(msr, BUSY \| RQM \| DIO);
	218	inb(FLOPPY_BASE + reg_fifo);
	219	}
	220
	221	st0 = floppy_recv();
	222	if (st0 != expected_st0) {
	223	ret = 1;
	224	}
	225
	226	floppy_recv();
	227	floppy_recv();
	228	floppy_recv();
	229	floppy_recv();
	230	floppy_recv();
	231	floppy_recv();
	232
	233	return ret;
	234	}
	235
c3cdc1b0	236	static void send_seek(int cyl)
93e9eb68 KW	237	{
	238	int drive = 0;
	239	int head = 0;
93e9eb68 KW	240
	241	floppy_send(CMD_SEEK);
	242	floppy_send(head << 2 \| drive);
	243	g_assert(!get_irq(FLOPPY_IRQ));
	244	floppy_send(cyl);
c3cdc1b0	245	ack_irq(NULL);
93e9eb68 KW	246	}
93e9eb68 KW	247
7cd33161	248	static uint8_t cmos_read(uint8_t reg)
93e9eb68	249	{
7cd33161 PH	250	outb(base + 0, reg);
	251	return inb(base + 1);
	252	}
93e9eb68	253
7cd33161 PH	254	static void test_cmos(void)
	255	{
	256	uint8_t cmos;
93e9eb68	257
7cd33161 PH	258	cmos = cmos_read(CMOS_FLOPPY);
	259	g_assert(cmos == 0x40);
	260	}
93e9eb68	261
7cd33161 PH	262	static void test_no_media_on_start(void)
	263	{
	264	uint8_t dir;
	265
	266	/* Media changed bit must be set all time after start if there is
	267	* no media in drive. */
93e9eb68 KW	268	dir = inb(FLOPPY_BASE + reg_dir);
	269	assert_bit_set(dir, DSKCHG);
	270	dir = inb(FLOPPY_BASE + reg_dir);
	271	assert_bit_set(dir, DSKCHG);
c3cdc1b0	272	send_seek(1);
93e9eb68 KW	273	dir = inb(FLOPPY_BASE + reg_dir);
	274	assert_bit_set(dir, DSKCHG);
	275	dir = inb(FLOPPY_BASE + reg_dir);
	276	assert_bit_set(dir, DSKCHG);
7cd33161 PH	277	}
7cd33161 PH	278
8b9ef60d PH	279	static void test_read_without_media(void)
	280	{
	281	uint8_t ret;
	282
6f442fe8	283	ret = send_read_command(CMD_READ);
8b9ef60d PH	284	g_assert(ret == 0);
	285	}
	286
1f507913	287	static void test_media_insert(void)
7cd33161 PH	288	{
7cd33161 PH	289	uint8_t dir;
93e9eb68	290
7cd33161	291	/* Insert media in drive. DSKCHK should not be reset until a step pulse
93e9eb68	292	* is sent. */
0d1aa05e	293	qmp_discard_response("{'execute':'change', 'arguments':{"
563890c7	294	" 'device':'floppy0', 'target': %s }}",
0d1aa05e SH	295	test_image);
	296	qmp_discard_response(""); /* ignore event
	297	(FIXME open -> open transition?!) */
	298	qmp_discard_response(""); /* ignore event */
93e9eb68 KW	299
	300	dir = inb(FLOPPY_BASE + reg_dir);
	301	assert_bit_set(dir, DSKCHG);
	302	dir = inb(FLOPPY_BASE + reg_dir);
	303	assert_bit_set(dir, DSKCHG);
	304
c3cdc1b0	305	send_seek(0);
59240c34 PH	306	dir = inb(FLOPPY_BASE + reg_dir);
	307	assert_bit_set(dir, DSKCHG);
	308	dir = inb(FLOPPY_BASE + reg_dir);
	309	assert_bit_set(dir, DSKCHG);
	310
	311	/* Step to next track should clear DSKCHG bit. */
c3cdc1b0	312	send_seek(1);
93e9eb68 KW	313	dir = inb(FLOPPY_BASE + reg_dir);
	314	assert_bit_clear(dir, DSKCHG);
	315	dir = inb(FLOPPY_BASE + reg_dir);
	316	assert_bit_clear(dir, DSKCHG);
1f507913 HP	317	}
	318
	319	static void test_media_change(void)
	320	{
	321	uint8_t dir;
	322
	323	test_media_insert();
7cd33161 PH	324
	325	/* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
	326	* reset the bit. */
0d1aa05e SH	327	qmp_discard_response("{'execute':'eject', 'arguments':{"
	328	" 'device':'floppy0' }}");
	329	qmp_discard_response(""); /* ignore event */
7cd33161 PH	330
	331	dir = inb(FLOPPY_BASE + reg_dir);
	332	assert_bit_set(dir, DSKCHG);
	333	dir = inb(FLOPPY_BASE + reg_dir);
	334	assert_bit_set(dir, DSKCHG);
	335
c3cdc1b0	336	send_seek(0);
59240c34 PH	337	dir = inb(FLOPPY_BASE + reg_dir);
	338	assert_bit_set(dir, DSKCHG);
	339	dir = inb(FLOPPY_BASE + reg_dir);
	340	assert_bit_set(dir, DSKCHG);
	341
c3cdc1b0	342	send_seek(1);
7cd33161 PH	343	dir = inb(FLOPPY_BASE + reg_dir);
	344	assert_bit_set(dir, DSKCHG);
	345	dir = inb(FLOPPY_BASE + reg_dir);
	346	assert_bit_set(dir, DSKCHG);
93e9eb68 KW	347	}
93e9eb68 KW	348
b3ce604e PH	349	static void test_sense_interrupt(void)
	350	{
	351	int drive = 0;
	352	int head = 0;
	353	int cyl = 0;
	354	int ret = 0;
	355
	356	floppy_send(CMD_SENSE_INT);
	357	ret = floppy_recv();
	358	g_assert(ret == 0x80);
	359
	360	floppy_send(CMD_SEEK);
	361	floppy_send(head << 2 \| drive);
	362	g_assert(!get_irq(FLOPPY_IRQ));
	363	floppy_send(cyl);
	364
	365	floppy_send(CMD_SENSE_INT);
	366	ret = floppy_recv();
	367	g_assert(ret == 0x20);
	368	floppy_recv();
	369	}
	370
98272dbb PH	371	static void test_relative_seek(void)
	372	{
	373	uint8_t drive = 0;
	374	uint8_t head = 0;
	375	uint8_t cyl = 1;
c3cdc1b0	376	uint8_t pcn;
98272dbb PH	377
98272dbb PH	378	/* Send seek to track 0 */
c3cdc1b0	379	send_seek(0);
98272dbb PH	380
	381	/* Send relative seek to increase track by 1 */
	382	floppy_send(CMD_RELATIVE_SEEK_IN);
	383	floppy_send(head << 2 \| drive);
	384	g_assert(!get_irq(FLOPPY_IRQ));
	385	floppy_send(cyl);
	386
c3cdc1b0 KW	387	ack_irq(&pcn);
c3cdc1b0 KW	388	g_assert(pcn == 1);
98272dbb PH	389
	390	/* Send relative seek to decrease track by 1 */
	391	floppy_send(CMD_RELATIVE_SEEK_OUT);
	392	floppy_send(head << 2 \| drive);
	393	g_assert(!get_irq(FLOPPY_IRQ));
	394	floppy_send(cyl);
	395
c3cdc1b0 KW	396	ack_irq(&pcn);
c3cdc1b0 KW	397	g_assert(pcn == 0);
98272dbb PH	398	}
98272dbb PH	399
67f194bd KW	400	static void test_read_id(void)
	401	{
	402	uint8_t drive = 0;
	403	uint8_t head = 0;
	404	uint8_t cyl;
	405	uint8_t st0;
	406
	407	/* Seek to track 0 and check with READ ID */
	408	send_seek(0);
	409
	410	floppy_send(CMD_READ_ID);
	411	g_assert(!get_irq(FLOPPY_IRQ));
	412	floppy_send(head << 2 \| drive);
	413
	414	while (!get_irq(FLOPPY_IRQ)) {
	415	/* qemu involves a timer with READ ID... */
	416	clock_step(1000000000LL / 50);
	417	}
	418
	419	st0 = floppy_recv();
	420	floppy_recv();
	421	floppy_recv();
	422	cyl = floppy_recv();
	423	head = floppy_recv();
	424	floppy_recv();
	425	floppy_recv();
	426
	427	g_assert_cmpint(cyl, ==, 0);
	428	g_assert_cmpint(head, ==, 0);
	429	g_assert_cmpint(st0, ==, head << 2);
	430
	431	/* Seek to track 8 on head 1 and check with READ ID */
	432	head = 1;
	433	cyl = 8;
	434
	435	floppy_send(CMD_SEEK);
	436	floppy_send(head << 2 \| drive);
	437	g_assert(!get_irq(FLOPPY_IRQ));
	438	floppy_send(cyl);
	439	g_assert(get_irq(FLOPPY_IRQ));
	440	ack_irq(NULL);
	441
	442	floppy_send(CMD_READ_ID);
	443	g_assert(!get_irq(FLOPPY_IRQ));
	444	floppy_send(head << 2 \| drive);
	445
	446	while (!get_irq(FLOPPY_IRQ)) {
	447	/* qemu involves a timer with READ ID... */
	448	clock_step(1000000000LL / 50);
	449	}
	450
	451	st0 = floppy_recv();
	452	floppy_recv();
	453	floppy_recv();
	454	cyl = floppy_recv();
	455	head = floppy_recv();
	456	floppy_recv();
	457	floppy_recv();
	458
	459	g_assert_cmpint(cyl, ==, 8);
	460	g_assert_cmpint(head, ==, 1);
	461	g_assert_cmpint(st0, ==, head << 2);
	462	}
	463
5f8ae8e2 HP	464	static void test_read_no_dma_1(void)
	465	{
	466	uint8_t ret;
	467
	468	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	469	send_seek(0);
075f5532	470	ret = send_read_no_dma_command(1, 0x04);
5f8ae8e2 HP	471	g_assert(ret == 0);
	472	}
	473
	474	static void test_read_no_dma_18(void)
	475	{
	476	uint8_t ret;
	477
	478	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	479	send_seek(0);
075f5532	480	ret = send_read_no_dma_command(18, 0x04);
5f8ae8e2 HP	481	g_assert(ret == 0);
	482	}
	483
	484	static void test_read_no_dma_19(void)
	485	{
	486	uint8_t ret;
	487
	488	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	489	send_seek(0);
	490	ret = send_read_no_dma_command(19, 0x20);
	491	g_assert(ret == 0);
	492	}
	493
6f442fe8 HP	494	static void test_verify(void)
	495	{
	496	uint8_t ret;
	497
	498	ret = send_read_command(CMD_VERIFY);
	499	g_assert(ret == 0);
	500	}
	501
3359847e BS	502	/* success if no crash or abort */
	503	static void fuzz_registers(void)
	504	{
	505	unsigned int i;
	506
	507	for (i = 0; i < 1000; i++) {
	508	uint8_t reg, val;
	509
	510	reg = (uint8_t)g_test_rand_int_range(0, 8);
	511	val = (uint8_t)g_test_rand_int_range(0, 256);
	512
	513	outb(FLOPPY_BASE + reg, val);
	514	inb(FLOPPY_BASE + reg);
	515	}
	516	}
	517
93e9eb68 KW	518	int main(int argc, char **argv)
	519	{
	520	const char *arch = qtest_get_arch();
93e9eb68 KW	521	int fd;
	522	int ret;
	523
	524	/* Check architecture */
	525	if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
	526	g_test_message("Skipping test for non-x86\n");
	527	return 0;
	528	}
	529
	530	/* Create a temporary raw image */
	531	fd = mkstemp(test_image);
	532	g_assert(fd >= 0);
	533	ret = ftruncate(fd, TEST_IMAGE_SIZE);
	534	g_assert(ret == 0);
	535	close(fd);
	536
	537	/* Run the tests */
	538	g_test_init(&argc, &argv, NULL);
	539
b7fcff01	540	qtest_start(NULL);
93e9eb68	541	qtest_irq_intercept_in(global_qtest, "ioapic");
7cd33161 PH	542	qtest_add_func("/fdc/cmos", test_cmos);
7cd33161 PH	543	qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
8b9ef60d	544	qtest_add_func("/fdc/read_without_media", test_read_without_media);
93e9eb68	545	qtest_add_func("/fdc/media_change", test_media_change);
b3ce604e	546	qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
98272dbb	547	qtest_add_func("/fdc/relative_seek", test_relative_seek);
67f194bd	548	qtest_add_func("/fdc/read_id", test_read_id);
6f442fe8	549	qtest_add_func("/fdc/verify", test_verify);
44212dcc	550	qtest_add_func("/fdc/media_insert", test_media_insert);
5f8ae8e2 HP	551	qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
	552	qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
	553	qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
3359847e	554	qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
93e9eb68 KW	555
	556	ret = g_test_run();
	557
	558	/* Cleanup */
1d9358e6	559	qtest_end();
93e9eb68 KW	560	unlink(test_image);
	561
	562	return ret;
	563	}