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93e9eb68 KW |
1 | /* |
2 | * Floppy test cases. | |
3 | * | |
4 | * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #include <stdint.h> | |
26 | #include <string.h> | |
27 | #include <stdio.h> | |
28 | ||
29 | #include <glib.h> | |
30 | ||
31 | #include "libqtest.h" | |
32 | #include "qemu-common.h" | |
33 | ||
34 | #define TEST_IMAGE_SIZE 1440 * 1024 | |
35 | ||
36 | #define FLOPPY_BASE 0x3f0 | |
37 | #define FLOPPY_IRQ 6 | |
38 | ||
39 | enum { | |
40 | reg_sra = 0x0, | |
41 | reg_srb = 0x1, | |
42 | reg_dor = 0x2, | |
43 | reg_msr = 0x4, | |
44 | reg_dsr = 0x4, | |
45 | reg_fifo = 0x5, | |
46 | reg_dir = 0x7, | |
47 | }; | |
48 | ||
49 | enum { | |
98272dbb | 50 | CMD_SENSE_INT = 0x08, |
67f194bd | 51 | CMD_READ_ID = 0x0a, |
98272dbb PH |
52 | CMD_SEEK = 0x0f, |
53 | CMD_READ = 0xe6, | |
54 | CMD_RELATIVE_SEEK_OUT = 0x8f, | |
55 | CMD_RELATIVE_SEEK_IN = 0xcf, | |
93e9eb68 KW |
56 | }; |
57 | ||
58 | enum { | |
5f8ae8e2 HP |
59 | BUSY = 0x10, |
60 | NONDMA = 0x20, | |
93e9eb68 KW |
61 | RQM = 0x80, |
62 | DIO = 0x40, | |
63 | ||
64 | DSKCHG = 0x80, | |
65 | }; | |
66 | ||
67 | char test_image[] = "/tmp/qtest.XXXXXX"; | |
68 | ||
69 | #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask)) | |
70 | #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0) | |
71 | ||
7cd33161 PH |
72 | static uint8_t base = 0x70; |
73 | ||
74 | enum { | |
75 | CMOS_FLOPPY = 0x10, | |
76 | }; | |
77 | ||
93e9eb68 KW |
78 | static void floppy_send(uint8_t byte) |
79 | { | |
80 | uint8_t msr; | |
81 | ||
82 | msr = inb(FLOPPY_BASE + reg_msr); | |
83 | assert_bit_set(msr, RQM); | |
84 | assert_bit_clear(msr, DIO); | |
85 | ||
86 | outb(FLOPPY_BASE + reg_fifo, byte); | |
87 | } | |
88 | ||
89 | static uint8_t floppy_recv(void) | |
90 | { | |
91 | uint8_t msr; | |
92 | ||
93 | msr = inb(FLOPPY_BASE + reg_msr); | |
94 | assert_bit_set(msr, RQM | DIO); | |
95 | ||
96 | return inb(FLOPPY_BASE + reg_fifo); | |
97 | } | |
98 | ||
c3cdc1b0 KW |
99 | /* pcn: Present Cylinder Number */ |
100 | static void ack_irq(uint8_t *pcn) | |
93e9eb68 | 101 | { |
98272dbb PH |
102 | uint8_t ret; |
103 | ||
93e9eb68 KW |
104 | g_assert(get_irq(FLOPPY_IRQ)); |
105 | floppy_send(CMD_SENSE_INT); | |
106 | floppy_recv(); | |
c3cdc1b0 | 107 | |
98272dbb | 108 | ret = floppy_recv(); |
c3cdc1b0 KW |
109 | if (pcn != NULL) { |
110 | *pcn = ret; | |
111 | } | |
98272dbb | 112 | |
c3cdc1b0 | 113 | g_assert(!get_irq(FLOPPY_IRQ)); |
93e9eb68 KW |
114 | } |
115 | ||
8b9ef60d PH |
116 | static uint8_t send_read_command(void) |
117 | { | |
118 | uint8_t drive = 0; | |
119 | uint8_t head = 0; | |
120 | uint8_t cyl = 0; | |
121 | uint8_t sect_addr = 1; | |
122 | uint8_t sect_size = 2; | |
123 | uint8_t eot = 1; | |
124 | uint8_t gap = 0x1b; | |
125 | uint8_t gpl = 0xff; | |
126 | ||
127 | uint8_t msr = 0; | |
128 | uint8_t st0; | |
129 | ||
130 | uint8_t ret = 0; | |
131 | ||
132 | floppy_send(CMD_READ); | |
133 | floppy_send(head << 2 | drive); | |
134 | g_assert(!get_irq(FLOPPY_IRQ)); | |
135 | floppy_send(cyl); | |
136 | floppy_send(head); | |
137 | floppy_send(sect_addr); | |
138 | floppy_send(sect_size); | |
139 | floppy_send(eot); | |
140 | floppy_send(gap); | |
141 | floppy_send(gpl); | |
142 | ||
143 | uint8_t i = 0; | |
144 | uint8_t n = 2; | |
145 | for (; i < n; i++) { | |
146 | msr = inb(FLOPPY_BASE + reg_msr); | |
147 | if (msr == 0xd0) { | |
148 | break; | |
149 | } | |
150 | sleep(1); | |
151 | } | |
152 | ||
153 | if (i >= n) { | |
154 | return 1; | |
155 | } | |
156 | ||
157 | st0 = floppy_recv(); | |
075f5532 | 158 | if (st0 != 0x40) { |
8b9ef60d PH |
159 | ret = 1; |
160 | } | |
161 | ||
162 | floppy_recv(); | |
163 | floppy_recv(); | |
164 | floppy_recv(); | |
165 | floppy_recv(); | |
166 | floppy_recv(); | |
167 | floppy_recv(); | |
168 | ||
169 | return ret; | |
170 | } | |
171 | ||
5f8ae8e2 HP |
172 | static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0) |
173 | { | |
174 | uint8_t drive = 0; | |
175 | uint8_t head = 0; | |
176 | uint8_t cyl = 0; | |
177 | uint8_t sect_addr = 1; | |
178 | uint8_t sect_size = 2; | |
179 | uint8_t eot = nb_sect; | |
180 | uint8_t gap = 0x1b; | |
181 | uint8_t gpl = 0xff; | |
182 | ||
183 | uint8_t msr = 0; | |
184 | uint8_t st0; | |
185 | ||
186 | uint8_t ret = 0; | |
187 | ||
188 | floppy_send(CMD_READ); | |
189 | floppy_send(head << 2 | drive); | |
190 | g_assert(!get_irq(FLOPPY_IRQ)); | |
191 | floppy_send(cyl); | |
192 | floppy_send(head); | |
193 | floppy_send(sect_addr); | |
194 | floppy_send(sect_size); | |
195 | floppy_send(eot); | |
196 | floppy_send(gap); | |
197 | floppy_send(gpl); | |
198 | ||
199 | uint16_t i = 0; | |
200 | uint8_t n = 2; | |
201 | for (; i < n; i++) { | |
202 | msr = inb(FLOPPY_BASE + reg_msr); | |
203 | if (msr == (BUSY | NONDMA | DIO | RQM)) { | |
204 | break; | |
205 | } | |
206 | sleep(1); | |
207 | } | |
208 | ||
209 | if (i >= n) { | |
210 | return 1; | |
211 | } | |
212 | ||
213 | /* Non-DMA mode */ | |
214 | for (i = 0; i < 512 * 2 * nb_sect; i++) { | |
215 | msr = inb(FLOPPY_BASE + reg_msr); | |
216 | assert_bit_set(msr, BUSY | RQM | DIO); | |
217 | inb(FLOPPY_BASE + reg_fifo); | |
218 | } | |
219 | ||
220 | st0 = floppy_recv(); | |
221 | if (st0 != expected_st0) { | |
222 | ret = 1; | |
223 | } | |
224 | ||
225 | floppy_recv(); | |
226 | floppy_recv(); | |
227 | floppy_recv(); | |
228 | floppy_recv(); | |
229 | floppy_recv(); | |
230 | floppy_recv(); | |
231 | ||
232 | return ret; | |
233 | } | |
234 | ||
c3cdc1b0 | 235 | static void send_seek(int cyl) |
93e9eb68 KW |
236 | { |
237 | int drive = 0; | |
238 | int head = 0; | |
93e9eb68 KW |
239 | |
240 | floppy_send(CMD_SEEK); | |
241 | floppy_send(head << 2 | drive); | |
242 | g_assert(!get_irq(FLOPPY_IRQ)); | |
243 | floppy_send(cyl); | |
c3cdc1b0 | 244 | ack_irq(NULL); |
93e9eb68 KW |
245 | } |
246 | ||
7cd33161 | 247 | static uint8_t cmos_read(uint8_t reg) |
93e9eb68 | 248 | { |
7cd33161 PH |
249 | outb(base + 0, reg); |
250 | return inb(base + 1); | |
251 | } | |
93e9eb68 | 252 | |
7cd33161 PH |
253 | static void test_cmos(void) |
254 | { | |
255 | uint8_t cmos; | |
93e9eb68 | 256 | |
7cd33161 PH |
257 | cmos = cmos_read(CMOS_FLOPPY); |
258 | g_assert(cmos == 0x40); | |
259 | } | |
93e9eb68 | 260 | |
7cd33161 PH |
261 | static void test_no_media_on_start(void) |
262 | { | |
263 | uint8_t dir; | |
264 | ||
265 | /* Media changed bit must be set all time after start if there is | |
266 | * no media in drive. */ | |
93e9eb68 KW |
267 | dir = inb(FLOPPY_BASE + reg_dir); |
268 | assert_bit_set(dir, DSKCHG); | |
269 | dir = inb(FLOPPY_BASE + reg_dir); | |
270 | assert_bit_set(dir, DSKCHG); | |
c3cdc1b0 | 271 | send_seek(1); |
93e9eb68 KW |
272 | dir = inb(FLOPPY_BASE + reg_dir); |
273 | assert_bit_set(dir, DSKCHG); | |
274 | dir = inb(FLOPPY_BASE + reg_dir); | |
275 | assert_bit_set(dir, DSKCHG); | |
7cd33161 PH |
276 | } |
277 | ||
8b9ef60d PH |
278 | static void test_read_without_media(void) |
279 | { | |
280 | uint8_t ret; | |
281 | ||
282 | ret = send_read_command(); | |
283 | g_assert(ret == 0); | |
284 | } | |
285 | ||
1f507913 | 286 | static void test_media_insert(void) |
7cd33161 PH |
287 | { |
288 | uint8_t dir; | |
93e9eb68 | 289 | |
7cd33161 | 290 | /* Insert media in drive. DSKCHK should not be reset until a step pulse |
93e9eb68 KW |
291 | * is sent. */ |
292 | qmp("{'execute':'change', 'arguments':{ 'device':'floppy0', " | |
293 | "'target': '%s' }}", test_image); | |
294 | qmp(""); /* ignore event (FIXME open -> open transition?!) */ | |
295 | qmp(""); /* ignore event */ | |
296 | ||
297 | dir = inb(FLOPPY_BASE + reg_dir); | |
298 | assert_bit_set(dir, DSKCHG); | |
299 | dir = inb(FLOPPY_BASE + reg_dir); | |
300 | assert_bit_set(dir, DSKCHG); | |
301 | ||
c3cdc1b0 | 302 | send_seek(0); |
59240c34 PH |
303 | dir = inb(FLOPPY_BASE + reg_dir); |
304 | assert_bit_set(dir, DSKCHG); | |
305 | dir = inb(FLOPPY_BASE + reg_dir); | |
306 | assert_bit_set(dir, DSKCHG); | |
307 | ||
308 | /* Step to next track should clear DSKCHG bit. */ | |
c3cdc1b0 | 309 | send_seek(1); |
93e9eb68 KW |
310 | dir = inb(FLOPPY_BASE + reg_dir); |
311 | assert_bit_clear(dir, DSKCHG); | |
312 | dir = inb(FLOPPY_BASE + reg_dir); | |
313 | assert_bit_clear(dir, DSKCHG); | |
1f507913 HP |
314 | } |
315 | ||
316 | static void test_media_change(void) | |
317 | { | |
318 | uint8_t dir; | |
319 | ||
320 | test_media_insert(); | |
7cd33161 PH |
321 | |
322 | /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't | |
323 | * reset the bit. */ | |
324 | qmp("{'execute':'eject', 'arguments':{ 'device':'floppy0' }}"); | |
325 | qmp(""); /* ignore event */ | |
326 | ||
327 | dir = inb(FLOPPY_BASE + reg_dir); | |
328 | assert_bit_set(dir, DSKCHG); | |
329 | dir = inb(FLOPPY_BASE + reg_dir); | |
330 | assert_bit_set(dir, DSKCHG); | |
331 | ||
c3cdc1b0 | 332 | send_seek(0); |
59240c34 PH |
333 | dir = inb(FLOPPY_BASE + reg_dir); |
334 | assert_bit_set(dir, DSKCHG); | |
335 | dir = inb(FLOPPY_BASE + reg_dir); | |
336 | assert_bit_set(dir, DSKCHG); | |
337 | ||
c3cdc1b0 | 338 | send_seek(1); |
7cd33161 PH |
339 | dir = inb(FLOPPY_BASE + reg_dir); |
340 | assert_bit_set(dir, DSKCHG); | |
341 | dir = inb(FLOPPY_BASE + reg_dir); | |
342 | assert_bit_set(dir, DSKCHG); | |
93e9eb68 KW |
343 | } |
344 | ||
b3ce604e PH |
345 | static void test_sense_interrupt(void) |
346 | { | |
347 | int drive = 0; | |
348 | int head = 0; | |
349 | int cyl = 0; | |
350 | int ret = 0; | |
351 | ||
352 | floppy_send(CMD_SENSE_INT); | |
353 | ret = floppy_recv(); | |
354 | g_assert(ret == 0x80); | |
355 | ||
356 | floppy_send(CMD_SEEK); | |
357 | floppy_send(head << 2 | drive); | |
358 | g_assert(!get_irq(FLOPPY_IRQ)); | |
359 | floppy_send(cyl); | |
360 | ||
361 | floppy_send(CMD_SENSE_INT); | |
362 | ret = floppy_recv(); | |
363 | g_assert(ret == 0x20); | |
364 | floppy_recv(); | |
365 | } | |
366 | ||
98272dbb PH |
367 | static void test_relative_seek(void) |
368 | { | |
369 | uint8_t drive = 0; | |
370 | uint8_t head = 0; | |
371 | uint8_t cyl = 1; | |
c3cdc1b0 | 372 | uint8_t pcn; |
98272dbb PH |
373 | |
374 | /* Send seek to track 0 */ | |
c3cdc1b0 | 375 | send_seek(0); |
98272dbb PH |
376 | |
377 | /* Send relative seek to increase track by 1 */ | |
378 | floppy_send(CMD_RELATIVE_SEEK_IN); | |
379 | floppy_send(head << 2 | drive); | |
380 | g_assert(!get_irq(FLOPPY_IRQ)); | |
381 | floppy_send(cyl); | |
382 | ||
c3cdc1b0 KW |
383 | ack_irq(&pcn); |
384 | g_assert(pcn == 1); | |
98272dbb PH |
385 | |
386 | /* Send relative seek to decrease track by 1 */ | |
387 | floppy_send(CMD_RELATIVE_SEEK_OUT); | |
388 | floppy_send(head << 2 | drive); | |
389 | g_assert(!get_irq(FLOPPY_IRQ)); | |
390 | floppy_send(cyl); | |
391 | ||
c3cdc1b0 KW |
392 | ack_irq(&pcn); |
393 | g_assert(pcn == 0); | |
98272dbb PH |
394 | } |
395 | ||
67f194bd KW |
396 | static void test_read_id(void) |
397 | { | |
398 | uint8_t drive = 0; | |
399 | uint8_t head = 0; | |
400 | uint8_t cyl; | |
401 | uint8_t st0; | |
402 | ||
403 | /* Seek to track 0 and check with READ ID */ | |
404 | send_seek(0); | |
405 | ||
406 | floppy_send(CMD_READ_ID); | |
407 | g_assert(!get_irq(FLOPPY_IRQ)); | |
408 | floppy_send(head << 2 | drive); | |
409 | ||
410 | while (!get_irq(FLOPPY_IRQ)) { | |
411 | /* qemu involves a timer with READ ID... */ | |
412 | clock_step(1000000000LL / 50); | |
413 | } | |
414 | ||
415 | st0 = floppy_recv(); | |
416 | floppy_recv(); | |
417 | floppy_recv(); | |
418 | cyl = floppy_recv(); | |
419 | head = floppy_recv(); | |
420 | floppy_recv(); | |
421 | floppy_recv(); | |
422 | ||
423 | g_assert_cmpint(cyl, ==, 0); | |
424 | g_assert_cmpint(head, ==, 0); | |
425 | g_assert_cmpint(st0, ==, head << 2); | |
426 | ||
427 | /* Seek to track 8 on head 1 and check with READ ID */ | |
428 | head = 1; | |
429 | cyl = 8; | |
430 | ||
431 | floppy_send(CMD_SEEK); | |
432 | floppy_send(head << 2 | drive); | |
433 | g_assert(!get_irq(FLOPPY_IRQ)); | |
434 | floppy_send(cyl); | |
435 | g_assert(get_irq(FLOPPY_IRQ)); | |
436 | ack_irq(NULL); | |
437 | ||
438 | floppy_send(CMD_READ_ID); | |
439 | g_assert(!get_irq(FLOPPY_IRQ)); | |
440 | floppy_send(head << 2 | drive); | |
441 | ||
442 | while (!get_irq(FLOPPY_IRQ)) { | |
443 | /* qemu involves a timer with READ ID... */ | |
444 | clock_step(1000000000LL / 50); | |
445 | } | |
446 | ||
447 | st0 = floppy_recv(); | |
448 | floppy_recv(); | |
449 | floppy_recv(); | |
450 | cyl = floppy_recv(); | |
451 | head = floppy_recv(); | |
452 | floppy_recv(); | |
453 | floppy_recv(); | |
454 | ||
455 | g_assert_cmpint(cyl, ==, 8); | |
456 | g_assert_cmpint(head, ==, 1); | |
457 | g_assert_cmpint(st0, ==, head << 2); | |
458 | } | |
459 | ||
5f8ae8e2 HP |
460 | static void test_read_no_dma_1(void) |
461 | { | |
462 | uint8_t ret; | |
463 | ||
464 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
465 | send_seek(0); | |
075f5532 | 466 | ret = send_read_no_dma_command(1, 0x04); |
5f8ae8e2 HP |
467 | g_assert(ret == 0); |
468 | } | |
469 | ||
470 | static void test_read_no_dma_18(void) | |
471 | { | |
472 | uint8_t ret; | |
473 | ||
474 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
475 | send_seek(0); | |
075f5532 | 476 | ret = send_read_no_dma_command(18, 0x04); |
5f8ae8e2 HP |
477 | g_assert(ret == 0); |
478 | } | |
479 | ||
480 | static void test_read_no_dma_19(void) | |
481 | { | |
482 | uint8_t ret; | |
483 | ||
484 | outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08); | |
485 | send_seek(0); | |
486 | ret = send_read_no_dma_command(19, 0x20); | |
487 | g_assert(ret == 0); | |
488 | } | |
489 | ||
3359847e BS |
490 | /* success if no crash or abort */ |
491 | static void fuzz_registers(void) | |
492 | { | |
493 | unsigned int i; | |
494 | ||
495 | for (i = 0; i < 1000; i++) { | |
496 | uint8_t reg, val; | |
497 | ||
498 | reg = (uint8_t)g_test_rand_int_range(0, 8); | |
499 | val = (uint8_t)g_test_rand_int_range(0, 256); | |
500 | ||
501 | outb(FLOPPY_BASE + reg, val); | |
502 | inb(FLOPPY_BASE + reg); | |
503 | } | |
504 | } | |
505 | ||
93e9eb68 KW |
506 | int main(int argc, char **argv) |
507 | { | |
508 | const char *arch = qtest_get_arch(); | |
509 | char *cmdline; | |
510 | int fd; | |
511 | int ret; | |
512 | ||
513 | /* Check architecture */ | |
514 | if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) { | |
515 | g_test_message("Skipping test for non-x86\n"); | |
516 | return 0; | |
517 | } | |
518 | ||
519 | /* Create a temporary raw image */ | |
520 | fd = mkstemp(test_image); | |
521 | g_assert(fd >= 0); | |
522 | ret = ftruncate(fd, TEST_IMAGE_SIZE); | |
523 | g_assert(ret == 0); | |
524 | close(fd); | |
525 | ||
526 | /* Run the tests */ | |
527 | g_test_init(&argc, &argv, NULL); | |
528 | ||
7cd33161 | 529 | cmdline = g_strdup_printf("-vnc none "); |
93e9eb68 KW |
530 | |
531 | qtest_start(cmdline); | |
532 | qtest_irq_intercept_in(global_qtest, "ioapic"); | |
7cd33161 PH |
533 | qtest_add_func("/fdc/cmos", test_cmos); |
534 | qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start); | |
8b9ef60d | 535 | qtest_add_func("/fdc/read_without_media", test_read_without_media); |
93e9eb68 | 536 | qtest_add_func("/fdc/media_change", test_media_change); |
b3ce604e | 537 | qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt); |
98272dbb | 538 | qtest_add_func("/fdc/relative_seek", test_relative_seek); |
67f194bd | 539 | qtest_add_func("/fdc/read_id", test_read_id); |
44212dcc | 540 | qtest_add_func("/fdc/media_insert", test_media_insert); |
5f8ae8e2 HP |
541 | qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1); |
542 | qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18); | |
543 | qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19); | |
3359847e | 544 | qtest_add_func("/fdc/fuzz-registers", fuzz_registers); |
93e9eb68 KW |
545 | |
546 | ret = g_test_run(); | |
547 | ||
548 | /* Cleanup */ | |
549 | qtest_quit(global_qtest); | |
550 | unlink(test_image); | |
551 | ||
552 | return ret; | |
553 | } |