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bbfc2efe
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1/*
2 * QTest testcase for ivshmem
3 *
4 * Copyright (c) 2014 SUSE LINUX Products GmbH
ddef6a0d 5 * Copyright (c) 2015 Red Hat, Inc.
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6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
681c28a3 11#include "qemu/osdep.h"
bbfc2efe 12#include <glib.h>
ddef6a0d 13#include <glib/gstdio.h>
ddef6a0d 14#include <sys/mman.h>
ddef6a0d
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15#include "contrib/ivshmem-server/ivshmem-server.h"
16#include "libqos/pci-pc.h"
bbfc2efe 17#include "libqtest.h"
ddef6a0d 18#include "qemu-common.h"
bbfc2efe 19
ddef6a0d
MAL
20#define TMPSHMSIZE (1 << 20)
21static char *tmpshm;
22static void *tmpshmem;
23static char *tmpdir;
24static char *tmpserver;
bbfc2efe 25
ddef6a0d 26static void save_fn(QPCIDevice *dev, int devfn, void *data)
bbfc2efe 27{
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28 QPCIDevice **pdev = (QPCIDevice **) data;
29
30 *pdev = dev;
31}
32
1760048a 33static QPCIDevice *get_device(QPCIBus *pcibus)
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34{
35 QPCIDevice *dev;
ddef6a0d 36
16130947 37 dev = NULL;
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38 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
39 g_assert(dev != NULL);
40
41 return dev;
42}
43
44typedef struct _IVState {
45 QTestState *qtest;
46 void *reg_base, *mem_base;
1760048a 47 QPCIBus *pcibus;
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48 QPCIDevice *dev;
49} IVState;
50
51enum Reg {
52 INTRMASK = 0,
53 INTRSTATUS = 4,
54 IVPOSITION = 8,
55 DOORBELL = 12,
56};
57
58static const char* reg2str(enum Reg reg) {
59 switch (reg) {
60 case INTRMASK:
61 return "IntrMask";
62 case INTRSTATUS:
63 return "IntrStatus";
64 case IVPOSITION:
65 return "IVPosition";
66 case DOORBELL:
67 return "DoorBell";
68 default:
69 return NULL;
70 }
71}
72
73static inline unsigned in_reg(IVState *s, enum Reg reg)
74{
75 const char *name = reg2str(reg);
76 QTestState *qtest = global_qtest;
77 unsigned res;
78
79 global_qtest = s->qtest;
80 res = qpci_io_readl(s->dev, s->reg_base + reg);
81 g_test_message("*%s -> %x\n", name, res);
82 global_qtest = qtest;
83
84 return res;
85}
86
87static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
88{
89 const char *name = reg2str(reg);
90 QTestState *qtest = global_qtest;
91
92 global_qtest = s->qtest;
93 g_test_message("%x -> *%s\n", v, name);
94 qpci_io_writel(s->dev, s->reg_base + reg, v);
95 global_qtest = qtest;
96}
97
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98static void cleanup_vm(IVState *s)
99{
100 g_free(s->dev);
101 qpci_free_pc(s->pcibus);
102 qtest_quit(s->qtest);
103}
104
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105static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
106{
107 uint64_t barsize;
108
109 s->qtest = qtest_start(cmd);
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110 s->pcibus = qpci_init_pc();
111 s->dev = get_device(s->pcibus);
ddef6a0d 112
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113 s->reg_base = qpci_iomap(s->dev, 0, &barsize);
114 g_assert_nonnull(s->reg_base);
115 g_assert_cmpuint(barsize, ==, 256);
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116
117 if (msix) {
118 qpci_msix_enable(s->dev);
119 }
120
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121 s->mem_base = qpci_iomap(s->dev, 2, &barsize);
122 g_assert_nonnull(s->mem_base);
123 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
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124
125 qpci_device_enable(s->dev);
126}
127
128static void setup_vm(IVState *s)
129{
130 char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
131
132 setup_vm_cmd(s, cmd, false);
133
134 g_free(cmd);
135}
136
137static void test_ivshmem_single(void)
138{
139 IVState state, *s;
140 uint32_t data[1024];
141 int i;
142
143 setup_vm(&state);
144 s = &state;
145
146 /* valid io */
147 out_reg(s, INTRMASK, 0);
148 in_reg(s, INTRSTATUS);
149 in_reg(s, IVPOSITION);
150
151 out_reg(s, INTRMASK, 0xffffffff);
152 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
153 out_reg(s, INTRSTATUS, 1);
154 /* XXX: intercept IRQ, not seen in resp */
155 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
156
157 /* invalid io */
158 out_reg(s, IVPOSITION, 1);
159 out_reg(s, DOORBELL, 8 << 16);
160
161 for (i = 0; i < G_N_ELEMENTS(data); i++) {
162 data[i] = i;
163 }
164 qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
165
166 for (i = 0; i < G_N_ELEMENTS(data); i++) {
167 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
168 }
169
170 memset(data, 0, sizeof(data));
171
172 qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
173 for (i = 0; i < G_N_ELEMENTS(data); i++) {
174 g_assert_cmpuint(data[i], ==, i);
175 }
176
1760048a 177 cleanup_vm(s);
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178}
179
180static void test_ivshmem_pair(void)
181{
182 IVState state1, state2, *s1, *s2;
183 char *data;
184 int i;
185
186 setup_vm(&state1);
187 s1 = &state1;
188 setup_vm(&state2);
189 s2 = &state2;
190
191 data = g_malloc0(TMPSHMSIZE);
192
193 /* host write, guest 1 & 2 read */
194 memset(tmpshmem, 0x42, TMPSHMSIZE);
195 qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
196 for (i = 0; i < TMPSHMSIZE; i++) {
197 g_assert_cmpuint(data[i], ==, 0x42);
198 }
199 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
200 for (i = 0; i < TMPSHMSIZE; i++) {
201 g_assert_cmpuint(data[i], ==, 0x42);
202 }
203
204 /* guest 1 write, guest 2 read */
205 memset(data, 0x43, TMPSHMSIZE);
206 qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
207 memset(data, 0, TMPSHMSIZE);
208 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
209 for (i = 0; i < TMPSHMSIZE; i++) {
210 g_assert_cmpuint(data[i], ==, 0x43);
211 }
212
213 /* guest 2 write, guest 1 read */
214 memset(data, 0x44, TMPSHMSIZE);
215 qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
216 memset(data, 0, TMPSHMSIZE);
217 qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
218 for (i = 0; i < TMPSHMSIZE; i++) {
219 g_assert_cmpuint(data[i], ==, 0x44);
220 }
221
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222 cleanup_vm(s1);
223 cleanup_vm(s2);
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224 g_free(data);
225}
226
227typedef struct ServerThread {
228 GThread *thread;
229 IvshmemServer *server;
230 int pipe[2]; /* to handle quit */
231} ServerThread;
232
233static void *server_thread(void *data)
234{
235 ServerThread *t = data;
236 IvshmemServer *server = t->server;
237
238 while (true) {
239 fd_set fds;
240 int maxfd, ret;
241
242 FD_ZERO(&fds);
243 FD_SET(t->pipe[0], &fds);
244 maxfd = t->pipe[0] + 1;
245
246 ivshmem_server_get_fds(server, &fds, &maxfd);
247
248 ret = select(maxfd, &fds, NULL, NULL, NULL);
249
250 if (ret < 0) {
251 if (errno == EINTR) {
252 continue;
253 }
254
255 g_critical("select error: %s\n", strerror(errno));
256 break;
257 }
258 if (ret == 0) {
259 continue;
260 }
261
262 if (FD_ISSET(t->pipe[0], &fds)) {
263 break;
264 }
265
266 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
267 g_critical("ivshmem_server_handle_fds() failed\n");
268 break;
269 }
270 }
271
272 return NULL;
273}
274
00ffc3c1 275static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
ddef6a0d
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276{
277 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
00ffc3c1
MAL
278 "-device ivshmem,size=1M,chardev=chr0,vectors=%d,msi=%s",
279 tmpserver, nvectors, msi ? "true" : "false");
ddef6a0d 280
00ffc3c1 281 setup_vm_cmd(s, cmd, msi);
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282
283 g_free(cmd);
284}
285
00ffc3c1 286static void test_ivshmem_server(bool msi)
ddef6a0d
MAL
287{
288 IVState state1, state2, *s1, *s2;
289 ServerThread thread;
290 IvshmemServer server;
291 int ret, vm1, vm2;
292 int nvectors = 2;
293 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
294
295 memset(tmpshmem, 0x42, TMPSHMSIZE);
3625c739 296 ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
ddef6a0d
MAL
297 TMPSHMSIZE, nvectors,
298 g_test_verbose());
299 g_assert_cmpint(ret, ==, 0);
300
301 ret = ivshmem_server_start(&server);
302 g_assert_cmpint(ret, ==, 0);
303
00ffc3c1 304 setup_vm_with_server(&state1, nvectors, msi);
ddef6a0d 305 s1 = &state1;
00ffc3c1 306 setup_vm_with_server(&state2, nvectors, msi);
ddef6a0d
MAL
307 s2 = &state2;
308
309 g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
310 g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
311
312 g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
313
314 thread.server = &server;
315 ret = pipe(thread.pipe);
316 g_assert_cmpint(ret, ==, 0);
317 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
318 g_assert(thread.thread != NULL);
319
320 /* waiting until mapping is done */
321 while (g_get_monotonic_time() < end_time) {
322 g_usleep(1000);
323
324 if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
325 qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
326 break;
327 }
328 }
329
330 /* check got different VM ids */
331 vm1 = in_reg(s1, IVPOSITION);
332 vm2 = in_reg(s2, IVPOSITION);
333 g_assert_cmpuint(vm1, !=, vm2);
334
335 global_qtest = s1->qtest;
00ffc3c1
MAL
336 if (msi) {
337 ret = qpci_msix_table_size(s1->dev);
338 g_assert_cmpuint(ret, ==, nvectors);
339 }
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MAL
340
341 /* ping vm2 -> vm1 */
00ffc3c1
MAL
342 if (msi) {
343 ret = qpci_msix_pending(s1->dev, 0);
344 g_assert_cmpuint(ret, ==, 0);
345 } else {
346 out_reg(s1, INTRSTATUS, 0);
347 }
ddef6a0d
MAL
348 out_reg(s2, DOORBELL, vm1 << 16);
349 do {
350 g_usleep(10000);
00ffc3c1 351 ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
ddef6a0d
MAL
352 } while (ret == 0 && g_get_monotonic_time() < end_time);
353 g_assert_cmpuint(ret, !=, 0);
354
355 /* ping vm1 -> vm2 */
356 global_qtest = s2->qtest;
00ffc3c1
MAL
357 if (msi) {
358 ret = qpci_msix_pending(s2->dev, 0);
359 g_assert_cmpuint(ret, ==, 0);
360 } else {
361 out_reg(s2, INTRSTATUS, 0);
362 }
ddef6a0d
MAL
363 out_reg(s1, DOORBELL, vm2 << 16);
364 do {
365 g_usleep(10000);
00ffc3c1 366 ret = msi ? qpci_msix_pending(s2->dev, 0) : in_reg(s2, INTRSTATUS);
ddef6a0d
MAL
367 } while (ret == 0 && g_get_monotonic_time() < end_time);
368 g_assert_cmpuint(ret, !=, 0);
369
1760048a
MAL
370 cleanup_vm(s2);
371 cleanup_vm(s1);
ddef6a0d
MAL
372
373 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
374 g_error("qemu_write_full: %s", g_strerror(errno));
375 }
376
377 g_thread_join(thread.thread);
378
379 ivshmem_server_close(&server);
380 close(thread.pipe[1]);
381 close(thread.pipe[0]);
382}
383
00ffc3c1
MAL
384static void test_ivshmem_server_msi(void)
385{
386 test_ivshmem_server(true);
387}
388
389static void test_ivshmem_server_irq(void)
390{
391 test_ivshmem_server(false);
392}
393
ddef6a0d
MAL
394#define PCI_SLOT_HP 0x06
395
396static void test_ivshmem_hotplug(void)
397{
398 gchar *opts;
399
400 qtest_start("");
401
402 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
403
404 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
405 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
406
407 qtest_end();
408 g_free(opts);
409}
410
d9453c93
MAL
411static void test_ivshmem_memdev(void)
412{
413 IVState state;
414
415 /* just for the sake of checking memory-backend property */
416 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
1d649244 417 " -device ivshmem,x-memdev=mb1", false);
d9453c93 418
1760048a 419 cleanup_vm(&state);
d9453c93
MAL
420}
421
ddef6a0d
MAL
422static void cleanup(void)
423{
424 if (tmpshmem) {
425 munmap(tmpshmem, TMPSHMSIZE);
426 tmpshmem = NULL;
427 }
428
429 if (tmpshm) {
430 shm_unlink(tmpshm);
431 g_free(tmpshm);
432 tmpshm = NULL;
433 }
434
435 if (tmpserver) {
436 g_unlink(tmpserver);
437 g_free(tmpserver);
438 tmpserver = NULL;
439 }
440
441 if (tmpdir) {
442 g_rmdir(tmpdir);
443 tmpdir = NULL;
444 }
445}
446
447static void abrt_handler(void *data)
448{
449 cleanup();
450}
451
452static gchar *mktempshm(int size, int *fd)
453{
454 while (true) {
455 gchar *name;
456
457 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
458 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
459 S_IRWXU|S_IRWXG|S_IRWXO);
460 if (*fd > 0) {
461 g_assert(ftruncate(*fd, size) == 0);
462 return name;
463 }
464
465 g_free(name);
466
467 if (errno != EEXIST) {
468 perror("shm_open");
469 return NULL;
470 }
471 }
bbfc2efe
AF
472}
473
474int main(int argc, char **argv)
475{
bbfc2efe 476 int ret, fd;
ddef6a0d
MAL
477 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
478
479#if !GLIB_CHECK_VERSION(2, 31, 0)
480 if (!g_thread_supported()) {
481 g_thread_init(NULL);
482 }
483#endif
bbfc2efe
AF
484
485 g_test_init(&argc, &argv, NULL);
bbfc2efe 486
ddef6a0d
MAL
487 qtest_add_abrt_handler(abrt_handler, NULL);
488 /* shm */
489 tmpshm = mktempshm(TMPSHMSIZE, &fd);
490 if (!tmpshm) {
491 return 0;
492 }
493 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
494 g_assert(tmpshmem != MAP_FAILED);
495 /* server */
496 if (mkdtemp(dir) == NULL) {
497 g_error("mkdtemp: %s", g_strerror(errno));
498 }
499 tmpdir = dir;
500 tmpserver = g_strconcat(tmpdir, "/server", NULL);
bbfc2efe 501
ddef6a0d 502 qtest_add_func("/ivshmem/single", test_ivshmem_single);
ddef6a0d 503 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
d9453c93 504 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
2048a2a4
MAL
505 if (g_test_slow()) {
506 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
00ffc3c1
MAL
507 qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
508 qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
2048a2a4 509 }
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AF
510
511 ret = g_test_run();
512
ddef6a0d 513 cleanup();
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514
515 return ret;
516}