]> git.proxmox.com Git - mirror_qemu.git/blame - tests/q35-test.c
test-cutils: Add missing qemu_strtol()... endptr checks
[mirror_qemu.git] / tests / q35-test.c
CommitLineData
66e2ec24
GH
1/*
2 * QTest testcase for Q35 northbridge
3 *
4 * Copyright (c) 2015 Red Hat, Inc.
5 *
6 * Author: Gerd Hoffmann <kraxel@redhat.com>
7 *
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
10 */
11
681c28a3 12#include "qemu/osdep.h"
66e2ec24
GH
13#include "libqtest.h"
14#include "libqos/pci.h"
15#include "libqos/pci-pc.h"
66e2ec24
GH
16#include "hw/pci-host/q35.h"
17
18static void smram_set_bit(QPCIDevice *pcidev, uint8_t mask, bool enabled)
19{
20 uint8_t smram;
21
22 smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
23 if (enabled) {
24 smram |= mask;
25 } else {
26 smram &= ~mask;
27 }
28 qpci_config_writeb(pcidev, MCH_HOST_BRIDGE_SMRAM, smram);
29}
30
31static bool smram_test_bit(QPCIDevice *pcidev, uint8_t mask)
32{
33 uint8_t smram;
34
35 smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
36 return smram & mask;
37}
38
39static void test_smram_lock(void)
40{
41 QPCIBus *pcibus;
42 QPCIDevice *pcidev;
43 QDict *response;
44
2ecd7e2f 45 pcibus = qpci_init_pc(NULL);
66e2ec24
GH
46 g_assert(pcibus != NULL);
47
48 pcidev = qpci_device_find(pcibus, 0);
49 g_assert(pcidev != NULL);
50
51 /* check open is settable */
52 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
53 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
54 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
55 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
56
57 /* lock, check open is cleared & not settable */
58 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_LCK, true);
59 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
60 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
61 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
62
63 /* reset */
64 response = qmp("{'execute': 'system_reset', 'arguments': {} }");
65 g_assert(response);
66 g_assert(!qdict_haskey(response, "error"));
67 QDECREF(response);
68
69 /* check open is settable again */
70 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
71 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
72 smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
73 g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
74}
75
76int main(int argc, char **argv)
77{
78 int ret;
79
80 g_test_init(&argc, &argv, NULL);
81
82 qtest_add_func("/q35/smram/lock", test_smram_lock);
83
84 qtest_start("-M q35");
85 ret = g_test_run();
86 qtest_end();
87
88 return ret;
89}