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Commit | Line | Data |
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8ec8a55e AB |
1 | # -*- Mode: makefile -*- |
2 | # | |
3 | # AArch64 specific tweaks | |
4 | ||
fc76c56d PB |
5 | ARM_SRC=$(SRC_PATH)/tests/tcg/arm |
6 | VPATH += $(ARM_SRC) | |
7 | ||
8ec8a55e AB |
8 | AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64 |
9 | VPATH += $(AARCH64_SRC) | |
10 | ||
0bdce486 RH |
11 | # Base architecture tests |
12 | AARCH64_TESTS=fcvt pcalign-a64 | |
8ec8a55e AB |
13 | |
14 | fcvt: LDFLAGS+=-lm | |
15 | ||
16 | run-fcvt: fcvt | |
607bf9b5 AB |
17 | $(call run-test,$<,$(QEMU) $<, "$< on $(TARGET_NAME)") |
18 | $(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref) | |
06bf3b15 | 19 | |
15b273f8 PB |
20 | config-cc.mak: Makefile |
21 | $(quiet-@)( \ | |
22 | $(call cc-option,-march=armv8.1-a+sve, CROSS_CC_HAS_SVE); \ | |
23 | $(call cc-option,-march=armv8.1-a+sve2, CROSS_CC_HAS_SVE2); \ | |
c81e4ab3 | 24 | $(call cc-option,-march=armv8.2-a, CROSS_CC_HAS_ARMV8_2); \ |
15b273f8 | 25 | $(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3); \ |
c81e4ab3 | 26 | $(call cc-option,-march=armv8.5-a, CROSS_CC_HAS_ARMV8_5); \ |
15b273f8 | 27 | $(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \ |
bc6bd20e | 28 | $(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \ |
1f51573f | 29 | $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak |
15b273f8 PB |
30 | -include config-cc.mak |
31 | ||
c81e4ab3 ZS |
32 | ifneq ($(CROSS_CC_HAS_ARMV8_2),) |
33 | AARCH64_TESTS += dcpop | |
34 | dcpop: CFLAGS += -march=armv8.2-a | |
35 | endif | |
36 | ifneq ($(CROSS_CC_HAS_ARMV8_5),) | |
37 | AARCH64_TESTS += dcpodp | |
38 | dcpodp: CFLAGS += -march=armv8.5-a | |
39 | endif | |
40 | ||
72ab7f9e | 41 | # Pauth Tests |
f084839a | 42 | ifneq ($(CROSS_CC_HAS_ARMV8_3),) |
8796fe40 | 43 | AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5 |
fdd9b094 | 44 | pauth-%: CFLAGS += -march=armv8.3-a |
d16242e5 | 45 | run-pauth-%: QEMU_OPTS += -cpu max |
bb516dfc | 46 | endif |
06bf3b15 | 47 | |
1d9ac91b RH |
48 | # BTI Tests |
49 | # bti-1 tests the elf notes, so we require special compiler support. | |
f084839a | 50 | ifneq ($(CROSS_CC_HAS_ARMV8_BTI),) |
cda86e2b RH |
51 | AARCH64_TESTS += bti-1 bti-3 |
52 | bti-1 bti-3: CFLAGS += -mbranch-protection=standard | |
53 | bti-1 bti-3: LDFLAGS += -nostdlib | |
1d9ac91b RH |
54 | endif |
55 | # bti-2 tests PROT_BTI, so no special compiler support required. | |
56 | AARCH64_TESTS += bti-2 | |
57 | ||
36cd5fbd | 58 | # MTE Tests |
f084839a | 59 | ifneq ($(CROSS_CC_HAS_ARMV8_MTE),) |
d3327a38 | 60 | AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 |
36cd5fbd RH |
61 | mte-%: CFLAGS += -march=armv8.5-a+memtag |
62 | endif | |
63 | ||
1f51573f RH |
64 | # SME Tests |
65 | ifneq ($(CROSS_AS_HAS_ARMV9_SME),) | |
66 | AARCH64_TESTS += sme-outprod1 | |
67 | endif | |
68 | ||
fe185734 AB |
69 | # System Registers Tests |
70 | AARCH64_TESTS += sysregs | |
cf58773f | 71 | |
3dc2afea | 72 | ifneq ($(CROSS_CC_HAS_SVE),) |
2b6d6371 AB |
73 | # SVE ioctl test |
74 | AARCH64_TESTS += sve-ioctls | |
75 | sve-ioctls: CFLAGS+=-march=armv8.1-a+sve | |
76 | ||
ca1e9c3b RH |
77 | AARCH64_TESTS += test-aes |
78 | test-aes: CFLAGS += -O -march=armv8-a+aes | |
79 | test-aes: test-aes-main.c.inc | |
80 | ||
c96e593a AB |
81 | # Vector SHA1 |
82 | sha1-vector: CFLAGS=-O3 | |
83 | sha1-vector: sha1.c | |
84 | $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) | |
85 | run-sha1-vector: sha1-vector run-sha1 | |
c6cf8a20 | 86 | $(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<) |
c96e593a AB |
87 | $(call diff-out, sha1-vector, sha1.out) |
88 | ||
89 | TESTS += sha1-vector | |
90 | ||
f8a4c6d7 AB |
91 | # Vector versions of sha512 (-O3 triggers vectorisation) |
92 | sha512-vector: CFLAGS=-O3 | |
93 | sha512-vector: sha512.c | |
94 | $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) | |
95 | ||
96 | TESTS += sha512-vector | |
97 | ||
6d03226b AB |
98 | ifneq ($(CROSS_CC_HAS_SVE),) |
99 | sha512-sve: CFLAGS=-O3 -march=armv8.1-a+sve | |
100 | sha512-sve: sha512.c | |
101 | $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) | |
102 | ||
103 | TESTS += sha512-sve | |
104 | endif | |
105 | ||
bcbc36a9 | 106 | ifeq ($(HOST_GDB_SUPPORTS_ARCH),y) |
cf58773f AB |
107 | GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py |
108 | ||
cf58773f AB |
109 | run-gdbstub-sysregs: sysregs |
110 | $(call run-test, $@, $(GDB_SCRIPT) \ | |
111 | --gdb $(HAVE_GDB_BIN) \ | |
112 | --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \ | |
113 | --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \ | |
c6cf8a20 | 114 | basic gdbstub SVE support) |
f4a23e17 AB |
115 | |
116 | run-gdbstub-sve-ioctls: sve-ioctls | |
117 | $(call run-test, $@, $(GDB_SCRIPT) \ | |
118 | --gdb $(HAVE_GDB_BIN) \ | |
119 | --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \ | |
120 | --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve-ioctl.py, \ | |
c6cf8a20 | 121 | basic gdbstub SVE ZLEN support) |
df3ca223 AB |
122 | |
123 | EXTRA_RUNS += run-gdbstub-sysregs run-gdbstub-sve-ioctls | |
cf58773f | 124 | endif |
b17ab470 | 125 | endif |
cf58773f | 126 | |
f084839a | 127 | ifneq ($(CROSS_CC_HAS_SVE2),) |
b17ab470 RH |
128 | AARCH64_TESTS += test-826 |
129 | test-826: CFLAGS+=-march=armv8.1-a+sve2 | |
fe185734 AB |
130 | endif |
131 | ||
fc76c56d | 132 | TESTS += $(AARCH64_TESTS) |