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target/tricore: Implement FTOU insn
[mirror_qemu.git] / tests / tcg / loongarch64 / test_div.c
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fa50579a
SG
1#include <assert.h>
2#include <inttypes.h>
3#include <stdio.h>
4
5#define TEST_DIV(N, M) \
6static void test_div_ ##N(uint ## M ## _t rj, \
7 uint ## M ## _t rk, \
8 uint64_t rm) \
9{ \
10 uint64_t rd = 0; \
11 \
12 asm volatile("div."#N" %0,%1,%2\n\t" \
13 : "=r"(rd) \
14 : "r"(rj), "r"(rk) \
15 : ); \
16 assert(rd == rm); \
17}
18
19#define TEST_MOD(N, M) \
20static void test_mod_ ##N(uint ## M ## _t rj, \
21 uint ## M ## _t rk, \
22 uint64_t rm) \
23{ \
24 uint64_t rd = 0; \
25 \
26 asm volatile("mod."#N" %0,%1,%2\n\t" \
27 : "=r"(rd) \
28 : "r"(rj), "r"(rk) \
29 : ); \
30 assert(rd == rm); \
31}
32
33TEST_DIV(w, 32)
34TEST_DIV(wu, 32)
35TEST_DIV(d, 64)
36TEST_DIV(du, 64)
37TEST_MOD(w, 32)
38TEST_MOD(wu, 32)
39TEST_MOD(d, 64)
40TEST_MOD(du, 64)
41
42int main(void)
43{
44 test_div_w(0xffaced97, 0xc36abcde, 0x0);
45 test_div_wu(0xffaced97, 0xc36abcde, 0x1);
46 test_div_d(0xffaced973582005f, 0xef56832a358b, 0xffffffffffffffa8);
47 test_div_du(0xffaced973582005f, 0xef56832a358b, 0x11179);
48 test_mod_w(0x7cf18c32, 0xa04da650, 0x1d3f3282);
49 test_mod_wu(0x7cf18c32, 0xc04da650, 0x7cf18c32);
50 test_mod_d(0x7cf18c3200000000, 0xa04da65000000000, 0x1d3f328200000000);
51 test_mod_du(0x7cf18c3200000000, 0xc04da65000000000, 0x7cf18c3200000000);
52
53 return 0;
54}