[mirror_qemu.git] / tests / tcg / xtensa / macros.inc

#include "core-isa.h"

.macro test_suite name
.data
status: .word result
result: .space 256
.text
.global main
.align 4
main:
.endm

.macro reset_ps
    movi    a2, 0x4000f
    wsr     a2, ps
    isync
.endm

.macro test_suite_end
    reset_ps
    movi    a0, status
    l32i    a2, a0, 0
    movi    a0, result
    sub     a2, a2, a0
    movi    a3, 0
    loopnez a2, 1f
    l8ui    a2, a0, 0
    or      a3, a3, a2
    addi    a0, a0, 1
1:
    exit
.endm

.macro print text
.data
97: .ascii "\text\n"
98:
    .align 4
.text
    movi    a2, 4
    movi    a3, 2
    movi    a4, 97b
    movi    a5, 98b
    sub     a5, a5, a4
    simcall
.endm

.macro test_init
.endm

.macro test name
    //print test_\name
    test_init
test_\name:
.global test_\name
.endm

.macro test_end
99:
    reset_ps
    movi    a2, status
    l32i    a3, a2, 0
    addi    a3, a3, 1
    s32i    a3, a2, 0
.endm

.macro exit
    movi    a2, 1
    simcall
.endm

.macro test_fail
    movi    a2, status
    l32i    a2, a2, 0
    movi    a3, 1
    s8i     a3, a2, 0
    j       99f
.endm

.macro assert cond, arg1, arg2
    b\cond  \arg1, \arg2, 90f
    test_fail
90:
    nop
.endm

.macro set_vector vector, addr
    movi    a2, handler_\vector
    movi    a3, \addr
    s32i    a3, a2, 0
.endm
Commit	Line	Data
a2e67072 MF	1	#include "core-isa.h"
a2e67072 MF	2
7d890b40 MF	3	.macro test_suite name
	4	.data
	5	status: .word result
efdfac94	6	result: .space 256
7d890b40 MF	7	.text
	8	.global main
	9	.align 4
	10	main:
	11	.endm
	12
	13	.macro reset_ps
	14	movi a2, 0x4000f
	15	wsr a2, ps
	16	isync
	17	.endm
	18
	19	.macro test_suite_end
	20	reset_ps
	21	movi a0, status
	22	l32i a2, a0, 0
	23	movi a0, result
	24	sub a2, a2, a0
	25	movi a3, 0
	26	loopnez a2, 1f
	27	l8ui a2, a0, 0
	28	or a3, a3, a2
	29	addi a0, a0, 1
	30	1:
	31	exit
	32	.endm
	33
7d6b9f0a MF	34	.macro print text
	35	.data
	36	97: .ascii "\text\n"
	37	98:
	38	.align 4
	39	.text
	40	movi a2, 4
	41	movi a3, 2
	42	movi a4, 97b
	43	movi a5, 98b
	44	sub a5, a5, a4
	45	simcall
	46	.endm
	47
d0fa1f0d MF	48	.macro test_init
	49	.endm
	50
7d890b40	51	.macro test name
7d6b9f0a	52	//print test_\name
d0fa1f0d	53	test_init
7d6b9f0a MF	54	test_\name:
7d6b9f0a MF	55	.global test_\name
7d890b40 MF	56	.endm
	57
	58	.macro test_end
	59	99:
	60	reset_ps
	61	movi a2, status
	62	l32i a3, a2, 0
	63	addi a3, a3, 1
	64	s32i a3, a2, 0
	65	.endm
	66
	67	.macro exit
	68	movi a2, 1
	69	simcall
	70	.endm
	71
	72	.macro test_fail
	73	movi a2, status
	74	l32i a2, a2, 0
	75	movi a3, 1
	76	s8i a3, a2, 0
	77	j 99f
	78	.endm
	79
	80	.macro assert cond, arg1, arg2
	81	b\cond \arg1, \arg2, 90f
	82	test_fail
	83	90:
	84	nop
	85	.endm
	86
	87	.macro set_vector vector, addr
	88	movi a2, handler_\vector
	89	movi a3, \addr
	90	s32i a3, a2, 0
	91	.endm