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MF
1.include "macros.inc"
2
3test_suite sr
4
5.macro sr_op sym, op_sym, op_byte, sr
6 .if \sym
7 \op_sym a4, \sr
8 .else
9 .byte 0x40, \sr, \op_byte
10 .endif
11.endm
12
13.macro test_sr_op sym, mask, op, op_byte, sr
14 movi a4, 0
15 .if (\mask)
16 set_vector kernel, 0
17 sr_op \sym, \op, \op_byte, \sr
18 .else
19 set_vector kernel, 2f
201:
21 sr_op \sym, \op, \op_byte, \sr
22 test_fail
232:
24 reset_ps
25 rsr a2, exccause
26 assert eqi, a2, 0
27 rsr a2, epc1
28 movi a3, 1b
29 assert eq, a2, a3
30 .endif
31.endm
32
33.macro test_sr_mask sr, sym, mask
34test \sr
35 test_sr_op \sym, \mask & 1, rsr, 0x03, \sr
36 test_sr_op \sym, \mask & 2, wsr, 0x13, \sr
37 test_sr_op \sym, \mask & 4, xsr, 0x61, \sr
38test_end
39.endm
40
41.macro test_sr sr, conf
42 test_sr_mask \sr, \conf, 7
43.endm
44
45test_sr acchi, 1
46test_sr acclo, 1
47test_sr_mask /*atomctl*/99, 0, 0
48test_sr_mask /*br*/4, 0, 0
49test_sr_mask /*cacheattr*/98, 0, 0
50test_sr ccompare0, 1
51test_sr ccount, 1
52test_sr cpenable, 1
53test_sr dbreaka0, 1
54test_sr dbreakc0, 1
55test_sr_mask debugcause, 1, 1
56test_sr depc, 1
57test_sr dtlbcfg, 1
58test_sr epc1, 1
59test_sr epc2, 1
60test_sr eps2, 1
61test_sr exccause, 1
62test_sr excsave1, 1
63test_sr excsave2, 1
64test_sr excvaddr, 1
65test_sr ibreaka0, 1
66test_sr ibreakenable, 1
67test_sr icount, 1
68test_sr icountlevel, 1
69test_sr_mask /*intclear*/227, 0, 2
70test_sr_mask /*interrupt*/226, 0, 3
71test_sr intenable, 1
72test_sr itlbcfg, 1
73test_sr lbeg, 1
74test_sr lcount, 1
75test_sr lend, 1
76test_sr litbase, 1
77test_sr m0, 1
78test_sr misc0, 1
79test_sr_mask /*prefctl*/40, 0, 0
80test_sr_mask /*prid*/235, 0, 1
81test_sr ps, 1
82test_sr ptevaddr, 1
83test_sr rasid, 1
84test_sr sar, 1
85test_sr scompare1, 1
86test_sr vecbase, 1
87test_sr windowbase, 1
88test_sr windowstart, 1
89
90test_suite_end