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da0df92b CE |
1 | /* |
2 | edid.S: EDID data template | |
3 | ||
4 | Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org> | |
5 | ||
6 | This program is free software; you can redistribute it and/or | |
7 | modify it under the terms of the GNU General Public License | |
8 | as published by the Free Software Foundation; either version 2 | |
9 | of the License, or (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
19 | */ | |
20 | ||
21 | ||
22 | /* Manufacturer */ | |
23 | #define MFG_LNX1 'L' | |
24 | #define MFG_LNX2 'N' | |
25 | #define MFG_LNX3 'X' | |
26 | #define SERIAL 0 | |
27 | #define YEAR 2012 | |
28 | #define WEEK 5 | |
29 | ||
30 | /* EDID 1.3 standard definitions */ | |
31 | #define XY_RATIO_16_10 0b00 | |
32 | #define XY_RATIO_4_3 0b01 | |
33 | #define XY_RATIO_5_4 0b10 | |
34 | #define XY_RATIO_16_9 0b11 | |
35 | ||
4cbe1bfa DT |
36 | /* Provide defaults for the timing bits */ |
37 | #ifndef ESTABLISHED_TIMING1_BITS | |
38 | #define ESTABLISHED_TIMING1_BITS 0x00 | |
39 | #endif | |
40 | #ifndef ESTABLISHED_TIMING2_BITS | |
41 | #define ESTABLISHED_TIMING2_BITS 0x00 | |
42 | #endif | |
43 | #ifndef ESTABLISHED_TIMING3_BITS | |
44 | #define ESTABLISHED_TIMING3_BITS 0x00 | |
45 | #endif | |
46 | ||
da0df92b CE |
47 | #define mfgname2id(v1,v2,v3) \ |
48 | ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) | |
49 | #define swap16(v1) ((v1>>8)+((v1&0xff)<<8)) | |
d2f112a5 | 50 | #define lsbs2(v1,v2) (((v1&0x0f)<<4)+(v2&0x0f)) |
da0df92b CE |
51 | #define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f)) |
52 | #define msbs4(v1,v2,v3,v4) \ | |
d2f112a5 CN |
53 | ((((v1>>8)&0x03)<<6)+(((v2>>8)&0x03)<<4)+\ |
54 | (((v3>>4)&0x03)<<2)+((v4>>4)&0x03)) | |
da0df92b CE |
55 | #define pixdpi2mm(pix,dpi) ((pix*25)/dpi) |
56 | #define xsize pixdpi2mm(XPIX,DPI) | |
57 | #define ysize pixdpi2mm(YPIX,DPI) | |
58 | ||
59 | .data | |
60 | ||
61 | /* Fixed header pattern */ | |
62 | header: .byte 0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00 | |
63 | ||
bd283d2f | 64 | mfg_id: .hword swap16(mfgname2id(MFG_LNX1, MFG_LNX2, MFG_LNX3)) |
da0df92b | 65 | |
bd283d2f | 66 | prod_code: .hword 0 |
da0df92b CE |
67 | |
68 | /* Serial number. 32 bits, little endian. */ | |
69 | serial_number: .long SERIAL | |
70 | ||
71 | /* Week of manufacture */ | |
72 | week: .byte WEEK | |
73 | ||
74 | /* Year of manufacture, less 1990. (1990-2245) | |
75 | If week=255, it is the model year instead */ | |
76 | year: .byte YEAR-1990 | |
77 | ||
78 | version: .byte VERSION /* EDID version, usually 1 (for 1.3) */ | |
79 | revision: .byte REVISION /* EDID revision, usually 3 (for 1.3) */ | |
80 | ||
81 | /* If Bit 7=1 Digital input. If set, the following bit definitions apply: | |
82 | Bits 6-1 Reserved, must be 0 | |
83 | Bit 0 Signal is compatible with VESA DFP 1.x TMDS CRGB, | |
84 | 1 pixel per clock, up to 8 bits per color, MSB aligned, | |
85 | If Bit 7=0 Analog input. If clear, the following bit definitions apply: | |
86 | Bits 6-5 Video white and sync levels, relative to blank | |
87 | 00=+0.7/-0.3 V; 01=+0.714/-0.286 V; | |
88 | 10=+1.0/-0.4 V; 11=+0.7/0 V | |
89 | Bit 4 Blank-to-black setup (pedestal) expected | |
90 | Bit 3 Separate sync supported | |
91 | Bit 2 Composite sync (on HSync) supported | |
92 | Bit 1 Sync on green supported | |
93 | Bit 0 VSync pulse must be serrated when somposite or | |
94 | sync-on-green is used. */ | |
95 | video_parms: .byte 0x6d | |
96 | ||
97 | /* Maximum horizontal image size, in centimetres | |
98 | (max 292 cm/115 in at 16:9 aspect ratio) */ | |
99 | max_hor_size: .byte xsize/10 | |
100 | ||
101 | /* Maximum vertical image size, in centimetres. | |
102 | If either byte is 0, undefined (e.g. projector) */ | |
103 | max_vert_size: .byte ysize/10 | |
104 | ||
105 | /* Display gamma, minus 1, times 100 (range 1.00-3.5 */ | |
106 | gamma: .byte 120 | |
107 | ||
108 | /* Bit 7 DPMS standby supported | |
109 | Bit 6 DPMS suspend supported | |
110 | Bit 5 DPMS active-off supported | |
111 | Bits 4-3 Display type: 00=monochrome; 01=RGB colour; | |
112 | 10=non-RGB multicolour; 11=undefined | |
113 | Bit 2 Standard sRGB colour space. Bytes 25-34 must contain | |
114 | sRGB standard values. | |
115 | Bit 1 Preferred timing mode specified in descriptor block 1. | |
116 | Bit 0 GTF supported with default parameter values. */ | |
117 | dsp_features: .byte 0xea | |
118 | ||
119 | /* Chromaticity coordinates. */ | |
120 | /* Red and green least-significant bits | |
121 | Bits 7-6 Red x value least-significant 2 bits | |
122 | Bits 5-4 Red y value least-significant 2 bits | |
123 | Bits 3-2 Green x value lst-significant 2 bits | |
124 | Bits 1-0 Green y value least-significant 2 bits */ | |
125 | red_green_lsb: .byte 0x5e | |
126 | ||
127 | /* Blue and white least-significant 2 bits */ | |
128 | blue_white_lsb: .byte 0xc0 | |
129 | ||
130 | /* Red x value most significant 8 bits. | |
131 | 0-255 encodes 0-0.996 (255/256); 0-0.999 (1023/1024) with lsbits */ | |
132 | red_x_msb: .byte 0xa4 | |
133 | ||
134 | /* Red y value most significant 8 bits */ | |
135 | red_y_msb: .byte 0x59 | |
136 | ||
137 | /* Green x and y value most significant 8 bits */ | |
138 | green_x_y_msb: .byte 0x4a,0x98 | |
139 | ||
140 | /* Blue x and y value most significant 8 bits */ | |
141 | blue_x_y_msb: .byte 0x25,0x20 | |
142 | ||
143 | /* Default white point x and y value most significant 8 bits */ | |
144 | white_x_y_msb: .byte 0x50,0x54 | |
145 | ||
146 | /* Established timings */ | |
147 | /* Bit 7 720x400 @ 70 Hz | |
148 | Bit 6 720x400 @ 88 Hz | |
149 | Bit 5 640x480 @ 60 Hz | |
150 | Bit 4 640x480 @ 67 Hz | |
151 | Bit 3 640x480 @ 72 Hz | |
152 | Bit 2 640x480 @ 75 Hz | |
153 | Bit 1 800x600 @ 56 Hz | |
154 | Bit 0 800x600 @ 60 Hz */ | |
4cbe1bfa | 155 | estbl_timing1: .byte ESTABLISHED_TIMING1_BITS |
da0df92b CE |
156 | |
157 | /* Bit 7 800x600 @ 72 Hz | |
158 | Bit 6 800x600 @ 75 Hz | |
159 | Bit 5 832x624 @ 75 Hz | |
160 | Bit 4 1024x768 @ 87 Hz, interlaced (1024x768) | |
161 | Bit 3 1024x768 @ 60 Hz | |
162 | Bit 2 1024x768 @ 72 Hz | |
163 | Bit 1 1024x768 @ 75 Hz | |
164 | Bit 0 1280x1024 @ 75 Hz */ | |
4cbe1bfa | 165 | estbl_timing2: .byte ESTABLISHED_TIMING2_BITS |
da0df92b CE |
166 | |
167 | /* Bit 7 1152x870 @ 75 Hz (Apple Macintosh II) | |
168 | Bits 6-0 Other manufacturer-specific display mod */ | |
4cbe1bfa | 169 | estbl_timing3: .byte ESTABLISHED_TIMING3_BITS |
da0df92b CE |
170 | |
171 | /* Standard timing */ | |
172 | /* X resolution, less 31, divided by 8 (256-2288 pixels) */ | |
173 | std_xres: .byte (XPIX/8)-31 | |
174 | /* Y resolution, X:Y pixel ratio | |
175 | Bits 7-6 X:Y pixel ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9. | |
176 | Bits 5-0 Vertical frequency, less 60 (60-123 Hz) */ | |
177 | std_vres: .byte (XY_RATIO<<6)+VFREQ-60 | |
178 | .fill 7,2,0x0101 /* Unused */ | |
179 | ||
180 | descriptor1: | |
181 | /* Pixel clock in 10 kHz units. (0.-655.35 MHz, little-endian) */ | |
bd283d2f | 182 | clock: .hword CLOCK/10 |
da0df92b CE |
183 | |
184 | /* Horizontal active pixels 8 lsbits (0-4095) */ | |
185 | x_act_lsb: .byte XPIX&0xff | |
186 | /* Horizontal blanking pixels 8 lsbits (0-4095) | |
187 | End of active to start of next active. */ | |
188 | x_blk_lsb: .byte XBLANK&0xff | |
189 | /* Bits 7-4 Horizontal active pixels 4 msbits | |
190 | Bits 3-0 Horizontal blanking pixels 4 msbits */ | |
191 | x_msbs: .byte msbs2(XPIX,XBLANK) | |
192 | ||
193 | /* Vertical active lines 8 lsbits (0-4095) */ | |
194 | y_act_lsb: .byte YPIX&0xff | |
195 | /* Vertical blanking lines 8 lsbits (0-4095) */ | |
196 | y_blk_lsb: .byte YBLANK&0xff | |
197 | /* Bits 7-4 Vertical active lines 4 msbits | |
198 | Bits 3-0 Vertical blanking lines 4 msbits */ | |
199 | y_msbs: .byte msbs2(YPIX,YBLANK) | |
200 | ||
201 | /* Horizontal sync offset pixels 8 lsbits (0-1023) From blanking start */ | |
202 | x_snc_off_lsb: .byte XOFFSET&0xff | |
203 | /* Horizontal sync pulse width pixels 8 lsbits (0-1023) */ | |
204 | x_snc_pls_lsb: .byte XPULSE&0xff | |
d2f112a5 CN |
205 | /* Bits 7-4 Vertical sync offset lines 4 lsbits (0-63) |
206 | Bits 3-0 Vertical sync pulse width lines 4 lsbits (0-63) */ | |
207 | y_snc_lsb: .byte lsbs2(YOFFSET, YPULSE) | |
da0df92b CE |
208 | /* Bits 7-6 Horizontal sync offset pixels 2 msbits |
209 | Bits 5-4 Horizontal sync pulse width pixels 2 msbits | |
210 | Bits 3-2 Vertical sync offset lines 2 msbits | |
211 | Bits 1-0 Vertical sync pulse width lines 2 msbits */ | |
212 | xy_snc_msbs: .byte msbs4(XOFFSET,XPULSE,YOFFSET,YPULSE) | |
213 | ||
214 | /* Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in) */ | |
215 | x_dsp_size: .byte xsize&0xff | |
216 | ||
217 | /* Vertical display size, mm, 8 lsbits (0-4095 mm, 161 in) */ | |
218 | y_dsp_size: .byte ysize&0xff | |
219 | ||
220 | /* Bits 7-4 Horizontal display size, mm, 4 msbits | |
221 | Bits 3-0 Vertical display size, mm, 4 msbits */ | |
222 | dsp_size_mbsb: .byte msbs2(xsize,ysize) | |
223 | ||
224 | /* Horizontal border pixels (each side; total is twice this) */ | |
225 | x_border: .byte 0 | |
226 | /* Vertical border lines (each side; total is twice this) */ | |
227 | y_border: .byte 0 | |
228 | ||
229 | /* Bit 7 Interlaced | |
230 | Bits 6-5 Stereo mode: 00=No stereo; other values depend on bit 0: | |
231 | Bit 0=0: 01=Field sequential, sync=1 during right; 10=similar, | |
232 | sync=1 during left; 11=4-way interleaved stereo | |
233 | Bit 0=1 2-way interleaved stereo: 01=Right image on even lines; | |
234 | 10=Left image on even lines; 11=side-by-side | |
235 | Bits 4-3 Sync type: 00=Analog composite; 01=Bipolar analog composite; | |
236 | 10=Digital composite (on HSync); 11=Digital separate | |
237 | Bit 2 If digital separate: Vertical sync polarity (1=positive) | |
238 | Other types: VSync serrated (HSync during VSync) | |
239 | Bit 1 If analog sync: Sync on all 3 RGB lines (else green only) | |
240 | Digital: HSync polarity (1=positive) | |
241 | Bit 0 2-way line-interleaved stereo, if bits 4-3 are not 00. */ | |
242 | features: .byte 0x18+(VSYNC_POL<<2)+(HSYNC_POL<<1) | |
243 | ||
244 | descriptor2: .byte 0,0 /* Not a detailed timing descriptor */ | |
245 | .byte 0 /* Must be zero */ | |
246 | .byte 0xff /* Descriptor is monitor serial number (text) */ | |
247 | .byte 0 /* Must be zero */ | |
248 | start1: .ascii "Linux #0" | |
249 | end1: .byte 0x0a /* End marker */ | |
250 | .fill 12-(end1-start1), 1, 0x20 /* Padded spaces */ | |
251 | descriptor3: .byte 0,0 /* Not a detailed timing descriptor */ | |
252 | .byte 0 /* Must be zero */ | |
253 | .byte 0xfd /* Descriptor is monitor range limits */ | |
254 | .byte 0 /* Must be zero */ | |
255 | start2: .byte VFREQ-1 /* Minimum vertical field rate (1-255 Hz) */ | |
256 | .byte VFREQ+1 /* Maximum vertical field rate (1-255 Hz) */ | |
257 | .byte (CLOCK/(XPIX+XBLANK))-1 /* Minimum horizontal line rate | |
258 | (1-255 kHz) */ | |
259 | .byte (CLOCK/(XPIX+XBLANK))+1 /* Maximum horizontal line rate | |
260 | (1-255 kHz) */ | |
261 | .byte (CLOCK/10000)+1 /* Maximum pixel clock rate, rounded up | |
262 | to 10 MHz multiple (10-2550 MHz) */ | |
263 | .byte 0 /* No extended timing information type */ | |
264 | end2: .byte 0x0a /* End marker */ | |
265 | .fill 12-(end2-start2), 1, 0x20 /* Padded spaces */ | |
266 | descriptor4: .byte 0,0 /* Not a detailed timing descriptor */ | |
267 | .byte 0 /* Must be zero */ | |
268 | .byte 0xfc /* Descriptor is text */ | |
269 | .byte 0 /* Must be zero */ | |
270 | start3: .ascii TIMING_NAME | |
271 | end3: .byte 0x0a /* End marker */ | |
272 | .fill 12-(end3-start3), 1, 0x20 /* Padded spaces */ | |
273 | extensions: .byte 0 /* Number of extensions to follow */ | |
274 | checksum: .byte CRC /* Sum of all bytes must be 0 */ |