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perf regs x86: Add X86 specific arch__intr_reg_mask()
[mirror_ubuntu-hirsute-kernel.git] / tools / perf / arch / x86 / util / perf_regs.c
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b2441318 1// SPDX-License-Identifier: GPL-2.0
a43783ae 2#include <errno.h>
3b1f8311 3#include <string.h>
d451a205 4#include <regex.h>
3b1f8311 5
c5e991ee 6#include "../../perf.h"
3b1f8311 7#include "../../util/util.h"
c5e991ee 8#include "../../util/perf_regs.h"
d451a205 9#include "../../util/debug.h"
c5e991ee 10
c5e991ee 11const struct sample_reg sample_reg_masks[] = {
af4aeadd
SE
12 SMPL_REG(AX, PERF_REG_X86_AX),
13 SMPL_REG(BX, PERF_REG_X86_BX),
14 SMPL_REG(CX, PERF_REG_X86_CX),
15 SMPL_REG(DX, PERF_REG_X86_DX),
16 SMPL_REG(SI, PERF_REG_X86_SI),
17 SMPL_REG(DI, PERF_REG_X86_DI),
18 SMPL_REG(BP, PERF_REG_X86_BP),
19 SMPL_REG(SP, PERF_REG_X86_SP),
20 SMPL_REG(IP, PERF_REG_X86_IP),
21 SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
22 SMPL_REG(CS, PERF_REG_X86_CS),
23 SMPL_REG(SS, PERF_REG_X86_SS),
c5e991ee 24#ifdef HAVE_ARCH_X86_64_SUPPORT
af4aeadd
SE
25 SMPL_REG(R8, PERF_REG_X86_R8),
26 SMPL_REG(R9, PERF_REG_X86_R9),
27 SMPL_REG(R10, PERF_REG_X86_R10),
28 SMPL_REG(R11, PERF_REG_X86_R11),
29 SMPL_REG(R12, PERF_REG_X86_R12),
30 SMPL_REG(R13, PERF_REG_X86_R13),
31 SMPL_REG(R14, PERF_REG_X86_R14),
32 SMPL_REG(R15, PERF_REG_X86_R15),
c5e991ee 33#endif
ca138a7a
AK
34 SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
35 SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
36 SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
37 SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
38 SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
39 SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
40 SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
41 SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
42 SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
43 SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
44 SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
45 SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
46 SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
47 SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
48 SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
49 SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
af4aeadd 50 SMPL_REG_END
c5e991ee 51};
3b1f8311
AB
52
53struct sdt_name_reg {
54 const char *sdt_name;
55 const char *uprobe_name;
56};
57#define SDT_NAME_REG(n, m) {.sdt_name = "%" #n, .uprobe_name = "%" #m}
58#define SDT_NAME_REG_END {.sdt_name = NULL, .uprobe_name = NULL}
59
d451a205 60static const struct sdt_name_reg sdt_reg_tbl[] = {
3b1f8311
AB
61 SDT_NAME_REG(eax, ax),
62 SDT_NAME_REG(rax, ax),
2d01ecc5
RB
63 SDT_NAME_REG(al, ax),
64 SDT_NAME_REG(ah, ax),
3b1f8311
AB
65 SDT_NAME_REG(ebx, bx),
66 SDT_NAME_REG(rbx, bx),
2d01ecc5
RB
67 SDT_NAME_REG(bl, bx),
68 SDT_NAME_REG(bh, bx),
3b1f8311
AB
69 SDT_NAME_REG(ecx, cx),
70 SDT_NAME_REG(rcx, cx),
2d01ecc5
RB
71 SDT_NAME_REG(cl, cx),
72 SDT_NAME_REG(ch, cx),
3b1f8311
AB
73 SDT_NAME_REG(edx, dx),
74 SDT_NAME_REG(rdx, dx),
2d01ecc5
RB
75 SDT_NAME_REG(dl, dx),
76 SDT_NAME_REG(dh, dx),
3b1f8311
AB
77 SDT_NAME_REG(esi, si),
78 SDT_NAME_REG(rsi, si),
8544d24c 79 SDT_NAME_REG(sil, si),
3b1f8311
AB
80 SDT_NAME_REG(edi, di),
81 SDT_NAME_REG(rdi, di),
8544d24c 82 SDT_NAME_REG(dil, di),
3b1f8311
AB
83 SDT_NAME_REG(ebp, bp),
84 SDT_NAME_REG(rbp, bp),
8544d24c
RB
85 SDT_NAME_REG(bpl, bp),
86 SDT_NAME_REG(rsp, sp),
87 SDT_NAME_REG(esp, sp),
88 SDT_NAME_REG(spl, sp),
89
90 /* rNN registers */
91 SDT_NAME_REG(r8b, r8),
92 SDT_NAME_REG(r8w, r8),
93 SDT_NAME_REG(r8d, r8),
94 SDT_NAME_REG(r9b, r9),
95 SDT_NAME_REG(r9w, r9),
96 SDT_NAME_REG(r9d, r9),
97 SDT_NAME_REG(r10b, r10),
98 SDT_NAME_REG(r10w, r10),
99 SDT_NAME_REG(r10d, r10),
100 SDT_NAME_REG(r11b, r11),
101 SDT_NAME_REG(r11w, r11),
102 SDT_NAME_REG(r11d, r11),
103 SDT_NAME_REG(r12b, r12),
104 SDT_NAME_REG(r12w, r12),
105 SDT_NAME_REG(r12d, r12),
106 SDT_NAME_REG(r13b, r13),
107 SDT_NAME_REG(r13w, r13),
108 SDT_NAME_REG(r13d, r13),
109 SDT_NAME_REG(r14b, r14),
110 SDT_NAME_REG(r14w, r14),
111 SDT_NAME_REG(r14d, r14),
112 SDT_NAME_REG(r15b, r15),
113 SDT_NAME_REG(r15w, r15),
114 SDT_NAME_REG(r15d, r15),
3b1f8311
AB
115 SDT_NAME_REG_END,
116};
117
d451a205
RB
118/*
119 * Perf only supports OP which is in +/-NUM(REG) form.
120 * Here plus-minus sign, NUM and parenthesis are optional,
121 * only REG is mandatory.
122 *
123 * SDT events also supports indirect addressing mode with a
124 * symbol as offset, scaled mode and constants in OP. But
125 * perf does not support them yet. Below are few examples.
126 *
127 * OP with scaled mode:
128 * (%rax,%rsi,8)
129 * 10(%ras,%rsi,8)
130 *
131 * OP with indirect addressing mode:
132 * check_action(%rip)
133 * mp_+52(%rip)
134 * 44+mp_(%rip)
135 *
136 * OP with constant values:
137 * $0
138 * $123
139 * $-1
140 */
141#define SDT_OP_REGEX "^([+\\-]?)([0-9]*)(\\(?)(%[a-z][a-z0-9]+)(\\)?)$"
142
143static regex_t sdt_op_regex;
144
145static int sdt_init_op_regex(void)
3b1f8311 146{
d451a205
RB
147 static int initialized;
148 int ret = 0;
3b1f8311 149
d451a205 150 if (initialized)
3b1f8311
AB
151 return 0;
152
d451a205
RB
153 ret = regcomp(&sdt_op_regex, SDT_OP_REGEX, REG_EXTENDED);
154 if (ret < 0) {
155 pr_debug4("Regex compilation error.\n");
156 return ret;
157 }
3b1f8311 158
d451a205
RB
159 initialized = 1;
160 return 0;
161}
3b1f8311 162
d451a205
RB
163/*
164 * Max x86 register name length is 5(ex: %r15d). So, 6th char
165 * should always contain NULL. This helps to find register name
166 * length using strlen, insted of maintaing one more variable.
167 */
168#define SDT_REG_NAME_SIZE 6
3b1f8311 169
d451a205
RB
170/*
171 * The uprobe parser does not support all gas register names;
172 * so, we have to replace them (ex. for x86_64: %rax -> %ax).
173 * Note: If register does not require renaming, just copy
174 * paste as it is, but don't leave it empty.
175 */
176static void sdt_rename_register(char *sdt_reg, int sdt_len, char *uprobe_reg)
177{
178 int i = 0;
3b1f8311 179
d451a205
RB
180 for (i = 0; sdt_reg_tbl[i].sdt_name != NULL; i++) {
181 if (!strncmp(sdt_reg_tbl[i].sdt_name, sdt_reg, sdt_len)) {
182 strcpy(uprobe_reg, sdt_reg_tbl[i].uprobe_name);
183 return;
184 }
185 }
3b1f8311 186
d451a205
RB
187 strncpy(uprobe_reg, sdt_reg, sdt_len);
188}
3b1f8311 189
d451a205
RB
190int arch_sdt_arg_parse_op(char *old_op, char **new_op)
191{
192 char new_reg[SDT_REG_NAME_SIZE] = {0};
193 int new_len = 0, ret;
194 /*
195 * rm[0]: +/-NUM(REG)
196 * rm[1]: +/-
197 * rm[2]: NUM
198 * rm[3]: (
199 * rm[4]: REG
200 * rm[5]: )
201 */
202 regmatch_t rm[6];
203 /*
204 * Max prefix length is 2 as it may contains sign(+/-)
205 * and displacement 0 (Both sign and displacement 0 are
206 * optional so it may be empty). Use one more character
207 * to hold last NULL so that strlen can be used to find
208 * prefix length, instead of maintaing one more variable.
209 */
210 char prefix[3] = {0};
211
212 ret = sdt_init_op_regex();
213 if (ret < 0)
214 return ret;
215
216 /*
217 * If unsupported OR does not match with regex OR
218 * register name too long, skip it.
219 */
220 if (strchr(old_op, ',') || strchr(old_op, '$') ||
221 regexec(&sdt_op_regex, old_op, 6, rm, 0) ||
222 rm[4].rm_eo - rm[4].rm_so > SDT_REG_NAME_SIZE) {
223 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
224 return SDT_ARG_SKIP;
225 }
226
227 /*
228 * Prepare prefix.
229 * If SDT OP has parenthesis but does not provide
230 * displacement, add 0 for displacement.
231 * SDT Uprobe Prefix
232 * -----------------------------
233 * +24(%rdi) +24(%di) +
234 * 24(%rdi) +24(%di) +
235 * %rdi %di
236 * (%rdi) +0(%di) +0
237 * -80(%rbx) -80(%bx) -
238 */
239 if (rm[3].rm_so != rm[3].rm_eo) {
240 if (rm[1].rm_so != rm[1].rm_eo)
241 prefix[0] = *(old_op + rm[1].rm_so);
242 else if (rm[2].rm_so != rm[2].rm_eo)
243 prefix[0] = '+';
244 else
a09603f8 245 scnprintf(prefix, sizeof(prefix), "+0");
d451a205
RB
246 }
247
248 /* Rename register */
249 sdt_rename_register(old_op + rm[4].rm_so, rm[4].rm_eo - rm[4].rm_so,
250 new_reg);
251
252 /* Prepare final OP which should be valid for uprobe_events */
253 new_len = strlen(prefix) +
254 (rm[2].rm_eo - rm[2].rm_so) +
255 (rm[3].rm_eo - rm[3].rm_so) +
256 strlen(new_reg) +
257 (rm[5].rm_eo - rm[5].rm_so) +
258 1; /* NULL */
259
260 *new_op = zalloc(new_len);
261 if (!*new_op)
262 return -ENOMEM;
263
264 scnprintf(*new_op, new_len, "%.*s%.*s%.*s%.*s%.*s",
265 strlen(prefix), prefix,
266 (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
267 (int)(rm[3].rm_eo - rm[3].rm_so), old_op + rm[3].rm_so,
268 strlen(new_reg), new_reg,
269 (int)(rm[5].rm_eo - rm[5].rm_so), old_op + rm[5].rm_so);
270
271 return SDT_ARG_VALID;
3b1f8311 272}
6466ec14
KL
273
274uint64_t arch__intr_reg_mask(void)
275{
276 struct perf_event_attr attr = {
277 .type = PERF_TYPE_HARDWARE,
278 .config = PERF_COUNT_HW_CPU_CYCLES,
279 .sample_type = PERF_SAMPLE_REGS_INTR,
280 .sample_regs_intr = PERF_XMM_REGS_MASK,
281 .precise_ip = 1,
282 .disabled = 1,
283 .exclude_kernel = 1,
284 };
285 int fd;
286 /*
287 * In an unnamed union, init it here to build on older gcc versions
288 */
289 attr.sample_period = 1;
290
291 event_attr_init(&attr);
292
293 fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
294 if (fd != -1) {
295 close(fd);
296 return (PERF_XMM_REGS_MASK | PERF_REGS_MASK);
297 }
298
299 return PERF_REGS_MASK;
300}