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Commit | Line | Data |
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ddcacfa0 | 1 | /* |
bf9e1876 IM |
2 | * builtin-stat.c |
3 | * | |
4 | * Builtin stat command: Give a precise performance counters summary | |
5 | * overview about any workload, CPU or specific PID. | |
6 | * | |
7 | * Sample output: | |
ddcacfa0 | 8 | |
2cba3ffb | 9 | $ perf stat ./hackbench 10 |
ddcacfa0 | 10 | |
2cba3ffb | 11 | Time: 0.118 |
ddcacfa0 | 12 | |
2cba3ffb | 13 | Performance counter stats for './hackbench 10': |
ddcacfa0 | 14 | |
2cba3ffb IM |
15 | 1708.761321 task-clock # 11.037 CPUs utilized |
16 | 41,190 context-switches # 0.024 M/sec | |
17 | 6,735 CPU-migrations # 0.004 M/sec | |
18 | 17,318 page-faults # 0.010 M/sec | |
19 | 5,205,202,243 cycles # 3.046 GHz | |
20 | 3,856,436,920 stalled-cycles-frontend # 74.09% frontend cycles idle | |
21 | 1,600,790,871 stalled-cycles-backend # 30.75% backend cycles idle | |
22 | 2,603,501,247 instructions # 0.50 insns per cycle | |
23 | # 1.48 stalled cycles per insn | |
24 | 484,357,498 branches # 283.455 M/sec | |
25 | 6,388,934 branch-misses # 1.32% of all branches | |
26 | ||
27 | 0.154822978 seconds time elapsed | |
ddcacfa0 | 28 | |
5242519b | 29 | * |
2cba3ffb | 30 | * Copyright (C) 2008-2011, Red Hat Inc, Ingo Molnar <mingo@redhat.com> |
5242519b IM |
31 | * |
32 | * Improvements and fixes by: | |
33 | * | |
34 | * Arjan van de Ven <arjan@linux.intel.com> | |
35 | * Yanmin Zhang <yanmin.zhang@intel.com> | |
36 | * Wu Fengguang <fengguang.wu@intel.com> | |
37 | * Mike Galbraith <efault@gmx.de> | |
38 | * Paul Mackerras <paulus@samba.org> | |
6e750a8f | 39 | * Jaswinder Singh Rajput <jaswinder@kernel.org> |
5242519b IM |
40 | * |
41 | * Released under the GPL v2. (and only v2, not any later version) | |
ddcacfa0 IM |
42 | */ |
43 | ||
1a482f38 | 44 | #include "perf.h" |
16f762a2 | 45 | #include "builtin.h" |
148be2c1 | 46 | #include "util/util.h" |
5242519b IM |
47 | #include "util/parse-options.h" |
48 | #include "util/parse-events.h" | |
8f28827a | 49 | #include "util/event.h" |
361c99a6 | 50 | #include "util/evlist.h" |
69aad6f1 | 51 | #include "util/evsel.h" |
8f28827a | 52 | #include "util/debug.h" |
a5d243d0 | 53 | #include "util/color.h" |
0007ecea | 54 | #include "util/stat.h" |
60666c63 | 55 | #include "util/header.h" |
a12b51c4 | 56 | #include "util/cpumap.h" |
d6d901c2 | 57 | #include "util/thread.h" |
fd78260b | 58 | #include "util/thread_map.h" |
ddcacfa0 | 59 | |
1f16c575 | 60 | #include <stdlib.h> |
ddcacfa0 | 61 | #include <sys/prctl.h> |
5af52b51 | 62 | #include <locale.h> |
16c8a109 | 63 | |
d7470b6a | 64 | #define DEFAULT_SEPARATOR " " |
2cee77c4 DA |
65 | #define CNTR_NOT_SUPPORTED "<not supported>" |
66 | #define CNTR_NOT_COUNTED "<not counted>" | |
d7470b6a | 67 | |
13370a9b SE |
68 | static void print_stat(int argc, const char **argv); |
69 | static void print_counter_aggr(struct perf_evsel *counter, char *prefix); | |
70 | static void print_counter(struct perf_evsel *counter, char *prefix); | |
86ee6e18 | 71 | static void print_aggr(char *prefix); |
13370a9b | 72 | |
666e6d48 | 73 | static struct perf_evlist *evsel_list; |
361c99a6 | 74 | |
77a6f014 NK |
75 | static struct perf_target target = { |
76 | .uid = UINT_MAX, | |
77 | }; | |
ddcacfa0 | 78 | |
86ee6e18 SE |
79 | enum aggr_mode { |
80 | AGGR_NONE, | |
81 | AGGR_GLOBAL, | |
82 | AGGR_SOCKET, | |
12c08a9f | 83 | AGGR_CORE, |
86ee6e18 SE |
84 | }; |
85 | ||
3d632595 | 86 | static int run_count = 1; |
2e6cdf99 | 87 | static bool no_inherit = false; |
c0555642 | 88 | static bool scale = true; |
86ee6e18 | 89 | static enum aggr_mode aggr_mode = AGGR_GLOBAL; |
d07f0b12 | 90 | static volatile pid_t child_pid = -1; |
c0555642 | 91 | static bool null_run = false; |
2cba3ffb | 92 | static int detailed_run = 0; |
201e0b06 | 93 | static bool big_num = true; |
d7470b6a | 94 | static int big_num_opt = -1; |
d7470b6a SE |
95 | static const char *csv_sep = NULL; |
96 | static bool csv_output = false; | |
43bece79 | 97 | static bool group = false; |
4aa9015f | 98 | static FILE *output = NULL; |
1f16c575 PZ |
99 | static const char *pre_cmd = NULL; |
100 | static const char *post_cmd = NULL; | |
101 | static bool sync_run = false; | |
13370a9b | 102 | static unsigned int interval = 0; |
a7e191c3 | 103 | static bool forever = false; |
13370a9b | 104 | static struct timespec ref_time; |
86ee6e18 SE |
105 | static struct cpu_map *aggr_map; |
106 | static int (*aggr_get_id)(struct cpu_map *m, int cpu); | |
5af52b51 | 107 | |
60666c63 LW |
108 | static volatile int done = 0; |
109 | ||
69aad6f1 ACM |
110 | struct perf_stat { |
111 | struct stats res_stats[3]; | |
69aad6f1 ACM |
112 | }; |
113 | ||
13370a9b SE |
114 | static inline void diff_timespec(struct timespec *r, struct timespec *a, |
115 | struct timespec *b) | |
116 | { | |
117 | r->tv_sec = a->tv_sec - b->tv_sec; | |
118 | if (a->tv_nsec < b->tv_nsec) { | |
119 | r->tv_nsec = a->tv_nsec + 1000000000L - b->tv_nsec; | |
120 | r->tv_sec--; | |
121 | } else { | |
122 | r->tv_nsec = a->tv_nsec - b->tv_nsec ; | |
123 | } | |
124 | } | |
125 | ||
126 | static inline struct cpu_map *perf_evsel__cpus(struct perf_evsel *evsel) | |
127 | { | |
128 | return (evsel->cpus && !target.cpu_list) ? evsel->cpus : evsel_list->cpus; | |
129 | } | |
130 | ||
131 | static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel) | |
132 | { | |
133 | return perf_evsel__cpus(evsel)->nr; | |
134 | } | |
135 | ||
a7e191c3 FD |
136 | static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel) |
137 | { | |
138 | memset(evsel->priv, 0, sizeof(struct perf_stat)); | |
139 | } | |
140 | ||
c52b12ed | 141 | static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel) |
69aad6f1 | 142 | { |
c52b12ed | 143 | evsel->priv = zalloc(sizeof(struct perf_stat)); |
69aad6f1 ACM |
144 | return evsel->priv == NULL ? -ENOMEM : 0; |
145 | } | |
146 | ||
147 | static void perf_evsel__free_stat_priv(struct perf_evsel *evsel) | |
148 | { | |
149 | free(evsel->priv); | |
150 | evsel->priv = NULL; | |
151 | } | |
152 | ||
13370a9b | 153 | static int perf_evsel__alloc_prev_raw_counts(struct perf_evsel *evsel) |
7ae92e74 | 154 | { |
13370a9b SE |
155 | void *addr; |
156 | size_t sz; | |
157 | ||
158 | sz = sizeof(*evsel->counts) + | |
159 | (perf_evsel__nr_cpus(evsel) * sizeof(struct perf_counts_values)); | |
160 | ||
161 | addr = zalloc(sz); | |
162 | if (!addr) | |
163 | return -ENOMEM; | |
164 | ||
165 | evsel->prev_raw_counts = addr; | |
166 | ||
167 | return 0; | |
7ae92e74 YZ |
168 | } |
169 | ||
13370a9b | 170 | static void perf_evsel__free_prev_raw_counts(struct perf_evsel *evsel) |
7ae92e74 | 171 | { |
13370a9b SE |
172 | free(evsel->prev_raw_counts); |
173 | evsel->prev_raw_counts = NULL; | |
7ae92e74 YZ |
174 | } |
175 | ||
d134ffb9 ACM |
176 | static void perf_evlist__free_stats(struct perf_evlist *evlist) |
177 | { | |
178 | struct perf_evsel *evsel; | |
179 | ||
180 | list_for_each_entry(evsel, &evlist->entries, node) { | |
181 | perf_evsel__free_stat_priv(evsel); | |
182 | perf_evsel__free_counts(evsel); | |
183 | perf_evsel__free_prev_raw_counts(evsel); | |
184 | } | |
185 | } | |
186 | ||
187 | static int perf_evlist__alloc_stats(struct perf_evlist *evlist, bool alloc_raw) | |
188 | { | |
189 | struct perf_evsel *evsel; | |
190 | ||
191 | list_for_each_entry(evsel, &evlist->entries, node) { | |
192 | if (perf_evsel__alloc_stat_priv(evsel) < 0 || | |
193 | perf_evsel__alloc_counts(evsel, perf_evsel__nr_cpus(evsel)) < 0 || | |
194 | (alloc_raw && perf_evsel__alloc_prev_raw_counts(evsel) < 0)) | |
195 | goto out_free; | |
196 | } | |
197 | ||
198 | return 0; | |
199 | ||
200 | out_free: | |
201 | perf_evlist__free_stats(evlist); | |
202 | return -1; | |
203 | } | |
204 | ||
666e6d48 RR |
205 | static struct stats runtime_nsecs_stats[MAX_NR_CPUS]; |
206 | static struct stats runtime_cycles_stats[MAX_NR_CPUS]; | |
207 | static struct stats runtime_stalled_cycles_front_stats[MAX_NR_CPUS]; | |
208 | static struct stats runtime_stalled_cycles_back_stats[MAX_NR_CPUS]; | |
209 | static struct stats runtime_branches_stats[MAX_NR_CPUS]; | |
210 | static struct stats runtime_cacherefs_stats[MAX_NR_CPUS]; | |
211 | static struct stats runtime_l1_dcache_stats[MAX_NR_CPUS]; | |
212 | static struct stats runtime_l1_icache_stats[MAX_NR_CPUS]; | |
213 | static struct stats runtime_ll_cache_stats[MAX_NR_CPUS]; | |
214 | static struct stats runtime_itlb_cache_stats[MAX_NR_CPUS]; | |
215 | static struct stats runtime_dtlb_cache_stats[MAX_NR_CPUS]; | |
216 | static struct stats walltime_nsecs_stats; | |
be1ac0d8 | 217 | |
d134ffb9 | 218 | static void perf_stat__reset_stats(struct perf_evlist *evlist) |
a7e191c3 | 219 | { |
d134ffb9 ACM |
220 | struct perf_evsel *evsel; |
221 | ||
222 | list_for_each_entry(evsel, &evlist->entries, node) { | |
223 | perf_evsel__reset_stat_priv(evsel); | |
224 | perf_evsel__reset_counts(evsel, perf_evsel__nr_cpus(evsel)); | |
225 | } | |
226 | ||
a7e191c3 FD |
227 | memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats)); |
228 | memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats)); | |
229 | memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats)); | |
230 | memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats)); | |
231 | memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats)); | |
232 | memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats)); | |
233 | memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats)); | |
234 | memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats)); | |
235 | memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats)); | |
236 | memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats)); | |
237 | memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats)); | |
238 | memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats)); | |
239 | } | |
240 | ||
cac21425 | 241 | static int create_perf_stat_counter(struct perf_evsel *evsel) |
ddcacfa0 | 242 | { |
69aad6f1 | 243 | struct perf_event_attr *attr = &evsel->attr; |
727ab04e | 244 | |
ddcacfa0 | 245 | if (scale) |
a21ca2ca IM |
246 | attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | |
247 | PERF_FORMAT_TOTAL_TIME_RUNNING; | |
ddcacfa0 | 248 | |
5d2cd909 ACM |
249 | attr->inherit = !no_inherit; |
250 | ||
594ac61a ACM |
251 | if (perf_target__has_cpu(&target)) |
252 | return perf_evsel__open_per_cpu(evsel, perf_evsel__cpus(evsel)); | |
5622c07b | 253 | |
07ac002f | 254 | if (!perf_target__has_task(&target) && |
823254ed | 255 | perf_evsel__is_group_leader(evsel)) { |
48290609 ACM |
256 | attr->disabled = 1; |
257 | attr->enable_on_exec = 1; | |
ddcacfa0 | 258 | } |
084ab9f8 | 259 | |
594ac61a | 260 | return perf_evsel__open_per_thread(evsel, evsel_list->threads); |
ddcacfa0 IM |
261 | } |
262 | ||
c04f5e5d IM |
263 | /* |
264 | * Does the counter have nsecs as a unit? | |
265 | */ | |
daec78a0 | 266 | static inline int nsec_counter(struct perf_evsel *evsel) |
c04f5e5d | 267 | { |
daec78a0 ACM |
268 | if (perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) || |
269 | perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK)) | |
c04f5e5d IM |
270 | return 1; |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
dcd9936a IM |
275 | /* |
276 | * Update various tracking values we maintain to print | |
277 | * more semantic information such as miss/hit ratios, | |
278 | * instruction rates, etc: | |
279 | */ | |
280 | static void update_shadow_stats(struct perf_evsel *counter, u64 *count) | |
281 | { | |
282 | if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK)) | |
283 | update_stats(&runtime_nsecs_stats[0], count[0]); | |
284 | else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES)) | |
285 | update_stats(&runtime_cycles_stats[0], count[0]); | |
d3d1e86d IM |
286 | else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) |
287 | update_stats(&runtime_stalled_cycles_front_stats[0], count[0]); | |
129c04cb | 288 | else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND)) |
d3d1e86d | 289 | update_stats(&runtime_stalled_cycles_back_stats[0], count[0]); |
dcd9936a IM |
290 | else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS)) |
291 | update_stats(&runtime_branches_stats[0], count[0]); | |
292 | else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES)) | |
293 | update_stats(&runtime_cacherefs_stats[0], count[0]); | |
8bb6c79f IM |
294 | else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D)) |
295 | update_stats(&runtime_l1_dcache_stats[0], count[0]); | |
c3305257 IM |
296 | else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I)) |
297 | update_stats(&runtime_l1_icache_stats[0], count[0]); | |
298 | else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL)) | |
299 | update_stats(&runtime_ll_cache_stats[0], count[0]); | |
300 | else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB)) | |
301 | update_stats(&runtime_dtlb_cache_stats[0], count[0]); | |
302 | else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB)) | |
303 | update_stats(&runtime_itlb_cache_stats[0], count[0]); | |
dcd9936a IM |
304 | } |
305 | ||
c04f5e5d | 306 | /* |
2996f5dd | 307 | * Read out the results of a single counter: |
f5b4a9c3 | 308 | * aggregate counts across CPUs in system-wide mode |
c04f5e5d | 309 | */ |
c52b12ed | 310 | static int read_counter_aggr(struct perf_evsel *counter) |
c04f5e5d | 311 | { |
69aad6f1 | 312 | struct perf_stat *ps = counter->priv; |
c52b12ed ACM |
313 | u64 *count = counter->counts->aggr.values; |
314 | int i; | |
2996f5dd | 315 | |
7ae92e74 | 316 | if (__perf_evsel__read(counter, perf_evsel__nr_cpus(counter), |
b3a319d5 | 317 | thread_map__nr(evsel_list->threads), scale) < 0) |
c52b12ed | 318 | return -1; |
9e9772c4 PZ |
319 | |
320 | for (i = 0; i < 3; i++) | |
69aad6f1 | 321 | update_stats(&ps->res_stats[i], count[i]); |
9e9772c4 PZ |
322 | |
323 | if (verbose) { | |
4aa9015f | 324 | fprintf(output, "%s: %" PRIu64 " %" PRIu64 " %" PRIu64 "\n", |
7289f83c | 325 | perf_evsel__name(counter), count[0], count[1], count[2]); |
9e9772c4 PZ |
326 | } |
327 | ||
be1ac0d8 IM |
328 | /* |
329 | * Save the full runtime - to allow normalization during printout: | |
330 | */ | |
dcd9936a | 331 | update_shadow_stats(counter, count); |
c52b12ed ACM |
332 | |
333 | return 0; | |
f5b4a9c3 SE |
334 | } |
335 | ||
336 | /* | |
337 | * Read out the results of a single counter: | |
338 | * do not aggregate counts across CPUs in system-wide mode | |
339 | */ | |
c52b12ed | 340 | static int read_counter(struct perf_evsel *counter) |
f5b4a9c3 | 341 | { |
c52b12ed | 342 | u64 *count; |
f5b4a9c3 | 343 | int cpu; |
f5b4a9c3 | 344 | |
7ae92e74 | 345 | for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) { |
c52b12ed ACM |
346 | if (__perf_evsel__read_on_cpu(counter, cpu, 0, scale) < 0) |
347 | return -1; | |
f5b4a9c3 | 348 | |
c52b12ed | 349 | count = counter->counts->cpu[cpu].values; |
f5b4a9c3 | 350 | |
dcd9936a | 351 | update_shadow_stats(counter, count); |
f5b4a9c3 | 352 | } |
c52b12ed ACM |
353 | |
354 | return 0; | |
2996f5dd IM |
355 | } |
356 | ||
13370a9b SE |
357 | static void print_interval(void) |
358 | { | |
359 | static int num_print_interval; | |
360 | struct perf_evsel *counter; | |
361 | struct perf_stat *ps; | |
362 | struct timespec ts, rs; | |
363 | char prefix[64]; | |
364 | ||
86ee6e18 | 365 | if (aggr_mode == AGGR_GLOBAL) { |
13370a9b SE |
366 | list_for_each_entry(counter, &evsel_list->entries, node) { |
367 | ps = counter->priv; | |
368 | memset(ps->res_stats, 0, sizeof(ps->res_stats)); | |
86ee6e18 | 369 | read_counter_aggr(counter); |
13370a9b | 370 | } |
86ee6e18 | 371 | } else { |
13370a9b SE |
372 | list_for_each_entry(counter, &evsel_list->entries, node) { |
373 | ps = counter->priv; | |
374 | memset(ps->res_stats, 0, sizeof(ps->res_stats)); | |
86ee6e18 | 375 | read_counter(counter); |
13370a9b SE |
376 | } |
377 | } | |
86ee6e18 | 378 | |
13370a9b SE |
379 | clock_gettime(CLOCK_MONOTONIC, &ts); |
380 | diff_timespec(&rs, &ts, &ref_time); | |
381 | sprintf(prefix, "%6lu.%09lu%s", rs.tv_sec, rs.tv_nsec, csv_sep); | |
382 | ||
383 | if (num_print_interval == 0 && !csv_output) { | |
86ee6e18 SE |
384 | switch (aggr_mode) { |
385 | case AGGR_SOCKET: | |
d7e7a451 | 386 | fprintf(output, "# time socket cpus counts events\n"); |
86ee6e18 | 387 | break; |
12c08a9f SE |
388 | case AGGR_CORE: |
389 | fprintf(output, "# time core cpus counts events\n"); | |
390 | break; | |
86ee6e18 | 391 | case AGGR_NONE: |
13370a9b | 392 | fprintf(output, "# time CPU counts events\n"); |
86ee6e18 SE |
393 | break; |
394 | case AGGR_GLOBAL: | |
395 | default: | |
13370a9b | 396 | fprintf(output, "# time counts events\n"); |
86ee6e18 | 397 | } |
13370a9b SE |
398 | } |
399 | ||
400 | if (++num_print_interval == 25) | |
401 | num_print_interval = 0; | |
402 | ||
86ee6e18 | 403 | switch (aggr_mode) { |
12c08a9f | 404 | case AGGR_CORE: |
86ee6e18 SE |
405 | case AGGR_SOCKET: |
406 | print_aggr(prefix); | |
407 | break; | |
408 | case AGGR_NONE: | |
13370a9b SE |
409 | list_for_each_entry(counter, &evsel_list->entries, node) |
410 | print_counter(counter, prefix); | |
86ee6e18 SE |
411 | break; |
412 | case AGGR_GLOBAL: | |
413 | default: | |
13370a9b SE |
414 | list_for_each_entry(counter, &evsel_list->entries, node) |
415 | print_counter_aggr(counter, prefix); | |
416 | } | |
417 | } | |
418 | ||
acf28922 | 419 | static int __run_perf_stat(int argc, const char **argv) |
42202dd5 | 420 | { |
56e52e85 | 421 | char msg[512]; |
42202dd5 | 422 | unsigned long long t0, t1; |
cac21425 | 423 | struct perf_evsel *counter; |
13370a9b | 424 | struct timespec ts; |
42202dd5 | 425 | int status = 0; |
6be2850e | 426 | const bool forks = (argc > 0); |
42202dd5 | 427 | |
13370a9b SE |
428 | if (interval) { |
429 | ts.tv_sec = interval / 1000; | |
430 | ts.tv_nsec = (interval % 1000) * 1000000; | |
431 | } else { | |
432 | ts.tv_sec = 1; | |
433 | ts.tv_nsec = 0; | |
434 | } | |
435 | ||
60666c63 | 436 | if (forks) { |
acf28922 NK |
437 | if (perf_evlist__prepare_workload(evsel_list, &target, argv, |
438 | false, false) < 0) { | |
439 | perror("failed to prepare workload"); | |
440 | return -1; | |
60666c63 | 441 | } |
051ae7f7 PM |
442 | } |
443 | ||
6a4bb04c | 444 | if (group) |
63dab225 | 445 | perf_evlist__set_leader(evsel_list); |
6a4bb04c | 446 | |
361c99a6 | 447 | list_for_each_entry(counter, &evsel_list->entries, node) { |
cac21425 | 448 | if (create_perf_stat_counter(counter) < 0) { |
979987a5 DA |
449 | /* |
450 | * PPC returns ENXIO for HW counters until 2.6.37 | |
451 | * (behavior changed with commit b0a873e). | |
452 | */ | |
38f6ae1e | 453 | if (errno == EINVAL || errno == ENOSYS || |
979987a5 DA |
454 | errno == ENOENT || errno == EOPNOTSUPP || |
455 | errno == ENXIO) { | |
c63ca0c0 DA |
456 | if (verbose) |
457 | ui__warning("%s event is not supported by the kernel.\n", | |
7289f83c | 458 | perf_evsel__name(counter)); |
2cee77c4 | 459 | counter->supported = false; |
ede70290 | 460 | continue; |
c63ca0c0 | 461 | } |
ede70290 | 462 | |
56e52e85 ACM |
463 | perf_evsel__open_strerror(counter, &target, |
464 | errno, msg, sizeof(msg)); | |
465 | ui__error("%s\n", msg); | |
466 | ||
48290609 ACM |
467 | if (child_pid != -1) |
468 | kill(child_pid, SIGTERM); | |
fceda7fe | 469 | |
48290609 ACM |
470 | return -1; |
471 | } | |
2cee77c4 | 472 | counter->supported = true; |
084ab9f8 | 473 | } |
42202dd5 | 474 | |
1491a632 | 475 | if (perf_evlist__apply_filters(evsel_list)) { |
cfd748ae FW |
476 | error("failed to set filter with %d (%s)\n", errno, |
477 | strerror(errno)); | |
478 | return -1; | |
479 | } | |
480 | ||
42202dd5 IM |
481 | /* |
482 | * Enable counters and exec the command: | |
483 | */ | |
484 | t0 = rdclock(); | |
13370a9b | 485 | clock_gettime(CLOCK_MONOTONIC, &ref_time); |
42202dd5 | 486 | |
60666c63 | 487 | if (forks) { |
acf28922 NK |
488 | perf_evlist__start_workload(evsel_list); |
489 | ||
13370a9b SE |
490 | if (interval) { |
491 | while (!waitpid(child_pid, &status, WNOHANG)) { | |
492 | nanosleep(&ts, NULL); | |
493 | print_interval(); | |
494 | } | |
495 | } | |
60666c63 | 496 | wait(&status); |
33e49ea7 AK |
497 | if (WIFSIGNALED(status)) |
498 | psignal(WTERMSIG(status), argv[0]); | |
60666c63 | 499 | } else { |
13370a9b SE |
500 | while (!done) { |
501 | nanosleep(&ts, NULL); | |
502 | if (interval) | |
503 | print_interval(); | |
504 | } | |
60666c63 | 505 | } |
42202dd5 | 506 | |
42202dd5 IM |
507 | t1 = rdclock(); |
508 | ||
9e9772c4 | 509 | update_stats(&walltime_nsecs_stats, t1 - t0); |
42202dd5 | 510 | |
86ee6e18 | 511 | if (aggr_mode == AGGR_GLOBAL) { |
361c99a6 | 512 | list_for_each_entry(counter, &evsel_list->entries, node) { |
f5b4a9c3 | 513 | read_counter_aggr(counter); |
7ae92e74 | 514 | perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter), |
b3a319d5 | 515 | thread_map__nr(evsel_list->threads)); |
c52b12ed | 516 | } |
86ee6e18 SE |
517 | } else { |
518 | list_for_each_entry(counter, &evsel_list->entries, node) { | |
519 | read_counter(counter); | |
520 | perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter), 1); | |
521 | } | |
f5b4a9c3 | 522 | } |
c52b12ed | 523 | |
42202dd5 IM |
524 | return WEXITSTATUS(status); |
525 | } | |
526 | ||
1f16c575 PZ |
527 | static int run_perf_stat(int argc __maybe_unused, const char **argv) |
528 | { | |
529 | int ret; | |
530 | ||
531 | if (pre_cmd) { | |
532 | ret = system(pre_cmd); | |
533 | if (ret) | |
534 | return ret; | |
535 | } | |
536 | ||
537 | if (sync_run) | |
538 | sync(); | |
539 | ||
540 | ret = __run_perf_stat(argc, argv); | |
541 | if (ret) | |
542 | return ret; | |
543 | ||
544 | if (post_cmd) { | |
545 | ret = system(post_cmd); | |
546 | if (ret) | |
547 | return ret; | |
548 | } | |
549 | ||
550 | return ret; | |
551 | } | |
552 | ||
f99844cb IM |
553 | static void print_noise_pct(double total, double avg) |
554 | { | |
0007ecea | 555 | double pct = rel_stddev_stats(total, avg); |
f99844cb | 556 | |
3ae9a34d | 557 | if (csv_output) |
4aa9015f | 558 | fprintf(output, "%s%.2f%%", csv_sep, pct); |
a1bca6cc | 559 | else if (pct) |
4aa9015f | 560 | fprintf(output, " ( +-%6.2f%% )", pct); |
f99844cb IM |
561 | } |
562 | ||
69aad6f1 | 563 | static void print_noise(struct perf_evsel *evsel, double avg) |
42202dd5 | 564 | { |
69aad6f1 ACM |
565 | struct perf_stat *ps; |
566 | ||
849abde9 PZ |
567 | if (run_count == 1) |
568 | return; | |
569 | ||
69aad6f1 | 570 | ps = evsel->priv; |
f99844cb | 571 | print_noise_pct(stddev_stats(&ps->res_stats[0]), avg); |
42202dd5 IM |
572 | } |
573 | ||
12c08a9f | 574 | static void aggr_printout(struct perf_evsel *evsel, int id, int nr) |
44175b6f | 575 | { |
86ee6e18 | 576 | switch (aggr_mode) { |
12c08a9f SE |
577 | case AGGR_CORE: |
578 | fprintf(output, "S%d-C%*d%s%*d%s", | |
579 | cpu_map__id_to_socket(id), | |
580 | csv_output ? 0 : -8, | |
581 | cpu_map__id_to_cpu(id), | |
582 | csv_sep, | |
583 | csv_output ? 0 : 4, | |
584 | nr, | |
585 | csv_sep); | |
586 | break; | |
86ee6e18 SE |
587 | case AGGR_SOCKET: |
588 | fprintf(output, "S%*d%s%*d%s", | |
d7e7a451 | 589 | csv_output ? 0 : -5, |
12c08a9f | 590 | id, |
d7e7a451 SE |
591 | csv_sep, |
592 | csv_output ? 0 : 4, | |
593 | nr, | |
594 | csv_sep); | |
86ee6e18 SE |
595 | break; |
596 | case AGGR_NONE: | |
597 | fprintf(output, "CPU%*d%s", | |
d7470b6a | 598 | csv_output ? 0 : -4, |
12c08a9f | 599 | perf_evsel__cpus(evsel)->map[id], csv_sep); |
86ee6e18 SE |
600 | break; |
601 | case AGGR_GLOBAL: | |
602 | default: | |
603 | break; | |
604 | } | |
605 | } | |
606 | ||
607 | static void nsec_printout(int cpu, int nr, struct perf_evsel *evsel, double avg) | |
608 | { | |
609 | double msecs = avg / 1e6; | |
610 | const char *fmt = csv_output ? "%.6f%s%s" : "%18.6f%s%-25s"; | |
611 | ||
612 | aggr_printout(evsel, cpu, nr); | |
d7470b6a | 613 | |
86ee6e18 | 614 | fprintf(output, fmt, msecs, csv_sep, perf_evsel__name(evsel)); |
d7470b6a | 615 | |
023695d9 | 616 | if (evsel->cgrp) |
4aa9015f | 617 | fprintf(output, "%s%s", csv_sep, evsel->cgrp->name); |
023695d9 | 618 | |
13370a9b | 619 | if (csv_output || interval) |
d7470b6a | 620 | return; |
44175b6f | 621 | |
daec78a0 | 622 | if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK)) |
4aa9015f SE |
623 | fprintf(output, " # %8.3f CPUs utilized ", |
624 | avg / avg_stats(&walltime_nsecs_stats)); | |
9dac6a29 NK |
625 | else |
626 | fprintf(output, " "); | |
44175b6f IM |
627 | } |
628 | ||
15e6392f NK |
629 | /* used for get_ratio_color() */ |
630 | enum grc_type { | |
631 | GRC_STALLED_CYCLES_FE, | |
632 | GRC_STALLED_CYCLES_BE, | |
633 | GRC_CACHE_MISSES, | |
634 | GRC_MAX_NR | |
635 | }; | |
636 | ||
637 | static const char *get_ratio_color(enum grc_type type, double ratio) | |
638 | { | |
639 | static const double grc_table[GRC_MAX_NR][3] = { | |
640 | [GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 }, | |
641 | [GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 }, | |
642 | [GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 }, | |
643 | }; | |
644 | const char *color = PERF_COLOR_NORMAL; | |
645 | ||
646 | if (ratio > grc_table[type][0]) | |
647 | color = PERF_COLOR_RED; | |
648 | else if (ratio > grc_table[type][1]) | |
649 | color = PERF_COLOR_MAGENTA; | |
650 | else if (ratio > grc_table[type][2]) | |
651 | color = PERF_COLOR_YELLOW; | |
652 | ||
653 | return color; | |
654 | } | |
655 | ||
1d037ca1 IT |
656 | static void print_stalled_cycles_frontend(int cpu, |
657 | struct perf_evsel *evsel | |
658 | __maybe_unused, double avg) | |
d3d1e86d IM |
659 | { |
660 | double total, ratio = 0.0; | |
661 | const char *color; | |
662 | ||
663 | total = avg_stats(&runtime_cycles_stats[cpu]); | |
664 | ||
665 | if (total) | |
666 | ratio = avg / total * 100.0; | |
667 | ||
15e6392f | 668 | color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio); |
d3d1e86d | 669 | |
4aa9015f SE |
670 | fprintf(output, " # "); |
671 | color_fprintf(output, color, "%6.2f%%", ratio); | |
672 | fprintf(output, " frontend cycles idle "); | |
d3d1e86d IM |
673 | } |
674 | ||
1d037ca1 IT |
675 | static void print_stalled_cycles_backend(int cpu, |
676 | struct perf_evsel *evsel | |
677 | __maybe_unused, double avg) | |
a5d243d0 IM |
678 | { |
679 | double total, ratio = 0.0; | |
680 | const char *color; | |
681 | ||
682 | total = avg_stats(&runtime_cycles_stats[cpu]); | |
683 | ||
684 | if (total) | |
685 | ratio = avg / total * 100.0; | |
686 | ||
15e6392f | 687 | color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio); |
a5d243d0 | 688 | |
4aa9015f SE |
689 | fprintf(output, " # "); |
690 | color_fprintf(output, color, "%6.2f%%", ratio); | |
691 | fprintf(output, " backend cycles idle "); | |
a5d243d0 IM |
692 | } |
693 | ||
1d037ca1 IT |
694 | static void print_branch_misses(int cpu, |
695 | struct perf_evsel *evsel __maybe_unused, | |
696 | double avg) | |
c78df6c1 IM |
697 | { |
698 | double total, ratio = 0.0; | |
699 | const char *color; | |
700 | ||
701 | total = avg_stats(&runtime_branches_stats[cpu]); | |
702 | ||
703 | if (total) | |
704 | ratio = avg / total * 100.0; | |
705 | ||
15e6392f | 706 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
c78df6c1 | 707 | |
4aa9015f SE |
708 | fprintf(output, " # "); |
709 | color_fprintf(output, color, "%6.2f%%", ratio); | |
710 | fprintf(output, " of all branches "); | |
c78df6c1 IM |
711 | } |
712 | ||
1d037ca1 IT |
713 | static void print_l1_dcache_misses(int cpu, |
714 | struct perf_evsel *evsel __maybe_unused, | |
715 | double avg) | |
8bb6c79f IM |
716 | { |
717 | double total, ratio = 0.0; | |
718 | const char *color; | |
719 | ||
720 | total = avg_stats(&runtime_l1_dcache_stats[cpu]); | |
721 | ||
722 | if (total) | |
723 | ratio = avg / total * 100.0; | |
724 | ||
15e6392f | 725 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
8bb6c79f | 726 | |
4aa9015f SE |
727 | fprintf(output, " # "); |
728 | color_fprintf(output, color, "%6.2f%%", ratio); | |
729 | fprintf(output, " of all L1-dcache hits "); | |
8bb6c79f IM |
730 | } |
731 | ||
1d037ca1 IT |
732 | static void print_l1_icache_misses(int cpu, |
733 | struct perf_evsel *evsel __maybe_unused, | |
734 | double avg) | |
c3305257 IM |
735 | { |
736 | double total, ratio = 0.0; | |
737 | const char *color; | |
738 | ||
739 | total = avg_stats(&runtime_l1_icache_stats[cpu]); | |
740 | ||
741 | if (total) | |
742 | ratio = avg / total * 100.0; | |
743 | ||
15e6392f | 744 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
c3305257 | 745 | |
4aa9015f SE |
746 | fprintf(output, " # "); |
747 | color_fprintf(output, color, "%6.2f%%", ratio); | |
748 | fprintf(output, " of all L1-icache hits "); | |
c3305257 IM |
749 | } |
750 | ||
1d037ca1 IT |
751 | static void print_dtlb_cache_misses(int cpu, |
752 | struct perf_evsel *evsel __maybe_unused, | |
753 | double avg) | |
c3305257 IM |
754 | { |
755 | double total, ratio = 0.0; | |
756 | const char *color; | |
757 | ||
758 | total = avg_stats(&runtime_dtlb_cache_stats[cpu]); | |
759 | ||
760 | if (total) | |
761 | ratio = avg / total * 100.0; | |
762 | ||
15e6392f | 763 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
c3305257 | 764 | |
4aa9015f SE |
765 | fprintf(output, " # "); |
766 | color_fprintf(output, color, "%6.2f%%", ratio); | |
767 | fprintf(output, " of all dTLB cache hits "); | |
c3305257 IM |
768 | } |
769 | ||
1d037ca1 IT |
770 | static void print_itlb_cache_misses(int cpu, |
771 | struct perf_evsel *evsel __maybe_unused, | |
772 | double avg) | |
c3305257 IM |
773 | { |
774 | double total, ratio = 0.0; | |
775 | const char *color; | |
776 | ||
777 | total = avg_stats(&runtime_itlb_cache_stats[cpu]); | |
778 | ||
779 | if (total) | |
780 | ratio = avg / total * 100.0; | |
781 | ||
15e6392f | 782 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
c3305257 | 783 | |
4aa9015f SE |
784 | fprintf(output, " # "); |
785 | color_fprintf(output, color, "%6.2f%%", ratio); | |
786 | fprintf(output, " of all iTLB cache hits "); | |
c3305257 IM |
787 | } |
788 | ||
1d037ca1 IT |
789 | static void print_ll_cache_misses(int cpu, |
790 | struct perf_evsel *evsel __maybe_unused, | |
791 | double avg) | |
c3305257 IM |
792 | { |
793 | double total, ratio = 0.0; | |
794 | const char *color; | |
795 | ||
796 | total = avg_stats(&runtime_ll_cache_stats[cpu]); | |
797 | ||
798 | if (total) | |
799 | ratio = avg / total * 100.0; | |
800 | ||
15e6392f | 801 | color = get_ratio_color(GRC_CACHE_MISSES, ratio); |
c3305257 | 802 | |
4aa9015f SE |
803 | fprintf(output, " # "); |
804 | color_fprintf(output, color, "%6.2f%%", ratio); | |
805 | fprintf(output, " of all LL-cache hits "); | |
c3305257 IM |
806 | } |
807 | ||
d7e7a451 | 808 | static void abs_printout(int cpu, int nr, struct perf_evsel *evsel, double avg) |
44175b6f | 809 | { |
c7f7fea3 | 810 | double total, ratio = 0.0; |
d7470b6a SE |
811 | const char *fmt; |
812 | ||
813 | if (csv_output) | |
86ee6e18 | 814 | fmt = "%.0f%s%s"; |
d7470b6a | 815 | else if (big_num) |
86ee6e18 | 816 | fmt = "%'18.0f%s%-25s"; |
d7470b6a | 817 | else |
86ee6e18 | 818 | fmt = "%18.0f%s%-25s"; |
f5b4a9c3 | 819 | |
86ee6e18 SE |
820 | aggr_printout(evsel, cpu, nr); |
821 | ||
822 | if (aggr_mode == AGGR_GLOBAL) | |
f5b4a9c3 | 823 | cpu = 0; |
c7f7fea3 | 824 | |
86ee6e18 | 825 | fprintf(output, fmt, avg, csv_sep, perf_evsel__name(evsel)); |
d7470b6a | 826 | |
023695d9 | 827 | if (evsel->cgrp) |
4aa9015f | 828 | fprintf(output, "%s%s", csv_sep, evsel->cgrp->name); |
023695d9 | 829 | |
13370a9b | 830 | if (csv_output || interval) |
d7470b6a | 831 | return; |
44175b6f | 832 | |
daec78a0 | 833 | if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) { |
f5b4a9c3 | 834 | total = avg_stats(&runtime_cycles_stats[cpu]); |
c7f7fea3 IM |
835 | if (total) |
836 | ratio = avg / total; | |
837 | ||
4aa9015f | 838 | fprintf(output, " # %5.2f insns per cycle ", ratio); |
481f988a | 839 | |
d3d1e86d IM |
840 | total = avg_stats(&runtime_stalled_cycles_front_stats[cpu]); |
841 | total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[cpu])); | |
481f988a IM |
842 | |
843 | if (total && avg) { | |
844 | ratio = total / avg; | |
4aa9015f | 845 | fprintf(output, "\n # %5.2f stalled cycles per insn", ratio); |
481f988a IM |
846 | } |
847 | ||
daec78a0 | 848 | } else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES) && |
f5b4a9c3 | 849 | runtime_branches_stats[cpu].n != 0) { |
c78df6c1 | 850 | print_branch_misses(cpu, evsel, avg); |
8bb6c79f IM |
851 | } else if ( |
852 | evsel->attr.type == PERF_TYPE_HW_CACHE && | |
853 | evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D | | |
854 | ((PERF_COUNT_HW_CACHE_OP_READ) << 8) | | |
855 | ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) && | |
c6264def | 856 | runtime_l1_dcache_stats[cpu].n != 0) { |
8bb6c79f | 857 | print_l1_dcache_misses(cpu, evsel, avg); |
c3305257 IM |
858 | } else if ( |
859 | evsel->attr.type == PERF_TYPE_HW_CACHE && | |
860 | evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I | | |
861 | ((PERF_COUNT_HW_CACHE_OP_READ) << 8) | | |
862 | ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) && | |
863 | runtime_l1_icache_stats[cpu].n != 0) { | |
864 | print_l1_icache_misses(cpu, evsel, avg); | |
865 | } else if ( | |
866 | evsel->attr.type == PERF_TYPE_HW_CACHE && | |
867 | evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB | | |
868 | ((PERF_COUNT_HW_CACHE_OP_READ) << 8) | | |
869 | ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) && | |
870 | runtime_dtlb_cache_stats[cpu].n != 0) { | |
871 | print_dtlb_cache_misses(cpu, evsel, avg); | |
872 | } else if ( | |
873 | evsel->attr.type == PERF_TYPE_HW_CACHE && | |
874 | evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB | | |
875 | ((PERF_COUNT_HW_CACHE_OP_READ) << 8) | | |
876 | ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) && | |
877 | runtime_itlb_cache_stats[cpu].n != 0) { | |
878 | print_itlb_cache_misses(cpu, evsel, avg); | |
879 | } else if ( | |
880 | evsel->attr.type == PERF_TYPE_HW_CACHE && | |
881 | evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL | | |
882 | ((PERF_COUNT_HW_CACHE_OP_READ) << 8) | | |
883 | ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) && | |
884 | runtime_ll_cache_stats[cpu].n != 0) { | |
885 | print_ll_cache_misses(cpu, evsel, avg); | |
d58f4c82 IM |
886 | } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES) && |
887 | runtime_cacherefs_stats[cpu].n != 0) { | |
888 | total = avg_stats(&runtime_cacherefs_stats[cpu]); | |
889 | ||
890 | if (total) | |
891 | ratio = avg * 100 / total; | |
892 | ||
4aa9015f | 893 | fprintf(output, " # %8.3f %% of all cache refs ", ratio); |
d58f4c82 | 894 | |
d3d1e86d IM |
895 | } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) { |
896 | print_stalled_cycles_frontend(cpu, evsel, avg); | |
129c04cb | 897 | } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) { |
d3d1e86d | 898 | print_stalled_cycles_backend(cpu, evsel, avg); |
481f988a | 899 | } else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) { |
f5b4a9c3 | 900 | total = avg_stats(&runtime_nsecs_stats[cpu]); |
c7f7fea3 IM |
901 | |
902 | if (total) | |
481f988a | 903 | ratio = 1.0 * avg / total; |
c7f7fea3 | 904 | |
4aa9015f | 905 | fprintf(output, " # %8.3f GHz ", ratio); |
481f988a | 906 | } else if (runtime_nsecs_stats[cpu].n != 0) { |
5fde2523 NK |
907 | char unit = 'M'; |
908 | ||
481f988a | 909 | total = avg_stats(&runtime_nsecs_stats[cpu]); |
11ba2b85 IM |
910 | |
911 | if (total) | |
481f988a | 912 | ratio = 1000.0 * avg / total; |
5fde2523 NK |
913 | if (ratio < 0.001) { |
914 | ratio *= 1000; | |
915 | unit = 'K'; | |
916 | } | |
11ba2b85 | 917 | |
5fde2523 | 918 | fprintf(output, " # %8.3f %c/sec ", ratio, unit); |
a5d243d0 | 919 | } else { |
4aa9015f | 920 | fprintf(output, " "); |
44175b6f | 921 | } |
44175b6f IM |
922 | } |
923 | ||
86ee6e18 | 924 | static void print_aggr(char *prefix) |
d7e7a451 SE |
925 | { |
926 | struct perf_evsel *counter; | |
86ee6e18 | 927 | int cpu, s, s2, id, nr; |
d7e7a451 | 928 | u64 ena, run, val; |
d7e7a451 | 929 | |
86ee6e18 | 930 | if (!(aggr_map || aggr_get_id)) |
d7e7a451 SE |
931 | return; |
932 | ||
86ee6e18 SE |
933 | for (s = 0; s < aggr_map->nr; s++) { |
934 | id = aggr_map->map[s]; | |
d7e7a451 SE |
935 | list_for_each_entry(counter, &evsel_list->entries, node) { |
936 | val = ena = run = 0; | |
937 | nr = 0; | |
938 | for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) { | |
86ee6e18 SE |
939 | s2 = aggr_get_id(evsel_list->cpus, cpu); |
940 | if (s2 != id) | |
d7e7a451 SE |
941 | continue; |
942 | val += counter->counts->cpu[cpu].val; | |
943 | ena += counter->counts->cpu[cpu].ena; | |
944 | run += counter->counts->cpu[cpu].run; | |
945 | nr++; | |
946 | } | |
947 | if (prefix) | |
948 | fprintf(output, "%s", prefix); | |
949 | ||
950 | if (run == 0 || ena == 0) { | |
86ee6e18 SE |
951 | aggr_printout(counter, cpu, nr); |
952 | ||
953 | fprintf(output, "%*s%s%*s", | |
d7e7a451 SE |
954 | csv_output ? 0 : 18, |
955 | counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED, | |
956 | csv_sep, | |
957 | csv_output ? 0 : -24, | |
958 | perf_evsel__name(counter)); | |
86ee6e18 | 959 | |
d7e7a451 SE |
960 | if (counter->cgrp) |
961 | fprintf(output, "%s%s", | |
962 | csv_sep, counter->cgrp->name); | |
963 | ||
964 | fputc('\n', output); | |
965 | continue; | |
966 | } | |
967 | ||
968 | if (nsec_counter(counter)) | |
86ee6e18 | 969 | nsec_printout(id, nr, counter, val); |
d7e7a451 | 970 | else |
86ee6e18 | 971 | abs_printout(id, nr, counter, val); |
d7e7a451 SE |
972 | |
973 | if (!csv_output) { | |
974 | print_noise(counter, 1.0); | |
975 | ||
976 | if (run != ena) | |
977 | fprintf(output, " (%.2f%%)", | |
978 | 100.0 * run / ena); | |
979 | } | |
980 | fputc('\n', output); | |
981 | } | |
982 | } | |
983 | } | |
984 | ||
2996f5dd IM |
985 | /* |
986 | * Print out the results of a single counter: | |
f5b4a9c3 | 987 | * aggregated counts in system-wide mode |
2996f5dd | 988 | */ |
13370a9b | 989 | static void print_counter_aggr(struct perf_evsel *counter, char *prefix) |
2996f5dd | 990 | { |
69aad6f1 ACM |
991 | struct perf_stat *ps = counter->priv; |
992 | double avg = avg_stats(&ps->res_stats[0]); | |
c52b12ed | 993 | int scaled = counter->counts->scaled; |
2996f5dd | 994 | |
13370a9b SE |
995 | if (prefix) |
996 | fprintf(output, "%s", prefix); | |
997 | ||
2996f5dd | 998 | if (scaled == -1) { |
4aa9015f | 999 | fprintf(output, "%*s%s%*s", |
d7470b6a | 1000 | csv_output ? 0 : 18, |
2cee77c4 | 1001 | counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED, |
023695d9 SE |
1002 | csv_sep, |
1003 | csv_output ? 0 : -24, | |
7289f83c | 1004 | perf_evsel__name(counter)); |
023695d9 SE |
1005 | |
1006 | if (counter->cgrp) | |
4aa9015f | 1007 | fprintf(output, "%s%s", csv_sep, counter->cgrp->name); |
023695d9 | 1008 | |
4aa9015f | 1009 | fputc('\n', output); |
2996f5dd IM |
1010 | return; |
1011 | } | |
c04f5e5d | 1012 | |
44175b6f | 1013 | if (nsec_counter(counter)) |
d7e7a451 | 1014 | nsec_printout(-1, 0, counter, avg); |
44175b6f | 1015 | else |
d7e7a451 | 1016 | abs_printout(-1, 0, counter, avg); |
849abde9 | 1017 | |
3ae9a34d ZH |
1018 | print_noise(counter, avg); |
1019 | ||
d7470b6a | 1020 | if (csv_output) { |
4aa9015f | 1021 | fputc('\n', output); |
d7470b6a SE |
1022 | return; |
1023 | } | |
1024 | ||
506d4bc8 PZ |
1025 | if (scaled) { |
1026 | double avg_enabled, avg_running; | |
1027 | ||
69aad6f1 ACM |
1028 | avg_enabled = avg_stats(&ps->res_stats[1]); |
1029 | avg_running = avg_stats(&ps->res_stats[2]); | |
d7c29318 | 1030 | |
4aa9015f | 1031 | fprintf(output, " [%5.2f%%]", 100 * avg_running / avg_enabled); |
506d4bc8 | 1032 | } |
4aa9015f | 1033 | fprintf(output, "\n"); |
c04f5e5d IM |
1034 | } |
1035 | ||
f5b4a9c3 SE |
1036 | /* |
1037 | * Print out the results of a single counter: | |
1038 | * does not use aggregated count in system-wide | |
1039 | */ | |
13370a9b | 1040 | static void print_counter(struct perf_evsel *counter, char *prefix) |
f5b4a9c3 SE |
1041 | { |
1042 | u64 ena, run, val; | |
1043 | int cpu; | |
1044 | ||
7ae92e74 | 1045 | for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) { |
c52b12ed ACM |
1046 | val = counter->counts->cpu[cpu].val; |
1047 | ena = counter->counts->cpu[cpu].ena; | |
1048 | run = counter->counts->cpu[cpu].run; | |
13370a9b SE |
1049 | |
1050 | if (prefix) | |
1051 | fprintf(output, "%s", prefix); | |
1052 | ||
f5b4a9c3 | 1053 | if (run == 0 || ena == 0) { |
4aa9015f | 1054 | fprintf(output, "CPU%*d%s%*s%s%*s", |
d7470b6a | 1055 | csv_output ? 0 : -4, |
7ae92e74 | 1056 | perf_evsel__cpus(counter)->map[cpu], csv_sep, |
d7470b6a | 1057 | csv_output ? 0 : 18, |
2cee77c4 DA |
1058 | counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED, |
1059 | csv_sep, | |
023695d9 | 1060 | csv_output ? 0 : -24, |
7289f83c | 1061 | perf_evsel__name(counter)); |
f5b4a9c3 | 1062 | |
023695d9 | 1063 | if (counter->cgrp) |
4aa9015f SE |
1064 | fprintf(output, "%s%s", |
1065 | csv_sep, counter->cgrp->name); | |
023695d9 | 1066 | |
4aa9015f | 1067 | fputc('\n', output); |
f5b4a9c3 SE |
1068 | continue; |
1069 | } | |
1070 | ||
1071 | if (nsec_counter(counter)) | |
d7e7a451 | 1072 | nsec_printout(cpu, 0, counter, val); |
f5b4a9c3 | 1073 | else |
d7e7a451 | 1074 | abs_printout(cpu, 0, counter, val); |
f5b4a9c3 | 1075 | |
d7470b6a SE |
1076 | if (!csv_output) { |
1077 | print_noise(counter, 1.0); | |
f5b4a9c3 | 1078 | |
c6264def | 1079 | if (run != ena) |
4aa9015f SE |
1080 | fprintf(output, " (%.2f%%)", |
1081 | 100.0 * run / ena); | |
f5b4a9c3 | 1082 | } |
4aa9015f | 1083 | fputc('\n', output); |
f5b4a9c3 SE |
1084 | } |
1085 | } | |
1086 | ||
42202dd5 IM |
1087 | static void print_stat(int argc, const char **argv) |
1088 | { | |
69aad6f1 ACM |
1089 | struct perf_evsel *counter; |
1090 | int i; | |
42202dd5 | 1091 | |
ddcacfa0 IM |
1092 | fflush(stdout); |
1093 | ||
d7470b6a | 1094 | if (!csv_output) { |
4aa9015f SE |
1095 | fprintf(output, "\n"); |
1096 | fprintf(output, " Performance counter stats for "); | |
aa22dd49 | 1097 | if (!perf_target__has_task(&target)) { |
4aa9015f | 1098 | fprintf(output, "\'%s", argv[0]); |
d7470b6a | 1099 | for (i = 1; i < argc; i++) |
4aa9015f | 1100 | fprintf(output, " %s", argv[i]); |
20f946b4 NK |
1101 | } else if (target.pid) |
1102 | fprintf(output, "process id \'%s", target.pid); | |
d7470b6a | 1103 | else |
20f946b4 | 1104 | fprintf(output, "thread id \'%s", target.tid); |
44db76c8 | 1105 | |
4aa9015f | 1106 | fprintf(output, "\'"); |
d7470b6a | 1107 | if (run_count > 1) |
4aa9015f SE |
1108 | fprintf(output, " (%d runs)", run_count); |
1109 | fprintf(output, ":\n\n"); | |
d7470b6a | 1110 | } |
2996f5dd | 1111 | |
86ee6e18 | 1112 | switch (aggr_mode) { |
12c08a9f | 1113 | case AGGR_CORE: |
86ee6e18 SE |
1114 | case AGGR_SOCKET: |
1115 | print_aggr(NULL); | |
1116 | break; | |
1117 | case AGGR_GLOBAL: | |
361c99a6 | 1118 | list_for_each_entry(counter, &evsel_list->entries, node) |
13370a9b | 1119 | print_counter_aggr(counter, NULL); |
86ee6e18 SE |
1120 | break; |
1121 | case AGGR_NONE: | |
1122 | list_for_each_entry(counter, &evsel_list->entries, node) | |
1123 | print_counter(counter, NULL); | |
1124 | break; | |
1125 | default: | |
1126 | break; | |
f5b4a9c3 | 1127 | } |
ddcacfa0 | 1128 | |
d7470b6a | 1129 | if (!csv_output) { |
c3305257 | 1130 | if (!null_run) |
4aa9015f SE |
1131 | fprintf(output, "\n"); |
1132 | fprintf(output, " %17.9f seconds time elapsed", | |
d7470b6a SE |
1133 | avg_stats(&walltime_nsecs_stats)/1e9); |
1134 | if (run_count > 1) { | |
4aa9015f | 1135 | fprintf(output, " "); |
f99844cb IM |
1136 | print_noise_pct(stddev_stats(&walltime_nsecs_stats), |
1137 | avg_stats(&walltime_nsecs_stats)); | |
d7470b6a | 1138 | } |
4aa9015f | 1139 | fprintf(output, "\n\n"); |
566747e6 | 1140 | } |
ddcacfa0 IM |
1141 | } |
1142 | ||
f7b7c26e PZ |
1143 | static volatile int signr = -1; |
1144 | ||
5242519b | 1145 | static void skip_signal(int signo) |
ddcacfa0 | 1146 | { |
13370a9b | 1147 | if ((child_pid == -1) || interval) |
60666c63 LW |
1148 | done = 1; |
1149 | ||
f7b7c26e | 1150 | signr = signo; |
d07f0b12 SE |
1151 | /* |
1152 | * render child_pid harmless | |
1153 | * won't send SIGTERM to a random | |
1154 | * process in case of race condition | |
1155 | * and fast PID recycling | |
1156 | */ | |
1157 | child_pid = -1; | |
f7b7c26e PZ |
1158 | } |
1159 | ||
1160 | static void sig_atexit(void) | |
1161 | { | |
d07f0b12 SE |
1162 | sigset_t set, oset; |
1163 | ||
1164 | /* | |
1165 | * avoid race condition with SIGCHLD handler | |
1166 | * in skip_signal() which is modifying child_pid | |
1167 | * goal is to avoid send SIGTERM to a random | |
1168 | * process | |
1169 | */ | |
1170 | sigemptyset(&set); | |
1171 | sigaddset(&set, SIGCHLD); | |
1172 | sigprocmask(SIG_BLOCK, &set, &oset); | |
1173 | ||
933da83a CW |
1174 | if (child_pid != -1) |
1175 | kill(child_pid, SIGTERM); | |
1176 | ||
d07f0b12 SE |
1177 | sigprocmask(SIG_SETMASK, &oset, NULL); |
1178 | ||
f7b7c26e PZ |
1179 | if (signr == -1) |
1180 | return; | |
1181 | ||
1182 | signal(signr, SIG_DFL); | |
1183 | kill(getpid(), signr); | |
5242519b IM |
1184 | } |
1185 | ||
1d037ca1 IT |
1186 | static int stat__set_big_num(const struct option *opt __maybe_unused, |
1187 | const char *s __maybe_unused, int unset) | |
d7470b6a SE |
1188 | { |
1189 | big_num_opt = unset ? 0 : 1; | |
1190 | return 0; | |
1191 | } | |
1192 | ||
86ee6e18 SE |
1193 | static int perf_stat_init_aggr_mode(void) |
1194 | { | |
1195 | switch (aggr_mode) { | |
1196 | case AGGR_SOCKET: | |
1197 | if (cpu_map__build_socket_map(evsel_list->cpus, &aggr_map)) { | |
1198 | perror("cannot build socket map"); | |
1199 | return -1; | |
1200 | } | |
1201 | aggr_get_id = cpu_map__get_socket; | |
1202 | break; | |
12c08a9f SE |
1203 | case AGGR_CORE: |
1204 | if (cpu_map__build_core_map(evsel_list->cpus, &aggr_map)) { | |
1205 | perror("cannot build core map"); | |
1206 | return -1; | |
1207 | } | |
1208 | aggr_get_id = cpu_map__get_core; | |
1209 | break; | |
86ee6e18 SE |
1210 | case AGGR_NONE: |
1211 | case AGGR_GLOBAL: | |
1212 | default: | |
1213 | break; | |
1214 | } | |
1215 | return 0; | |
1216 | } | |
1217 | ||
1218 | ||
2cba3ffb IM |
1219 | /* |
1220 | * Add default attributes, if there were no attributes specified or | |
1221 | * if -d/--detailed, -d -d or -d -d -d is used: | |
1222 | */ | |
1223 | static int add_default_attributes(void) | |
1224 | { | |
b070a547 ACM |
1225 | struct perf_event_attr default_attrs[] = { |
1226 | ||
1227 | { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_TASK_CLOCK }, | |
1228 | { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CONTEXT_SWITCHES }, | |
1229 | { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_MIGRATIONS }, | |
1230 | { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_PAGE_FAULTS }, | |
1231 | ||
1232 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_CPU_CYCLES }, | |
1233 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_FRONTEND }, | |
1234 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_BACKEND }, | |
1235 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_INSTRUCTIONS }, | |
1236 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS }, | |
1237 | { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_MISSES }, | |
1238 | ||
1239 | }; | |
1240 | ||
1241 | /* | |
1242 | * Detailed stats (-d), covering the L1 and last level data caches: | |
1243 | */ | |
1244 | struct perf_event_attr detailed_attrs[] = { | |
1245 | ||
1246 | { .type = PERF_TYPE_HW_CACHE, | |
1247 | .config = | |
1248 | PERF_COUNT_HW_CACHE_L1D << 0 | | |
1249 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1250 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1251 | ||
1252 | { .type = PERF_TYPE_HW_CACHE, | |
1253 | .config = | |
1254 | PERF_COUNT_HW_CACHE_L1D << 0 | | |
1255 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1256 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1257 | ||
1258 | { .type = PERF_TYPE_HW_CACHE, | |
1259 | .config = | |
1260 | PERF_COUNT_HW_CACHE_LL << 0 | | |
1261 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1262 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1263 | ||
1264 | { .type = PERF_TYPE_HW_CACHE, | |
1265 | .config = | |
1266 | PERF_COUNT_HW_CACHE_LL << 0 | | |
1267 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1268 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1269 | }; | |
1270 | ||
1271 | /* | |
1272 | * Very detailed stats (-d -d), covering the instruction cache and the TLB caches: | |
1273 | */ | |
1274 | struct perf_event_attr very_detailed_attrs[] = { | |
1275 | ||
1276 | { .type = PERF_TYPE_HW_CACHE, | |
1277 | .config = | |
1278 | PERF_COUNT_HW_CACHE_L1I << 0 | | |
1279 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1280 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1281 | ||
1282 | { .type = PERF_TYPE_HW_CACHE, | |
1283 | .config = | |
1284 | PERF_COUNT_HW_CACHE_L1I << 0 | | |
1285 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1286 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1287 | ||
1288 | { .type = PERF_TYPE_HW_CACHE, | |
1289 | .config = | |
1290 | PERF_COUNT_HW_CACHE_DTLB << 0 | | |
1291 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1292 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1293 | ||
1294 | { .type = PERF_TYPE_HW_CACHE, | |
1295 | .config = | |
1296 | PERF_COUNT_HW_CACHE_DTLB << 0 | | |
1297 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1298 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1299 | ||
1300 | { .type = PERF_TYPE_HW_CACHE, | |
1301 | .config = | |
1302 | PERF_COUNT_HW_CACHE_ITLB << 0 | | |
1303 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1304 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1305 | ||
1306 | { .type = PERF_TYPE_HW_CACHE, | |
1307 | .config = | |
1308 | PERF_COUNT_HW_CACHE_ITLB << 0 | | |
1309 | (PERF_COUNT_HW_CACHE_OP_READ << 8) | | |
1310 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1311 | ||
1312 | }; | |
1313 | ||
1314 | /* | |
1315 | * Very, very detailed stats (-d -d -d), adding prefetch events: | |
1316 | */ | |
1317 | struct perf_event_attr very_very_detailed_attrs[] = { | |
1318 | ||
1319 | { .type = PERF_TYPE_HW_CACHE, | |
1320 | .config = | |
1321 | PERF_COUNT_HW_CACHE_L1D << 0 | | |
1322 | (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) | | |
1323 | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) }, | |
1324 | ||
1325 | { .type = PERF_TYPE_HW_CACHE, | |
1326 | .config = | |
1327 | PERF_COUNT_HW_CACHE_L1D << 0 | | |
1328 | (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) | | |
1329 | (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) }, | |
1330 | }; | |
1331 | ||
2cba3ffb IM |
1332 | /* Set attrs if no event is selected and !null_run: */ |
1333 | if (null_run) | |
1334 | return 0; | |
1335 | ||
1336 | if (!evsel_list->nr_entries) { | |
79695e1b | 1337 | if (perf_evlist__add_default_attrs(evsel_list, default_attrs) < 0) |
50d08e47 | 1338 | return -1; |
2cba3ffb IM |
1339 | } |
1340 | ||
1341 | /* Detailed events get appended to the event list: */ | |
1342 | ||
1343 | if (detailed_run < 1) | |
1344 | return 0; | |
1345 | ||
1346 | /* Append detailed run extra attributes: */ | |
79695e1b | 1347 | if (perf_evlist__add_default_attrs(evsel_list, detailed_attrs) < 0) |
50d08e47 | 1348 | return -1; |
2cba3ffb IM |
1349 | |
1350 | if (detailed_run < 2) | |
1351 | return 0; | |
1352 | ||
1353 | /* Append very detailed run extra attributes: */ | |
79695e1b | 1354 | if (perf_evlist__add_default_attrs(evsel_list, very_detailed_attrs) < 0) |
50d08e47 | 1355 | return -1; |
2cba3ffb IM |
1356 | |
1357 | if (detailed_run < 3) | |
1358 | return 0; | |
1359 | ||
1360 | /* Append very, very detailed run extra attributes: */ | |
79695e1b | 1361 | return perf_evlist__add_default_attrs(evsel_list, very_very_detailed_attrs); |
2cba3ffb IM |
1362 | } |
1363 | ||
1d037ca1 | 1364 | int cmd_stat(int argc, const char **argv, const char *prefix __maybe_unused) |
5242519b | 1365 | { |
1f16c575 | 1366 | bool append_file = false; |
b070a547 ACM |
1367 | int output_fd = 0; |
1368 | const char *output_name = NULL; | |
1369 | const struct option options[] = { | |
1370 | OPT_CALLBACK('e', "event", &evsel_list, "event", | |
1371 | "event selector. use 'perf list' to list available events", | |
1372 | parse_events_option), | |
1373 | OPT_CALLBACK(0, "filter", &evsel_list, "filter", | |
1374 | "event filter", parse_filter), | |
1375 | OPT_BOOLEAN('i', "no-inherit", &no_inherit, | |
1376 | "child tasks do not inherit counters"), | |
1377 | OPT_STRING('p', "pid", &target.pid, "pid", | |
1378 | "stat events on existing process id"), | |
1379 | OPT_STRING('t', "tid", &target.tid, "tid", | |
1380 | "stat events on existing thread id"), | |
1381 | OPT_BOOLEAN('a', "all-cpus", &target.system_wide, | |
1382 | "system-wide collection from all CPUs"), | |
1383 | OPT_BOOLEAN('g', "group", &group, | |
1384 | "put the counters into a counter group"), | |
1385 | OPT_BOOLEAN('c', "scale", &scale, "scale/normalize counters"), | |
1386 | OPT_INCR('v', "verbose", &verbose, | |
1387 | "be more verbose (show counter open errors, etc)"), | |
1388 | OPT_INTEGER('r', "repeat", &run_count, | |
a7e191c3 | 1389 | "repeat command and print average + stddev (max: 100, forever: 0)"), |
b070a547 ACM |
1390 | OPT_BOOLEAN('n', "null", &null_run, |
1391 | "null run - dont start any counters"), | |
1392 | OPT_INCR('d', "detailed", &detailed_run, | |
1393 | "detailed run - start a lot of events"), | |
1394 | OPT_BOOLEAN('S', "sync", &sync_run, | |
1395 | "call sync() before starting a run"), | |
1396 | OPT_CALLBACK_NOOPT('B', "big-num", NULL, NULL, | |
1397 | "print large numbers with thousands\' separators", | |
1398 | stat__set_big_num), | |
1399 | OPT_STRING('C', "cpu", &target.cpu_list, "cpu", | |
1400 | "list of cpus to monitor in system-wide"), | |
86ee6e18 SE |
1401 | OPT_SET_UINT('A', "no-aggr", &aggr_mode, |
1402 | "disable CPU count aggregation", AGGR_NONE), | |
b070a547 ACM |
1403 | OPT_STRING('x', "field-separator", &csv_sep, "separator", |
1404 | "print counts with custom separator"), | |
1405 | OPT_CALLBACK('G', "cgroup", &evsel_list, "name", | |
1406 | "monitor event in cgroup name only", parse_cgroups), | |
1407 | OPT_STRING('o', "output", &output_name, "file", "output file name"), | |
1408 | OPT_BOOLEAN(0, "append", &append_file, "append to the output file"), | |
1409 | OPT_INTEGER(0, "log-fd", &output_fd, | |
1410 | "log output to fd, instead of stderr"), | |
1f16c575 PZ |
1411 | OPT_STRING(0, "pre", &pre_cmd, "command", |
1412 | "command to run prior to the measured command"), | |
1413 | OPT_STRING(0, "post", &post_cmd, "command", | |
1414 | "command to run after to the measured command"), | |
13370a9b SE |
1415 | OPT_UINTEGER('I', "interval-print", &interval, |
1416 | "print counts at regular interval in ms (>= 100)"), | |
d4304958 | 1417 | OPT_SET_UINT(0, "per-socket", &aggr_mode, |
86ee6e18 | 1418 | "aggregate counts per processor socket", AGGR_SOCKET), |
12c08a9f SE |
1419 | OPT_SET_UINT(0, "per-core", &aggr_mode, |
1420 | "aggregate counts per physical processor core", AGGR_CORE), | |
b070a547 ACM |
1421 | OPT_END() |
1422 | }; | |
1423 | const char * const stat_usage[] = { | |
1424 | "perf stat [<options>] [<command>]", | |
1425 | NULL | |
1426 | }; | |
b070a547 | 1427 | int status = -ENOMEM, run_idx; |
4aa9015f | 1428 | const char *mode; |
42202dd5 | 1429 | |
5af52b51 SE |
1430 | setlocale(LC_ALL, ""); |
1431 | ||
334fe7a3 | 1432 | evsel_list = perf_evlist__new(); |
361c99a6 ACM |
1433 | if (evsel_list == NULL) |
1434 | return -ENOMEM; | |
1435 | ||
a0541234 AB |
1436 | argc = parse_options(argc, argv, options, stat_usage, |
1437 | PARSE_OPT_STOP_AT_NON_OPTION); | |
d7470b6a | 1438 | |
4aa9015f SE |
1439 | output = stderr; |
1440 | if (output_name && strcmp(output_name, "-")) | |
1441 | output = NULL; | |
1442 | ||
56f3bae7 JC |
1443 | if (output_name && output_fd) { |
1444 | fprintf(stderr, "cannot use both --output and --log-fd\n"); | |
1445 | usage_with_options(stat_usage, options); | |
1446 | } | |
fc3e4d07 SE |
1447 | |
1448 | if (output_fd < 0) { | |
1449 | fprintf(stderr, "argument to --log-fd must be a > 0\n"); | |
1450 | usage_with_options(stat_usage, options); | |
1451 | } | |
1452 | ||
4aa9015f SE |
1453 | if (!output) { |
1454 | struct timespec tm; | |
1455 | mode = append_file ? "a" : "w"; | |
1456 | ||
1457 | output = fopen(output_name, mode); | |
1458 | if (!output) { | |
1459 | perror("failed to create output file"); | |
fceda7fe | 1460 | return -1; |
4aa9015f SE |
1461 | } |
1462 | clock_gettime(CLOCK_REALTIME, &tm); | |
1463 | fprintf(output, "# started on %s\n", ctime(&tm.tv_sec)); | |
fc3e4d07 | 1464 | } else if (output_fd > 0) { |
56f3bae7 JC |
1465 | mode = append_file ? "a" : "w"; |
1466 | output = fdopen(output_fd, mode); | |
1467 | if (!output) { | |
1468 | perror("Failed opening logfd"); | |
1469 | return -errno; | |
1470 | } | |
4aa9015f SE |
1471 | } |
1472 | ||
d4ffd04d | 1473 | if (csv_sep) { |
d7470b6a | 1474 | csv_output = true; |
d4ffd04d JC |
1475 | if (!strcmp(csv_sep, "\\t")) |
1476 | csv_sep = "\t"; | |
1477 | } else | |
d7470b6a SE |
1478 | csv_sep = DEFAULT_SEPARATOR; |
1479 | ||
1480 | /* | |
1481 | * let the spreadsheet do the pretty-printing | |
1482 | */ | |
1483 | if (csv_output) { | |
61a9f324 | 1484 | /* User explicitly passed -B? */ |
d7470b6a SE |
1485 | if (big_num_opt == 1) { |
1486 | fprintf(stderr, "-B option not supported with -x\n"); | |
1487 | usage_with_options(stat_usage, options); | |
1488 | } else /* Nope, so disable big number formatting */ | |
1489 | big_num = false; | |
1490 | } else if (big_num_opt == 0) /* User passed --no-big-num */ | |
1491 | big_num = false; | |
1492 | ||
aa22dd49 | 1493 | if (!argc && !perf_target__has_task(&target)) |
5242519b | 1494 | usage_with_options(stat_usage, options); |
a7e191c3 | 1495 | if (run_count < 0) { |
42202dd5 | 1496 | usage_with_options(stat_usage, options); |
a7e191c3 FD |
1497 | } else if (run_count == 0) { |
1498 | forever = true; | |
1499 | run_count = 1; | |
1500 | } | |
ddcacfa0 | 1501 | |
023695d9 | 1502 | /* no_aggr, cgroup are for system-wide only */ |
86ee6e18 SE |
1503 | if ((aggr_mode != AGGR_GLOBAL || nr_cgroups) |
1504 | && !perf_target__has_cpu(&target)) { | |
023695d9 SE |
1505 | fprintf(stderr, "both cgroup and no-aggregation " |
1506 | "modes only available in system-wide mode\n"); | |
1507 | ||
f5b4a9c3 | 1508 | usage_with_options(stat_usage, options); |
86ee6e18 | 1509 | return -1; |
d7e7a451 SE |
1510 | } |
1511 | ||
2cba3ffb IM |
1512 | if (add_default_attributes()) |
1513 | goto out; | |
ddcacfa0 | 1514 | |
4bd0f2d2 | 1515 | perf_target__validate(&target); |
5c98d466 | 1516 | |
77a6f014 | 1517 | if (perf_evlist__create_maps(evsel_list, &target) < 0) { |
aa22dd49 | 1518 | if (perf_target__has_task(&target)) |
77a6f014 | 1519 | pr_err("Problems finding threads of monitor\n"); |
aa22dd49 | 1520 | if (perf_target__has_cpu(&target)) |
77a6f014 | 1521 | perror("failed to parse CPUs map"); |
ddcacfa0 | 1522 | |
c45c6ea2 | 1523 | usage_with_options(stat_usage, options); |
60d567e2 ACM |
1524 | return -1; |
1525 | } | |
13370a9b SE |
1526 | if (interval && interval < 100) { |
1527 | pr_err("print interval must be >= 100ms\n"); | |
1528 | usage_with_options(stat_usage, options); | |
1529 | return -1; | |
1530 | } | |
c45c6ea2 | 1531 | |
d134ffb9 ACM |
1532 | if (perf_evlist__alloc_stats(evsel_list, interval)) |
1533 | goto out_free_maps; | |
d6d901c2 | 1534 | |
86ee6e18 SE |
1535 | if (perf_stat_init_aggr_mode()) |
1536 | goto out; | |
1537 | ||
58d7e993 IM |
1538 | /* |
1539 | * We dont want to block the signals - that would cause | |
1540 | * child tasks to inherit that and Ctrl-C would not work. | |
1541 | * What we want is for Ctrl-C to work in the exec()-ed | |
1542 | * task, but being ignored by perf stat itself: | |
1543 | */ | |
f7b7c26e | 1544 | atexit(sig_atexit); |
a7e191c3 FD |
1545 | if (!forever) |
1546 | signal(SIGINT, skip_signal); | |
13370a9b | 1547 | signal(SIGCHLD, skip_signal); |
58d7e993 IM |
1548 | signal(SIGALRM, skip_signal); |
1549 | signal(SIGABRT, skip_signal); | |
1550 | ||
42202dd5 | 1551 | status = 0; |
a7e191c3 | 1552 | for (run_idx = 0; forever || run_idx < run_count; run_idx++) { |
42202dd5 | 1553 | if (run_count != 1 && verbose) |
4aa9015f SE |
1554 | fprintf(output, "[ perf stat: executing run #%d ... ]\n", |
1555 | run_idx + 1); | |
f9cef0a9 | 1556 | |
42202dd5 | 1557 | status = run_perf_stat(argc, argv); |
a7e191c3 FD |
1558 | if (forever && status != -1) { |
1559 | print_stat(argc, argv); | |
d134ffb9 | 1560 | perf_stat__reset_stats(evsel_list); |
a7e191c3 | 1561 | } |
42202dd5 IM |
1562 | } |
1563 | ||
a7e191c3 | 1564 | if (!forever && status != -1 && !interval) |
084ab9f8 | 1565 | print_stat(argc, argv); |
d134ffb9 ACM |
1566 | |
1567 | perf_evlist__free_stats(evsel_list); | |
1568 | out_free_maps: | |
7e2ed097 | 1569 | perf_evlist__delete_maps(evsel_list); |
0015e2e1 ACM |
1570 | out: |
1571 | perf_evlist__delete(evsel_list); | |
42202dd5 | 1572 | return status; |
ddcacfa0 | 1573 | } |