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6eda5838 TG |
1 | #ifndef _PERF_PERF_H |
2 | #define _PERF_PERF_H | |
3 | ||
895f0edc ACM |
4 | struct winsize; |
5 | ||
6 | void get_term_dimensions(struct winsize *ws); | |
7 | ||
11d1578f VW |
8 | #if defined(__i386__) |
9 | #include "../../arch/x86/include/asm/unistd.h" | |
10 | #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") | |
11 | #define cpu_relax() asm volatile("rep; nop" ::: "memory"); | |
fbe96f29 | 12 | #define CPUINFO_PROC "model name" |
eae7a755 IM |
13 | #ifndef __NR_perf_event_open |
14 | # define __NR_perf_event_open 336 | |
15 | #endif | |
11d1578f VW |
16 | #endif |
17 | ||
18 | #if defined(__x86_64__) | |
1a482f38 PZ |
19 | #include "../../arch/x86/include/asm/unistd.h" |
20 | #define rmb() asm volatile("lfence" ::: "memory") | |
21 | #define cpu_relax() asm volatile("rep; nop" ::: "memory"); | |
fbe96f29 | 22 | #define CPUINFO_PROC "model name" |
eae7a755 IM |
23 | #ifndef __NR_perf_event_open |
24 | # define __NR_perf_event_open 298 | |
25 | #endif | |
1a482f38 PZ |
26 | #endif |
27 | ||
28 | #ifdef __powerpc__ | |
d7a1ed16 | 29 | #include "../../arch/powerpc/include/uapi/asm/unistd.h" |
1a482f38 PZ |
30 | #define rmb() asm volatile ("sync" ::: "memory") |
31 | #define cpu_relax() asm volatile ("" ::: "memory"); | |
fbe96f29 | 32 | #define CPUINFO_PROC "cpu" |
1a482f38 PZ |
33 | #endif |
34 | ||
12310e9c MS |
35 | #ifdef __s390__ |
36 | #include "../../arch/s390/include/asm/unistd.h" | |
37 | #define rmb() asm volatile("bcr 15,0" ::: "memory") | |
38 | #define cpu_relax() asm volatile("" ::: "memory"); | |
39 | #endif | |
40 | ||
febe8345 PM |
41 | #ifdef __sh__ |
42 | #include "../../arch/sh/include/asm/unistd.h" | |
43 | #if defined(__SH4A__) || defined(__SH5__) | |
44 | # define rmb() asm volatile("synco" ::: "memory") | |
45 | #else | |
46 | # define rmb() asm volatile("" ::: "memory") | |
47 | #endif | |
48 | #define cpu_relax() asm volatile("" ::: "memory") | |
fbe96f29 | 49 | #define CPUINFO_PROC "cpu type" |
febe8345 PM |
50 | #endif |
51 | ||
2d4618dc KM |
52 | #ifdef __hppa__ |
53 | #include "../../arch/parisc/include/asm/unistd.h" | |
54 | #define rmb() asm volatile("" ::: "memory") | |
55 | #define cpu_relax() asm volatile("" ::: "memory"); | |
fbe96f29 | 56 | #define CPUINFO_PROC "cpu" |
2d4618dc KM |
57 | #endif |
58 | ||
825c9fb4 JA |
59 | #ifdef __sparc__ |
60 | #include "../../arch/sparc/include/asm/unistd.h" | |
61 | #define rmb() asm volatile("":::"memory") | |
62 | #define cpu_relax() asm volatile("":::"memory") | |
fbe96f29 | 63 | #define CPUINFO_PROC "cpu" |
825c9fb4 JA |
64 | #endif |
65 | ||
fcd14b32 MC |
66 | #ifdef __alpha__ |
67 | #include "../../arch/alpha/include/asm/unistd.h" | |
68 | #define rmb() asm volatile("mb" ::: "memory") | |
69 | #define cpu_relax() asm volatile("" ::: "memory") | |
fbe96f29 | 70 | #define CPUINFO_PROC "cpu model" |
fcd14b32 MC |
71 | #endif |
72 | ||
11ada26c TL |
73 | #ifdef __ia64__ |
74 | #include "../../arch/ia64/include/asm/unistd.h" | |
75 | #define rmb() asm volatile ("mf" ::: "memory") | |
76 | #define cpu_relax() asm volatile ("hint @pause" ::: "memory") | |
fbe96f29 | 77 | #define CPUINFO_PROC "model name" |
11ada26c TL |
78 | #endif |
79 | ||
58e9f941 JI |
80 | #ifdef __arm__ |
81 | #include "../../arch/arm/include/asm/unistd.h" | |
82 | /* | |
83 | * Use the __kuser_memory_barrier helper in the CPU helper page. See | |
84 | * arch/arm/kernel/entry-armv.S in the kernel source for details. | |
85 | */ | |
da7196e1 | 86 | #define rmb() ((void(*)(void))0xffff0fa0)() |
58e9f941 | 87 | #define cpu_relax() asm volatile("":::"memory") |
fbe96f29 | 88 | #define CPUINFO_PROC "Processor" |
58e9f941 JI |
89 | #endif |
90 | ||
03089688 WD |
91 | #ifdef __aarch64__ |
92 | #include "../../arch/arm64/include/asm/unistd.h" | |
93 | #define rmb() asm volatile("dmb ld" ::: "memory") | |
94 | #define cpu_relax() asm volatile("yield" ::: "memory") | |
95 | #endif | |
96 | ||
c1e028ef DCZ |
97 | #ifdef __mips__ |
98 | #include "../../arch/mips/include/asm/unistd.h" | |
99 | #define rmb() asm volatile( \ | |
100 | ".set mips2\n\t" \ | |
101 | "sync\n\t" \ | |
102 | ".set mips0" \ | |
103 | : /* no output */ \ | |
104 | : /* no input */ \ | |
105 | : "memory") | |
106 | #define cpu_relax() asm volatile("" ::: "memory") | |
fbe96f29 | 107 | #define CPUINFO_PROC "cpu model" |
c1e028ef DCZ |
108 | #endif |
109 | ||
1a482f38 PZ |
110 | #include <time.h> |
111 | #include <unistd.h> | |
112 | #include <sys/types.h> | |
113 | #include <sys/syscall.h> | |
114 | ||
7d380c8f | 115 | #include "../../include/uapi/linux/perf_event.h" |
7c6a1c65 | 116 | #include "util/types.h" |
8035458f | 117 | #include <stdbool.h> |
1a482f38 | 118 | |
70082dd9 ACM |
119 | struct perf_mmap { |
120 | void *base; | |
121 | int mask; | |
122 | unsigned int prev; | |
123 | }; | |
124 | ||
125 | static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm) | |
126 | { | |
127 | struct perf_event_mmap_page *pc = mm->base; | |
128 | int head = pc->data_head; | |
129 | rmb(); | |
130 | return head; | |
131 | } | |
132 | ||
115d2d89 ACM |
133 | static inline void perf_mmap__write_tail(struct perf_mmap *md, |
134 | unsigned long tail) | |
135 | { | |
136 | struct perf_event_mmap_page *pc = md->base; | |
137 | ||
138 | /* | |
139 | * ensure all reads are done before we write the tail out. | |
140 | */ | |
141 | /* mb(); */ | |
142 | pc->data_tail = tail; | |
143 | } | |
144 | ||
6eda5838 | 145 | /* |
cdd6c482 | 146 | * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all |
6eda5838 TG |
147 | * counters in the current task. |
148 | */ | |
cdd6c482 IM |
149 | #define PR_TASK_PERF_EVENTS_DISABLE 31 |
150 | #define PR_TASK_PERF_EVENTS_ENABLE 32 | |
6eda5838 | 151 | |
a92e7023 TG |
152 | #ifndef NSEC_PER_SEC |
153 | # define NSEC_PER_SEC 1000000000ULL | |
154 | #endif | |
155 | ||
156 | static inline unsigned long long rdclock(void) | |
157 | { | |
158 | struct timespec ts; | |
159 | ||
160 | clock_gettime(CLOCK_MONOTONIC, &ts); | |
161 | return ts.tv_sec * 1000000000ULL + ts.tv_nsec; | |
162 | } | |
6eda5838 TG |
163 | |
164 | /* | |
165 | * Pick up some kernel type conventions: | |
166 | */ | |
167 | #define __user | |
168 | #define asmlinkage | |
169 | ||
6eda5838 TG |
170 | #define unlikely(x) __builtin_expect(!!(x), 0) |
171 | #define min(x, y) ({ \ | |
172 | typeof(x) _min1 = (x); \ | |
173 | typeof(y) _min2 = (y); \ | |
174 | (void) (&_min1 == &_min2); \ | |
175 | _min1 < _min2 ? _min1 : _min2; }) | |
176 | ||
177 | static inline int | |
cdd6c482 | 178 | sys_perf_event_open(struct perf_event_attr *attr, |
6eda5838 TG |
179 | pid_t pid, int cpu, int group_fd, |
180 | unsigned long flags) | |
181 | { | |
cdd6c482 | 182 | return syscall(__NR_perf_event_open, attr, pid, cpu, |
6eda5838 TG |
183 | group_fd, flags); |
184 | } | |
185 | ||
85a9f920 IM |
186 | #define MAX_COUNTERS 256 |
187 | #define MAX_NR_CPUS 256 | |
6eda5838 | 188 | |
8cb76d99 FW |
189 | struct ip_callchain { |
190 | u64 nr; | |
191 | u64 ips[0]; | |
f5970550 PZ |
192 | }; |
193 | ||
b5387528 RAV |
194 | struct branch_flags { |
195 | u64 mispred:1; | |
196 | u64 predicted:1; | |
197 | u64 reserved:62; | |
198 | }; | |
199 | ||
200 | struct branch_entry { | |
201 | u64 from; | |
202 | u64 to; | |
203 | struct branch_flags flags; | |
204 | }; | |
205 | ||
206 | struct branch_stack { | |
207 | u64 nr; | |
208 | struct branch_entry entries[0]; | |
209 | }; | |
210 | ||
8035458f | 211 | extern bool perf_host, perf_guest; |
fbe96f29 | 212 | extern const char perf_version_string[]; |
a1645ce1 | 213 | |
3af6e338 ACM |
214 | void pthread__unblock_sigwinch(void); |
215 | ||
12864b31 | 216 | #include "util/target.h" |
bea03405 | 217 | |
26d33022 JO |
218 | enum perf_call_graph_mode { |
219 | CALLCHAIN_NONE, | |
220 | CALLCHAIN_FP, | |
221 | CALLCHAIN_DWARF | |
222 | }; | |
223 | ||
bea03405 NK |
224 | struct perf_record_opts { |
225 | struct perf_target target; | |
26d33022 | 226 | int call_graph; |
ed80f581 | 227 | bool group; |
0f82ebc4 ACM |
228 | bool inherit_stat; |
229 | bool no_delay; | |
230 | bool no_inherit; | |
231 | bool no_samples; | |
35b9d88e | 232 | bool pipe_output; |
0f82ebc4 ACM |
233 | bool raw_samples; |
234 | bool sample_address; | |
235 | bool sample_time; | |
808e1226 | 236 | bool sample_id_all_missing; |
bc76efe6 | 237 | bool exclude_guest_missing; |
3e76ac78 | 238 | bool period; |
0f82ebc4 | 239 | unsigned int freq; |
01c2d99b | 240 | unsigned int mmap_pages; |
0f82ebc4 | 241 | unsigned int user_freq; |
a00dc319 | 242 | u64 branch_stack; |
0f82ebc4 ACM |
243 | u64 default_interval; |
244 | u64 user_interval; | |
26d33022 | 245 | u16 stack_dump_size; |
0f82ebc4 ACM |
246 | }; |
247 | ||
6eda5838 | 248 | #endif |