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Commit | Line | Data |
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f8a95309 ACM |
1 | /* |
2 | * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com> | |
3 | * | |
4 | * Parts came from builtin-{top,stat,record}.c, see those files for further | |
5 | * copyright notes. | |
6 | * | |
7 | * Released under the GPL v2. (and only v2, not any later version) | |
8 | */ | |
9 | ||
936be503 | 10 | #include <byteswap.h> |
0f6a3015 | 11 | #include <linux/bitops.h> |
85c66be1 | 12 | #include <lk/debugfs.h> |
4e319027 RR |
13 | #include <traceevent/event-parse.h> |
14 | #include <linux/hw_breakpoint.h> | |
15 | #include <linux/perf_event.h> | |
bec19672 | 16 | #include <sys/resource.h> |
4e319027 | 17 | #include "asm/bug.h" |
69aad6f1 | 18 | #include "evsel.h" |
70082dd9 | 19 | #include "evlist.h" |
69aad6f1 | 20 | #include "util.h" |
86bd5e86 | 21 | #include "cpumap.h" |
fd78260b | 22 | #include "thread_map.h" |
12864b31 | 23 | #include "target.h" |
26d33022 | 24 | #include "perf_regs.h" |
e3e1a54f | 25 | #include "debug.h" |
69aad6f1 | 26 | |
594ac61a ACM |
27 | static struct { |
28 | bool sample_id_all; | |
29 | bool exclude_guest; | |
30 | } perf_missing_features; | |
31 | ||
c52b12ed ACM |
32 | #define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y)) |
33 | ||
bde09467 | 34 | static int __perf_evsel__sample_size(u64 sample_type) |
c2a70653 ACM |
35 | { |
36 | u64 mask = sample_type & PERF_SAMPLE_MASK; | |
37 | int size = 0; | |
38 | int i; | |
39 | ||
40 | for (i = 0; i < 64; i++) { | |
41 | if (mask & (1ULL << i)) | |
42 | size++; | |
43 | } | |
44 | ||
45 | size *= sizeof(u64); | |
46 | ||
47 | return size; | |
48 | } | |
49 | ||
4bf9ce1b | 50 | void hists__init(struct hists *hists) |
0e2a5f10 ACM |
51 | { |
52 | memset(hists, 0, sizeof(*hists)); | |
53 | hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT; | |
54 | hists->entries_in = &hists->entries_in_array[0]; | |
55 | hists->entries_collapsed = RB_ROOT; | |
56 | hists->entries = RB_ROOT; | |
57 | pthread_mutex_init(&hists->lock, NULL); | |
58 | } | |
59 | ||
7be5ebe8 ACM |
60 | void __perf_evsel__set_sample_bit(struct perf_evsel *evsel, |
61 | enum perf_event_sample_format bit) | |
62 | { | |
63 | if (!(evsel->attr.sample_type & bit)) { | |
64 | evsel->attr.sample_type |= bit; | |
65 | evsel->sample_size += sizeof(u64); | |
66 | } | |
67 | } | |
68 | ||
69 | void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel, | |
70 | enum perf_event_sample_format bit) | |
71 | { | |
72 | if (evsel->attr.sample_type & bit) { | |
73 | evsel->attr.sample_type &= ~bit; | |
74 | evsel->sample_size -= sizeof(u64); | |
75 | } | |
76 | } | |
77 | ||
7a5a5ca5 ACM |
78 | void perf_evsel__set_sample_id(struct perf_evsel *evsel) |
79 | { | |
80 | perf_evsel__set_sample_bit(evsel, ID); | |
81 | evsel->attr.read_format |= PERF_FORMAT_ID; | |
82 | } | |
83 | ||
ef1d1af2 ACM |
84 | void perf_evsel__init(struct perf_evsel *evsel, |
85 | struct perf_event_attr *attr, int idx) | |
86 | { | |
87 | evsel->idx = idx; | |
88 | evsel->attr = *attr; | |
2cfda562 | 89 | evsel->leader = evsel; |
ef1d1af2 | 90 | INIT_LIST_HEAD(&evsel->node); |
1980c2eb | 91 | hists__init(&evsel->hists); |
bde09467 | 92 | evsel->sample_size = __perf_evsel__sample_size(attr->sample_type); |
ef1d1af2 ACM |
93 | } |
94 | ||
23a2f3ab | 95 | struct perf_evsel *perf_evsel__new(struct perf_event_attr *attr, int idx) |
69aad6f1 ACM |
96 | { |
97 | struct perf_evsel *evsel = zalloc(sizeof(*evsel)); | |
98 | ||
ef1d1af2 ACM |
99 | if (evsel != NULL) |
100 | perf_evsel__init(evsel, attr, idx); | |
69aad6f1 ACM |
101 | |
102 | return evsel; | |
103 | } | |
104 | ||
201b7334 | 105 | struct event_format *event_format__new(const char *sys, const char *name) |
efd2b924 ACM |
106 | { |
107 | int fd, n; | |
108 | char *filename; | |
109 | void *bf = NULL, *nbf; | |
110 | size_t size = 0, alloc_size = 0; | |
111 | struct event_format *format = NULL; | |
112 | ||
113 | if (asprintf(&filename, "%s/%s/%s/format", tracing_events_path, sys, name) < 0) | |
114 | goto out; | |
115 | ||
116 | fd = open(filename, O_RDONLY); | |
117 | if (fd < 0) | |
118 | goto out_free_filename; | |
119 | ||
120 | do { | |
121 | if (size == alloc_size) { | |
122 | alloc_size += BUFSIZ; | |
123 | nbf = realloc(bf, alloc_size); | |
124 | if (nbf == NULL) | |
125 | goto out_free_bf; | |
126 | bf = nbf; | |
127 | } | |
128 | ||
7cab84e8 | 129 | n = read(fd, bf + size, alloc_size - size); |
efd2b924 ACM |
130 | if (n < 0) |
131 | goto out_free_bf; | |
132 | size += n; | |
133 | } while (n > 0); | |
134 | ||
135 | pevent_parse_format(&format, bf, size, sys); | |
136 | ||
137 | out_free_bf: | |
138 | free(bf); | |
139 | close(fd); | |
140 | out_free_filename: | |
141 | free(filename); | |
142 | out: | |
143 | return format; | |
144 | } | |
145 | ||
146 | struct perf_evsel *perf_evsel__newtp(const char *sys, const char *name, int idx) | |
147 | { | |
148 | struct perf_evsel *evsel = zalloc(sizeof(*evsel)); | |
149 | ||
150 | if (evsel != NULL) { | |
151 | struct perf_event_attr attr = { | |
0b80f8b3 ACM |
152 | .type = PERF_TYPE_TRACEPOINT, |
153 | .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME | | |
154 | PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD), | |
efd2b924 ACM |
155 | }; |
156 | ||
e48ffe2b ACM |
157 | if (asprintf(&evsel->name, "%s:%s", sys, name) < 0) |
158 | goto out_free; | |
159 | ||
efd2b924 ACM |
160 | evsel->tp_format = event_format__new(sys, name); |
161 | if (evsel->tp_format == NULL) | |
162 | goto out_free; | |
163 | ||
0b80f8b3 | 164 | event_attr_init(&attr); |
efd2b924 | 165 | attr.config = evsel->tp_format->id; |
0b80f8b3 | 166 | attr.sample_period = 1; |
efd2b924 | 167 | perf_evsel__init(evsel, &attr, idx); |
efd2b924 ACM |
168 | } |
169 | ||
170 | return evsel; | |
171 | ||
172 | out_free: | |
e48ffe2b | 173 | free(evsel->name); |
efd2b924 ACM |
174 | free(evsel); |
175 | return NULL; | |
176 | } | |
177 | ||
8ad7013b | 178 | const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = { |
c410431c ACM |
179 | "cycles", |
180 | "instructions", | |
181 | "cache-references", | |
182 | "cache-misses", | |
183 | "branches", | |
184 | "branch-misses", | |
185 | "bus-cycles", | |
186 | "stalled-cycles-frontend", | |
187 | "stalled-cycles-backend", | |
188 | "ref-cycles", | |
189 | }; | |
190 | ||
dd4f5223 | 191 | static const char *__perf_evsel__hw_name(u64 config) |
c410431c ACM |
192 | { |
193 | if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config]) | |
194 | return perf_evsel__hw_names[config]; | |
195 | ||
196 | return "unknown-hardware"; | |
197 | } | |
198 | ||
27f18617 | 199 | static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size) |
c410431c | 200 | { |
27f18617 | 201 | int colon = 0, r = 0; |
c410431c | 202 | struct perf_event_attr *attr = &evsel->attr; |
c410431c ACM |
203 | bool exclude_guest_default = false; |
204 | ||
205 | #define MOD_PRINT(context, mod) do { \ | |
206 | if (!attr->exclude_##context) { \ | |
27f18617 | 207 | if (!colon) colon = ++r; \ |
c410431c ACM |
208 | r += scnprintf(bf + r, size - r, "%c", mod); \ |
209 | } } while(0) | |
210 | ||
211 | if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) { | |
212 | MOD_PRINT(kernel, 'k'); | |
213 | MOD_PRINT(user, 'u'); | |
214 | MOD_PRINT(hv, 'h'); | |
215 | exclude_guest_default = true; | |
216 | } | |
217 | ||
218 | if (attr->precise_ip) { | |
219 | if (!colon) | |
27f18617 | 220 | colon = ++r; |
c410431c ACM |
221 | r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp"); |
222 | exclude_guest_default = true; | |
223 | } | |
224 | ||
225 | if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) { | |
226 | MOD_PRINT(host, 'H'); | |
227 | MOD_PRINT(guest, 'G'); | |
228 | } | |
229 | #undef MOD_PRINT | |
230 | if (colon) | |
27f18617 | 231 | bf[colon - 1] = ':'; |
c410431c ACM |
232 | return r; |
233 | } | |
234 | ||
27f18617 ACM |
235 | static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size) |
236 | { | |
237 | int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config)); | |
238 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
239 | } | |
240 | ||
8ad7013b | 241 | const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = { |
335c2f5d ACM |
242 | "cpu-clock", |
243 | "task-clock", | |
244 | "page-faults", | |
245 | "context-switches", | |
8ad7013b | 246 | "cpu-migrations", |
335c2f5d ACM |
247 | "minor-faults", |
248 | "major-faults", | |
249 | "alignment-faults", | |
250 | "emulation-faults", | |
251 | }; | |
252 | ||
dd4f5223 | 253 | static const char *__perf_evsel__sw_name(u64 config) |
335c2f5d ACM |
254 | { |
255 | if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config]) | |
256 | return perf_evsel__sw_names[config]; | |
257 | return "unknown-software"; | |
258 | } | |
259 | ||
260 | static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size) | |
261 | { | |
262 | int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config)); | |
263 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
264 | } | |
265 | ||
287e74aa JO |
266 | static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type) |
267 | { | |
268 | int r; | |
269 | ||
270 | r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr); | |
271 | ||
272 | if (type & HW_BREAKPOINT_R) | |
273 | r += scnprintf(bf + r, size - r, "r"); | |
274 | ||
275 | if (type & HW_BREAKPOINT_W) | |
276 | r += scnprintf(bf + r, size - r, "w"); | |
277 | ||
278 | if (type & HW_BREAKPOINT_X) | |
279 | r += scnprintf(bf + r, size - r, "x"); | |
280 | ||
281 | return r; | |
282 | } | |
283 | ||
284 | static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size) | |
285 | { | |
286 | struct perf_event_attr *attr = &evsel->attr; | |
287 | int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type); | |
288 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
289 | } | |
290 | ||
0b668bc9 ACM |
291 | const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX] |
292 | [PERF_EVSEL__MAX_ALIASES] = { | |
293 | { "L1-dcache", "l1-d", "l1d", "L1-data", }, | |
294 | { "L1-icache", "l1-i", "l1i", "L1-instruction", }, | |
295 | { "LLC", "L2", }, | |
296 | { "dTLB", "d-tlb", "Data-TLB", }, | |
297 | { "iTLB", "i-tlb", "Instruction-TLB", }, | |
298 | { "branch", "branches", "bpu", "btb", "bpc", }, | |
299 | { "node", }, | |
300 | }; | |
301 | ||
302 | const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX] | |
303 | [PERF_EVSEL__MAX_ALIASES] = { | |
304 | { "load", "loads", "read", }, | |
305 | { "store", "stores", "write", }, | |
306 | { "prefetch", "prefetches", "speculative-read", "speculative-load", }, | |
307 | }; | |
308 | ||
309 | const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX] | |
310 | [PERF_EVSEL__MAX_ALIASES] = { | |
311 | { "refs", "Reference", "ops", "access", }, | |
312 | { "misses", "miss", }, | |
313 | }; | |
314 | ||
315 | #define C(x) PERF_COUNT_HW_CACHE_##x | |
316 | #define CACHE_READ (1 << C(OP_READ)) | |
317 | #define CACHE_WRITE (1 << C(OP_WRITE)) | |
318 | #define CACHE_PREFETCH (1 << C(OP_PREFETCH)) | |
319 | #define COP(x) (1 << x) | |
320 | ||
321 | /* | |
322 | * cache operartion stat | |
323 | * L1I : Read and prefetch only | |
324 | * ITLB and BPU : Read-only | |
325 | */ | |
326 | static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = { | |
327 | [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
328 | [C(L1I)] = (CACHE_READ | CACHE_PREFETCH), | |
329 | [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
330 | [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
331 | [C(ITLB)] = (CACHE_READ), | |
332 | [C(BPU)] = (CACHE_READ), | |
333 | [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
334 | }; | |
335 | ||
336 | bool perf_evsel__is_cache_op_valid(u8 type, u8 op) | |
337 | { | |
338 | if (perf_evsel__hw_cache_stat[type] & COP(op)) | |
339 | return true; /* valid */ | |
340 | else | |
341 | return false; /* invalid */ | |
342 | } | |
343 | ||
344 | int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result, | |
345 | char *bf, size_t size) | |
346 | { | |
347 | if (result) { | |
348 | return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0], | |
349 | perf_evsel__hw_cache_op[op][0], | |
350 | perf_evsel__hw_cache_result[result][0]); | |
351 | } | |
352 | ||
353 | return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0], | |
354 | perf_evsel__hw_cache_op[op][1]); | |
355 | } | |
356 | ||
dd4f5223 | 357 | static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size) |
0b668bc9 ACM |
358 | { |
359 | u8 op, result, type = (config >> 0) & 0xff; | |
360 | const char *err = "unknown-ext-hardware-cache-type"; | |
361 | ||
362 | if (type > PERF_COUNT_HW_CACHE_MAX) | |
363 | goto out_err; | |
364 | ||
365 | op = (config >> 8) & 0xff; | |
366 | err = "unknown-ext-hardware-cache-op"; | |
367 | if (op > PERF_COUNT_HW_CACHE_OP_MAX) | |
368 | goto out_err; | |
369 | ||
370 | result = (config >> 16) & 0xff; | |
371 | err = "unknown-ext-hardware-cache-result"; | |
372 | if (result > PERF_COUNT_HW_CACHE_RESULT_MAX) | |
373 | goto out_err; | |
374 | ||
375 | err = "invalid-cache"; | |
376 | if (!perf_evsel__is_cache_op_valid(type, op)) | |
377 | goto out_err; | |
378 | ||
379 | return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size); | |
380 | out_err: | |
381 | return scnprintf(bf, size, "%s", err); | |
382 | } | |
383 | ||
384 | static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size) | |
385 | { | |
386 | int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size); | |
387 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
388 | } | |
389 | ||
6eef3d9c ACM |
390 | static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size) |
391 | { | |
392 | int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config); | |
393 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
394 | } | |
395 | ||
7289f83c | 396 | const char *perf_evsel__name(struct perf_evsel *evsel) |
a4460836 | 397 | { |
7289f83c | 398 | char bf[128]; |
a4460836 | 399 | |
7289f83c ACM |
400 | if (evsel->name) |
401 | return evsel->name; | |
c410431c ACM |
402 | |
403 | switch (evsel->attr.type) { | |
404 | case PERF_TYPE_RAW: | |
6eef3d9c | 405 | perf_evsel__raw_name(evsel, bf, sizeof(bf)); |
c410431c ACM |
406 | break; |
407 | ||
408 | case PERF_TYPE_HARDWARE: | |
7289f83c | 409 | perf_evsel__hw_name(evsel, bf, sizeof(bf)); |
c410431c | 410 | break; |
0b668bc9 ACM |
411 | |
412 | case PERF_TYPE_HW_CACHE: | |
7289f83c | 413 | perf_evsel__hw_cache_name(evsel, bf, sizeof(bf)); |
0b668bc9 ACM |
414 | break; |
415 | ||
335c2f5d | 416 | case PERF_TYPE_SOFTWARE: |
7289f83c | 417 | perf_evsel__sw_name(evsel, bf, sizeof(bf)); |
335c2f5d ACM |
418 | break; |
419 | ||
a4460836 | 420 | case PERF_TYPE_TRACEPOINT: |
7289f83c | 421 | scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint"); |
a4460836 ACM |
422 | break; |
423 | ||
287e74aa JO |
424 | case PERF_TYPE_BREAKPOINT: |
425 | perf_evsel__bp_name(evsel, bf, sizeof(bf)); | |
426 | break; | |
427 | ||
c410431c | 428 | default: |
ca1b1457 RR |
429 | scnprintf(bf, sizeof(bf), "unknown attr type: %d", |
430 | evsel->attr.type); | |
a4460836 | 431 | break; |
c410431c ACM |
432 | } |
433 | ||
7289f83c ACM |
434 | evsel->name = strdup(bf); |
435 | ||
436 | return evsel->name ?: "unknown"; | |
c410431c ACM |
437 | } |
438 | ||
717e263f NK |
439 | const char *perf_evsel__group_name(struct perf_evsel *evsel) |
440 | { | |
441 | return evsel->group_name ?: "anon group"; | |
442 | } | |
443 | ||
444 | int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size) | |
445 | { | |
446 | int ret; | |
447 | struct perf_evsel *pos; | |
448 | const char *group_name = perf_evsel__group_name(evsel); | |
449 | ||
450 | ret = scnprintf(buf, size, "%s", group_name); | |
451 | ||
452 | ret += scnprintf(buf + ret, size - ret, " { %s", | |
453 | perf_evsel__name(evsel)); | |
454 | ||
455 | for_each_group_member(pos, evsel) | |
456 | ret += scnprintf(buf + ret, size - ret, ", %s", | |
457 | perf_evsel__name(pos)); | |
458 | ||
459 | ret += scnprintf(buf + ret, size - ret, " }"); | |
460 | ||
461 | return ret; | |
462 | } | |
463 | ||
774cb499 JO |
464 | /* |
465 | * The enable_on_exec/disabled value strategy: | |
466 | * | |
467 | * 1) For any type of traced program: | |
468 | * - all independent events and group leaders are disabled | |
469 | * - all group members are enabled | |
470 | * | |
471 | * Group members are ruled by group leaders. They need to | |
472 | * be enabled, because the group scheduling relies on that. | |
473 | * | |
474 | * 2) For traced programs executed by perf: | |
475 | * - all independent events and group leaders have | |
476 | * enable_on_exec set | |
477 | * - we don't specifically enable or disable any event during | |
478 | * the record command | |
479 | * | |
480 | * Independent events and group leaders are initially disabled | |
481 | * and get enabled by exec. Group members are ruled by group | |
482 | * leaders as stated in 1). | |
483 | * | |
484 | * 3) For traced programs attached by perf (pid/tid): | |
485 | * - we specifically enable or disable all events during | |
486 | * the record command | |
487 | * | |
488 | * When attaching events to already running traced we | |
489 | * enable/disable events specifically, as there's no | |
490 | * initial traced exec call. | |
491 | */ | |
cac21425 JO |
492 | void perf_evsel__config(struct perf_evsel *evsel, |
493 | struct perf_record_opts *opts) | |
0f82ebc4 | 494 | { |
3c176311 | 495 | struct perf_evsel *leader = evsel->leader; |
0f82ebc4 ACM |
496 | struct perf_event_attr *attr = &evsel->attr; |
497 | int track = !evsel->idx; /* only the first counter needs these */ | |
498 | ||
594ac61a | 499 | attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1; |
0f82ebc4 | 500 | attr->inherit = !opts->no_inherit; |
0f82ebc4 | 501 | |
7be5ebe8 ACM |
502 | perf_evsel__set_sample_bit(evsel, IP); |
503 | perf_evsel__set_sample_bit(evsel, TID); | |
0f82ebc4 | 504 | |
3c176311 JO |
505 | if (evsel->sample_read) { |
506 | perf_evsel__set_sample_bit(evsel, READ); | |
507 | ||
508 | /* | |
509 | * We need ID even in case of single event, because | |
510 | * PERF_SAMPLE_READ process ID specific data. | |
511 | */ | |
512 | perf_evsel__set_sample_id(evsel); | |
513 | ||
514 | /* | |
515 | * Apply group format only if we belong to group | |
516 | * with more than one members. | |
517 | */ | |
518 | if (leader->nr_members > 1) { | |
519 | attr->read_format |= PERF_FORMAT_GROUP; | |
520 | attr->inherit = 0; | |
521 | } | |
522 | } | |
523 | ||
0f82ebc4 ACM |
524 | /* |
525 | * We default some events to a 1 default interval. But keep | |
526 | * it a weak assumption overridable by the user. | |
527 | */ | |
528 | if (!attr->sample_period || (opts->user_freq != UINT_MAX && | |
529 | opts->user_interval != ULLONG_MAX)) { | |
530 | if (opts->freq) { | |
7be5ebe8 | 531 | perf_evsel__set_sample_bit(evsel, PERIOD); |
0f82ebc4 ACM |
532 | attr->freq = 1; |
533 | attr->sample_freq = opts->freq; | |
534 | } else { | |
535 | attr->sample_period = opts->default_interval; | |
536 | } | |
537 | } | |
538 | ||
3c176311 JO |
539 | /* |
540 | * Disable sampling for all group members other | |
541 | * than leader in case leader 'leads' the sampling. | |
542 | */ | |
543 | if ((leader != evsel) && leader->sample_read) { | |
544 | attr->sample_freq = 0; | |
545 | attr->sample_period = 0; | |
546 | } | |
547 | ||
0f82ebc4 ACM |
548 | if (opts->no_samples) |
549 | attr->sample_freq = 0; | |
550 | ||
551 | if (opts->inherit_stat) | |
552 | attr->inherit_stat = 1; | |
553 | ||
554 | if (opts->sample_address) { | |
7be5ebe8 | 555 | perf_evsel__set_sample_bit(evsel, ADDR); |
0f82ebc4 ACM |
556 | attr->mmap_data = track; |
557 | } | |
558 | ||
26d33022 | 559 | if (opts->call_graph) { |
7be5ebe8 | 560 | perf_evsel__set_sample_bit(evsel, CALLCHAIN); |
0f82ebc4 | 561 | |
26d33022 | 562 | if (opts->call_graph == CALLCHAIN_DWARF) { |
7be5ebe8 ACM |
563 | perf_evsel__set_sample_bit(evsel, REGS_USER); |
564 | perf_evsel__set_sample_bit(evsel, STACK_USER); | |
26d33022 JO |
565 | attr->sample_regs_user = PERF_REGS_MASK; |
566 | attr->sample_stack_user = opts->stack_dump_size; | |
567 | attr->exclude_callchain_user = 1; | |
568 | } | |
569 | } | |
570 | ||
e40ee742 | 571 | if (perf_target__has_cpu(&opts->target)) |
7be5ebe8 | 572 | perf_evsel__set_sample_bit(evsel, CPU); |
0f82ebc4 | 573 | |
3e76ac78 | 574 | if (opts->period) |
7be5ebe8 | 575 | perf_evsel__set_sample_bit(evsel, PERIOD); |
3e76ac78 | 576 | |
594ac61a | 577 | if (!perf_missing_features.sample_id_all && |
d67356e7 | 578 | (opts->sample_time || !opts->no_inherit || |
aa22dd49 | 579 | perf_target__has_cpu(&opts->target))) |
7be5ebe8 | 580 | perf_evsel__set_sample_bit(evsel, TIME); |
0f82ebc4 ACM |
581 | |
582 | if (opts->raw_samples) { | |
7be5ebe8 ACM |
583 | perf_evsel__set_sample_bit(evsel, TIME); |
584 | perf_evsel__set_sample_bit(evsel, RAW); | |
585 | perf_evsel__set_sample_bit(evsel, CPU); | |
0f82ebc4 ACM |
586 | } |
587 | ||
ccf49bfc SE |
588 | if (opts->sample_address) |
589 | attr->sample_type |= PERF_SAMPLE_DATA_SRC; | |
590 | ||
0f82ebc4 ACM |
591 | if (opts->no_delay) { |
592 | attr->watermark = 0; | |
593 | attr->wakeup_events = 1; | |
594 | } | |
bdfebd84 | 595 | if (opts->branch_stack) { |
7be5ebe8 | 596 | perf_evsel__set_sample_bit(evsel, BRANCH_STACK); |
bdfebd84 RAV |
597 | attr->branch_sample_type = opts->branch_stack; |
598 | } | |
0f82ebc4 | 599 | |
05484298 AK |
600 | if (opts->sample_weight) |
601 | attr->sample_type |= PERF_SAMPLE_WEIGHT; | |
602 | ||
0f82ebc4 ACM |
603 | attr->mmap = track; |
604 | attr->comm = track; | |
605 | ||
774cb499 JO |
606 | /* |
607 | * XXX see the function comment above | |
608 | * | |
609 | * Disabling only independent events or group leaders, | |
610 | * keeping group members enabled. | |
611 | */ | |
823254ed | 612 | if (perf_evsel__is_group_leader(evsel)) |
774cb499 JO |
613 | attr->disabled = 1; |
614 | ||
615 | /* | |
616 | * Setting enable_on_exec for independent events and | |
617 | * group leaders for traced executed by perf. | |
618 | */ | |
823254ed | 619 | if (perf_target__none(&opts->target) && perf_evsel__is_group_leader(evsel)) |
0f82ebc4 | 620 | attr->enable_on_exec = 1; |
0f82ebc4 ACM |
621 | } |
622 | ||
69aad6f1 ACM |
623 | int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
624 | { | |
4af4c955 | 625 | int cpu, thread; |
69aad6f1 | 626 | evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int)); |
4af4c955 DA |
627 | |
628 | if (evsel->fd) { | |
629 | for (cpu = 0; cpu < ncpus; cpu++) { | |
630 | for (thread = 0; thread < nthreads; thread++) { | |
631 | FD(evsel, cpu, thread) = -1; | |
632 | } | |
633 | } | |
634 | } | |
635 | ||
69aad6f1 ACM |
636 | return evsel->fd != NULL ? 0 : -ENOMEM; |
637 | } | |
638 | ||
e2407bef AK |
639 | static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads, |
640 | int ioc, void *arg) | |
745cefc5 ACM |
641 | { |
642 | int cpu, thread; | |
643 | ||
644 | for (cpu = 0; cpu < ncpus; cpu++) { | |
645 | for (thread = 0; thread < nthreads; thread++) { | |
646 | int fd = FD(evsel, cpu, thread), | |
e2407bef | 647 | err = ioctl(fd, ioc, arg); |
745cefc5 ACM |
648 | |
649 | if (err) | |
650 | return err; | |
651 | } | |
652 | } | |
653 | ||
654 | return 0; | |
655 | } | |
656 | ||
e2407bef AK |
657 | int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads, |
658 | const char *filter) | |
659 | { | |
660 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
661 | PERF_EVENT_IOC_SET_FILTER, | |
662 | (void *)filter); | |
663 | } | |
664 | ||
665 | int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads) | |
666 | { | |
667 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
668 | PERF_EVENT_IOC_ENABLE, | |
669 | 0); | |
670 | } | |
671 | ||
70db7533 ACM |
672 | int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads) |
673 | { | |
a91e5431 ACM |
674 | evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id)); |
675 | if (evsel->sample_id == NULL) | |
676 | return -ENOMEM; | |
677 | ||
678 | evsel->id = zalloc(ncpus * nthreads * sizeof(u64)); | |
679 | if (evsel->id == NULL) { | |
680 | xyarray__delete(evsel->sample_id); | |
681 | evsel->sample_id = NULL; | |
682 | return -ENOMEM; | |
683 | } | |
684 | ||
685 | return 0; | |
70db7533 ACM |
686 | } |
687 | ||
a7e191c3 FD |
688 | void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus) |
689 | { | |
690 | memset(evsel->counts, 0, (sizeof(*evsel->counts) + | |
691 | (ncpus * sizeof(struct perf_counts_values)))); | |
692 | } | |
693 | ||
c52b12ed ACM |
694 | int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus) |
695 | { | |
696 | evsel->counts = zalloc((sizeof(*evsel->counts) + | |
697 | (ncpus * sizeof(struct perf_counts_values)))); | |
698 | return evsel->counts != NULL ? 0 : -ENOMEM; | |
699 | } | |
700 | ||
69aad6f1 ACM |
701 | void perf_evsel__free_fd(struct perf_evsel *evsel) |
702 | { | |
703 | xyarray__delete(evsel->fd); | |
704 | evsel->fd = NULL; | |
705 | } | |
706 | ||
70db7533 ACM |
707 | void perf_evsel__free_id(struct perf_evsel *evsel) |
708 | { | |
a91e5431 ACM |
709 | xyarray__delete(evsel->sample_id); |
710 | evsel->sample_id = NULL; | |
711 | free(evsel->id); | |
70db7533 ACM |
712 | evsel->id = NULL; |
713 | } | |
714 | ||
c52b12ed ACM |
715 | void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
716 | { | |
717 | int cpu, thread; | |
718 | ||
719 | for (cpu = 0; cpu < ncpus; cpu++) | |
720 | for (thread = 0; thread < nthreads; ++thread) { | |
721 | close(FD(evsel, cpu, thread)); | |
722 | FD(evsel, cpu, thread) = -1; | |
723 | } | |
724 | } | |
725 | ||
43f8e76e NK |
726 | void perf_evsel__free_counts(struct perf_evsel *evsel) |
727 | { | |
728 | free(evsel->counts); | |
729 | } | |
730 | ||
ef1d1af2 | 731 | void perf_evsel__exit(struct perf_evsel *evsel) |
69aad6f1 ACM |
732 | { |
733 | assert(list_empty(&evsel->node)); | |
736b05a0 NK |
734 | perf_evsel__free_fd(evsel); |
735 | perf_evsel__free_id(evsel); | |
ef1d1af2 ACM |
736 | } |
737 | ||
738 | void perf_evsel__delete(struct perf_evsel *evsel) | |
739 | { | |
740 | perf_evsel__exit(evsel); | |
023695d9 | 741 | close_cgroup(evsel->cgrp); |
6a4bb04c | 742 | free(evsel->group_name); |
e48ffe2b | 743 | if (evsel->tp_format) |
efd2b924 | 744 | pevent_free_format(evsel->tp_format); |
f0c55bcf | 745 | free(evsel->name); |
69aad6f1 ACM |
746 | free(evsel); |
747 | } | |
c52b12ed | 748 | |
c7a79c47 SE |
749 | static inline void compute_deltas(struct perf_evsel *evsel, |
750 | int cpu, | |
751 | struct perf_counts_values *count) | |
752 | { | |
753 | struct perf_counts_values tmp; | |
754 | ||
755 | if (!evsel->prev_raw_counts) | |
756 | return; | |
757 | ||
758 | if (cpu == -1) { | |
759 | tmp = evsel->prev_raw_counts->aggr; | |
760 | evsel->prev_raw_counts->aggr = *count; | |
761 | } else { | |
762 | tmp = evsel->prev_raw_counts->cpu[cpu]; | |
763 | evsel->prev_raw_counts->cpu[cpu] = *count; | |
764 | } | |
765 | ||
766 | count->val = count->val - tmp.val; | |
767 | count->ena = count->ena - tmp.ena; | |
768 | count->run = count->run - tmp.run; | |
769 | } | |
770 | ||
c52b12ed ACM |
771 | int __perf_evsel__read_on_cpu(struct perf_evsel *evsel, |
772 | int cpu, int thread, bool scale) | |
773 | { | |
774 | struct perf_counts_values count; | |
775 | size_t nv = scale ? 3 : 1; | |
776 | ||
777 | if (FD(evsel, cpu, thread) < 0) | |
778 | return -EINVAL; | |
779 | ||
4eed11d5 ACM |
780 | if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0) |
781 | return -ENOMEM; | |
782 | ||
c52b12ed ACM |
783 | if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0) |
784 | return -errno; | |
785 | ||
c7a79c47 SE |
786 | compute_deltas(evsel, cpu, &count); |
787 | ||
c52b12ed ACM |
788 | if (scale) { |
789 | if (count.run == 0) | |
790 | count.val = 0; | |
791 | else if (count.run < count.ena) | |
792 | count.val = (u64)((double)count.val * count.ena / count.run + 0.5); | |
793 | } else | |
794 | count.ena = count.run = 0; | |
795 | ||
796 | evsel->counts->cpu[cpu] = count; | |
797 | return 0; | |
798 | } | |
799 | ||
800 | int __perf_evsel__read(struct perf_evsel *evsel, | |
801 | int ncpus, int nthreads, bool scale) | |
802 | { | |
803 | size_t nv = scale ? 3 : 1; | |
804 | int cpu, thread; | |
805 | struct perf_counts_values *aggr = &evsel->counts->aggr, count; | |
806 | ||
52bcd994 | 807 | aggr->val = aggr->ena = aggr->run = 0; |
c52b12ed ACM |
808 | |
809 | for (cpu = 0; cpu < ncpus; cpu++) { | |
810 | for (thread = 0; thread < nthreads; thread++) { | |
811 | if (FD(evsel, cpu, thread) < 0) | |
812 | continue; | |
813 | ||
814 | if (readn(FD(evsel, cpu, thread), | |
815 | &count, nv * sizeof(u64)) < 0) | |
816 | return -errno; | |
817 | ||
818 | aggr->val += count.val; | |
819 | if (scale) { | |
820 | aggr->ena += count.ena; | |
821 | aggr->run += count.run; | |
822 | } | |
823 | } | |
824 | } | |
825 | ||
c7a79c47 SE |
826 | compute_deltas(evsel, -1, aggr); |
827 | ||
c52b12ed ACM |
828 | evsel->counts->scaled = 0; |
829 | if (scale) { | |
830 | if (aggr->run == 0) { | |
831 | evsel->counts->scaled = -1; | |
832 | aggr->val = 0; | |
833 | return 0; | |
834 | } | |
835 | ||
836 | if (aggr->run < aggr->ena) { | |
837 | evsel->counts->scaled = 1; | |
838 | aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5); | |
839 | } | |
840 | } else | |
841 | aggr->ena = aggr->run = 0; | |
842 | ||
843 | return 0; | |
844 | } | |
48290609 | 845 | |
6a4bb04c JO |
846 | static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread) |
847 | { | |
848 | struct perf_evsel *leader = evsel->leader; | |
849 | int fd; | |
850 | ||
823254ed | 851 | if (perf_evsel__is_group_leader(evsel)) |
6a4bb04c JO |
852 | return -1; |
853 | ||
854 | /* | |
855 | * Leader must be already processed/open, | |
856 | * if not it's a bug. | |
857 | */ | |
858 | BUG_ON(!leader->fd); | |
859 | ||
860 | fd = FD(leader, cpu, thread); | |
861 | BUG_ON(fd == -1); | |
862 | ||
863 | return fd; | |
864 | } | |
865 | ||
e3e1a54f AH |
866 | #define __PRINT_ATTR(fmt, cast, field) \ |
867 | fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field) | |
868 | ||
869 | #define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field) | |
870 | #define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field) | |
871 | #define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field) | |
872 | #define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field) | |
873 | ||
874 | #define PRINT_ATTR2N(name1, field1, name2, field2) \ | |
875 | fprintf(fp, " %-19s %u %-19s %u\n", \ | |
876 | name1, attr->field1, name2, attr->field2) | |
877 | ||
878 | #define PRINT_ATTR2(field1, field2) \ | |
879 | PRINT_ATTR2N(#field1, field1, #field2, field2) | |
880 | ||
881 | static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp) | |
882 | { | |
883 | size_t ret = 0; | |
884 | ||
885 | ret += fprintf(fp, "%.60s\n", graph_dotted_line); | |
886 | ret += fprintf(fp, "perf_event_attr:\n"); | |
887 | ||
888 | ret += PRINT_ATTR_U32(type); | |
889 | ret += PRINT_ATTR_U32(size); | |
890 | ret += PRINT_ATTR_X64(config); | |
891 | ret += PRINT_ATTR_U64(sample_period); | |
892 | ret += PRINT_ATTR_U64(sample_freq); | |
893 | ret += PRINT_ATTR_X64(sample_type); | |
894 | ret += PRINT_ATTR_X64(read_format); | |
895 | ||
896 | ret += PRINT_ATTR2(disabled, inherit); | |
897 | ret += PRINT_ATTR2(pinned, exclusive); | |
898 | ret += PRINT_ATTR2(exclude_user, exclude_kernel); | |
899 | ret += PRINT_ATTR2(exclude_hv, exclude_idle); | |
900 | ret += PRINT_ATTR2(mmap, comm); | |
901 | ret += PRINT_ATTR2(freq, inherit_stat); | |
902 | ret += PRINT_ATTR2(enable_on_exec, task); | |
903 | ret += PRINT_ATTR2(watermark, precise_ip); | |
904 | ret += PRINT_ATTR2(mmap_data, sample_id_all); | |
905 | ret += PRINT_ATTR2(exclude_host, exclude_guest); | |
906 | ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel, | |
907 | "excl.callchain_user", exclude_callchain_user); | |
908 | ||
909 | ret += PRINT_ATTR_U32(wakeup_events); | |
910 | ret += PRINT_ATTR_U32(wakeup_watermark); | |
911 | ret += PRINT_ATTR_X32(bp_type); | |
912 | ret += PRINT_ATTR_X64(bp_addr); | |
913 | ret += PRINT_ATTR_X64(config1); | |
914 | ret += PRINT_ATTR_U64(bp_len); | |
915 | ret += PRINT_ATTR_X64(config2); | |
916 | ret += PRINT_ATTR_X64(branch_sample_type); | |
917 | ret += PRINT_ATTR_X64(sample_regs_user); | |
918 | ret += PRINT_ATTR_U32(sample_stack_user); | |
919 | ||
920 | ret += fprintf(fp, "%.60s\n", graph_dotted_line); | |
921 | ||
922 | return ret; | |
923 | } | |
924 | ||
0252208e | 925 | static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 926 | struct thread_map *threads) |
48290609 | 927 | { |
0252208e | 928 | int cpu, thread; |
023695d9 | 929 | unsigned long flags = 0; |
727ab04e | 930 | int pid = -1, err; |
bec19672 | 931 | enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE; |
48290609 | 932 | |
0252208e ACM |
933 | if (evsel->fd == NULL && |
934 | perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0) | |
727ab04e | 935 | return -ENOMEM; |
4eed11d5 | 936 | |
023695d9 SE |
937 | if (evsel->cgrp) { |
938 | flags = PERF_FLAG_PID_CGROUP; | |
939 | pid = evsel->cgrp->fd; | |
940 | } | |
941 | ||
594ac61a ACM |
942 | fallback_missing_features: |
943 | if (perf_missing_features.exclude_guest) | |
944 | evsel->attr.exclude_guest = evsel->attr.exclude_host = 0; | |
945 | retry_sample_id: | |
946 | if (perf_missing_features.sample_id_all) | |
947 | evsel->attr.sample_id_all = 0; | |
948 | ||
e3e1a54f AH |
949 | if (verbose >= 2) |
950 | perf_event_attr__fprintf(&evsel->attr, stderr); | |
951 | ||
86bd5e86 | 952 | for (cpu = 0; cpu < cpus->nr; cpu++) { |
9d04f178 | 953 | |
0252208e | 954 | for (thread = 0; thread < threads->nr; thread++) { |
6a4bb04c | 955 | int group_fd; |
023695d9 SE |
956 | |
957 | if (!evsel->cgrp) | |
958 | pid = threads->map[thread]; | |
959 | ||
6a4bb04c | 960 | group_fd = get_group_fd(evsel, cpu, thread); |
bec19672 | 961 | retry_open: |
e3e1a54f AH |
962 | pr_debug2("perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n", |
963 | pid, cpus->map[cpu], group_fd, flags); | |
964 | ||
0252208e | 965 | FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr, |
023695d9 | 966 | pid, |
f08199d3 | 967 | cpus->map[cpu], |
023695d9 | 968 | group_fd, flags); |
727ab04e ACM |
969 | if (FD(evsel, cpu, thread) < 0) { |
970 | err = -errno; | |
594ac61a | 971 | goto try_fallback; |
727ab04e | 972 | } |
bec19672 | 973 | set_rlimit = NO_CHANGE; |
0252208e | 974 | } |
48290609 ACM |
975 | } |
976 | ||
977 | return 0; | |
978 | ||
594ac61a | 979 | try_fallback: |
bec19672 AK |
980 | /* |
981 | * perf stat needs between 5 and 22 fds per CPU. When we run out | |
982 | * of them try to increase the limits. | |
983 | */ | |
984 | if (err == -EMFILE && set_rlimit < INCREASED_MAX) { | |
985 | struct rlimit l; | |
986 | int old_errno = errno; | |
987 | ||
988 | if (getrlimit(RLIMIT_NOFILE, &l) == 0) { | |
989 | if (set_rlimit == NO_CHANGE) | |
990 | l.rlim_cur = l.rlim_max; | |
991 | else { | |
992 | l.rlim_cur = l.rlim_max + 1000; | |
993 | l.rlim_max = l.rlim_cur; | |
994 | } | |
995 | if (setrlimit(RLIMIT_NOFILE, &l) == 0) { | |
996 | set_rlimit++; | |
997 | errno = old_errno; | |
998 | goto retry_open; | |
999 | } | |
1000 | } | |
1001 | errno = old_errno; | |
1002 | } | |
1003 | ||
594ac61a ACM |
1004 | if (err != -EINVAL || cpu > 0 || thread > 0) |
1005 | goto out_close; | |
1006 | ||
1007 | if (!perf_missing_features.exclude_guest && | |
1008 | (evsel->attr.exclude_guest || evsel->attr.exclude_host)) { | |
1009 | perf_missing_features.exclude_guest = true; | |
1010 | goto fallback_missing_features; | |
1011 | } else if (!perf_missing_features.sample_id_all) { | |
1012 | perf_missing_features.sample_id_all = true; | |
1013 | goto retry_sample_id; | |
1014 | } | |
1015 | ||
48290609 | 1016 | out_close: |
0252208e ACM |
1017 | do { |
1018 | while (--thread >= 0) { | |
1019 | close(FD(evsel, cpu, thread)); | |
1020 | FD(evsel, cpu, thread) = -1; | |
1021 | } | |
1022 | thread = threads->nr; | |
1023 | } while (--cpu >= 0); | |
727ab04e ACM |
1024 | return err; |
1025 | } | |
1026 | ||
1027 | void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads) | |
1028 | { | |
1029 | if (evsel->fd == NULL) | |
1030 | return; | |
1031 | ||
1032 | perf_evsel__close_fd(evsel, ncpus, nthreads); | |
1033 | perf_evsel__free_fd(evsel); | |
1034 | evsel->fd = NULL; | |
48290609 ACM |
1035 | } |
1036 | ||
0252208e ACM |
1037 | static struct { |
1038 | struct cpu_map map; | |
1039 | int cpus[1]; | |
1040 | } empty_cpu_map = { | |
1041 | .map.nr = 1, | |
1042 | .cpus = { -1, }, | |
1043 | }; | |
1044 | ||
1045 | static struct { | |
1046 | struct thread_map map; | |
1047 | int threads[1]; | |
1048 | } empty_thread_map = { | |
1049 | .map.nr = 1, | |
1050 | .threads = { -1, }, | |
1051 | }; | |
1052 | ||
f08199d3 | 1053 | int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 1054 | struct thread_map *threads) |
48290609 | 1055 | { |
0252208e ACM |
1056 | if (cpus == NULL) { |
1057 | /* Work around old compiler warnings about strict aliasing */ | |
1058 | cpus = &empty_cpu_map.map; | |
48290609 ACM |
1059 | } |
1060 | ||
0252208e ACM |
1061 | if (threads == NULL) |
1062 | threads = &empty_thread_map.map; | |
48290609 | 1063 | |
6a4bb04c | 1064 | return __perf_evsel__open(evsel, cpus, threads); |
48290609 ACM |
1065 | } |
1066 | ||
f08199d3 | 1067 | int perf_evsel__open_per_cpu(struct perf_evsel *evsel, |
6a4bb04c | 1068 | struct cpu_map *cpus) |
48290609 | 1069 | { |
6a4bb04c | 1070 | return __perf_evsel__open(evsel, cpus, &empty_thread_map.map); |
0252208e | 1071 | } |
48290609 | 1072 | |
f08199d3 | 1073 | int perf_evsel__open_per_thread(struct perf_evsel *evsel, |
6a4bb04c | 1074 | struct thread_map *threads) |
0252208e | 1075 | { |
6a4bb04c | 1076 | return __perf_evsel__open(evsel, &empty_cpu_map.map, threads); |
48290609 | 1077 | } |
70082dd9 | 1078 | |
0807d2d8 ACM |
1079 | static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel, |
1080 | const union perf_event *event, | |
1081 | struct perf_sample *sample) | |
d0dd74e8 | 1082 | { |
0807d2d8 | 1083 | u64 type = evsel->attr.sample_type; |
d0dd74e8 | 1084 | const u64 *array = event->sample.array; |
0807d2d8 | 1085 | bool swapped = evsel->needs_swap; |
37073f9e | 1086 | union u64_swap u; |
d0dd74e8 ACM |
1087 | |
1088 | array += ((event->header.size - | |
1089 | sizeof(event->header)) / sizeof(u64)) - 1; | |
1090 | ||
1091 | if (type & PERF_SAMPLE_CPU) { | |
37073f9e JO |
1092 | u.val64 = *array; |
1093 | if (swapped) { | |
1094 | /* undo swap of u64, then swap on individual u32s */ | |
1095 | u.val64 = bswap_64(u.val64); | |
1096 | u.val32[0] = bswap_32(u.val32[0]); | |
1097 | } | |
1098 | ||
1099 | sample->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1100 | array--; |
1101 | } | |
1102 | ||
1103 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1104 | sample->stream_id = *array; | |
1105 | array--; | |
1106 | } | |
1107 | ||
1108 | if (type & PERF_SAMPLE_ID) { | |
1109 | sample->id = *array; | |
1110 | array--; | |
1111 | } | |
1112 | ||
1113 | if (type & PERF_SAMPLE_TIME) { | |
1114 | sample->time = *array; | |
1115 | array--; | |
1116 | } | |
1117 | ||
1118 | if (type & PERF_SAMPLE_TID) { | |
37073f9e JO |
1119 | u.val64 = *array; |
1120 | if (swapped) { | |
1121 | /* undo swap of u64, then swap on individual u32s */ | |
1122 | u.val64 = bswap_64(u.val64); | |
1123 | u.val32[0] = bswap_32(u.val32[0]); | |
1124 | u.val32[1] = bswap_32(u.val32[1]); | |
1125 | } | |
1126 | ||
1127 | sample->pid = u.val32[0]; | |
1128 | sample->tid = u.val32[1]; | |
d0dd74e8 ACM |
1129 | } |
1130 | ||
1131 | return 0; | |
1132 | } | |
1133 | ||
03b6ea9b AH |
1134 | static inline bool overflow(const void *endp, u16 max_size, const void *offset, |
1135 | u64 size) | |
98e1da90 | 1136 | { |
03b6ea9b AH |
1137 | return size > max_size || offset + size > endp; |
1138 | } | |
98e1da90 | 1139 | |
03b6ea9b AH |
1140 | #define OVERFLOW_CHECK(offset, size, max_size) \ |
1141 | do { \ | |
1142 | if (overflow(endp, (max_size), (offset), (size))) \ | |
1143 | return -EFAULT; \ | |
1144 | } while (0) | |
98e1da90 | 1145 | |
03b6ea9b AH |
1146 | #define OVERFLOW_CHECK_u64(offset) \ |
1147 | OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64)) | |
98e1da90 | 1148 | |
a3f698fe | 1149 | int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event, |
0807d2d8 | 1150 | struct perf_sample *data) |
d0dd74e8 | 1151 | { |
a3f698fe | 1152 | u64 type = evsel->attr.sample_type; |
0807d2d8 | 1153 | bool swapped = evsel->needs_swap; |
d0dd74e8 | 1154 | const u64 *array; |
03b6ea9b AH |
1155 | u16 max_size = event->header.size; |
1156 | const void *endp = (void *)event + max_size; | |
1157 | u64 sz; | |
d0dd74e8 | 1158 | |
936be503 DA |
1159 | /* |
1160 | * used for cross-endian analysis. See git commit 65014ab3 | |
1161 | * for why this goofiness is needed. | |
1162 | */ | |
6a11f92e | 1163 | union u64_swap u; |
936be503 | 1164 | |
f3bda2c9 | 1165 | memset(data, 0, sizeof(*data)); |
d0dd74e8 ACM |
1166 | data->cpu = data->pid = data->tid = -1; |
1167 | data->stream_id = data->id = data->time = -1ULL; | |
a4a03fc7 | 1168 | data->period = 1; |
05484298 | 1169 | data->weight = 0; |
d0dd74e8 ACM |
1170 | |
1171 | if (event->header.type != PERF_RECORD_SAMPLE) { | |
a3f698fe | 1172 | if (!evsel->attr.sample_id_all) |
d0dd74e8 | 1173 | return 0; |
0807d2d8 | 1174 | return perf_evsel__parse_id_sample(evsel, event, data); |
d0dd74e8 ACM |
1175 | } |
1176 | ||
1177 | array = event->sample.array; | |
1178 | ||
03b6ea9b AH |
1179 | /* |
1180 | * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes | |
1181 | * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to | |
1182 | * check the format does not go past the end of the event. | |
1183 | */ | |
a3f698fe | 1184 | if (evsel->sample_size + sizeof(event->header) > event->header.size) |
a2854124 FW |
1185 | return -EFAULT; |
1186 | ||
d0dd74e8 ACM |
1187 | if (type & PERF_SAMPLE_IP) { |
1188 | data->ip = event->ip.ip; | |
1189 | array++; | |
1190 | } | |
1191 | ||
1192 | if (type & PERF_SAMPLE_TID) { | |
936be503 DA |
1193 | u.val64 = *array; |
1194 | if (swapped) { | |
1195 | /* undo swap of u64, then swap on individual u32s */ | |
1196 | u.val64 = bswap_64(u.val64); | |
1197 | u.val32[0] = bswap_32(u.val32[0]); | |
1198 | u.val32[1] = bswap_32(u.val32[1]); | |
1199 | } | |
1200 | ||
1201 | data->pid = u.val32[0]; | |
1202 | data->tid = u.val32[1]; | |
d0dd74e8 ACM |
1203 | array++; |
1204 | } | |
1205 | ||
1206 | if (type & PERF_SAMPLE_TIME) { | |
1207 | data->time = *array; | |
1208 | array++; | |
1209 | } | |
1210 | ||
7cec0922 | 1211 | data->addr = 0; |
d0dd74e8 ACM |
1212 | if (type & PERF_SAMPLE_ADDR) { |
1213 | data->addr = *array; | |
1214 | array++; | |
1215 | } | |
1216 | ||
1217 | data->id = -1ULL; | |
1218 | if (type & PERF_SAMPLE_ID) { | |
1219 | data->id = *array; | |
1220 | array++; | |
1221 | } | |
1222 | ||
1223 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1224 | data->stream_id = *array; | |
1225 | array++; | |
1226 | } | |
1227 | ||
1228 | if (type & PERF_SAMPLE_CPU) { | |
936be503 DA |
1229 | |
1230 | u.val64 = *array; | |
1231 | if (swapped) { | |
1232 | /* undo swap of u64, then swap on individual u32s */ | |
1233 | u.val64 = bswap_64(u.val64); | |
1234 | u.val32[0] = bswap_32(u.val32[0]); | |
1235 | } | |
1236 | ||
1237 | data->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1238 | array++; |
1239 | } | |
1240 | ||
1241 | if (type & PERF_SAMPLE_PERIOD) { | |
1242 | data->period = *array; | |
1243 | array++; | |
1244 | } | |
1245 | ||
1246 | if (type & PERF_SAMPLE_READ) { | |
9ede473c JO |
1247 | u64 read_format = evsel->attr.read_format; |
1248 | ||
03b6ea9b | 1249 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1250 | if (read_format & PERF_FORMAT_GROUP) |
1251 | data->read.group.nr = *array; | |
1252 | else | |
1253 | data->read.one.value = *array; | |
1254 | ||
1255 | array++; | |
1256 | ||
1257 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { | |
03b6ea9b | 1258 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1259 | data->read.time_enabled = *array; |
1260 | array++; | |
1261 | } | |
1262 | ||
1263 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
03b6ea9b | 1264 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1265 | data->read.time_running = *array; |
1266 | array++; | |
1267 | } | |
1268 | ||
1269 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1270 | if (read_format & PERF_FORMAT_GROUP) { | |
03b6ea9b AH |
1271 | const u64 max_group_nr = UINT64_MAX / |
1272 | sizeof(struct sample_read_value); | |
1273 | ||
1274 | if (data->read.group.nr > max_group_nr) | |
1275 | return -EFAULT; | |
1276 | sz = data->read.group.nr * | |
1277 | sizeof(struct sample_read_value); | |
1278 | OVERFLOW_CHECK(array, sz, max_size); | |
1279 | data->read.group.values = | |
1280 | (struct sample_read_value *)array; | |
1281 | array = (void *)array + sz; | |
9ede473c | 1282 | } else { |
03b6ea9b | 1283 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1284 | data->read.one.id = *array; |
1285 | array++; | |
1286 | } | |
d0dd74e8 ACM |
1287 | } |
1288 | ||
1289 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
03b6ea9b | 1290 | const u64 max_callchain_nr = UINT64_MAX / sizeof(u64); |
98e1da90 | 1291 | |
03b6ea9b AH |
1292 | OVERFLOW_CHECK_u64(array); |
1293 | data->callchain = (struct ip_callchain *)array++; | |
1294 | if (data->callchain->nr > max_callchain_nr) | |
98e1da90 | 1295 | return -EFAULT; |
03b6ea9b AH |
1296 | sz = data->callchain->nr * sizeof(u64); |
1297 | OVERFLOW_CHECK(array, sz, max_size); | |
1298 | array = (void *)array + sz; | |
d0dd74e8 ACM |
1299 | } |
1300 | ||
1301 | if (type & PERF_SAMPLE_RAW) { | |
03b6ea9b | 1302 | OVERFLOW_CHECK_u64(array); |
936be503 DA |
1303 | u.val64 = *array; |
1304 | if (WARN_ONCE(swapped, | |
1305 | "Endianness of raw data not corrected!\n")) { | |
1306 | /* undo swap of u64, then swap on individual u32s */ | |
1307 | u.val64 = bswap_64(u.val64); | |
1308 | u.val32[0] = bswap_32(u.val32[0]); | |
1309 | u.val32[1] = bswap_32(u.val32[1]); | |
1310 | } | |
936be503 | 1311 | data->raw_size = u.val32[0]; |
03b6ea9b | 1312 | array = (void *)array + sizeof(u32); |
98e1da90 | 1313 | |
03b6ea9b AH |
1314 | OVERFLOW_CHECK(array, data->raw_size, max_size); |
1315 | data->raw_data = (void *)array; | |
1316 | array = (void *)array + data->raw_size; | |
d0dd74e8 ACM |
1317 | } |
1318 | ||
b5387528 | 1319 | if (type & PERF_SAMPLE_BRANCH_STACK) { |
03b6ea9b AH |
1320 | const u64 max_branch_nr = UINT64_MAX / |
1321 | sizeof(struct branch_entry); | |
b5387528 | 1322 | |
03b6ea9b AH |
1323 | OVERFLOW_CHECK_u64(array); |
1324 | data->branch_stack = (struct branch_stack *)array++; | |
b5387528 | 1325 | |
03b6ea9b AH |
1326 | if (data->branch_stack->nr > max_branch_nr) |
1327 | return -EFAULT; | |
b5387528 | 1328 | sz = data->branch_stack->nr * sizeof(struct branch_entry); |
03b6ea9b AH |
1329 | OVERFLOW_CHECK(array, sz, max_size); |
1330 | array = (void *)array + sz; | |
b5387528 | 1331 | } |
0f6a3015 JO |
1332 | |
1333 | if (type & PERF_SAMPLE_REGS_USER) { | |
03b6ea9b AH |
1334 | u64 avail; |
1335 | ||
0f6a3015 | 1336 | /* First u64 tells us if we have any regs in sample. */ |
03b6ea9b AH |
1337 | OVERFLOW_CHECK_u64(array); |
1338 | avail = *array++; | |
0f6a3015 JO |
1339 | |
1340 | if (avail) { | |
03b6ea9b AH |
1341 | u64 regs_user = evsel->attr.sample_regs_user; |
1342 | ||
1343 | sz = hweight_long(regs_user) * sizeof(u64); | |
1344 | OVERFLOW_CHECK(array, sz, max_size); | |
0f6a3015 | 1345 | data->user_regs.regs = (u64 *)array; |
03b6ea9b | 1346 | array = (void *)array + sz; |
0f6a3015 JO |
1347 | } |
1348 | } | |
1349 | ||
1350 | if (type & PERF_SAMPLE_STACK_USER) { | |
03b6ea9b AH |
1351 | OVERFLOW_CHECK_u64(array); |
1352 | sz = *array++; | |
0f6a3015 JO |
1353 | |
1354 | data->user_stack.offset = ((char *)(array - 1) | |
1355 | - (char *) event); | |
1356 | ||
03b6ea9b | 1357 | if (!sz) { |
0f6a3015 JO |
1358 | data->user_stack.size = 0; |
1359 | } else { | |
03b6ea9b | 1360 | OVERFLOW_CHECK(array, sz, max_size); |
0f6a3015 | 1361 | data->user_stack.data = (char *)array; |
03b6ea9b AH |
1362 | array = (void *)array + sz; |
1363 | OVERFLOW_CHECK_u64(array); | |
54bd2692 | 1364 | data->user_stack.size = *array++; |
0f6a3015 JO |
1365 | } |
1366 | } | |
1367 | ||
05484298 AK |
1368 | data->weight = 0; |
1369 | if (type & PERF_SAMPLE_WEIGHT) { | |
03b6ea9b | 1370 | OVERFLOW_CHECK_u64(array); |
05484298 AK |
1371 | data->weight = *array; |
1372 | array++; | |
1373 | } | |
1374 | ||
98a3b32c SE |
1375 | data->data_src = PERF_MEM_DATA_SRC_NONE; |
1376 | if (type & PERF_SAMPLE_DATA_SRC) { | |
03b6ea9b | 1377 | OVERFLOW_CHECK_u64(array); |
98a3b32c SE |
1378 | data->data_src = *array; |
1379 | array++; | |
1380 | } | |
1381 | ||
d0dd74e8 ACM |
1382 | return 0; |
1383 | } | |
74eec26f AV |
1384 | |
1385 | int perf_event__synthesize_sample(union perf_event *event, u64 type, | |
1386 | const struct perf_sample *sample, | |
1387 | bool swapped) | |
1388 | { | |
1389 | u64 *array; | |
1390 | ||
1391 | /* | |
1392 | * used for cross-endian analysis. See git commit 65014ab3 | |
1393 | * for why this goofiness is needed. | |
1394 | */ | |
6a11f92e | 1395 | union u64_swap u; |
74eec26f AV |
1396 | |
1397 | array = event->sample.array; | |
1398 | ||
1399 | if (type & PERF_SAMPLE_IP) { | |
1400 | event->ip.ip = sample->ip; | |
1401 | array++; | |
1402 | } | |
1403 | ||
1404 | if (type & PERF_SAMPLE_TID) { | |
1405 | u.val32[0] = sample->pid; | |
1406 | u.val32[1] = sample->tid; | |
1407 | if (swapped) { | |
1408 | /* | |
a3f698fe | 1409 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1410 | */ |
1411 | u.val32[0] = bswap_32(u.val32[0]); | |
1412 | u.val32[1] = bswap_32(u.val32[1]); | |
1413 | u.val64 = bswap_64(u.val64); | |
1414 | } | |
1415 | ||
1416 | *array = u.val64; | |
1417 | array++; | |
1418 | } | |
1419 | ||
1420 | if (type & PERF_SAMPLE_TIME) { | |
1421 | *array = sample->time; | |
1422 | array++; | |
1423 | } | |
1424 | ||
1425 | if (type & PERF_SAMPLE_ADDR) { | |
1426 | *array = sample->addr; | |
1427 | array++; | |
1428 | } | |
1429 | ||
1430 | if (type & PERF_SAMPLE_ID) { | |
1431 | *array = sample->id; | |
1432 | array++; | |
1433 | } | |
1434 | ||
1435 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1436 | *array = sample->stream_id; | |
1437 | array++; | |
1438 | } | |
1439 | ||
1440 | if (type & PERF_SAMPLE_CPU) { | |
1441 | u.val32[0] = sample->cpu; | |
1442 | if (swapped) { | |
1443 | /* | |
a3f698fe | 1444 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1445 | */ |
1446 | u.val32[0] = bswap_32(u.val32[0]); | |
1447 | u.val64 = bswap_64(u.val64); | |
1448 | } | |
1449 | *array = u.val64; | |
1450 | array++; | |
1451 | } | |
1452 | ||
1453 | if (type & PERF_SAMPLE_PERIOD) { | |
1454 | *array = sample->period; | |
1455 | array++; | |
1456 | } | |
1457 | ||
1458 | return 0; | |
1459 | } | |
5555ded4 | 1460 | |
efd2b924 ACM |
1461 | struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name) |
1462 | { | |
1463 | return pevent_find_field(evsel->tp_format, name); | |
1464 | } | |
1465 | ||
5d2074ea | 1466 | void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample, |
5555ded4 ACM |
1467 | const char *name) |
1468 | { | |
efd2b924 | 1469 | struct format_field *field = perf_evsel__field(evsel, name); |
5555ded4 ACM |
1470 | int offset; |
1471 | ||
efd2b924 ACM |
1472 | if (!field) |
1473 | return NULL; | |
5555ded4 ACM |
1474 | |
1475 | offset = field->offset; | |
1476 | ||
1477 | if (field->flags & FIELD_IS_DYNAMIC) { | |
1478 | offset = *(int *)(sample->raw_data + field->offset); | |
1479 | offset &= 0xffff; | |
1480 | } | |
1481 | ||
1482 | return sample->raw_data + offset; | |
1483 | } | |
1484 | ||
1485 | u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample, | |
1486 | const char *name) | |
1487 | { | |
efd2b924 | 1488 | struct format_field *field = perf_evsel__field(evsel, name); |
e6b6f679 ACM |
1489 | void *ptr; |
1490 | u64 value; | |
5555ded4 | 1491 | |
efd2b924 ACM |
1492 | if (!field) |
1493 | return 0; | |
5555ded4 | 1494 | |
e6b6f679 | 1495 | ptr = sample->raw_data + field->offset; |
5555ded4 | 1496 | |
e6b6f679 ACM |
1497 | switch (field->size) { |
1498 | case 1: | |
1499 | return *(u8 *)ptr; | |
1500 | case 2: | |
1501 | value = *(u16 *)ptr; | |
1502 | break; | |
1503 | case 4: | |
1504 | value = *(u32 *)ptr; | |
1505 | break; | |
1506 | case 8: | |
1507 | value = *(u64 *)ptr; | |
1508 | break; | |
1509 | default: | |
1510 | return 0; | |
1511 | } | |
1512 | ||
1513 | if (!evsel->needs_swap) | |
1514 | return value; | |
1515 | ||
1516 | switch (field->size) { | |
1517 | case 2: | |
1518 | return bswap_16(value); | |
1519 | case 4: | |
1520 | return bswap_32(value); | |
1521 | case 8: | |
1522 | return bswap_64(value); | |
1523 | default: | |
1524 | return 0; | |
1525 | } | |
1526 | ||
1527 | return 0; | |
5555ded4 | 1528 | } |
0698aedd ACM |
1529 | |
1530 | static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...) | |
1531 | { | |
1532 | va_list args; | |
1533 | int ret = 0; | |
1534 | ||
1535 | if (!*first) { | |
1536 | ret += fprintf(fp, ","); | |
1537 | } else { | |
1538 | ret += fprintf(fp, ":"); | |
1539 | *first = false; | |
1540 | } | |
1541 | ||
1542 | va_start(args, fmt); | |
1543 | ret += vfprintf(fp, fmt, args); | |
1544 | va_end(args); | |
1545 | return ret; | |
1546 | } | |
1547 | ||
1548 | static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value) | |
1549 | { | |
1550 | if (value == 0) | |
1551 | return 0; | |
1552 | ||
1553 | return comma_fprintf(fp, first, " %s: %" PRIu64, field, value); | |
1554 | } | |
1555 | ||
1556 | #define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field) | |
1557 | ||
c79a4393 ACM |
1558 | struct bit_names { |
1559 | int bit; | |
1560 | const char *name; | |
1561 | }; | |
1562 | ||
1563 | static int bits__fprintf(FILE *fp, const char *field, u64 value, | |
1564 | struct bit_names *bits, bool *first) | |
1565 | { | |
1566 | int i = 0, printed = comma_fprintf(fp, first, " %s: ", field); | |
1567 | bool first_bit = true; | |
1568 | ||
1569 | do { | |
1570 | if (value & bits[i].bit) { | |
1571 | printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name); | |
1572 | first_bit = false; | |
1573 | } | |
1574 | } while (bits[++i].name != NULL); | |
1575 | ||
1576 | return printed; | |
1577 | } | |
1578 | ||
1579 | static int sample_type__fprintf(FILE *fp, bool *first, u64 value) | |
1580 | { | |
1581 | #define bit_name(n) { PERF_SAMPLE_##n, #n } | |
1582 | struct bit_names bits[] = { | |
1583 | bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR), | |
1584 | bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU), | |
1585 | bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW), | |
1586 | bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER), | |
1587 | { .name = NULL, } | |
1588 | }; | |
1589 | #undef bit_name | |
1590 | return bits__fprintf(fp, "sample_type", value, bits, first); | |
1591 | } | |
1592 | ||
1593 | static int read_format__fprintf(FILE *fp, bool *first, u64 value) | |
1594 | { | |
1595 | #define bit_name(n) { PERF_FORMAT_##n, #n } | |
1596 | struct bit_names bits[] = { | |
1597 | bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING), | |
1598 | bit_name(ID), bit_name(GROUP), | |
1599 | { .name = NULL, } | |
1600 | }; | |
1601 | #undef bit_name | |
1602 | return bits__fprintf(fp, "read_format", value, bits, first); | |
1603 | } | |
1604 | ||
0698aedd ACM |
1605 | int perf_evsel__fprintf(struct perf_evsel *evsel, |
1606 | struct perf_attr_details *details, FILE *fp) | |
1607 | { | |
1608 | bool first = true; | |
e6ab07d0 NK |
1609 | int printed = 0; |
1610 | ||
e35ef355 | 1611 | if (details->event_group) { |
e6ab07d0 NK |
1612 | struct perf_evsel *pos; |
1613 | ||
1614 | if (!perf_evsel__is_group_leader(evsel)) | |
1615 | return 0; | |
1616 | ||
1617 | if (evsel->nr_members > 1) | |
1618 | printed += fprintf(fp, "%s{", evsel->group_name ?: ""); | |
1619 | ||
1620 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
1621 | for_each_group_member(pos, evsel) | |
1622 | printed += fprintf(fp, ",%s", perf_evsel__name(pos)); | |
1623 | ||
1624 | if (evsel->nr_members > 1) | |
1625 | printed += fprintf(fp, "}"); | |
1626 | goto out; | |
1627 | } | |
1628 | ||
1629 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
0698aedd ACM |
1630 | |
1631 | if (details->verbose || details->freq) { | |
1632 | printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64, | |
1633 | (u64)evsel->attr.sample_freq); | |
1634 | } | |
1635 | ||
1636 | if (details->verbose) { | |
1637 | if_print(type); | |
1638 | if_print(config); | |
1639 | if_print(config1); | |
1640 | if_print(config2); | |
1641 | if_print(size); | |
c79a4393 ACM |
1642 | printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type); |
1643 | if (evsel->attr.read_format) | |
1644 | printed += read_format__fprintf(fp, &first, evsel->attr.read_format); | |
0698aedd ACM |
1645 | if_print(disabled); |
1646 | if_print(inherit); | |
1647 | if_print(pinned); | |
1648 | if_print(exclusive); | |
1649 | if_print(exclude_user); | |
1650 | if_print(exclude_kernel); | |
1651 | if_print(exclude_hv); | |
1652 | if_print(exclude_idle); | |
1653 | if_print(mmap); | |
1654 | if_print(comm); | |
1655 | if_print(freq); | |
1656 | if_print(inherit_stat); | |
1657 | if_print(enable_on_exec); | |
1658 | if_print(task); | |
1659 | if_print(watermark); | |
1660 | if_print(precise_ip); | |
1661 | if_print(mmap_data); | |
1662 | if_print(sample_id_all); | |
1663 | if_print(exclude_host); | |
1664 | if_print(exclude_guest); | |
1665 | if_print(__reserved_1); | |
1666 | if_print(wakeup_events); | |
1667 | if_print(bp_type); | |
1668 | if_print(branch_sample_type); | |
1669 | } | |
e6ab07d0 | 1670 | out: |
0698aedd ACM |
1671 | fputc('\n', fp); |
1672 | return ++printed; | |
1673 | } | |
c0a54341 ACM |
1674 | |
1675 | bool perf_evsel__fallback(struct perf_evsel *evsel, int err, | |
1676 | char *msg, size_t msgsize) | |
1677 | { | |
2b821cce | 1678 | if ((err == ENOENT || err == ENXIO || err == ENODEV) && |
c0a54341 ACM |
1679 | evsel->attr.type == PERF_TYPE_HARDWARE && |
1680 | evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) { | |
1681 | /* | |
1682 | * If it's cycles then fall back to hrtimer based | |
1683 | * cpu-clock-tick sw counter, which is always available even if | |
1684 | * no PMU support. | |
1685 | * | |
1686 | * PPC returns ENXIO until 2.6.37 (behavior changed with commit | |
1687 | * b0a873e). | |
1688 | */ | |
1689 | scnprintf(msg, msgsize, "%s", | |
1690 | "The cycles event is not supported, trying to fall back to cpu-clock-ticks"); | |
1691 | ||
1692 | evsel->attr.type = PERF_TYPE_SOFTWARE; | |
1693 | evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK; | |
1694 | ||
1695 | free(evsel->name); | |
1696 | evsel->name = NULL; | |
1697 | return true; | |
1698 | } | |
1699 | ||
1700 | return false; | |
1701 | } | |
56e52e85 ACM |
1702 | |
1703 | int perf_evsel__open_strerror(struct perf_evsel *evsel, | |
1704 | struct perf_target *target, | |
1705 | int err, char *msg, size_t size) | |
1706 | { | |
1707 | switch (err) { | |
1708 | case EPERM: | |
1709 | case EACCES: | |
b69e63a4 | 1710 | return scnprintf(msg, size, |
56e52e85 ACM |
1711 | "You may not have permission to collect %sstats.\n" |
1712 | "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n" | |
1713 | " -1 - Not paranoid at all\n" | |
1714 | " 0 - Disallow raw tracepoint access for unpriv\n" | |
1715 | " 1 - Disallow cpu events for unpriv\n" | |
1716 | " 2 - Disallow kernel profiling for unpriv", | |
1717 | target->system_wide ? "system-wide " : ""); | |
1718 | case ENOENT: | |
1719 | return scnprintf(msg, size, "The %s event is not supported.", | |
1720 | perf_evsel__name(evsel)); | |
1721 | case EMFILE: | |
1722 | return scnprintf(msg, size, "%s", | |
1723 | "Too many events are opened.\n" | |
1724 | "Try again after reducing the number of events."); | |
1725 | case ENODEV: | |
1726 | if (target->cpu_list) | |
1727 | return scnprintf(msg, size, "%s", | |
1728 | "No such device - did you specify an out-of-range profile CPU?\n"); | |
1729 | break; | |
1730 | case EOPNOTSUPP: | |
1731 | if (evsel->attr.precise_ip) | |
1732 | return scnprintf(msg, size, "%s", | |
1733 | "\'precise\' request may not be supported. Try removing 'p' modifier."); | |
1734 | #if defined(__i386__) || defined(__x86_64__) | |
1735 | if (evsel->attr.type == PERF_TYPE_HARDWARE) | |
1736 | return scnprintf(msg, size, "%s", | |
1737 | "No hardware sampling interrupt available.\n" | |
1738 | "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it."); | |
1739 | #endif | |
1740 | break; | |
1741 | default: | |
1742 | break; | |
1743 | } | |
1744 | ||
1745 | return scnprintf(msg, size, | |
1746 | "The sys_perf_event_open() syscall returned with %d (%s) for event (%s). \n" | |
1747 | "/bin/dmesg may provide additional information.\n" | |
1748 | "No CONFIG_PERF_EVENTS=y kernel support configured?\n", | |
1749 | err, strerror(err), perf_evsel__name(evsel)); | |
1750 | } |